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[thirdparty/u-boot.git] / drivers / bios_emulator / atibios.c
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ece92f85
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1/****************************************************************************
2*
9c7e4b06 3* Video BOOT Graphics Card POST Module
ece92f85
JJ
4*
5* ========================================================================
4c2e3da8 6* Copyright (C) 2007 Freescale Semiconductor, Inc.
ece92f85
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7* Jason Jin <Jason.jin@freescale.com>
8*
9* Copyright (C) 1991-2004 SciTech Software, Inc. All rights reserved.
10*
11* This file may be distributed and/or modified under the terms of the
12* GNU General Public License version 2.0 as published by the Free
13* Software Foundation and appearing in the file LICENSE.GPL included
14* in the packaging of this file.
15*
16* Licensees holding a valid Commercial License for this product from
17* SciTech Software, Inc. may use this file in accordance with the
18* Commercial License Agreement provided with the Software.
19*
20* This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING
21* THE WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22* PURPOSE.
23*
24* See http://www.scitechsoft.com/license/ for information about
25* the licensing options available and how to purchase a Commercial
26* License Agreement.
27*
28* Contact license@scitechsoft.com if any conditions of this licensing
29* are not clear to you, or you have questions about licensing options.
30*
31* ========================================================================
32*
9c7e4b06
WD
33* Language: ANSI C
34* Environment: Linux Kernel
35* Developer: Kendall Bennett
ece92f85 36*
9c7e4b06
WD
37* Description: Module to implement booting PCI/AGP controllers on the
38* bus. We use the x86 real mode emulator to run the BIOS on
39* graphics controllers to bring the cards up.
ece92f85 40*
9c7e4b06
WD
41* Note that at present this module does *not* support
42* multiple controllers.
ece92f85 43*
9c7e4b06
WD
44* The orignal name of this file is warmboot.c.
45* Jason ported this file to u-boot to run the ATI video card
46* BIOS in u-boot.
ece92f85 47****************************************************************************/
d678a59d 48#include <common.h>
401d1c4f 49#include <compiler.h>
4c59f953
SG
50#include <bios_emul.h>
51#include <errno.h>
f7ae49fc 52#include <log.h>
ece92f85 53#include <malloc.h>
cafe8712 54#include <vesa.h>
c05ed00a 55#include <linux/delay.h>
4c59f953 56#include "biosemui.h"
ece92f85
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57
58/* Length of the BIOS image */
9c7e4b06 59#define MAX_BIOSLEN (128 * 1024L)
ece92f85 60
ece92f85
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61/* Place to save PCI BAR's that we change and later restore */
62static u32 saveROMBaseAddress;
63static u32 saveBaseAddress10;
64static u32 saveBaseAddress14;
65static u32 saveBaseAddress18;
66static u32 saveBaseAddress20;
67
222f25f8
SG
68/* Addres im memory of VBE region */
69const int vbe_offset = 0x2000;
70
ca5eb0c5 71#ifdef CONFIG_FRAMEBUFFER_SET_VESA_MODE
222f25f8
SG
72static const void *bios_ptr(const void *buf, BE_VGAInfo *vga_info,
73 u32 x86_dword_ptr)
74{
75 u32 seg_ofs, flat;
76
77 seg_ofs = le32_to_cpu(x86_dword_ptr);
78 flat = ((seg_ofs & 0xffff0000) >> 12) | (seg_ofs & 0xffff);
79 if (flat >= 0xc0000)
80 return vga_info->BIOSImage + flat - 0xc0000;
81 else
82 return buf + (flat - vbe_offset);
83}
84
85static int atibios_debug_mode(BE_VGAInfo *vga_info, RMREGS *regs,
da62e1e8 86 int vesa_mode, struct vesa_state *mode_info)
4c59f953 87{
222f25f8
SG
88 void *buffer = (void *)(M.mem_base + vbe_offset);
89 u16 buffer_seg = (((unsigned long)vbe_offset) >> 4) & 0xff00;
90 u16 buffer_adr = ((unsigned long)vbe_offset) & 0xffff;
91 struct vesa_mode_info *vm;
da62e1e8 92 struct vesa_bios_ext_info *info;
222f25f8
SG
93 const u16 *modes_bios, *ptr;
94 u16 *modes;
95 int size;
96
97 debug("VBE: Getting information\n");
98 regs->e.eax = VESA_GET_INFO;
99 regs->e.esi = buffer_seg;
100 regs->e.edi = buffer_adr;
101 info = buffer;
102 memset(info, '\0', sizeof(*info));
103 strcpy(info->signature, "VBE2");
104 BE_int86(0x10, regs, regs);
105 if (regs->e.eax != 0x4f) {
106 debug("VESA_GET_INFO: error %x\n", regs->e.eax);
107 return -ENOSYS;
108 }
109 debug("version %x\n", le16_to_cpu(info->version));
110 debug("oem '%s'\n", (char *)bios_ptr(buffer, vga_info,
111 info->oem_string_ptr));
112 debug("vendor '%s'\n", (char *)bios_ptr(buffer, vga_info,
113 info->vendor_name_ptr));
114 debug("product '%s'\n", (char *)bios_ptr(buffer, vga_info,
115 info->product_name_ptr));
116 debug("rev '%s'\n", (char *)bios_ptr(buffer, vga_info,
117 info->product_rev_ptr));
118 modes_bios = bios_ptr(buffer, vga_info, info->modes_ptr);
119 debug("Modes: ");
120 for (ptr = modes_bios; *ptr != 0xffff; ptr++)
121 debug("%x ", le16_to_cpu(*ptr));
122 debug("\nmemory %dMB\n", le16_to_cpu(info->total_memory) >> 4);
123 size = (ptr - modes_bios) * sizeof(u16) + 2;
124 modes = malloc(size);
125 if (!modes)
126 return -ENOMEM;
127 memcpy(modes, modes_bios, size);
128
129 regs->e.eax = VESA_GET_CUR_MODE;
130 BE_int86(0x10, regs, regs);
131 if (regs->e.eax != 0x4f) {
132 debug("VESA_GET_CUR_MODE: error %x\n", regs->e.eax);
133 return -ENOSYS;
134 }
135 debug("Current mode %x\n", regs->e.ebx);
136
137 for (ptr = modes; *ptr != 0xffff; ptr++) {
138 int mode = le16_to_cpu(*ptr);
139 bool linear_ok;
140 int attr;
141
222f25f8 142 debug("Mode %x: ", mode);
da62e1e8 143 memset(buffer, '\0', sizeof(struct vesa_state));
222f25f8
SG
144 regs->e.eax = VESA_GET_MODE_INFO;
145 regs->e.ebx = 0;
146 regs->e.ecx = mode;
147 regs->e.edx = 0;
148 regs->e.esi = buffer_seg;
149 regs->e.edi = buffer_adr;
150 BE_int86(0x10, regs, regs);
151 if (regs->e.eax != 0x4f) {
152 debug("VESA_GET_MODE_INFO: error %x\n", regs->e.eax);
153 continue;
154 }
155 memcpy(mode_info->mode_info_block, buffer,
156 sizeof(struct vesa_mode_info));
157 mode_info->valid = true;
158 vm = &mode_info->vesa;
159 attr = le16_to_cpu(vm->mode_attributes);
160 linear_ok = attr & 0x80;
161 debug("res %d x %d, %d bpp, mm %d, (Linear %s, attr %02x)\n",
162 le16_to_cpu(vm->x_resolution),
163 le16_to_cpu(vm->y_resolution),
164 vm->bits_per_pixel, vm->memory_model,
165 linear_ok ? "OK" : "not available",
166 attr);
167 debug("\tRGB pos=%d,%d,%d, size=%d,%d,%d\n",
168 vm->red_mask_pos, vm->green_mask_pos, vm->blue_mask_pos,
169 vm->red_mask_size, vm->green_mask_size,
170 vm->blue_mask_size);
171 }
172
173 return 0;
174}
175
176static int atibios_set_vesa_mode(RMREGS *regs, int vesa_mode,
da62e1e8 177 struct vesa_state *mode_info)
222f25f8
SG
178{
179 void *buffer = (void *)(M.mem_base + vbe_offset);
180 u16 buffer_seg = (((unsigned long)vbe_offset) >> 4) & 0xff00;
181 u16 buffer_adr = ((unsigned long)vbe_offset) & 0xffff;
182 struct vesa_mode_info *vm;
183
4c59f953 184 debug("VBE: Setting VESA mode %#04x\n", vesa_mode);
4c59f953
SG
185 regs->e.eax = VESA_SET_MODE;
186 regs->e.ebx = vesa_mode;
222f25f8
SG
187 /* request linear framebuffer mode and don't clear display */
188 regs->e.ebx |= (1 << 14) | (1 << 15);
4c59f953 189 BE_int86(0x10, regs, regs);
222f25f8
SG
190 if (regs->e.eax != 0x4f) {
191 debug("VESA_SET_MODE: error %x\n", regs->e.eax);
192 return -ENOSYS;
193 }
4c59f953 194
da62e1e8 195 memset(buffer, '\0', sizeof(struct vesa_state));
222f25f8 196 debug("VBE: Geting info for VESA mode %#04x\n", vesa_mode);
4c59f953 197 regs->e.eax = VESA_GET_MODE_INFO;
4c59f953 198 regs->e.ecx = vesa_mode;
4c59f953
SG
199 regs->e.esi = buffer_seg;
200 regs->e.edi = buffer_adr;
201 BE_int86(0x10, regs, regs);
222f25f8
SG
202 if (regs->e.eax != 0x4f) {
203 debug("VESA_GET_MODE_INFO: error %x\n", regs->e.eax);
204 return -ENOSYS;
205 }
206
4c59f953 207 memcpy(mode_info->mode_info_block, buffer,
222f25f8 208 sizeof(struct vesa_mode_info));
4c59f953 209 mode_info->valid = true;
222f25f8
SG
210 mode_info->video_mode = vesa_mode;
211 vm = &mode_info->vesa;
212 vm->x_resolution = le16_to_cpu(vm->x_resolution);
213 vm->y_resolution = le16_to_cpu(vm->y_resolution);
214 vm->bytes_per_scanline = le16_to_cpu(vm->bytes_per_scanline);
215 vm->phys_base_ptr = le32_to_cpu(vm->phys_base_ptr);
216 vm->mode_attributes = le16_to_cpu(vm->mode_attributes);
217 debug("VBE: Init complete\n");
4c59f953 218
222f25f8 219 return 0;
4c59f953 220}
ca5eb0c5 221#endif /* CONFIG_FRAMEBUFFER_SET_VESA_MODE */
4c59f953 222
ece92f85
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223/****************************************************************************
224PARAMETERS:
9c7e4b06 225pcidev - PCI device info for the video card on the bus to boot
4c59f953 226vga_info - BIOS emulator VGA info structure
ece92f85
JJ
227
228REMARKS:
229This function executes the BIOS POST code on the controller. We assume that
230at this stage the controller has its I/O and memory space enabled and
231that all other controllers are in a disabled state.
232****************************************************************************/
7282672d 233static void PCI_doBIOSPOST(struct udevice *pcidev, BE_VGAInfo *vga_info,
da62e1e8 234 int vesa_mode, struct vesa_state *mode_info)
ece92f85
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235{
236 RMREGS regs;
237 RMSREGS sregs;
7282672d 238 pci_dev_t bdf;
ece92f85
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239
240 /* Determine the value to store in AX for BIOS POST. Per the PCI specs,
241 AH must contain the bus and AL must contain the devfn, encoded as
242 (dev << 3) | fn
243 */
244 memset(&regs, 0, sizeof(regs));
245 memset(&sregs, 0, sizeof(sregs));
7282672d
SG
246 bdf = dm_pci_get_bdf(pcidev);
247 regs.x.ax = (int)PCI_BUS(bdf) << 8 |
248 (int)PCI_DEV(bdf) << 3 | (int)PCI_FUNC(bdf);
ece92f85 249 /*Setup the X86 emulator for the VGA BIOS*/
4c59f953 250 BE_setVGA(vga_info);
ece92f85
JJ
251
252 /*Execute the BIOS POST code*/
253 BE_callRealMode(0xC000, 0x0003, &regs, &sregs);
254
255 /*Cleanup and exit*/
4c59f953
SG
256 BE_getVGA(vga_info);
257
ca5eb0c5 258#ifdef CONFIG_FRAMEBUFFER_SET_VESA_MODE
222f25f8
SG
259 /* Useful for debugging */
260 if (0)
261 atibios_debug_mode(vga_info, &regs, vesa_mode, mode_info);
4c59f953
SG
262 if (vesa_mode != -1)
263 atibios_set_vesa_mode(&regs, vesa_mode, mode_info);
ca5eb0c5 264#endif
ece92f85
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265}
266
267/****************************************************************************
268PARAMETERS:
9c7e4b06
WD
269pcidev - PCI device info for the video card on the bus
270bar - Place to return the base address register offset to use
ece92f85
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271
272RETURNS:
273The address to use to map the secondary BIOS (AGP devices)
274
275REMARKS:
276Searches all the PCI base address registers for the device looking for a
277memory mapping that is large enough to hold our ROM BIOS. We usually end up
278finding the framebuffer mapping (usually BAR 0x10), and we use this mapping
279to map the BIOS for the device into. We use a mapping that is already
280assigned to the device to ensure the memory range will be passed through
281by any PCI->PCI or AGP->PCI bridge that may be present.
282
283NOTE: Usually this function is only used for AGP devices, but it may be
284 used for PCI devices that have already been POST'ed and the BIOS
285 ROM base address has been zero'ed out.
286
287NOTE: This function leaves the original memory aperture disabled by leaving
288 it programmed to all 1's. It must be restored to the correct value
289 later.
290****************************************************************************/
7282672d 291static u32 PCI_findBIOSAddr(struct udevice *pcidev, int *bar)
ece92f85
JJ
292{
293 u32 base, size;
294
295 for (*bar = 0x10; *bar <= 0x14; (*bar) += 4) {
7282672d 296 dm_pci_read_config32(pcidev, *bar, &base);
ece92f85 297 if (!(base & 0x1)) {
7282672d
SG
298 dm_pci_write_config32(pcidev, *bar, 0xFFFFFFFF);
299 dm_pci_read_config32(pcidev, *bar, &size);
ece92f85
JJ
300 size = ~(size & ~0xFF) + 1;
301 if (size >= MAX_BIOSLEN)
302 return base & ~0xFF;
303 }
304 }
305 return 0;
306}
307
308/****************************************************************************
309REMARKS:
310Some non-x86 Linux kernels map PCI relocateable I/O to values that
311are above 64K, which will not work with the BIOS image that requires
312the offset for the I/O ports to be a maximum of 16-bits. Ideally
313someone should fix the kernel to map the I/O ports for VGA compatible
314devices to a different location (or just all I/O ports since it is
315unlikely you can have enough devices in the machine to use up all
31664K of the I/O space - a total of more than 256 cards would be
317necessary).
318
319Anyway to fix this we change all I/O mapped base registers and
320chop off the top bits.
321****************************************************************************/
7282672d 322static void PCI_fixupIObase(struct udevice *pcidev, int reg, u32 *base)
ece92f85
JJ
323{
324 if ((*base & 0x1) && (*base > 0xFFFE)) {
325 *base &= 0xFFFF;
7282672d 326 dm_pci_write_config32(pcidev, reg, *base);
ece92f85
JJ
327
328 }
329}
330
331/****************************************************************************
332PARAMETERS:
9c7e4b06 333pcidev - PCI device info for the video card on the bus
ece92f85
JJ
334
335RETURNS:
336Pointers to the mapped BIOS image
337
338REMARKS:
339Maps a pointer to the BIOS image on the graphics card on the PCI bus.
340****************************************************************************/
7282672d 341void *PCI_mapBIOSImage(struct udevice *pcidev)
ece92f85 342{
f6a7a2e8 343 u32 BIOSImageBus;
ece92f85
JJ
344 int BIOSImageBAR;
345 u8 *BIOSImage;
346
347 /*Save PCI BAR registers that might get changed*/
7282672d
SG
348 dm_pci_read_config32(pcidev, PCI_ROM_ADDRESS, &saveROMBaseAddress);
349 dm_pci_read_config32(pcidev, PCI_BASE_ADDRESS_0, &saveBaseAddress10);
350 dm_pci_read_config32(pcidev, PCI_BASE_ADDRESS_1, &saveBaseAddress14);
351 dm_pci_read_config32(pcidev, PCI_BASE_ADDRESS_2, &saveBaseAddress18);
352 dm_pci_read_config32(pcidev, PCI_BASE_ADDRESS_4, &saveBaseAddress20);
ece92f85
JJ
353
354 /*Fix up I/O base registers to less than 64K */
355 if(saveBaseAddress14 != 0)
356 PCI_fixupIObase(pcidev, PCI_BASE_ADDRESS_1, &saveBaseAddress14);
357 else
358 PCI_fixupIObase(pcidev, PCI_BASE_ADDRESS_4, &saveBaseAddress20);
359
360 /* Some cards have problems that stop us from being able to read the
361 BIOS image from the ROM BAR. To fix this we have to do some chipset
362 specific programming for different cards to solve this problem.
9c7e4b06 363 */
ece92f85 364
f6a7a2e8
ES
365 BIOSImageBus = PCI_findBIOSAddr(pcidev, &BIOSImageBAR);
366 if (BIOSImageBus == 0) {
ece92f85
JJ
367 printf("Find bios addr error\n");
368 return NULL;
369 }
370
a822d1de
AS
371 BIOSImage = dm_pci_bus_to_virt(pcidev, BIOSImageBus, 0, PCI_REGION_TYPE,
372 PCI_REGION_MEM, MAP_NOCACHE);
7282672d
SG
373
374 /*Change the PCI BAR registers to map it onto the bus.*/
375 dm_pci_write_config32(pcidev, BIOSImageBAR, 0);
376 dm_pci_write_config32(pcidev, PCI_ROM_ADDRESS, BIOSImageBus | 0x1);
ece92f85
JJ
377 udelay(1);
378
379 /*Check that the BIOS image is valid. If not fail, or return the
380 compiled in BIOS image if that option was enabled
381 */
382 if (BIOSImage[0] != 0x55 || BIOSImage[1] != 0xAA || BIOSImage[2] == 0) {
383 return NULL;
384 }
385
386 return BIOSImage;
387}
388
389/****************************************************************************
390PARAMETERS:
9c7e4b06 391pcidev - PCI device info for the video card on the bus
ece92f85
JJ
392
393REMARKS:
394Unmaps the BIOS image for the device and restores framebuffer mappings
395****************************************************************************/
7282672d
SG
396void PCI_unmapBIOSImage(struct udevice *pcidev, void *BIOSImage)
397{
398 dm_pci_write_config32(pcidev, PCI_ROM_ADDRESS, saveROMBaseAddress);
399 dm_pci_write_config32(pcidev, PCI_BASE_ADDRESS_0, saveBaseAddress10);
400 dm_pci_write_config32(pcidev, PCI_BASE_ADDRESS_1, saveBaseAddress14);
401 dm_pci_write_config32(pcidev, PCI_BASE_ADDRESS_2, saveBaseAddress18);
402 dm_pci_write_config32(pcidev, PCI_BASE_ADDRESS_4, saveBaseAddress20);
403}
ece92f85
JJ
404
405/****************************************************************************
406PARAMETERS:
9c7e4b06 407pcidev - PCI device info for the video card on the bus to boot
ece92f85
JJ
408VGAInfo - BIOS emulator VGA info structure
409
410RETURNS:
472d5460 411true if successfully initialised, false if not.
ece92f85
JJ
412
413REMARKS:
414Loads and POST's the display controllers BIOS, directly from the BIOS
415image we can extract over the PCI bus.
416****************************************************************************/
7282672d
SG
417static int PCI_postController(struct udevice *pcidev, uchar *bios_rom,
418 int bios_len, BE_VGAInfo *vga_info,
da62e1e8 419 int vesa_mode, struct vesa_state *mode_info)
ece92f85 420{
4c59f953
SG
421 u32 bios_image_len;
422 uchar *mapped_bios;
423 uchar *copy_of_bios;
7282672d 424 pci_dev_t bdf;
4c59f953
SG
425
426 if (bios_rom) {
427 copy_of_bios = bios_rom;
428 bios_image_len = bios_len;
429 } else {
430 /*
431 * Allocate memory to store copy of BIOS from display
432 * controller
433 */
434 mapped_bios = PCI_mapBIOSImage(pcidev);
435 if (mapped_bios == NULL) {
436 printf("videoboot: Video ROM failed to map!\n");
437 return false;
438 }
ece92f85 439
4c59f953 440 bios_image_len = mapped_bios[2] * 512;
ece92f85 441
4c59f953
SG
442 copy_of_bios = malloc(bios_image_len);
443 if (copy_of_bios == NULL) {
444 printf("videoboot: Out of memory!\n");
445 return false;
446 }
447 memcpy(copy_of_bios, mapped_bios, bios_image_len);
448 PCI_unmapBIOSImage(pcidev, mapped_bios);
ece92f85 449 }
ece92f85 450
4c59f953 451 /*Save information in vga_info structure*/
7282672d
SG
452 bdf = dm_pci_get_bdf(pcidev);
453 vga_info->function = PCI_FUNC(bdf);
454 vga_info->device = PCI_DEV(bdf);
455 vga_info->bus = PCI_BUS(bdf);
4c59f953
SG
456 vga_info->pcidev = pcidev;
457 vga_info->BIOSImage = copy_of_bios;
458 vga_info->BIOSImageLen = bios_image_len;
ece92f85
JJ
459
460 /*Now execute the BIOS POST for the device*/
4c59f953 461 if (copy_of_bios[0] != 0x55 || copy_of_bios[1] != 0xAA) {
ece92f85
JJ
462 printf("videoboot: Video ROM image is invalid!\n");
463 return false;
464 }
465
4c59f953 466 PCI_doBIOSPOST(pcidev, vga_info, vesa_mode, mode_info);
ece92f85
JJ
467
468 /*Reset the size of the BIOS image to the final size*/
4c59f953 469 vga_info->BIOSImageLen = copy_of_bios[2] * 512;
ece92f85
JJ
470 return true;
471}
472
7282672d 473int biosemu_setup(struct udevice *pcidev, BE_VGAInfo **vga_infop)
ece92f85
JJ
474{
475 BE_VGAInfo *VGAInfo;
7282672d 476 pci_dev_t bdf = dm_pci_get_bdf(pcidev);
ece92f85
JJ
477
478 printf("videoboot: Booting PCI video card bus %d, function %d, device %d\n",
7282672d 479 PCI_BUS(bdf), PCI_FUNC(bdf), PCI_DEV(bdf));
ece92f85
JJ
480 /*Initialise the x86 BIOS emulator*/
481 if ((VGAInfo = malloc(sizeof(*VGAInfo))) == NULL) {
482 printf("videoboot: Out of memory!\n");
4c59f953 483 return -ENOMEM;
ece92f85
JJ
484 }
485 memset(VGAInfo, 0, sizeof(*VGAInfo));
486 BE_init(0, 65536, VGAInfo, 0);
4c59f953 487 *vga_infop = VGAInfo;
ece92f85 488
4c59f953
SG
489 return 0;
490}
ece92f85 491
4c59f953
SG
492void biosemu_set_interrupt_handler(int intnum, int (*int_func)(void))
493{
494 X86EMU_setupIntrFunc(intnum, (X86EMU_intrFuncs)int_func);
495}
496
7282672d
SG
497int biosemu_run(struct udevice *pcidev, uchar *bios_rom, int bios_len,
498 BE_VGAInfo *vga_info, int clean_up, int vesa_mode,
da62e1e8 499 struct vesa_state *mode_info)
4c59f953
SG
500{
501 /*Post all the display controller BIOS'es*/
502 if (!PCI_postController(pcidev, bios_rom, bios_len, vga_info,
503 vesa_mode, mode_info))
504 return -EINVAL;
505
506 /*
507 * Cleanup and exit the emulator if requested. If the BIOS emulator
508 * is needed after booting the card, we will not call BE_exit and
509 * leave it enabled for further use (ie: VESA driver etc).
ece92f85 510 */
4c59f953 511 if (clean_up) {
ece92f85 512 BE_exit();
6e7b5f22 513 if (vga_info->BIOSImage &&
2cd11a23 514 (ulong)(vga_info->BIOSImage) != 0xc0000)
4c59f953
SG
515 free(vga_info->BIOSImage);
516 free(vga_info);
ece92f85 517 }
4c59f953
SG
518
519 return 0;
520}
521
522/****************************************************************************
523PARAMETERS:
524pcidev - PCI device info for the video card on the bus to boot
525pVGAInfo - Place to return VGA info structure is requested
526cleanUp - true to clean up on exit, false to leave emulator active
527
528REMARKS:
529Boots the PCI/AGP video card on the bus using the Video ROM BIOS image
530and the X86 BIOS emulator module.
531****************************************************************************/
7282672d
SG
532int BootVideoCardBIOS(struct udevice *pcidev, BE_VGAInfo **pVGAInfo,
533 int clean_up)
4c59f953
SG
534{
535 BE_VGAInfo *VGAInfo;
536 int ret;
537
538 ret = biosemu_setup(pcidev, &VGAInfo);
539 if (ret)
540 return false;
541 ret = biosemu_run(pcidev, NULL, 0, VGAInfo, clean_up, -1, NULL);
542 if (ret)
543 return false;
544
545 /* Return VGA info pointer if the caller requested it*/
ece92f85
JJ
546 if (pVGAInfo)
547 *pVGAInfo = VGAInfo;
4c59f953 548
ece92f85
JJ
549 return true;
550}