[thirdparty/u-boot.git] / drivers / clk / sunxi / clk_h6.c

// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Copyright (C) 2018 Amarula Solutions.
 * Author: Jagan Teki <jagan@amarulasolutions.com>
 */

#include <common.h>
#include <clk-uclass.h>
#include <dm.h>
#include <errno.h>
#include <clk/sunxi.h>
#include <dt-bindings/clock/sun50i-h6-ccu.h>
#include <dt-bindings/reset/sun50i-h6-ccu.h>
#include <linux/bitops.h>

static struct ccu_clk_gate h6_gates[] = {
	[CLK_PLL_PERIPH0]	= GATE(0x020, BIT(31)),

	[CLK_APB1]		= GATE_DUMMY,

	[CLK_DE]		= GATE(0x600, BIT(31)),
	[CLK_BUS_DE]		= GATE(0x60c, BIT(0)),

	[CLK_NAND0]		= GATE(0x810, BIT(31)),
	[CLK_NAND1]		= GATE(0x814, BIT(31)),
	[CLK_BUS_NAND]		= GATE(0x82c, BIT(0)),

	[CLK_BUS_MMC0]		= GATE(0x84c, BIT(0)),
	[CLK_BUS_MMC1]		= GATE(0x84c, BIT(1)),
	[CLK_BUS_MMC2]		= GATE(0x84c, BIT(2)),
	[CLK_BUS_UART0]		= GATE(0x90c, BIT(0)),
	[CLK_BUS_UART1]		= GATE(0x90c, BIT(1)),
	[CLK_BUS_UART2]		= GATE(0x90c, BIT(2)),
	[CLK_BUS_UART3]		= GATE(0x90c, BIT(3)),

	[CLK_BUS_I2C0]		= GATE(0x91c, BIT(0)),
	[CLK_BUS_I2C1]		= GATE(0x91c, BIT(1)),
	[CLK_BUS_I2C2]		= GATE(0x91c, BIT(2)),
	[CLK_BUS_I2C3]		= GATE(0x91c, BIT(3)),

	[CLK_SPI0]		= GATE(0x940, BIT(31)),
	[CLK_SPI1]		= GATE(0x944, BIT(31)),

	[CLK_BUS_SPI0]		= GATE(0x96c, BIT(0)),
	[CLK_BUS_SPI1]		= GATE(0x96c, BIT(1)),

	[CLK_BUS_EMAC]		= GATE(0x97c, BIT(0)),

	[CLK_USB_PHY0]		= GATE(0xa70, BIT(29)),
	[CLK_USB_OHCI0]		= GATE(0xa70, BIT(31)),

	[CLK_USB_PHY1]		= GATE(0xa74, BIT(29)),

	[CLK_USB_HSIC]		= GATE(0xa7c, BIT(26)),
	[CLK_USB_HSIC_12M]	= GATE(0xa7c, BIT(27)),
	[CLK_USB_PHY3]		= GATE(0xa7c, BIT(29)),
	[CLK_USB_OHCI3]		= GATE(0xa7c, BIT(31)),

	[CLK_BUS_OHCI0]		= GATE(0xa8c, BIT(0)),
	[CLK_BUS_OHCI3]		= GATE(0xa8c, BIT(3)),
	[CLK_BUS_EHCI0]		= GATE(0xa8c, BIT(4)),
	[CLK_BUS_XHCI]		= GATE(0xa8c, BIT(5)),
	[CLK_BUS_EHCI3]		= GATE(0xa8c, BIT(7)),
	[CLK_BUS_OTG]		= GATE(0xa8c, BIT(8)),

	[CLK_HDMI]		= GATE(0xb00, BIT(31)),
	[CLK_HDMI_SLOW]		= GATE(0xb04, BIT(31)),
	[CLK_HDMI_CEC]		= GATE(0xb10, BIT(31)),
	[CLK_BUS_HDMI]		= GATE(0xb1c, BIT(0)),
	[CLK_BUS_TCON_TOP]	= GATE(0xb5c, BIT(0)),
	[CLK_TCON_LCD0]		= GATE(0xb60, BIT(31)),
	[CLK_BUS_TCON_LCD0]	= GATE(0xb7c, BIT(0)),
	[CLK_TCON_TV0]		= GATE(0xb80, BIT(31)),
	[CLK_BUS_TCON_TV0]	= GATE(0xb9c, BIT(0)),
};

static struct ccu_reset h6_resets[] = {
	[RST_BUS_DE]		= RESET(0x60c, BIT(16)),
	[RST_BUS_NAND]		= RESET(0x82c, BIT(16)),

	[RST_BUS_MMC0]		= RESET(0x84c, BIT(16)),
	[RST_BUS_MMC1]		= RESET(0x84c, BIT(17)),
	[RST_BUS_MMC2]		= RESET(0x84c, BIT(18)),
	[RST_BUS_UART0]		= RESET(0x90c, BIT(16)),
	[RST_BUS_UART1]		= RESET(0x90c, BIT(17)),
	[RST_BUS_UART2]		= RESET(0x90c, BIT(18)),
	[RST_BUS_UART3]		= RESET(0x90c, BIT(19)),

	[RST_BUS_I2C0]		= RESET(0x91c, BIT(16)),
	[RST_BUS_I2C1]		= RESET(0x91c, BIT(17)),
	[RST_BUS_I2C2]		= RESET(0x91c, BIT(18)),
	[RST_BUS_I2C3]		= RESET(0x91c, BIT(19)),

	[RST_BUS_SPI0]		= RESET(0x96c, BIT(16)),
	[RST_BUS_SPI1]		= RESET(0x96c, BIT(17)),

	[RST_BUS_EMAC]		= RESET(0x97c, BIT(16)),

	[RST_USB_PHY0]		= RESET(0xa70, BIT(30)),

	[RST_USB_PHY1]		= RESET(0xa74, BIT(30)),

	[RST_USB_HSIC]		= RESET(0xa7c, BIT(28)),
	[RST_USB_PHY3]		= RESET(0xa7c, BIT(30)),

	[RST_BUS_OHCI0]		= RESET(0xa8c, BIT(16)),
	[RST_BUS_OHCI3]		= RESET(0xa8c, BIT(19)),
	[RST_BUS_EHCI0]		= RESET(0xa8c, BIT(20)),
	[RST_BUS_XHCI]		= RESET(0xa8c, BIT(21)),
	[RST_BUS_EHCI3]		= RESET(0xa8c, BIT(23)),
	[RST_BUS_OTG]		= RESET(0xa8c, BIT(24)),

	[RST_BUS_HDMI]		= RESET(0xb1c, BIT(16)),
	[RST_BUS_HDMI_SUB]	= RESET(0xb1c, BIT(17)),
	[RST_BUS_TCON_TOP]	= RESET(0xb5c, BIT(16)),
	[RST_BUS_TCON_LCD0]	= RESET(0xb7c, BIT(16)),
	[RST_BUS_TCON_TV0]	= RESET(0xb9c, BIT(16)),
};

const struct ccu_desc h6_ccu_desc = {
	.gates = h6_gates,
	.resets = h6_resets,
	.num_gates = ARRAY_SIZE(h6_gates),
	.num_resets = ARRAY_SIZE(h6_resets),
};
Commit	Line	Data
337fcdc0 JT	1	// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
	2	/*
	3	* Copyright (C) 2018 Amarula Solutions.
	4	* Author: Jagan Teki <jagan@amarulasolutions.com>
	5	*/
	6
d678a59d	7	#include <common.h>
337fcdc0 JT	8	#include <clk-uclass.h>
	9	#include <dm.h>
	10	#include <errno.h>
21d314a6	11	#include <clk/sunxi.h>
337fcdc0 JT	12	#include <dt-bindings/clock/sun50i-h6-ccu.h>
337fcdc0 JT	13	#include <dt-bindings/reset/sun50i-h6-ccu.h>
cd93d625	14	#include <linux/bitops.h>
337fcdc0 JT	15
337fcdc0 JT	16	static struct ccu_clk_gate h6_gates[] = {
444ab356 AP	17	[CLK_PLL_PERIPH0] = GATE(0x020, BIT(31)),
444ab356 AP	18
d6cb09d8 AP	19	[CLK_APB1] = GATE_DUMMY,
d6cb09d8 AP	20
77024aa7 SH	21	[CLK_DE] = GATE(0x600, BIT(31)),
	22	[CLK_BUS_DE] = GATE(0x60c, BIT(0)),
	23
59c1ddd2 SH	24	[CLK_NAND0] = GATE(0x810, BIT(31)),
	25	[CLK_NAND1] = GATE(0x814, BIT(31)),
	26	[CLK_BUS_NAND] = GATE(0x82c, BIT(0)),
	27
bb3e5aa2 AP	28	[CLK_BUS_MMC0] = GATE(0x84c, BIT(0)),
	29	[CLK_BUS_MMC1] = GATE(0x84c, BIT(1)),
	30	[CLK_BUS_MMC2] = GATE(0x84c, BIT(2)),
337fcdc0 JT	31	[CLK_BUS_UART0] = GATE(0x90c, BIT(0)),
	32	[CLK_BUS_UART1] = GATE(0x90c, BIT(1)),
	33	[CLK_BUS_UART2] = GATE(0x90c, BIT(2)),
	34	[CLK_BUS_UART3] = GATE(0x90c, BIT(3)),
82111469	35
c61897bf SH	36	[CLK_BUS_I2C0] = GATE(0x91c, BIT(0)),
	37	[CLK_BUS_I2C1] = GATE(0x91c, BIT(1)),
	38	[CLK_BUS_I2C2] = GATE(0x91c, BIT(2)),
	39	[CLK_BUS_I2C3] = GATE(0x91c, BIT(3)),
	40
82111469 JT	41	[CLK_SPI0] = GATE(0x940, BIT(31)),
	42	[CLK_SPI1] = GATE(0x944, BIT(31)),
	43
	44	[CLK_BUS_SPI0] = GATE(0x96c, BIT(0)),
	45	[CLK_BUS_SPI1] = GATE(0x96c, BIT(1)),
68620c96 JT	46
68620c96 JT	47	[CLK_BUS_EMAC] = GATE(0x97c, BIT(0)),
106c1300 AP	48
	49	[CLK_USB_PHY0] = GATE(0xa70, BIT(29)),
	50	[CLK_USB_OHCI0] = GATE(0xa70, BIT(31)),
	51
	52	[CLK_USB_PHY1] = GATE(0xa74, BIT(29)),
	53
	54	[CLK_USB_HSIC] = GATE(0xa7c, BIT(26)),
	55	[CLK_USB_HSIC_12M] = GATE(0xa7c, BIT(27)),
	56	[CLK_USB_PHY3] = GATE(0xa7c, BIT(29)),
	57	[CLK_USB_OHCI3] = GATE(0xa7c, BIT(31)),
	58
	59	[CLK_BUS_OHCI0] = GATE(0xa8c, BIT(0)),
	60	[CLK_BUS_OHCI3] = GATE(0xa8c, BIT(3)),
	61	[CLK_BUS_EHCI0] = GATE(0xa8c, BIT(4)),
fa7eabf6	62	[CLK_BUS_XHCI] = GATE(0xa8c, BIT(5)),
106c1300 AP	63	[CLK_BUS_EHCI3] = GATE(0xa8c, BIT(7)),
106c1300 AP	64	[CLK_BUS_OTG] = GATE(0xa8c, BIT(8)),
77024aa7 SH	65
	66	[CLK_HDMI] = GATE(0xb00, BIT(31)),
	67	[CLK_HDMI_SLOW] = GATE(0xb04, BIT(31)),
	68	[CLK_HDMI_CEC] = GATE(0xb10, BIT(31)),
	69	[CLK_BUS_HDMI] = GATE(0xb1c, BIT(0)),
	70	[CLK_BUS_TCON_TOP] = GATE(0xb5c, BIT(0)),
	71	[CLK_TCON_LCD0] = GATE(0xb60, BIT(31)),
	72	[CLK_BUS_TCON_LCD0] = GATE(0xb7c, BIT(0)),
	73	[CLK_TCON_TV0] = GATE(0xb80, BIT(31)),
	74	[CLK_BUS_TCON_TV0] = GATE(0xb9c, BIT(0)),
337fcdc0 JT	75	};
	76
	77	static struct ccu_reset h6_resets[] = {
77024aa7	78	[RST_BUS_DE] = RESET(0x60c, BIT(16)),
59c1ddd2	79	[RST_BUS_NAND] = RESET(0x82c, BIT(16)),
77024aa7	80
bb3e5aa2 AP	81	[RST_BUS_MMC0] = RESET(0x84c, BIT(16)),
	82	[RST_BUS_MMC1] = RESET(0x84c, BIT(17)),
	83	[RST_BUS_MMC2] = RESET(0x84c, BIT(18)),
337fcdc0 JT	84	[RST_BUS_UART0] = RESET(0x90c, BIT(16)),
	85	[RST_BUS_UART1] = RESET(0x90c, BIT(17)),
	86	[RST_BUS_UART2] = RESET(0x90c, BIT(18)),
	87	[RST_BUS_UART3] = RESET(0x90c, BIT(19)),
82111469	88
c61897bf SH	89	[RST_BUS_I2C0] = RESET(0x91c, BIT(16)),
	90	[RST_BUS_I2C1] = RESET(0x91c, BIT(17)),
	91	[RST_BUS_I2C2] = RESET(0x91c, BIT(18)),
	92	[RST_BUS_I2C3] = RESET(0x91c, BIT(19)),
	93
82111469 JT	94	[RST_BUS_SPI0] = RESET(0x96c, BIT(16)),
82111469 JT	95	[RST_BUS_SPI1] = RESET(0x96c, BIT(17)),
68620c96 JT	96
68620c96 JT	97	[RST_BUS_EMAC] = RESET(0x97c, BIT(16)),
106c1300 AP	98
	99	[RST_USB_PHY0] = RESET(0xa70, BIT(30)),
	100
	101	[RST_USB_PHY1] = RESET(0xa74, BIT(30)),
	102
	103	[RST_USB_HSIC] = RESET(0xa7c, BIT(28)),
	104	[RST_USB_PHY3] = RESET(0xa7c, BIT(30)),
	105
	106	[RST_BUS_OHCI0] = RESET(0xa8c, BIT(16)),
	107	[RST_BUS_OHCI3] = RESET(0xa8c, BIT(19)),
	108	[RST_BUS_EHCI0] = RESET(0xa8c, BIT(20)),
fa7eabf6	109	[RST_BUS_XHCI] = RESET(0xa8c, BIT(21)),
106c1300 AP	110	[RST_BUS_EHCI3] = RESET(0xa8c, BIT(23)),
106c1300 AP	111	[RST_BUS_OTG] = RESET(0xa8c, BIT(24)),
77024aa7 SH	112
	113	[RST_BUS_HDMI] = RESET(0xb1c, BIT(16)),
	114	[RST_BUS_HDMI_SUB] = RESET(0xb1c, BIT(17)),
	115	[RST_BUS_TCON_TOP] = RESET(0xb5c, BIT(16)),
	116	[RST_BUS_TCON_LCD0] = RESET(0xb7c, BIT(16)),
	117	[RST_BUS_TCON_TV0] = RESET(0xb9c, BIT(16)),
337fcdc0 JT	118	};
337fcdc0 JT	119
46fa23f9	120	const struct ccu_desc h6_ccu_desc = {
337fcdc0 JT	121	.gates = h6_gates,
337fcdc0 JT	122	.resets = h6_resets,
49b2b0a2 SH	123	.num_gates = ARRAY_SIZE(h6_gates),
49b2b0a2 SH	124	.num_resets = ARRAY_SIZE(h6_resets),
337fcdc0	125	};