[thirdparty/u-boot.git] / drivers / gpio / sandbox.c

// SPDX-License-Identifier: GPL-2.0+
/*
 * Copyright (c) 2011 The Chromium OS Authors.
 */

#include <common.h>
#include <dm.h>
#include <fdtdec.h>
#include <log.h>
#include <malloc.h>
#include <acpi/acpi_device.h>
#include <asm/gpio.h>
#include <dm/acpi.h>
#include <dm/device-internal.h>
#include <dm/device_compat.h>
#include <dm/lists.h>
#include <dm/of.h>
#include <dm/pinctrl.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/gpio/sandbox-gpio.h>

struct gpio_state {
	const char *label;	/* label given by requester */
	ulong flags;		/* flags (GPIOD_...) */
};

/* Access routines for GPIO info */
static struct gpio_state *get_gpio_state(struct udevice *dev, uint offset)
{
	struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
	struct gpio_state *state = dev_get_priv(dev);

	if (offset >= uc_priv->gpio_count) {
		printf("sandbox_gpio: error: invalid gpio %u\n", offset);
		return NULL;
	}

	return &state[offset];
}

/* Access routines for GPIO flags */
static ulong *get_gpio_flags(struct udevice *dev, unsigned int offset)
{
	struct gpio_state *state = get_gpio_state(dev, offset);

	if (!state)
		return NULL;

	return &state->flags;

}

static int get_gpio_flag(struct udevice *dev, unsigned int offset, ulong flag)
{
	return (*get_gpio_flags(dev, offset) & flag) != 0;
}

static int set_gpio_flag(struct udevice *dev, unsigned int offset, ulong flag,
			 int value)
{
	struct gpio_state *state = get_gpio_state(dev, offset);

	if (value)
		state->flags |= flag;
	else
		state->flags &= ~flag;

	return 0;
}

/*
 * Back-channel sandbox-internal-only access to GPIO state
 */

int sandbox_gpio_get_value(struct udevice *dev, unsigned offset)
{
	struct gpio_state *state = get_gpio_state(dev, offset);
	bool val;

	if (get_gpio_flag(dev, offset, GPIOD_IS_OUT))
		debug("sandbox_gpio: get_value on output gpio %u\n", offset);

	if (state->flags & GPIOD_EXT_DRIVEN) {
		val = state->flags & GPIOD_EXT_HIGH;
	} else {
		if (state->flags & GPIOD_EXT_PULL_UP)
			val = true;
		else if (state->flags & GPIOD_EXT_PULL_DOWN)
			val = false;
		else
			val = state->flags & GPIOD_PULL_UP;
	}

	return val;
}

int sandbox_gpio_set_value(struct udevice *dev, unsigned offset, int value)
{
	set_gpio_flag(dev, offset, GPIOD_EXT_DRIVEN | GPIOD_EXT_HIGH, value);

	return 0;
}

int sandbox_gpio_get_direction(struct udevice *dev, unsigned offset)
{
	return get_gpio_flag(dev, offset, GPIOD_IS_OUT);
}

int sandbox_gpio_set_direction(struct udevice *dev, unsigned offset, int output)
{
	set_gpio_flag(dev, offset, GPIOD_IS_OUT, output);
	set_gpio_flag(dev, offset, GPIOD_IS_IN, !output);

	return 0;
}

ulong sandbox_gpio_get_flags(struct udevice *dev, uint offset)
{
	ulong flags = *get_gpio_flags(dev, offset);

	return flags & ~GPIOD_SANDBOX_MASK;
}

int sandbox_gpio_set_flags(struct udevice *dev, uint offset, ulong flags)
{
	struct gpio_state *state = get_gpio_state(dev, offset);

	state->flags = flags;

	return 0;
}

/*
 * These functions implement the public interface within U-Boot
 */

/* set GPIO port 'offset' as an input */
static int sb_gpio_direction_input(struct udevice *dev, unsigned offset)
{
	debug("%s: offset:%u\n", __func__, offset);

	return sandbox_gpio_set_direction(dev, offset, 0);
}

/* set GPIO port 'offset' as an output, with polarity 'value' */
static int sb_gpio_direction_output(struct udevice *dev, unsigned offset,
				    int value)
{
	int ret;

	debug("%s: offset:%u, value = %d\n", __func__, offset, value);

	ret = sandbox_gpio_set_direction(dev, offset, 1);
	if (ret)
		return ret;
	ret = set_gpio_flag(dev, offset, GPIOD_IS_OUT_ACTIVE |
			    GPIOD_EXT_DRIVEN | GPIOD_EXT_HIGH, value);
	if (ret)
		return ret;

	return 0;
}

/* read GPIO IN value of port 'offset' */
static int sb_gpio_get_value(struct udevice *dev, unsigned offset)
{
	debug("%s: offset:%u\n", __func__, offset);

	return sandbox_gpio_get_value(dev, offset);
}

/* write GPIO OUT value to port 'offset' */
static int sb_gpio_set_value(struct udevice *dev, unsigned offset, int value)
{
	int ret;

	debug("%s: offset:%u, value = %d\n", __func__, offset, value);

	if (!sandbox_gpio_get_direction(dev, offset)) {
		printf("sandbox_gpio: error: set_value on input gpio %u\n",
		       offset);
		return -1;
	}

	ret = set_gpio_flag(dev, offset, GPIOD_IS_OUT_ACTIVE |
			    GPIOD_EXT_DRIVEN | GPIOD_EXT_HIGH, value);
	if (ret)
		return ret;

	return 0;
}

static int sb_gpio_get_function(struct udevice *dev, unsigned offset)
{
	if (get_gpio_flag(dev, offset, GPIOD_IS_OUT))
		return GPIOF_OUTPUT;
	if (get_gpio_flag(dev, offset, GPIOD_IS_IN))
		return GPIOF_INPUT;
	if (get_gpio_flag(dev, offset, GPIOD_IS_AF))
		return GPIOF_FUNC;

	return GPIOF_INPUT; /*GPIO is not configurated */
}

static int sb_gpio_xlate(struct udevice *dev, struct gpio_desc *desc,
			 struct ofnode_phandle_args *args)
{
	desc->offset = args->args[0];
	if (args->args_count < 2)
		return 0;
	/* treat generic binding with gpio uclass */
	gpio_xlate_offs_flags(dev, desc, args);

	/* sandbox test specific, not defined in gpio.h */
	if (args->args[1] & GPIO_IN)
		desc->flags |= GPIOD_IS_IN;

	if (args->args[1] & GPIO_OUT)
		desc->flags |= GPIOD_IS_OUT;

	if (args->args[1] & GPIO_OUT_ACTIVE)
		desc->flags |= GPIOD_IS_OUT_ACTIVE;

	if (args->args[1] & GPIO_AF)
		desc->flags |= GPIOD_IS_AF;

	return 0;
}

static int sb_gpio_set_flags(struct udevice *dev, unsigned int offset,
			     ulong flags)
{
	debug("%s: offset:%u, flags = %lx\n", __func__, offset, flags);
	struct gpio_state *state = get_gpio_state(dev, offset);

	if (flags & GPIOD_IS_OUT) {
		flags |= GPIOD_EXT_DRIVEN;
		if (flags & GPIOD_IS_OUT_ACTIVE)
			flags |= GPIOD_EXT_HIGH;
		else
			flags &= ~GPIOD_EXT_HIGH;
	} else {
		flags |= state->flags & GPIOD_SANDBOX_MASK;
	}
	state->flags = flags;

	return 0;
}

static int sb_gpio_get_flags(struct udevice *dev, uint offset, ulong *flagsp)
{
	debug("%s: offset:%u\n", __func__, offset);
	*flagsp = *get_gpio_flags(dev, offset) & ~GPIOD_SANDBOX_MASK;

	return 0;
}

#if CONFIG_IS_ENABLED(ACPIGEN)
static int sb_gpio_get_acpi(const struct gpio_desc *desc,
			    struct acpi_gpio *gpio)
{
	int ret;

	/* Note that gpio_get_acpi() zeroes *gpio before calling here */
	gpio->pin_count = 1;
	gpio->pins[0] = desc->offset;
	ret = acpi_device_scope(desc->dev, gpio->resource,
				sizeof(gpio->resource));
	if (ret)
		return log_ret(ret);

	/* All of these values are just used for testing */
	if (desc->flags & GPIOD_ACTIVE_LOW) {
		gpio->pin0_addr = 0x80012 + desc->offset;
		gpio->type = ACPI_GPIO_TYPE_INTERRUPT;
		gpio->pull = ACPI_GPIO_PULL_DOWN;
		gpio->interrupt_debounce_timeout = 4321;

		/* We use the GpioInt part */
		gpio->irq.pin = desc->offset;
		gpio->irq.polarity = ACPI_IRQ_ACTIVE_BOTH;
		gpio->irq.shared = ACPI_IRQ_SHARED;
		gpio->irq.wake = ACPI_IRQ_WAKE;

		/* The GpioIo part is only used for testing */
		gpio->polarity = ACPI_GPIO_ACTIVE_LOW;
	} else {
		gpio->pin0_addr = 0xc00dc + desc->offset;
		gpio->type = ACPI_GPIO_TYPE_IO;
		gpio->pull = ACPI_GPIO_PULL_UP;
		gpio->interrupt_debounce_timeout = 0;

		/* The GpioInt part is not used */

		/* We use the GpioIo part */
		gpio->output_drive_strength = 1234;
		gpio->io_shared = true;
		gpio->io_restrict = ACPI_GPIO_IO_RESTRICT_INPUT;
		gpio->polarity = 0;
	}

	return 0;
}

static int sb_gpio_get_name(const struct udevice *dev, char *out_name)
{
	return acpi_copy_name(out_name, "GPIO");
}

struct acpi_ops gpio_sandbox_acpi_ops = {
	.get_name	= sb_gpio_get_name,
};
#endif /* ACPIGEN */

static const struct dm_gpio_ops gpio_sandbox_ops = {
	.direction_input	= sb_gpio_direction_input,
	.direction_output	= sb_gpio_direction_output,
	.get_value		= sb_gpio_get_value,
	.set_value		= sb_gpio_set_value,
	.get_function		= sb_gpio_get_function,
	.xlate			= sb_gpio_xlate,
	.set_flags		= sb_gpio_set_flags,
	.get_flags		= sb_gpio_get_flags,
#if CONFIG_IS_ENABLED(ACPIGEN)
	.get_acpi		= sb_gpio_get_acpi,
#endif
};

static int sandbox_gpio_of_to_plat(struct udevice *dev)
{
	if (CONFIG_IS_ENABLED(OF_REAL)) {
		struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);

		uc_priv->gpio_count =
			dev_read_u32_default(dev, "sandbox,gpio-count", 0);
		uc_priv->bank_name = dev_read_string(dev, "gpio-bank-name");
	}

	return 0;
}

static int gpio_sandbox_probe(struct udevice *dev)
{
	struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);

	if (!dev_has_ofnode(dev))
		/* Tell the uclass how many GPIOs we have */
		uc_priv->gpio_count = CONFIG_SANDBOX_GPIO_COUNT;

	dev_set_priv(dev,
		     calloc(sizeof(struct gpio_state), uc_priv->gpio_count));

	return 0;
}

static int gpio_sandbox_remove(struct udevice *dev)
{
	free(dev_get_priv(dev));

	return 0;
}

static const struct udevice_id sandbox_gpio_ids[] = {
	{ .compatible = "sandbox,gpio" },
	{ }
};

U_BOOT_DRIVER(sandbox_gpio) = {
	.name	= "sandbox_gpio",
	.id	= UCLASS_GPIO,
	.of_match = sandbox_gpio_ids,
	.of_to_plat = sandbox_gpio_of_to_plat,
	.probe	= gpio_sandbox_probe,
	.remove	= gpio_sandbox_remove,
	.ops	= &gpio_sandbox_ops,
	ACPI_OPS_PTR(&gpio_sandbox_acpi_ops)
};

DM_DRIVER_ALIAS(sandbox_gpio, sandbox_gpio_alias)

#if CONFIG_IS_ENABLED(PINCTRL)

/* pincontrol: used only to check GPIO pin configuration (pinmux command) */

struct sb_pinctrl_priv {
	int pinctrl_ngpios;
	struct list_head gpio_dev;
};

struct sb_gpio_bank {
	struct udevice *gpio_dev;
	struct list_head list;
};

static int sb_populate_gpio_dev_list(struct udevice *dev)
{
	struct sb_pinctrl_priv *priv = dev_get_priv(dev);
	struct udevice *gpio_dev;
	struct udevice *child;
	struct sb_gpio_bank *gpio_bank;
	int ret;

	/*
	 * parse pin-controller sub-nodes (ie gpio bank nodes) and fill
	 * a list with all gpio device reference which belongs to the
	 * current pin-controller. This list is used to find pin_name and
	 * pin muxing
	 */
	list_for_each_entry(child, &dev->child_head, sibling_node) {
		ret = uclass_get_device_by_name(UCLASS_GPIO, child->name,
						&gpio_dev);
		if (ret < 0)
			continue;

		gpio_bank = malloc(sizeof(*gpio_bank));
		if (!gpio_bank) {
			dev_err(dev, "Not enough memory\n");
			return -ENOMEM;
		}

		gpio_bank->gpio_dev = gpio_dev;
		list_add_tail(&gpio_bank->list, &priv->gpio_dev);
	}

	return 0;
}

static int sb_pinctrl_get_pins_count(struct udevice *dev)
{
	struct sb_pinctrl_priv *priv = dev_get_priv(dev);
	struct gpio_dev_priv *uc_priv;
	struct sb_gpio_bank *gpio_bank;

	/*
	 * if get_pins_count has already been executed once on this
	 * pin-controller, no need to run it again
	 */
	if (priv->pinctrl_ngpios)
		return priv->pinctrl_ngpios;

	if (list_empty(&priv->gpio_dev))
		sb_populate_gpio_dev_list(dev);
	/*
	 * walk through all banks to retrieve the pin-controller
	 * pins number
	 */
	list_for_each_entry(gpio_bank, &priv->gpio_dev, list) {
		uc_priv = dev_get_uclass_priv(gpio_bank->gpio_dev);

		priv->pinctrl_ngpios += uc_priv->gpio_count;
	}

	return priv->pinctrl_ngpios;
}

static struct udevice *sb_pinctrl_get_gpio_dev(struct udevice *dev,
					       unsigned int selector,
					       unsigned int *idx)
{
	struct sb_pinctrl_priv *priv = dev_get_priv(dev);
	struct sb_gpio_bank *gpio_bank;
	struct gpio_dev_priv *uc_priv;
	int pin_count = 0;

	if (list_empty(&priv->gpio_dev))
		sb_populate_gpio_dev_list(dev);

	/* look up for the bank which owns the requested pin */
	list_for_each_entry(gpio_bank, &priv->gpio_dev, list) {
		uc_priv = dev_get_uclass_priv(gpio_bank->gpio_dev);

		if (selector < (pin_count + uc_priv->gpio_count)) {
			/*
			 * we found the bank, convert pin selector to
			 * gpio bank index
			 */
			*idx = selector - pin_count;

			return gpio_bank->gpio_dev;
		}
		pin_count += uc_priv->gpio_count;
	}

	return NULL;
}

static const char *sb_pinctrl_get_pin_name(struct udevice *dev,
					   unsigned int selector)
{
	struct gpio_dev_priv *uc_priv;
	struct udevice *gpio_dev;
	unsigned int gpio_idx;
	static char pin_name[PINNAME_SIZE];

	/* look up for the bank which owns the requested pin */
	gpio_dev = sb_pinctrl_get_gpio_dev(dev, selector, &gpio_idx);
	if (!gpio_dev) {
		snprintf(pin_name, PINNAME_SIZE, "Error");
	} else {
		uc_priv = dev_get_uclass_priv(gpio_dev);

		snprintf(pin_name, PINNAME_SIZE, "%s%d",
			 uc_priv->bank_name,
			 gpio_idx);
	}

	return pin_name;
}

static char *get_flags_string(ulong flags)
{
	if (flags & GPIOD_OPEN_DRAIN)
		return "drive-open-drain";
	if (flags & GPIOD_OPEN_SOURCE)
		return "drive-open-source";
	if (flags & GPIOD_PULL_UP)
		return "bias-pull-up";
	if (flags & GPIOD_PULL_DOWN)
		return "bias-pull-down";
	return ".";
}

static int sb_pinctrl_get_pin_muxing(struct udevice *dev,
				     unsigned int selector,
				     char *buf, int size)
{
	struct udevice *gpio_dev;
	unsigned int gpio_idx;
	ulong flags;
	int function;

	/* look up for the bank which owns the requested pin */
	gpio_dev = sb_pinctrl_get_gpio_dev(dev, selector, &gpio_idx);
	if (!gpio_dev) {
		snprintf(buf, size, "Error");
	} else {
		function = sb_gpio_get_function(gpio_dev, gpio_idx);
		flags = *get_gpio_flags(gpio_dev, gpio_idx);

		snprintf(buf, size, "gpio %s %s",
			 function == GPIOF_OUTPUT ? "output" : "input",
			 get_flags_string(flags));
	}

	return 0;
}

#if CONFIG_IS_ENABLED(ACPIGEN)
static int sb_pinctrl_get_name(const struct udevice *dev, char *out_name)
{
	return acpi_copy_name(out_name, "PINC");
}
#endif

static int sandbox_pinctrl_probe(struct udevice *dev)
{
	struct sb_pinctrl_priv *priv = dev_get_priv(dev);

	INIT_LIST_HEAD(&priv->gpio_dev);

	return 0;
}

static struct pinctrl_ops sandbox_pinctrl_gpio_ops = {
	.get_pin_name		= sb_pinctrl_get_pin_name,
	.get_pins_count		= sb_pinctrl_get_pins_count,
	.get_pin_muxing		= sb_pinctrl_get_pin_muxing,
};

#if CONFIG_IS_ENABLED(ACPIGEN)
struct acpi_ops pinctrl_sandbox_acpi_ops = {
	.get_name	= sb_pinctrl_get_name,
};
#endif

static const struct udevice_id sandbox_pinctrl_gpio_match[] = {
	{ .compatible = "sandbox,pinctrl-gpio" },
	{ /* sentinel */ }
};

U_BOOT_DRIVER(sandbox_pinctrl_gpio) = {
	.name = "sandbox_pinctrl_gpio",
	.id = UCLASS_PINCTRL,
	.of_match = sandbox_pinctrl_gpio_match,
	.ops = &sandbox_pinctrl_gpio_ops,
	.bind = dm_scan_fdt_dev,
	.probe = sandbox_pinctrl_probe,
	.priv_auto	= sizeof(struct sb_pinctrl_priv),
	ACPI_OPS_PTR(&pinctrl_sandbox_acpi_ops)
};

#endif /* PINCTRL */
Commit	Line	Data
83d290c5	1	// SPDX-License-Identifier: GPL-2.0+
8d30fcd9 SG	2	/*
8d30fcd9 SG	3	* Copyright (c) 2011 The Chromium OS Authors.
8d30fcd9 SG	4	*/
8d30fcd9 SG	5
d678a59d	6	#include <common.h>
e2d8a714 SG	7	#include <dm.h>
e2d8a714 SG	8	#include <fdtdec.h>
f7ae49fc	9	#include <log.h>
e2d8a714	10	#include <malloc.h>
2912686c	11	#include <acpi/acpi_device.h>
8d30fcd9	12	#include <asm/gpio.h>
2912686c	13	#include <dm/acpi.h>
0fd3d911	14	#include <dm/device-internal.h>
e5301bac	15	#include <dm/device_compat.h>
ff52665d	16	#include <dm/lists.h>
3a57123e	17	#include <dm/of.h>
ff52665d	18	#include <dm/pinctrl.h>
3669e0e7	19	#include <dt-bindings/gpio/gpio.h>
2c0f782e	20	#include <dt-bindings/gpio/sandbox-gpio.h>
8d30fcd9	21
8d30fcd9 SG	22	struct gpio_state {
8d30fcd9 SG	23	const char label; / label given by requester */
a03a0aa7	24	ulong flags; /* flags (GPIOD_...) */
8d30fcd9 SG	25	};
8d30fcd9 SG	26
a03a0aa7 SG	27	/* Access routines for GPIO info */
a03a0aa7 SG	28	static struct gpio_state get_gpio_state(struct udevice dev, uint offset)
8d30fcd9	29	{
e564f054	30	struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
e2d8a714 SG	31	struct gpio_state *state = dev_get_priv(dev);
	32
	33	if (offset >= uc_priv->gpio_count) {
e2d8a714	34	printf("sandbox_gpio: error: invalid gpio %u\n", offset);
a03a0aa7	35	return NULL;
8d30fcd9 SG	36	}
8d30fcd9 SG	37
a03a0aa7 SG	38	return &state[offset];
	39	}
	40
	41	/* Access routines for GPIO flags */
	42	static ulong get_gpio_flags(struct udevice dev, unsigned int offset)
	43	{
	44	struct gpio_state *state = get_gpio_state(dev, offset);
	45
	46	if (!state)
	47	return NULL;
	48
	49	return &state->flags;
ff52665d	50
8d30fcd9 SG	51	}
8d30fcd9 SG	52
ff52665d	53	static int get_gpio_flag(struct udevice *dev, unsigned int offset, ulong flag)
8d30fcd9	54	{
a03a0aa7	55	return (*get_gpio_flags(dev, offset) & flag) != 0;
8d30fcd9 SG	56	}
8d30fcd9 SG	57
ff52665d	58	static int set_gpio_flag(struct udevice *dev, unsigned int offset, ulong flag,
e2d8a714	59	int value)
8d30fcd9	60	{
1f212afc	61	struct gpio_state *state = get_gpio_state(dev, offset);
8d30fcd9 SG	62
8d30fcd9 SG	63	if (value)
1f212afc	64	state->flags \|= flag;
8d30fcd9	65	else
1f212afc	66	state->flags &= ~flag;
8d30fcd9 SG	67
	68	return 0;
	69	}
	70
8d30fcd9 SG	71	/*
	72	* Back-channel sandbox-internal-only access to GPIO state
	73	*/
	74
54c5d08a	75	int sandbox_gpio_get_value(struct udevice *dev, unsigned offset)
8d30fcd9	76	{
1f212afc	77	struct gpio_state *state = get_gpio_state(dev, offset);
d638a183	78	bool val;
1f212afc	79
ff52665d	80	if (get_gpio_flag(dev, offset, GPIOD_IS_OUT))
e2d8a714	81	debug("sandbox_gpio: get_value on output gpio %u\n", offset);
1f212afc	82
8a45b220	83	if (state->flags & GPIOD_EXT_DRIVEN) {
d638a183	84	val = state->flags & GPIOD_EXT_HIGH;
8a45b220 SG	85	} else {
	86	if (state->flags & GPIOD_EXT_PULL_UP)
	87	val = true;
	88	else if (state->flags & GPIOD_EXT_PULL_DOWN)
	89	val = false;
	90	else
	91	val = state->flags & GPIOD_PULL_UP;
	92	}
d638a183 SG	93
d638a183 SG	94	return val;
8d30fcd9 SG	95	}
8d30fcd9 SG	96
54c5d08a	97	int sandbox_gpio_set_value(struct udevice *dev, unsigned offset, int value)
8d30fcd9	98	{
d638a183	99	set_gpio_flag(dev, offset, GPIOD_EXT_DRIVEN \| GPIOD_EXT_HIGH, value);
1f212afc SG	100
1f212afc SG	101	return 0;
8d30fcd9 SG	102	}
8d30fcd9 SG	103
54c5d08a	104	int sandbox_gpio_get_direction(struct udevice *dev, unsigned offset)
8d30fcd9	105	{
ff52665d	106	return get_gpio_flag(dev, offset, GPIOD_IS_OUT);
8d30fcd9 SG	107	}
8d30fcd9 SG	108
54c5d08a	109	int sandbox_gpio_set_direction(struct udevice *dev, unsigned offset, int output)
8d30fcd9	110	{
ff52665d	111	set_gpio_flag(dev, offset, GPIOD_IS_OUT, output);
1f212afc	112	set_gpio_flag(dev, offset, GPIOD_IS_IN, !output);
ff52665d PD	113
	114	return 0;
	115	}
	116
a03a0aa7	117	ulong sandbox_gpio_get_flags(struct udevice *dev, uint offset)
ff52665d	118	{
1f212afc SG	119	ulong flags = *get_gpio_flags(dev, offset);
	120
	121	return flags & ~GPIOD_SANDBOX_MASK;
ff52665d PD	122	}
ff52665d PD	123
a03a0aa7	124	int sandbox_gpio_set_flags(struct udevice *dev, uint offset, ulong flags)
ff52665d	125	{
1f212afc SG	126	struct gpio_state *state = get_gpio_state(dev, offset);
1f212afc SG	127
e87e86f3	128	state->flags = flags;
ff52665d PD	129
ff52665d PD	130	return 0;
8d30fcd9 SG	131	}
	132
	133	/*
	134	* These functions implement the public interface within U-Boot
	135	*/
	136
e2d8a714	137	/* set GPIO port 'offset' as an input */
54c5d08a	138	static int sb_gpio_direction_input(struct udevice *dev, unsigned offset)
8d30fcd9	139	{
e2d8a714	140	debug("%s: offset:%u\n", __func__, offset);
8d30fcd9	141
e2d8a714	142	return sandbox_gpio_set_direction(dev, offset, 0);
8d30fcd9 SG	143	}
8d30fcd9 SG	144
e2d8a714	145	/* set GPIO port 'offset' as an output, with polarity 'value' */
54c5d08a	146	static int sb_gpio_direction_output(struct udevice *dev, unsigned offset,
e2d8a714	147	int value)
8d30fcd9	148	{
0242aecb SG	149	int ret;
0242aecb SG	150
e2d8a714	151	debug("%s: offset:%u, value = %d\n", __func__, offset, value);
8d30fcd9	152
0242aecb SG	153	ret = sandbox_gpio_set_direction(dev, offset, 1);
	154	if (ret)
	155	return ret;
d638a183 SG	156	ret = set_gpio_flag(dev, offset, GPIOD_IS_OUT_ACTIVE \|
d638a183 SG	157	GPIOD_EXT_DRIVEN \| GPIOD_EXT_HIGH, value);
0242aecb SG	158	if (ret)
	159	return ret;
	160
	161	return 0;
8d30fcd9 SG	162	}
8d30fcd9 SG	163
e2d8a714	164	/* read GPIO IN value of port 'offset' */
54c5d08a	165	static int sb_gpio_get_value(struct udevice *dev, unsigned offset)
8d30fcd9	166	{
e2d8a714	167	debug("%s: offset:%u\n", __func__, offset);
8d30fcd9	168
e2d8a714	169	return sandbox_gpio_get_value(dev, offset);
8d30fcd9 SG	170	}
8d30fcd9 SG	171
e2d8a714	172	/* write GPIO OUT value to port 'offset' */
54c5d08a	173	static int sb_gpio_set_value(struct udevice *dev, unsigned offset, int value)
8d30fcd9	174	{
0242aecb SG	175	int ret;
0242aecb SG	176
e2d8a714	177	debug("%s: offset:%u, value = %d\n", __func__, offset, value);
8d30fcd9	178
e2d8a714 SG	179	if (!sandbox_gpio_get_direction(dev, offset)) {
	180	printf("sandbox_gpio: error: set_value on input gpio %u\n",
	181	offset);
8d30fcd9 SG	182	return -1;
	183	}
	184
d638a183 SG	185	ret = set_gpio_flag(dev, offset, GPIOD_IS_OUT_ACTIVE \|
d638a183 SG	186	GPIOD_EXT_DRIVEN \| GPIOD_EXT_HIGH, value);
0242aecb SG	187	if (ret)
	188	return ret;
	189
	190	return 0;
8d30fcd9 SG	191	}
8d30fcd9 SG	192
699ea960 SG	193	static int sb_gpio_get_function(struct udevice *dev, unsigned offset)
699ea960 SG	194	{
ff52665d	195	if (get_gpio_flag(dev, offset, GPIOD_IS_OUT))
699ea960	196	return GPIOF_OUTPUT;
ff52665d PD	197	if (get_gpio_flag(dev, offset, GPIOD_IS_IN))
ff52665d PD	198	return GPIOF_INPUT;
f6f68164 PC	199	if (get_gpio_flag(dev, offset, GPIOD_IS_AF))
f6f68164 PC	200	return GPIOF_FUNC;
ff52665d PD	201
ff52665d PD	202	return GPIOF_INPUT; /GPIO is not configurated /
699ea960 SG	203	}
699ea960 SG	204
3669e0e7	205	static int sb_gpio_xlate(struct udevice dev, struct gpio_desc desc,
3a57123e	206	struct ofnode_phandle_args *args)
3669e0e7 SG	207	{
	208	desc->offset = args->args[0];
	209	if (args->args_count < 2)
	210	return 0;
2c0f782e PD	211	/* treat generic binding with gpio uclass */
	212	gpio_xlate_offs_flags(dev, desc, args);
	213
	214	/* sandbox test specific, not defined in gpio.h */
	215	if (args->args[1] & GPIO_IN)
3669e0e7	216	desc->flags \|= GPIOD_IS_IN;
ff52665d	217
2c0f782e	218	if (args->args[1] & GPIO_OUT)
3669e0e7	219	desc->flags \|= GPIOD_IS_OUT;
ff52665d	220
2c0f782e	221	if (args->args[1] & GPIO_OUT_ACTIVE)
3669e0e7 SG	222	desc->flags \|= GPIOD_IS_OUT_ACTIVE;
3669e0e7 SG	223
f6f68164 PC	224	if (args->args[1] & GPIO_AF)
	225	desc->flags \|= GPIOD_IS_AF;
	226
3669e0e7 SG	227	return 0;
	228	}
	229
13979fc4 SG	230	static int sb_gpio_set_flags(struct udevice *dev, unsigned int offset,
13979fc4 SG	231	ulong flags)
ff52665d	232	{
a03a0aa7	233	debug("%s: offset:%u, flags = %lx\n", __func__, offset, flags);
e87e86f3 SG	234	struct gpio_state *state = get_gpio_state(dev, offset);
	235
	236	if (flags & GPIOD_IS_OUT) {
d638a183	237	flags \|= GPIOD_EXT_DRIVEN;
e87e86f3 SG	238	if (flags & GPIOD_IS_OUT_ACTIVE)
	239	flags \|= GPIOD_EXT_HIGH;
	240	else
	241	flags &= ~GPIOD_EXT_HIGH;
d638a183 SG	242	} else {
d638a183 SG	243	flags \|= state->flags & GPIOD_SANDBOX_MASK;
e87e86f3 SG	244	}
e87e86f3 SG	245	state->flags = flags;
ff52665d	246
e87e86f3	247	return 0;
ff52665d PD	248	}
ff52665d PD	249
a03a0aa7	250	static int sb_gpio_get_flags(struct udevice dev, uint offset, ulong flagsp)
ff52665d PD	251	{
ff52665d PD	252	debug("%s: offset:%u\n", __func__, offset);
e87e86f3	253	flagsp = get_gpio_flags(dev, offset) & ~GPIOD_SANDBOX_MASK;
ff52665d PD	254
	255	return 0;
	256	}
	257
2912686c SG	258	#if CONFIG_IS_ENABLED(ACPIGEN)
	259	static int sb_gpio_get_acpi(const struct gpio_desc *desc,
	260	struct acpi_gpio *gpio)
	261	{
	262	int ret;
	263
	264	/* Note that gpio_get_acpi() zeroes gpio before calling here /
	265	gpio->pin_count = 1;
	266	gpio->pins[0] = desc->offset;
	267	ret = acpi_device_scope(desc->dev, gpio->resource,
	268	sizeof(gpio->resource));
	269	if (ret)
	270	return log_ret(ret);
	271
	272	/* All of these values are just used for testing */
	273	if (desc->flags & GPIOD_ACTIVE_LOW) {
	274	gpio->pin0_addr = 0x80012 + desc->offset;
	275	gpio->type = ACPI_GPIO_TYPE_INTERRUPT;
	276	gpio->pull = ACPI_GPIO_PULL_DOWN;
	277	gpio->interrupt_debounce_timeout = 4321;
	278
	279	/* We use the GpioInt part */
	280	gpio->irq.pin = desc->offset;
	281	gpio->irq.polarity = ACPI_IRQ_ACTIVE_BOTH;
	282	gpio->irq.shared = ACPI_IRQ_SHARED;
	283	gpio->irq.wake = ACPI_IRQ_WAKE;
	284
	285	/* The GpioIo part is only used for testing */
	286	gpio->polarity = ACPI_GPIO_ACTIVE_LOW;
	287	} else {
	288	gpio->pin0_addr = 0xc00dc + desc->offset;
	289	gpio->type = ACPI_GPIO_TYPE_IO;
	290	gpio->pull = ACPI_GPIO_PULL_UP;
	291	gpio->interrupt_debounce_timeout = 0;
	292
	293	/* The GpioInt part is not used */
	294
	295	/* We use the GpioIo part */
	296	gpio->output_drive_strength = 1234;
	297	gpio->io_shared = true;
	298	gpio->io_restrict = ACPI_GPIO_IO_RESTRICT_INPUT;
	299	gpio->polarity = 0;
	300	}
	301
	302	return 0;
	303	}
	304
	305	static int sb_gpio_get_name(const struct udevice dev, char out_name)
	306	{
	307	return acpi_copy_name(out_name, "GPIO");
	308	}
	309
	310	struct acpi_ops gpio_sandbox_acpi_ops = {
	311	.get_name = sb_gpio_get_name,
	312	};
	313	#endif /* ACPIGEN */
	314
e2d8a714	315	static const struct dm_gpio_ops gpio_sandbox_ops = {
e2d8a714 SG	316	.direction_input = sb_gpio_direction_input,
	317	.direction_output = sb_gpio_direction_output,
	318	.get_value = sb_gpio_get_value,
	319	.set_value = sb_gpio_set_value,
699ea960	320	.get_function = sb_gpio_get_function,
3669e0e7	321	.xlate = sb_gpio_xlate,
13979fc4	322	.set_flags = sb_gpio_set_flags,
9648789e	323	.get_flags = sb_gpio_get_flags,
2912686c SG	324	#if CONFIG_IS_ENABLED(ACPIGEN)
	325	.get_acpi = sb_gpio_get_acpi,
	326	#endif
e2d8a714 SG	327	};
e2d8a714 SG	328
d1998a9f	329	static int sandbox_gpio_of_to_plat(struct udevice *dev)
e2d8a714	330	{
48609d07 SG	331	if (CONFIG_IS_ENABLED(OF_REAL)) {
48609d07 SG	332	struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
8d30fcd9	333
48609d07 SG	334	uc_priv->gpio_count =
	335	dev_read_u32_default(dev, "sandbox,gpio-count", 0);
	336	uc_priv->bank_name = dev_read_string(dev, "gpio-bank-name");
	337	}
8d30fcd9	338
e2d8a714 SG	339	return 0;
	340	}
	341
54c5d08a	342	static int gpio_sandbox_probe(struct udevice *dev)
e2d8a714	343	{
e564f054	344	struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
e2d8a714	345
7d14ee44	346	if (!dev_has_ofnode(dev))
e2d8a714 SG	347	/* Tell the uclass how many GPIOs we have */
e2d8a714 SG	348	uc_priv->gpio_count = CONFIG_SANDBOX_GPIO_COUNT;
e2d8a714	349
0fd3d911 SG	350	dev_set_priv(dev,
0fd3d911 SG	351	calloc(sizeof(struct gpio_state), uc_priv->gpio_count));
e2d8a714 SG	352
e2d8a714 SG	353	return 0;
8d30fcd9	354	}
e2d8a714	355
62cb89d5 SG	356	static int gpio_sandbox_remove(struct udevice *dev)
62cb89d5 SG	357	{
0fd3d911	358	free(dev_get_priv(dev));
62cb89d5 SG	359
	360	return 0;
	361	}
	362
ae7f4513	363	static const struct udevice_id sandbox_gpio_ids[] = {
e2d8a714 SG	364	{ .compatible = "sandbox,gpio" },
	365	{ }
	366	};
	367
e3e2470f WL	368	U_BOOT_DRIVER(sandbox_gpio) = {
e3e2470f WL	369	.name = "sandbox_gpio",
e2d8a714 SG	370	.id = UCLASS_GPIO,
e2d8a714 SG	371	.of_match = sandbox_gpio_ids,
d1998a9f	372	.of_to_plat = sandbox_gpio_of_to_plat,
e2d8a714	373	.probe = gpio_sandbox_probe,
62cb89d5	374	.remove = gpio_sandbox_remove,
e2d8a714	375	.ops = &gpio_sandbox_ops,
2912686c	376	ACPI_OPS_PTR(&gpio_sandbox_acpi_ops)
e2d8a714	377	};
e5301bac	378
bdf8fd76	379	DM_DRIVER_ALIAS(sandbox_gpio, sandbox_gpio_alias)
addf358b	380
48609d07 SG	381	#if CONFIG_IS_ENABLED(PINCTRL)
48609d07 SG	382
e5301bac PD	383	/* pincontrol: used only to check GPIO pin configuration (pinmux command) */
	384
	385	struct sb_pinctrl_priv {
	386	int pinctrl_ngpios;
	387	struct list_head gpio_dev;
	388	};
	389
	390	struct sb_gpio_bank {
	391	struct udevice *gpio_dev;
	392	struct list_head list;
	393	};
	394
	395	static int sb_populate_gpio_dev_list(struct udevice *dev)
	396	{
	397	struct sb_pinctrl_priv *priv = dev_get_priv(dev);
	398	struct udevice *gpio_dev;
	399	struct udevice *child;
	400	struct sb_gpio_bank *gpio_bank;
	401	int ret;
	402
	403	/*
	404	* parse pin-controller sub-nodes (ie gpio bank nodes) and fill
	405	* a list with all gpio device reference which belongs to the
	406	* current pin-controller. This list is used to find pin_name and
	407	* pin muxing
	408	*/
	409	list_for_each_entry(child, &dev->child_head, sibling_node) {
	410	ret = uclass_get_device_by_name(UCLASS_GPIO, child->name,
	411	&gpio_dev);
	412	if (ret < 0)
	413	continue;
	414
	415	gpio_bank = malloc(sizeof(*gpio_bank));
	416	if (!gpio_bank) {
	417	dev_err(dev, "Not enough memory\n");
	418	return -ENOMEM;
	419	}
	420
	421	gpio_bank->gpio_dev = gpio_dev;
	422	list_add_tail(&gpio_bank->list, &priv->gpio_dev);
	423	}
	424
	425	return 0;
	426	}
	427
	428	static int sb_pinctrl_get_pins_count(struct udevice *dev)
	429	{
	430	struct sb_pinctrl_priv *priv = dev_get_priv(dev);
	431	struct gpio_dev_priv *uc_priv;
	432	struct sb_gpio_bank *gpio_bank;
	433
	434	/*
	435	* if get_pins_count has already been executed once on this
	436	* pin-controller, no need to run it again
	437	*/
	438	if (priv->pinctrl_ngpios)
	439	return priv->pinctrl_ngpios;
	440
	441	if (list_empty(&priv->gpio_dev))
	442	sb_populate_gpio_dev_list(dev);
	443	/*
	444	* walk through all banks to retrieve the pin-controller
	445	* pins number
	446	*/
447	list_for_each_entry(gpio_bank, &priv->gpio_dev, list) {
448	uc_priv = dev_get_uclass_priv(gpio_bank->gpio_dev);
449
450	priv->pinctrl_ngpios += uc_priv->gpio_count;
451	}
452
453	return priv->pinctrl_ngpios;
454	}
455
456	static struct udevice sb_pinctrl_get_gpio_dev(struct udevice dev,
457	unsigned int selector,
458	unsigned int *idx)
459	{
460	struct sb_pinctrl_priv *priv = dev_get_priv(dev);
461	struct sb_gpio_bank *gpio_bank;
462	struct gpio_dev_priv *uc_priv;
463	int pin_count = 0;
464
465	if (list_empty(&priv->gpio_dev))
466	sb_populate_gpio_dev_list(dev);
467
468	/* look up for the bank which owns the requested pin */
469	list_for_each_entry(gpio_bank, &priv->gpio_dev, list) {
470	uc_priv = dev_get_uclass_priv(gpio_bank->gpio_dev);
471
472	if (selector < (pin_count + uc_priv->gpio_count)) {
473	/*
474	* we found the bank, convert pin selector to
475	* gpio bank index
476	*/
477	*idx = selector - pin_count;
478
479	return gpio_bank->gpio_dev;
480	}
481	pin_count += uc_priv->gpio_count;
482	}
483
484	return NULL;
485	}
486
487	static const char sb_pinctrl_get_pin_name(struct udevice dev,
488	unsigned int selector)
489	{
490	struct gpio_dev_priv *uc_priv;
491	struct udevice *gpio_dev;
492	unsigned int gpio_idx;
493	static char pin_name[PINNAME_SIZE];
494
495	/* look up for the bank which owns the requested pin */
496	gpio_dev = sb_pinctrl_get_gpio_dev(dev, selector, &gpio_idx);
497	if (!gpio_dev) {
498	snprintf(pin_name, PINNAME_SIZE, "Error");
499	} else {
500	uc_priv = dev_get_uclass_priv(gpio_dev);
501
502	snprintf(pin_name, PINNAME_SIZE, "%s%d",
503	uc_priv->bank_name,
504	gpio_idx);
505	}
506
507	return pin_name;
508	}
509
a03a0aa7	510	static char *get_flags_string(ulong flags)
e5301bac PD	511	{
	512	if (flags & GPIOD_OPEN_DRAIN)
	513	return "drive-open-drain";
	514	if (flags & GPIOD_OPEN_SOURCE)
	515	return "drive-open-source";
	516	if (flags & GPIOD_PULL_UP)
	517	return "bias-pull-up";
	518	if (flags & GPIOD_PULL_DOWN)
	519	return "bias-pull-down";
	520	return ".";
	521	}
	522
	523	static int sb_pinctrl_get_pin_muxing(struct udevice *dev,
	524	unsigned int selector,
	525	char *buf, int size)
	526	{
	527	struct udevice *gpio_dev;
	528	unsigned int gpio_idx;
a03a0aa7	529	ulong flags;
e5301bac PD	530	int function;
	531
	532	/* look up for the bank which owns the requested pin */
	533	gpio_dev = sb_pinctrl_get_gpio_dev(dev, selector, &gpio_idx);
	534	if (!gpio_dev) {
	535	snprintf(buf, size, "Error");
	536	} else {
	537	function = sb_gpio_get_function(gpio_dev, gpio_idx);
a03a0aa7	538	flags = *get_gpio_flags(gpio_dev, gpio_idx);
e5301bac PD	539
	540	snprintf(buf, size, "gpio %s %s",
	541	function == GPIOF_OUTPUT ? "output" : "input",
a03a0aa7	542	get_flags_string(flags));
e5301bac PD	543	}
	544
	545	return 0;
	546	}
	547
2912686c SG	548	#if CONFIG_IS_ENABLED(ACPIGEN)
	549	static int sb_pinctrl_get_name(const struct udevice dev, char out_name)
	550	{
	551	return acpi_copy_name(out_name, "PINC");
	552	}
	553	#endif
	554
e5301bac PD	555	static int sandbox_pinctrl_probe(struct udevice *dev)
	556	{
	557	struct sb_pinctrl_priv *priv = dev_get_priv(dev);
	558
	559	INIT_LIST_HEAD(&priv->gpio_dev);
	560
	561	return 0;
	562	}
	563
	564	static struct pinctrl_ops sandbox_pinctrl_gpio_ops = {
	565	.get_pin_name = sb_pinctrl_get_pin_name,
	566	.get_pins_count = sb_pinctrl_get_pins_count,
	567	.get_pin_muxing = sb_pinctrl_get_pin_muxing,
	568	};
	569
2912686c SG	570	#if CONFIG_IS_ENABLED(ACPIGEN)
	571	struct acpi_ops pinctrl_sandbox_acpi_ops = {
	572	.get_name = sb_pinctrl_get_name,
	573	};
	574	#endif
	575
e5301bac PD	576	static const struct udevice_id sandbox_pinctrl_gpio_match[] = {
	577	{ .compatible = "sandbox,pinctrl-gpio" },
	578	{ /* sentinel */ }
	579	};
	580
	581	U_BOOT_DRIVER(sandbox_pinctrl_gpio) = {
	582	.name = "sandbox_pinctrl_gpio",
	583	.id = UCLASS_PINCTRL,
	584	.of_match = sandbox_pinctrl_gpio_match,
	585	.ops = &sandbox_pinctrl_gpio_ops,
	586	.bind = dm_scan_fdt_dev,
	587	.probe = sandbox_pinctrl_probe,
41575d8e	588	.priv_auto = sizeof(struct sb_pinctrl_priv),
2912686c	589	ACPI_OPS_PTR(&pinctrl_sandbox_acpi_ops)
e5301bac	590	};
48609d07 SG	591
48609d07 SG	592	#endif /* PINCTRL */