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c609719b WD |
1 | /* |
2 | * (C) Copyright 2001, 2002 | |
3 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. | |
4 | * | |
5 | * See file CREDITS for list of people who contributed to this | |
6 | * project. | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or | |
9 | * modify it under the terms of the GNU General Public License as | |
10 | * published by the Free Software Foundation; either version 2 of | |
11 | * the License, or (at your option) any later version. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program; if not, write to the Free Software | |
20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
21 | * MA 02111-1307 USA | |
22 | * | |
23 | * This has been changed substantially by Gerald Van Baren, Custom IDEAS, | |
24 | * vanbaren@cideas.com. It was heavily influenced by LiMon, written by | |
25 | * Neil Russell. | |
26 | */ | |
27 | ||
28 | #include <common.h> | |
29 | #ifdef CONFIG_MPC8260 /* only valid for MPC8260 */ | |
30 | #include <ioports.h> | |
31 | #endif | |
d4fc6012 | 32 | #ifdef CONFIG_AT91RM9200 /* need this for the at91rm9200 */ |
9d5028c2 WD |
33 | #include <asm/io.h> |
34 | #include <asm/arch/hardware.h> | |
35 | #endif | |
ba94a1bb WD |
36 | #ifdef CONFIG_IXP425 /* only valid for IXP425 */ |
37 | #include <asm/arch/ixp425.h> | |
38 | #endif | |
b0d8f5bf PP |
39 | #ifdef CONFIG_LPC2292 |
40 | #include <asm/arch/hardware.h> | |
41 | #endif | |
c609719b WD |
42 | #include <i2c.h> |
43 | ||
c609719b WD |
44 | /* #define DEBUG_I2C */ |
45 | ||
d87080b7 WD |
46 | #ifdef DEBUG_I2C |
47 | DECLARE_GLOBAL_DATA_PTR; | |
48 | #endif | |
49 | ||
c609719b WD |
50 | |
51 | /*----------------------------------------------------------------------- | |
52 | * Definitions | |
53 | */ | |
54 | ||
55 | #define RETRIES 0 | |
56 | ||
57 | ||
58 | #define I2C_ACK 0 /* PD_SDA level to ack a byte */ | |
59 | #define I2C_NOACK 1 /* PD_SDA level to noack a byte */ | |
60 | ||
61 | ||
62 | #ifdef DEBUG_I2C | |
63 | #define PRINTD(fmt,args...) do { \ | |
c609719b WD |
64 | if (gd->have_console) \ |
65 | printf (fmt ,##args); \ | |
66 | } while (0) | |
67 | #else | |
68 | #define PRINTD(fmt,args...) | |
69 | #endif | |
70 | ||
799b784a HS |
71 | #if defined(CONFIG_I2C_MULTI_BUS) |
72 | static unsigned int i2c_bus_num __attribute__ ((section ("data"))) = 0; | |
73 | #endif /* CONFIG_I2C_MULTI_BUS */ | |
74 | ||
c609719b WD |
75 | /*----------------------------------------------------------------------- |
76 | * Local functions | |
77 | */ | |
78 | static void send_reset (void); | |
79 | static void send_start (void); | |
80 | static void send_stop (void); | |
81 | static void send_ack (int); | |
82 | static int write_byte (uchar byte); | |
83 | static uchar read_byte (int); | |
84 | ||
c609719b WD |
85 | /*----------------------------------------------------------------------- |
86 | * Send a reset sequence consisting of 9 clocks with the data signal high | |
87 | * to clock any confused device back into an idle state. Also send a | |
88 | * <stop> at the end of the sequence for belts & suspenders. | |
89 | */ | |
90 | static void send_reset(void) | |
91 | { | |
98aed379 | 92 | I2C_SOFT_DECLARATIONS /* intentional without ';' */ |
c609719b WD |
93 | int j; |
94 | ||
60fbe254 | 95 | I2C_SCL(1); |
c609719b | 96 | I2C_SDA(1); |
60fbe254 WD |
97 | #ifdef I2C_INIT |
98 | I2C_INIT; | |
99 | #endif | |
100 | I2C_TRISTATE; | |
c609719b WD |
101 | for(j = 0; j < 9; j++) { |
102 | I2C_SCL(0); | |
103 | I2C_DELAY; | |
104 | I2C_DELAY; | |
105 | I2C_SCL(1); | |
106 | I2C_DELAY; | |
107 | I2C_DELAY; | |
108 | } | |
109 | send_stop(); | |
110 | I2C_TRISTATE; | |
111 | } | |
112 | ||
113 | /*----------------------------------------------------------------------- | |
114 | * START: High -> Low on SDA while SCL is High | |
115 | */ | |
116 | static void send_start(void) | |
117 | { | |
98aed379 | 118 | I2C_SOFT_DECLARATIONS /* intentional without ';' */ |
c609719b WD |
119 | |
120 | I2C_DELAY; | |
121 | I2C_SDA(1); | |
122 | I2C_ACTIVE; | |
123 | I2C_DELAY; | |
124 | I2C_SCL(1); | |
125 | I2C_DELAY; | |
126 | I2C_SDA(0); | |
127 | I2C_DELAY; | |
128 | } | |
129 | ||
130 | /*----------------------------------------------------------------------- | |
131 | * STOP: Low -> High on SDA while SCL is High | |
132 | */ | |
133 | static void send_stop(void) | |
134 | { | |
98aed379 | 135 | I2C_SOFT_DECLARATIONS /* intentional without ';' */ |
c609719b WD |
136 | |
137 | I2C_SCL(0); | |
138 | I2C_DELAY; | |
139 | I2C_SDA(0); | |
140 | I2C_ACTIVE; | |
141 | I2C_DELAY; | |
142 | I2C_SCL(1); | |
143 | I2C_DELAY; | |
144 | I2C_SDA(1); | |
145 | I2C_DELAY; | |
146 | I2C_TRISTATE; | |
147 | } | |
148 | ||
149 | ||
150 | /*----------------------------------------------------------------------- | |
151 | * ack should be I2C_ACK or I2C_NOACK | |
152 | */ | |
153 | static void send_ack(int ack) | |
154 | { | |
98aed379 | 155 | I2C_SOFT_DECLARATIONS /* intentional without ';' */ |
c609719b | 156 | |
c609719b WD |
157 | I2C_SCL(0); |
158 | I2C_DELAY; | |
c609719b | 159 | I2C_ACTIVE; |
c15f80ea | 160 | I2C_SDA(ack); |
c609719b WD |
161 | I2C_DELAY; |
162 | I2C_SCL(1); | |
163 | I2C_DELAY; | |
164 | I2C_DELAY; | |
165 | I2C_SCL(0); | |
166 | I2C_DELAY; | |
167 | } | |
168 | ||
169 | ||
170 | /*----------------------------------------------------------------------- | |
171 | * Send 8 bits and look for an acknowledgement. | |
172 | */ | |
173 | static int write_byte(uchar data) | |
174 | { | |
98aed379 | 175 | I2C_SOFT_DECLARATIONS /* intentional without ';' */ |
c609719b WD |
176 | int j; |
177 | int nack; | |
178 | ||
179 | I2C_ACTIVE; | |
180 | for(j = 0; j < 8; j++) { | |
181 | I2C_SCL(0); | |
182 | I2C_DELAY; | |
183 | I2C_SDA(data & 0x80); | |
184 | I2C_DELAY; | |
185 | I2C_SCL(1); | |
186 | I2C_DELAY; | |
187 | I2C_DELAY; | |
188 | ||
189 | data <<= 1; | |
190 | } | |
191 | ||
192 | /* | |
193 | * Look for an <ACK>(negative logic) and return it. | |
194 | */ | |
195 | I2C_SCL(0); | |
196 | I2C_DELAY; | |
197 | I2C_SDA(1); | |
198 | I2C_TRISTATE; | |
199 | I2C_DELAY; | |
200 | I2C_SCL(1); | |
201 | I2C_DELAY; | |
202 | I2C_DELAY; | |
203 | nack = I2C_READ; | |
204 | I2C_SCL(0); | |
205 | I2C_DELAY; | |
206 | I2C_ACTIVE; | |
207 | ||
208 | return(nack); /* not a nack is an ack */ | |
209 | } | |
210 | ||
799b784a HS |
211 | #if defined(CONFIG_I2C_MULTI_BUS) |
212 | /* | |
213 | * Functions for multiple I2C bus handling | |
214 | */ | |
215 | unsigned int i2c_get_bus_num(void) | |
216 | { | |
217 | return i2c_bus_num; | |
218 | } | |
219 | ||
220 | int i2c_set_bus_num(unsigned int bus) | |
221 | { | |
222 | if (bus >= CFG_MAX_I2C_BUS) | |
223 | return -1; | |
224 | i2c_bus_num = bus; | |
225 | ||
226 | return 0; | |
227 | } | |
228 | ||
229 | /* TODO: add 100/400k switching */ | |
230 | unsigned int i2c_get_bus_speed(void) | |
231 | { | |
232 | return CFG_I2C_SPEED; | |
233 | } | |
234 | ||
235 | int i2c_set_bus_speed(unsigned int speed) | |
236 | { | |
237 | if (speed != CFG_I2C_SPEED) | |
238 | return -1; | |
239 | ||
240 | return 0; | |
241 | } | |
242 | #endif | |
c609719b WD |
243 | |
244 | /*----------------------------------------------------------------------- | |
245 | * if ack == I2C_ACK, ACK the byte so can continue reading, else | |
246 | * send I2C_NOACK to end the read. | |
247 | */ | |
248 | static uchar read_byte(int ack) | |
249 | { | |
98aed379 | 250 | I2C_SOFT_DECLARATIONS /* intentional without ';' */ |
c609719b WD |
251 | int data; |
252 | int j; | |
253 | ||
254 | /* | |
255 | * Read 8 bits, MSB first. | |
256 | */ | |
257 | I2C_TRISTATE; | |
110e006f | 258 | I2C_SDA(1); |
c609719b WD |
259 | data = 0; |
260 | for(j = 0; j < 8; j++) { | |
261 | I2C_SCL(0); | |
262 | I2C_DELAY; | |
263 | I2C_SCL(1); | |
264 | I2C_DELAY; | |
265 | data <<= 1; | |
266 | data |= I2C_READ; | |
267 | I2C_DELAY; | |
268 | } | |
269 | send_ack(ack); | |
270 | ||
271 | return(data); | |
272 | } | |
273 | ||
274 | /*=====================================================================*/ | |
275 | /* Public Functions */ | |
276 | /*=====================================================================*/ | |
277 | ||
278 | /*----------------------------------------------------------------------- | |
279 | * Initialization | |
280 | */ | |
281 | void i2c_init (int speed, int slaveaddr) | |
282 | { | |
c609719b | 283 | /* |
8bde7f77 WD |
284 | * WARNING: Do NOT save speed in a static variable: if the |
285 | * I2C routines are called before RAM is initialized (to read | |
286 | * the DIMM SPD, for instance), RAM won't be usable and your | |
287 | * system will crash. | |
c609719b WD |
288 | */ |
289 | send_reset (); | |
290 | } | |
291 | ||
292 | /*----------------------------------------------------------------------- | |
293 | * Probe to see if a chip is present. Also good for checking for the | |
294 | * completion of EEPROM writes since the chip stops responding until | |
295 | * the write completes (typically 10mSec). | |
296 | */ | |
297 | int i2c_probe(uchar addr) | |
298 | { | |
299 | int rc; | |
300 | ||
82d716fd | 301 | /* |
8e7b703a | 302 | * perform 1 byte write transaction with just address byte |
82d716fd WD |
303 | * (fake write) |
304 | */ | |
c609719b | 305 | send_start(); |
6aff3115 | 306 | rc = write_byte ((addr << 1) | 0); |
c609719b WD |
307 | send_stop(); |
308 | ||
309 | return (rc ? 1 : 0); | |
310 | } | |
311 | ||
312 | /*----------------------------------------------------------------------- | |
313 | * Read bytes | |
314 | */ | |
315 | int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len) | |
316 | { | |
317 | int shift; | |
318 | PRINTD("i2c_read: chip %02X addr %02X alen %d buffer %p len %d\n", | |
319 | chip, addr, alen, buffer, len); | |
320 | ||
321 | #ifdef CFG_I2C_EEPROM_ADDR_OVERFLOW | |
322 | /* | |
323 | * EEPROM chips that implement "address overflow" are ones | |
324 | * like Catalyst 24WC04/08/16 which has 9/10/11 bits of | |
325 | * address and the extra bits end up in the "chip address" | |
326 | * bit slots. This makes a 24WC08 (1Kbyte) chip look like | |
327 | * four 256 byte chips. | |
328 | * | |
329 | * Note that we consider the length of the address field to | |
330 | * still be one byte because the extra address bits are | |
331 | * hidden in the chip address. | |
332 | */ | |
333 | chip |= ((addr >> (alen * 8)) & CFG_I2C_EEPROM_ADDR_OVERFLOW); | |
334 | ||
335 | PRINTD("i2c_read: fix addr_overflow: chip %02X addr %02X\n", | |
336 | chip, addr); | |
337 | #endif | |
338 | ||
339 | /* | |
340 | * Do the addressing portion of a write cycle to set the | |
341 | * chip's address pointer. If the address length is zero, | |
342 | * don't do the normal write cycle to set the address pointer, | |
343 | * there is no address pointer in this chip. | |
344 | */ | |
345 | send_start(); | |
346 | if(alen > 0) { | |
347 | if(write_byte(chip << 1)) { /* write cycle */ | |
348 | send_stop(); | |
349 | PRINTD("i2c_read, no chip responded %02X\n", chip); | |
350 | return(1); | |
351 | } | |
352 | shift = (alen-1) * 8; | |
353 | while(alen-- > 0) { | |
354 | if(write_byte(addr >> shift)) { | |
355 | PRINTD("i2c_read, address not <ACK>ed\n"); | |
356 | return(1); | |
357 | } | |
358 | shift -= 8; | |
359 | } | |
360 | send_stop(); /* reportedly some chips need a full stop */ | |
361 | send_start(); | |
362 | } | |
363 | /* | |
364 | * Send the chip address again, this time for a read cycle. | |
365 | * Then read the data. On the last byte, we do a NACK instead | |
366 | * of an ACK(len == 0) to terminate the read. | |
367 | */ | |
368 | write_byte((chip << 1) | 1); /* read cycle */ | |
369 | while(len-- > 0) { | |
370 | *buffer++ = read_byte(len == 0); | |
371 | } | |
372 | send_stop(); | |
373 | return(0); | |
374 | } | |
375 | ||
376 | /*----------------------------------------------------------------------- | |
377 | * Write bytes | |
378 | */ | |
379 | int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len) | |
380 | { | |
381 | int shift, failures = 0; | |
382 | ||
383 | PRINTD("i2c_write: chip %02X addr %02X alen %d buffer %p len %d\n", | |
384 | chip, addr, alen, buffer, len); | |
385 | ||
386 | send_start(); | |
387 | if(write_byte(chip << 1)) { /* write cycle */ | |
388 | send_stop(); | |
389 | PRINTD("i2c_write, no chip responded %02X\n", chip); | |
390 | return(1); | |
391 | } | |
392 | shift = (alen-1) * 8; | |
393 | while(alen-- > 0) { | |
394 | if(write_byte(addr >> shift)) { | |
395 | PRINTD("i2c_write, address not <ACK>ed\n"); | |
396 | return(1); | |
397 | } | |
398 | shift -= 8; | |
399 | } | |
400 | ||
401 | while(len-- > 0) { | |
402 | if(write_byte(*buffer++)) { | |
403 | failures++; | |
404 | } | |
405 | } | |
406 | send_stop(); | |
407 | return(failures); | |
408 | } | |
409 | ||
410 | /*----------------------------------------------------------------------- | |
411 | * Read a register | |
412 | */ | |
413 | uchar i2c_reg_read(uchar i2c_addr, uchar reg) | |
414 | { | |
77ddac94 | 415 | uchar buf; |
c609719b WD |
416 | |
417 | i2c_read(i2c_addr, reg, 1, &buf, 1); | |
418 | ||
419 | return(buf); | |
420 | } | |
421 | ||
422 | /*----------------------------------------------------------------------- | |
423 | * Write a register | |
424 | */ | |
425 | void i2c_reg_write(uchar i2c_addr, uchar reg, uchar val) | |
426 | { | |
427 | i2c_write(i2c_addr, reg, 1, &val, 1); | |
428 | } |