[thirdparty/u-boot.git] / drivers / mmc / piton_mmc.c

// SPDX-License-Identifier: GPL-2.0+
/*
 * (C) Copyright 2009 SAMSUNG Electronics
 * Minkyu Kang <mk7.kang@samsung.com>
 * Jaehoon Chung <jh80.chung@samsung.com>
 * Portions Copyright 2011-2019 NVIDIA Corporation
 * Portions Copyright 2021 Tianrui Wei
 * This file is adapted from tegra_mmc.c
 * Tianrui Wei <tianrui-wei@outlook.com>
 */

#include <asm/gpio.h>
#include <asm/io.h>
#include <common.h>
#include <div64.h>
#include <dm.h>
#include <errno.h>
#include <linux/bitops.h>
#include <linux/delay.h>
#include <linux/err.h>
#include <linux/types.h>
#include <linux/sizes.h>
#include <log.h>
#include <mmc.h>


#define PITON_MMC_DUMMY_F_MAX 20000000
#define PITON_MMC_DUMMY_F_MIN 10000000
#define PITON_MMC_DUMMY_CAPACITY SZ_4G << 3
#define PITON_MMC_DUMMY_B_MAX SZ_4G

struct piton_mmc_plat {
	struct mmc_config cfg;
	struct mmc mmc;
};

struct piton_mmc_priv {
	void __iomem *base_addr;
};

static int piton_mmc_send_cmd(struct udevice *dev, struct mmc_cmd *cmd,
							  struct mmc_data *data)
{
	if (!data)
		return 0;

	struct piton_mmc_priv *priv = dev_get_priv(dev);
	u32 *buff, *start_addr, *write_src;
	size_t byte_cnt, start_block;

	buff = (u32 *)data->dest;
	write_src = (u32 *)data->src;
	start_block = cmd->cmdarg;
	start_addr = priv->base_addr + start_block;

	/* if there is a read */
	for (byte_cnt = data->blocks * data->blocksize; byte_cnt;
				 byte_cnt -= sizeof(u32)) {
		if (data->flags & MMC_DATA_READ) {
			*buff++ = readl(start_addr++);
		}
		else if (data->flags & MMC_DATA_WRITE) {
			writel(*write_src++,start_addr++);
		}
	}
	return 0;
}

static int piton_mmc_ofdata_to_platdata(struct udevice *dev)
{
	struct piton_mmc_priv *priv = dev_get_priv(dev);
	struct piton_mmc_plat *plat = dev_get_plat(dev);
	struct mmc_config *cfg;
	struct mmc *mmc;
	struct blk_desc *bdesc;

	priv->base_addr = dev_read_addr_ptr(dev);
	cfg = &plat->cfg;
	cfg->name = "PITON MMC";
	cfg->host_caps = MMC_MODE_8BIT;
	cfg->f_max = PITON_MMC_DUMMY_F_MAX;
	cfg->f_min = PITON_MMC_DUMMY_F_MIN;
	cfg->voltages = MMC_VDD_21_22;

	mmc = &plat->mmc;
	mmc->read_bl_len = MMC_MAX_BLOCK_LEN;
	mmc->capacity_user = PITON_MMC_DUMMY_CAPACITY;
	mmc->capacity_user *= mmc->read_bl_len;
	mmc->capacity_boot = 0;
	mmc->capacity_rpmb = 0;
	for (int i = 0; i < 4; i++)
		mmc->capacity_gp[i] = 0;
	mmc->capacity = PITON_MMC_DUMMY_CAPACITY;
	mmc->has_init = 1;

	bdesc = mmc_get_blk_desc(mmc);
	bdesc->lun = 0;
	bdesc->hwpart = 0;
	bdesc->type = 0;
	bdesc->blksz = mmc->read_bl_len;
	bdesc->log2blksz = LOG2(bdesc->blksz);
	bdesc->lba = lldiv(mmc->capacity, mmc->read_bl_len);

	return 0;
}

static int piton_mmc_getcd(struct udevice *dev)
{
	return 1;
}

static const struct dm_mmc_ops piton_mmc_ops = {
	.send_cmd = piton_mmc_send_cmd,
	.get_cd = piton_mmc_getcd,
};

static int piton_mmc_probe(struct udevice *dev)
{
	struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
	struct piton_mmc_plat *plat = dev_get_plat(dev);
	struct mmc_config *cfg = &plat->cfg;

	cfg->name = dev->name;
	upriv->mmc = &plat->mmc;
	upriv->mmc->has_init = 1;
	upriv->mmc->capacity = PITON_MMC_DUMMY_CAPACITY;
	upriv->mmc->read_bl_len = MMC_MAX_BLOCK_LEN;
	return 0;
}

static int piton_mmc_bind(struct udevice *dev)
{
	struct piton_mmc_plat *plat = dev_get_plat(dev);
	struct mmc_config *cfg = &plat->cfg;

	cfg->name = dev->name;
	cfg->host_caps = MMC_MODE_HS_52MHz | MMC_MODE_HS | MMC_MODE_8BIT;
	cfg->voltages = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34;
	cfg->f_min = PITON_MMC_DUMMY_F_MIN;
	cfg->f_max = PITON_MMC_DUMMY_F_MAX;
	cfg->b_max = MMC_MAX_BLOCK_LEN;

	return mmc_bind(dev, &plat->mmc, cfg);
}

static const struct udevice_id piton_mmc_ids[] = {
	{.compatible = "openpiton,piton-mmc"},
	{/* sentinel */}
};

U_BOOT_DRIVER(piton_mmc_drv) = {
	.name = "piton_mmc",
	.id = UCLASS_MMC,
	.of_match = piton_mmc_ids,
	.of_to_plat = piton_mmc_ofdata_to_platdata,
	.bind = piton_mmc_bind,
	.probe = piton_mmc_probe,
	.ops = &piton_mmc_ops,
	.plat_auto = sizeof(struct piton_mmc_plat),
	.priv_auto = sizeof(struct piton_mmc_priv),
};
Commit	Line	Data
d6b156eb TW	1	// SPDX-License-Identifier: GPL-2.0+
	2	/*
	3	* (C) Copyright 2009 SAMSUNG Electronics
	4	* Minkyu Kang <mk7.kang@samsung.com>
	5	* Jaehoon Chung <jh80.chung@samsung.com>
	6	* Portions Copyright 2011-2019 NVIDIA Corporation
	7	* Portions Copyright 2021 Tianrui Wei
	8	* This file is adapted from tegra_mmc.c
	9	* Tianrui Wei <tianrui-wei@outlook.com>
	10	*/
	11
	12	#include <asm/gpio.h>
	13	#include <asm/io.h>
d678a59d	14	#include <common.h>
d6b156eb TW	15	#include <div64.h>
	16	#include <dm.h>
	17	#include <errno.h>
	18	#include <linux/bitops.h>
	19	#include <linux/delay.h>
	20	#include <linux/err.h>
	21	#include <linux/types.h>
	22	#include <linux/sizes.h>
	23	#include <log.h>
	24	#include <mmc.h>
	25
	26
	27	#define PITON_MMC_DUMMY_F_MAX 20000000
	28	#define PITON_MMC_DUMMY_F_MIN 10000000
	29	#define PITON_MMC_DUMMY_CAPACITY SZ_4G << 3
	30	#define PITON_MMC_DUMMY_B_MAX SZ_4G
	31
	32	struct piton_mmc_plat {
	33	struct mmc_config cfg;
	34	struct mmc mmc;
	35	};
	36
	37	struct piton_mmc_priv {
	38	void __iomem *base_addr;
	39	};
	40
	41	static int piton_mmc_send_cmd(struct udevice dev, struct mmc_cmd cmd,
	42	struct mmc_data *data)
	43	{
	44	if (!data)
	45	return 0;
	46
	47	struct piton_mmc_priv *priv = dev_get_priv(dev);
	48	u32 buff, start_addr, *write_src;
	49	size_t byte_cnt, start_block;
	50
	51	buff = (u32 *)data->dest;
	52	write_src = (u32 *)data->src;
	53	start_block = cmd->cmdarg;
	54	start_addr = priv->base_addr + start_block;
	55
	56	/* if there is a read */
	57	for (byte_cnt = data->blocks * data->blocksize; byte_cnt;
	58	byte_cnt -= sizeof(u32)) {
	59	if (data->flags & MMC_DATA_READ) {
	60	*buff++ = readl(start_addr++);
	61	}
	62	else if (data->flags & MMC_DATA_WRITE) {
	63	writel(*write_src++,start_addr++);
	64	}
	65	}
	66	return 0;
	67	}
	68
	69	static int piton_mmc_ofdata_to_platdata(struct udevice *dev)
	70	{
	71	struct piton_mmc_priv *priv = dev_get_priv(dev);
	72	struct piton_mmc_plat *plat = dev_get_plat(dev);
	73	struct mmc_config *cfg;
	74	struct mmc *mmc;
	75	struct blk_desc *bdesc;
	76
a12a73b6	77	priv->base_addr = dev_read_addr_ptr(dev);
d6b156eb TW	78	cfg = &plat->cfg;
	79	cfg->name = "PITON MMC";
	80	cfg->host_caps = MMC_MODE_8BIT;
	81	cfg->f_max = PITON_MMC_DUMMY_F_MAX;
	82	cfg->f_min = PITON_MMC_DUMMY_F_MIN;
	83	cfg->voltages = MMC_VDD_21_22;
	84
	85	mmc = &plat->mmc;
	86	mmc->read_bl_len = MMC_MAX_BLOCK_LEN;
	87	mmc->capacity_user = PITON_MMC_DUMMY_CAPACITY;
	88	mmc->capacity_user *= mmc->read_bl_len;
	89	mmc->capacity_boot = 0;
	90	mmc->capacity_rpmb = 0;
	91	for (int i = 0; i < 4; i++)
	92	mmc->capacity_gp[i] = 0;
	93	mmc->capacity = PITON_MMC_DUMMY_CAPACITY;
	94	mmc->has_init = 1;
	95
	96	bdesc = mmc_get_blk_desc(mmc);
	97	bdesc->lun = 0;
	98	bdesc->hwpart = 0;
	99	bdesc->type = 0;
	100	bdesc->blksz = mmc->read_bl_len;
	101	bdesc->log2blksz = LOG2(bdesc->blksz);
	102	bdesc->lba = lldiv(mmc->capacity, mmc->read_bl_len);
	103
	104	return 0;
	105	}
	106
	107	static int piton_mmc_getcd(struct udevice *dev)
	108	{
	109	return 1;
	110	}
	111
	112	static const struct dm_mmc_ops piton_mmc_ops = {
	113	.send_cmd = piton_mmc_send_cmd,
	114	.get_cd = piton_mmc_getcd,
	115	};
	116
	117	static int piton_mmc_probe(struct udevice *dev)
	118	{
	119	struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
	120	struct piton_mmc_plat *plat = dev_get_plat(dev);
	121	struct mmc_config *cfg = &plat->cfg;
	122
	123	cfg->name = dev->name;
	124	upriv->mmc = &plat->mmc;
	125	upriv->mmc->has_init = 1;
	126	upriv->mmc->capacity = PITON_MMC_DUMMY_CAPACITY;
	127	upriv->mmc->read_bl_len = MMC_MAX_BLOCK_LEN;
	128	return 0;
	129	}
	130
	131	static int piton_mmc_bind(struct udevice *dev)
	132	{
	133	struct piton_mmc_plat *plat = dev_get_plat(dev);
	134	struct mmc_config *cfg = &plat->cfg;
	135
	136	cfg->name = dev->name;
	137	cfg->host_caps = MMC_MODE_HS_52MHz \| MMC_MODE_HS \| MMC_MODE_8BIT;
	138	cfg->voltages = MMC_VDD_165_195 \| MMC_VDD_32_33 \| MMC_VDD_33_34;
	139	cfg->f_min = PITON_MMC_DUMMY_F_MIN;
	140	cfg->f_max = PITON_MMC_DUMMY_F_MAX;
	141	cfg->b_max = MMC_MAX_BLOCK_LEN;
142
143	return mmc_bind(dev, &plat->mmc, cfg);
144	}
145
146	static const struct udevice_id piton_mmc_ids[] = {
147	{.compatible = "openpiton,piton-mmc"},
148	{/* sentinel */}
149	};
150
151	U_BOOT_DRIVER(piton_mmc_drv) = {
152	.name = "piton_mmc",
153	.id = UCLASS_MMC,
154	.of_match = piton_mmc_ids,
155	.of_to_plat = piton_mmc_ofdata_to_platdata,
156	.bind = piton_mmc_bind,
157	.probe = piton_mmc_probe,
158	.ops = &piton_mmc_ops,
159	.plat_auto = sizeof(struct piton_mmc_plat),
160	.priv_auto = sizeof(struct piton_mmc_priv),
161	};