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configs: Migrate CMD_NAND*
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1menu "NAND Device Support"
2
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3config SYS_NAND_SELF_INIT
4 bool
5 help
6 This option, if enabled, provides more flexible and linux-like
7 NAND initialization process.
8
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9config NAND_DENALI
10 bool "Support Denali NAND controller"
65e4145a 11 select SYS_NAND_SELF_INIT
8f1a80e9 12 imply CMD_NAND
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13 help
14 Enable support for the Denali NAND controller.
15
16config SYS_NAND_DENALI_64BIT
17 bool "Use 64-bit variant of Denali NAND controller"
18 depends on NAND_DENALI
19 help
20 The Denali NAND controller IP has some variations in terms of
21 the bus interface. The DMA setup sequence is completely differenct
22 between 32bit / 64bit AXI bus variants.
23
24 If your Denali NAND controller is the 64-bit variant, say Y.
25 Otherwise (32 bit), say N.
26
27config NAND_DENALI_SPARE_AREA_SKIP_BYTES
28 int "Number of bytes skipped in OOB area"
29 depends on NAND_DENALI
30 range 0 63
31 help
32 This option specifies the number of bytes to skip from the beginning
33 of OOB area before last ECC sector data starts. This is potentially
34 used to preserve the bad block marker in the OOB area.
35
5519194d 36config NAND_VF610_NFC
064b55cf 37 bool "Support for Freescale NFC for VF610"
5519194d 38 select SYS_NAND_SELF_INIT
8f1a80e9 39 imply CMD_NAND
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40 help
41 Enables support for NAND Flash Controller on some Freescale
064b55cf 42 processors like the VF610, MCF54418 or Kinetis K70.
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43 The driver supports a maximum 2k page size. The driver
44 currently does not support hardware ECC.
45
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46choice
47 prompt "Hardware ECC strength"
48 depends on NAND_VF610_NFC
49 default SYS_NAND_VF610_NFC_45_ECC_BYTES
50 help
51 Select the ECC strength used in the hardware BCH ECC block.
52
53config SYS_NAND_VF610_NFC_45_ECC_BYTES
54 bool "24-error correction (45 ECC bytes)"
55
56config SYS_NAND_VF610_NFC_60_ECC_BYTES
57 bool "32-error correction (60 ECC bytes)"
58
59endchoice
60
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61config NAND_PXA3XX
62 bool "Support for NAND on PXA3xx and Armada 370/XP/38x"
63 select SYS_NAND_SELF_INIT
8f1a80e9 64 imply CMD_NAND
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65 help
66 This enables the driver for the NAND flash device found on
67 PXA3xx processors (NFCv1) and also on Armada 370/XP (NFCv2).
68
e5268616 69config NAND_SUNXI
4ccae81c 70 bool "Support for NAND on Allwinner SoCs"
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71 depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I
72 select SYS_NAND_SELF_INIT
5fe4c9f4 73 select SYS_NAND_U_BOOT_LOCATIONS
8f1a80e9 74 imply CMD_NAND
e5268616 75 ---help---
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76 Enable support for NAND. This option enables the standard and
77 SPL drivers.
78 The SPL driver only supports reading from the NAND using DMA
79 transfers.
e5268616 80
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81if NAND_SUNXI
82
83config NAND_SUNXI_SPL_ECC_STRENGTH
84 int "Allwinner NAND SPL ECC Strength"
85 default 64
86
87config NAND_SUNXI_SPL_ECC_SIZE
88 int "Allwinner NAND SPL ECC Step Size"
89 default 1024
90
91config NAND_SUNXI_SPL_USABLE_PAGE_SIZE
92 int "Allwinner NAND SPL Usable Page Size"
93 default 1024
94
95endif
96
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97config NAND_ARASAN
98 bool "Configure Arasan Nand"
8f1a80e9 99 imply CMD_NAND
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100 help
101 This enables Nand driver support for Arasan nand flash
102 controller. This uses the hardware ECC for read and
103 write operations.
104
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105config NAND_MXS
106 bool "MXS NAND support"
f78038dc 107 depends on MX6 || MX7
8f1a80e9 108 imply CMD_NAND
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109 help
110 This enables NAND driver for the NAND flash controller on the
111 MXS processors.
112
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113config NAND_ZYNQ
114 bool "Support for Zynq Nand controller"
115 select SYS_NAND_SELF_INIT
8f1a80e9 116 imply CMD_NAND
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117 help
118 This enables Nand driver support for Nand flash controller
119 found on Zynq SoC.
120
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121comment "Generic NAND options"
122
123# Enhance depends when converting drivers to Kconfig which use this config
124# option (mxc_nand, ndfc, omap_gpmc).
125config SYS_NAND_BUSWIDTH_16BIT
126 bool "Use 16-bit NAND interface"
127 depends on NAND_VF610_NFC
128 help
129 Indicates that NAND device has 16-bit wide data-bus. In absence of this
130 config, bus-width of NAND device is assumed to be either 8-bit and later
131 determined by reading ONFI params.
132 Above config is useful when NAND device's bus-width information cannot
133 be determined from on-chip ONFI params, like in following scenarios:
134 - SPL boot does not support reading of ONFI parameters. This is done to
135 keep SPL code foot-print small.
136 - In current U-Boot flow using nand_init(), driver initialization
137 happens in board_nand_init() which is called before any device probe
138 (nand_scan_ident + nand_scan_tail), thus device's ONFI parameters are
139 not available while configuring controller. So a static CONFIG_NAND_xx
140 is needed to know the device's bus-width in advance.
141
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142if SPL
143
144config SYS_NAND_U_BOOT_LOCATIONS
145 bool "Define U-boot binaries locations in NAND"
146 help
147 Enable CONFIG_SYS_NAND_U_BOOT_OFFS though Kconfig.
148 This option should not be enabled when compiling U-boot for boards
149 defining CONFIG_SYS_NAND_U_BOOT_OFFS in their include/configs/<board>.h
150 file.
151
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152config SYS_NAND_U_BOOT_OFFS
153 hex "Location in NAND to read U-Boot from"
adc706b2 154 default 0x800000 if NAND_SUNXI
494e1086 155 depends on SYS_NAND_U_BOOT_LOCATIONS
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156 help
157 Set the offset from the start of the nand where u-boot should be
158 loaded from.
159
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160config SYS_NAND_U_BOOT_OFFS_REDUND
161 hex "Location in NAND to read U-Boot from"
162 default SYS_NAND_U_BOOT_OFFS
163 depends on SYS_NAND_U_BOOT_LOCATIONS
164 help
165 Set the offset from the start of the nand where the redundant u-boot
166 should be loaded from.
167
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168config SPL_NAND_DENALI
169 bool "Support Denali NAND controller for SPL"
170 help
171 This is a small implementation of the Denali NAND controller
172 for use on SPL.
173
174endif
175
4b0abf9f 176endmenu