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4d5e29a6 JT |
1 | /* |
2 | * SPI flash probing | |
3 | * | |
4 | * Copyright (C) 2008 Atmel Corporation | |
5 | * Copyright (C) 2010 Reinhard Meyer, EMK Elektronik | |
6 | * Copyright (C) 2013 Jagannadha Sutradharudu Teki, Xilinx Inc. | |
7 | * | |
8 | * Licensed under the GPL-2 or later. | |
9 | */ | |
10 | ||
11 | #include <common.h> | |
12 | #include <fdtdec.h> | |
13 | #include <malloc.h> | |
14 | #include <spi.h> | |
15 | #include <spi_flash.h> | |
16 | ||
898e76c9 | 17 | #include "sf_internal.h" |
4d5e29a6 JT |
18 | |
19 | DECLARE_GLOBAL_DATA_PTR; | |
20 | ||
a5e8199a | 21 | /** |
4d4ec992 JT |
22 | * struct spi_flash_params - SPI/QSPI flash device params structure |
23 | * | |
24 | * @name: Device name ([MANUFLETTER][DEVTYPE][DENSITY][EXTRAINFO]) | |
25 | * @jedec: Device jedec ID (0x[1byte_manuf_id][2byte_dev_id]) | |
26 | * @ext_jedec: Device ext_jedec ID | |
27 | * @sector_size: Sector size of this device | |
469146c0 | 28 | * @nr_sectors: No.of sectors on this device |
10ca45d0 | 29 | * @flags: Importent param, for flash specific behaviour |
4d4ec992 JT |
30 | */ |
31 | struct spi_flash_params { | |
32 | const char *name; | |
33 | u32 jedec; | |
34 | u16 ext_jedec; | |
35 | u32 sector_size; | |
36 | u32 nr_sectors; | |
10ca45d0 | 37 | u16 flags; |
4d4ec992 JT |
38 | }; |
39 | ||
40 | static const struct spi_flash_params spi_flash_params_table[] = { | |
a74db0a4 | 41 | #ifdef CONFIG_SPI_FLASH_ATMEL /* ATMEL */ |
f4f51a8f JT |
42 | {"AT45DB011D", 0x1f2200, 0x0, 64 * 1024, 4, SECT_4K}, |
43 | {"AT45DB021D", 0x1f2300, 0x0, 64 * 1024, 8, SECT_4K}, | |
44 | {"AT45DB041D", 0x1f2400, 0x0, 64 * 1024, 8, SECT_4K}, | |
45 | {"AT45DB081D", 0x1f2500, 0x0, 64 * 1024, 16, SECT_4K}, | |
46 | {"AT45DB161D", 0x1f2600, 0x0, 64 * 1024, 32, SECT_4K}, | |
47 | {"AT45DB321D", 0x1f2700, 0x0, 64 * 1024, 64, SECT_4K}, | |
48 | {"AT45DB641D", 0x1f2800, 0x0, 64 * 1024, 128, SECT_4K}, | |
a74db0a4 | 49 | #endif |
0d7663fe | 50 | #ifdef CONFIG_SPI_FLASH_EON /* EON */ |
f4f51a8f | 51 | {"EN25Q32B", 0x1c3016, 0x0, 64 * 1024, 64, 0}, |
fda41259 | 52 | {"EN25Q64", 0x1c3017, 0x0, 64 * 1024, 128, SECT_4K}, |
f4f51a8f | 53 | {"EN25Q128B", 0x1c3018, 0x0, 64 * 1024, 256, 0}, |
0ab449be | 54 | {"EN25S64", 0x1c3817, 0x0, 64 * 1024, 128, 0}, |
0d7663fe | 55 | #endif |
18500e26 | 56 | #ifdef CONFIG_SPI_FLASH_GIGADEVICE /* GIGADEVICE */ |
f4f51a8f JT |
57 | {"GD25Q64B", 0xc84017, 0x0, 64 * 1024, 128, SECT_4K}, |
58 | {"GD25LQ32", 0xc86016, 0x0, 64 * 1024, 64, SECT_4K}, | |
18500e26 | 59 | #endif |
db7e2584 | 60 | #ifdef CONFIG_SPI_FLASH_MACRONIX /* MACRONIX */ |
f4f51a8f JT |
61 | {"MX25L4005", 0xc22013, 0x0, 64 * 1024, 8, 0}, |
62 | {"MX25L8005", 0xc22014, 0x0, 64 * 1024, 16, 0}, | |
63 | {"MX25L1605D", 0xc22015, 0x0, 64 * 1024, 32, 0}, | |
64 | {"MX25L3205D", 0xc22016, 0x0, 64 * 1024, 64, 0}, | |
65 | {"MX25L6405D", 0xc22017, 0x0, 64 * 1024, 128, 0}, | |
66 | {"MX25L12805", 0xc22018, 0x0, 64 * 1024, 256, 0}, | |
06655386 | 67 | {"MX25L25635F", 0xc22019, 0x0, 64 * 1024, 512, 0}, |
9719695b | 68 | {"MX25L51235F", 0xc2201A, 0x0, 64 * 1024, 1024, 0}, |
f4f51a8f | 69 | {"MX25L12855E", 0xc22618, 0x0, 64 * 1024, 256, 0}, |
db7e2584 | 70 | #endif |
74bec16e | 71 | #ifdef CONFIG_SPI_FLASH_SPANSION /* SPANSION */ |
f4f51a8f JT |
72 | {"S25FL008A", 0x010213, 0x0, 64 * 1024, 16, 0}, |
73 | {"S25FL016A", 0x010214, 0x0, 64 * 1024, 32, 0}, | |
74 | {"S25FL032A", 0x010215, 0x0, 64 * 1024, 64, 0}, | |
75 | {"S25FL064A", 0x010216, 0x0, 64 * 1024, 128, 0}, | |
76 | {"S25FL128P_256K", 0x012018, 0x0300, 256 * 1024, 64, 0}, | |
77 | {"S25FL128P_64K", 0x012018, 0x0301, 64 * 1024, 256, 0}, | |
78 | {"S25FL032P", 0x010215, 0x4d00, 64 * 1024, 64, 0}, | |
79 | {"S25FL064P", 0x010216, 0x4d00, 64 * 1024, 128, 0}, | |
80 | {"S25FL128S_64K", 0x012018, 0x4d01, 64 * 1024, 256, 0}, | |
f0be6ded | 81 | {"S25FL256S_256K", 0x010219, 0x4d00, 64 * 1024, 512, 0}, |
f4f51a8f | 82 | {"S25FL256S_64K", 0x010219, 0x4d01, 64 * 1024, 512, 0}, |
af878522 | 83 | {"S25FL512S_256K", 0x010220, 0x4d00, 64 * 1024, 1024, 0}, |
f4f51a8f | 84 | {"S25FL512S_64K", 0x010220, 0x4d01, 64 * 1024, 1024, 0}, |
74bec16e | 85 | #endif |
4d4ec992 | 86 | #ifdef CONFIG_SPI_FLASH_STMICRO /* STMICRO */ |
f4f51a8f JT |
87 | {"M25P10", 0x202011, 0x0, 32 * 1024, 4, 0}, |
88 | {"M25P20", 0x202012, 0x0, 64 * 1024, 4, 0}, | |
89 | {"M25P40", 0x202013, 0x0, 64 * 1024, 8, 0}, | |
90 | {"M25P80", 0x202014, 0x0, 64 * 1024, 16, 0}, | |
91 | {"M25P16", 0x202015, 0x0, 64 * 1024, 32, 0}, | |
92 | {"M25P32", 0x202016, 0x0, 64 * 1024, 64, 0}, | |
93 | {"M25P64", 0x202017, 0x0, 64 * 1024, 128, 0}, | |
94 | {"M25P128", 0x202018, 0x0, 256 * 1024, 64, 0}, | |
95 | {"N25Q32", 0x20ba16, 0x0, 64 * 1024, 64, SECT_4K}, | |
96 | {"N25Q32A", 0x20bb16, 0x0, 64 * 1024, 64, SECT_4K}, | |
97 | {"N25Q64", 0x20ba17, 0x0, 64 * 1024, 128, SECT_4K}, | |
98 | {"N25Q64A", 0x20bb17, 0x0, 64 * 1024, 128, SECT_4K}, | |
99 | {"N25Q128", 0x20ba18, 0x0, 64 * 1024, 256, SECT_4K}, | |
100 | {"N25Q128A", 0x20bb18, 0x0, 64 * 1024, 256, SECT_4K}, | |
101 | {"N25Q256", 0x20ba19, 0x0, 64 * 1024, 512, SECT_4K}, | |
102 | {"N25Q256A", 0x20bb19, 0x0, 64 * 1024, 512, SECT_4K}, | |
0f623280 JT |
103 | {"N25Q512", 0x20ba20, 0x0, 64 * 1024, 1024, E_FSR | SECT_4K}, |
104 | {"N25Q512A", 0x20bb20, 0x0, 64 * 1024, 1024, E_FSR | SECT_4K}, | |
105 | {"N25Q1024", 0x20ba21, 0x0, 64 * 1024, 2048, E_FSR | SECT_4K}, | |
106 | {"N25Q1024A", 0x20bb21, 0x0, 64 * 1024, 2048, E_FSR | SECT_4K}, | |
4d4ec992 | 107 | #endif |
26dcc541 | 108 | #ifdef CONFIG_SPI_FLASH_SST /* SST */ |
f4f51a8f JT |
109 | {"SST25VF040B", 0xbf258d, 0x0, 64 * 1024, 8, SECT_4K | SST_WP}, |
110 | {"SST25VF080B", 0xbf258e, 0x0, 64 * 1024, 16, SECT_4K | SST_WP}, | |
111 | {"SST25VF016B", 0xbf2541, 0x0, 64 * 1024, 32, SECT_4K | SST_WP}, | |
112 | {"SST25VF032B", 0xbf254a, 0x0, 64 * 1024, 64, SECT_4K | SST_WP}, | |
113 | {"SST25VF064C", 0xbf254b, 0x0, 64 * 1024, 128, SECT_4K}, | |
114 | {"SST25WF512", 0xbf2501, 0x0, 64 * 1024, 1, SECT_4K | SST_WP}, | |
115 | {"SST25WF010", 0xbf2502, 0x0, 64 * 1024, 2, SECT_4K | SST_WP}, | |
116 | {"SST25WF020", 0xbf2503, 0x0, 64 * 1024, 4, SECT_4K | SST_WP}, | |
117 | {"SST25WF040", 0xbf2504, 0x0, 64 * 1024, 8, SECT_4K | SST_WP}, | |
118 | {"SST25WF080", 0xbf2505, 0x0, 64 * 1024, 16, SECT_4K | SST_WP}, | |
26dcc541 | 119 | #endif |
80701e54 | 120 | #ifdef CONFIG_SPI_FLASH_WINBOND /* WINBOND */ |
f4f51a8f JT |
121 | {"W25P80", 0xef2014, 0x0, 64 * 1024, 16, 0}, |
122 | {"W25P16", 0xef2015, 0x0, 64 * 1024, 32, 0}, | |
123 | {"W25P32", 0xef2016, 0x0, 64 * 1024, 64, 0}, | |
124 | {"W25X40", 0xef3013, 0x0, 64 * 1024, 8, SECT_4K}, | |
125 | {"W25X16", 0xef3015, 0x0, 64 * 1024, 32, SECT_4K}, | |
126 | {"W25X32", 0xef3016, 0x0, 64 * 1024, 64, SECT_4K}, | |
127 | {"W25X64", 0xef3017, 0x0, 64 * 1024, 128, SECT_4K}, | |
128 | {"W25Q80BL", 0xef4014, 0x0, 64 * 1024, 16, SECT_4K}, | |
129 | {"W25Q16CL", 0xef4015, 0x0, 64 * 1024, 32, SECT_4K}, | |
130 | {"W25Q32BV", 0xef4016, 0x0, 64 * 1024, 64, SECT_4K}, | |
131 | {"W25Q64CV", 0xef4017, 0x0, 64 * 1024, 128, SECT_4K}, | |
132 | {"W25Q128BV", 0xef4018, 0x0, 64 * 1024, 256, SECT_4K}, | |
133 | {"W25Q256", 0xef4019, 0x0, 64 * 1024, 512, SECT_4K}, | |
134 | {"W25Q80BW", 0xef5014, 0x0, 64 * 1024, 16, SECT_4K}, | |
135 | {"W25Q16DW", 0xef6015, 0x0, 64 * 1024, 32, SECT_4K}, | |
136 | {"W25Q32DW", 0xef6016, 0x0, 64 * 1024, 64, SECT_4K}, | |
137 | {"W25Q64DW", 0xef6017, 0x0, 64 * 1024, 128, SECT_4K}, | |
138 | {"W25Q128FW", 0xef6018, 0x0, 64 * 1024, 256, SECT_4K}, | |
80701e54 JT |
139 | #endif |
140 | /* | |
141 | * Note: | |
469146c0 | 142 | * Below paired flash devices has similar spi_flash params. |
74bec16e | 143 | * (S25FL129P_64K, S25FL128S_64K) |
80701e54 JT |
144 | * (W25Q80BL, W25Q80BV) |
145 | * (W25Q16CL, W25Q16DV) | |
146 | * (W25Q32BV, W25Q32FV_SPI) | |
147 | * (W25Q64CV, W25Q64FV_SPI) | |
148 | * (W25Q128BV, W25Q128FV_SPI) | |
149 | * (W25Q32DW, W25Q32FV_QPI) | |
150 | * (W25Q64DW, W25Q64FV_QPI) | |
151 | * (W25Q128FW, W25Q128FV_QPI) | |
152 | */ | |
4d4ec992 JT |
153 | }; |
154 | ||
ce22b922 JT |
155 | static struct spi_flash *spi_flash_validate_params(struct spi_slave *spi, |
156 | u8 *idcode) | |
4d4ec992 JT |
157 | { |
158 | const struct spi_flash_params *params; | |
159 | struct spi_flash *flash; | |
160 | int i; | |
161 | u16 jedec = idcode[1] << 8 | idcode[2]; | |
74bec16e | 162 | u16 ext_jedec = idcode[3] << 8 | idcode[4]; |
4d4ec992 | 163 | |
74bec16e | 164 | /* Get the flash id (jedec = manuf_id + dev_id, ext_jedec) */ |
4d4ec992 JT |
165 | for (i = 0; i < ARRAY_SIZE(spi_flash_params_table); i++) { |
166 | params = &spi_flash_params_table[i]; | |
167 | if ((params->jedec >> 16) == idcode[0]) { | |
74bec16e JT |
168 | if ((params->jedec & 0xFFFF) == jedec) { |
169 | if (params->ext_jedec == 0) | |
170 | break; | |
171 | else if (params->ext_jedec == ext_jedec) | |
172 | break; | |
173 | } | |
4d4ec992 JT |
174 | } |
175 | } | |
176 | ||
177 | if (i == ARRAY_SIZE(spi_flash_params_table)) { | |
74bec16e JT |
178 | printf("SF: Unsupported flash IDs: "); |
179 | printf("manuf %02x, jedec %04x, ext_jedec %04x\n", | |
180 | idcode[0], jedec, ext_jedec); | |
4d4ec992 JT |
181 | return NULL; |
182 | } | |
183 | ||
184 | flash = malloc(sizeof(*flash)); | |
185 | if (!flash) { | |
186 | debug("SF: Failed to allocate spi_flash\n"); | |
187 | return NULL; | |
188 | } | |
189 | memset(flash, '\0', sizeof(*flash)); | |
190 | ||
469146c0 | 191 | /* Assign spi data */ |
4d4ec992 JT |
192 | flash->spi = spi; |
193 | flash->name = params->name; | |
ce22b922 | 194 | flash->memory_map = spi->memory_map; |
4d4ec992 JT |
195 | |
196 | /* Assign spi_flash ops */ | |
a5e8199a | 197 | flash->write = spi_flash_cmd_write_ops; |
10ca45d0 JT |
198 | #ifdef CONFIG_SPI_FLASH_SST |
199 | if (params->flags & SST_WP) | |
200 | flash->write = sst_write_wp; | |
201 | #endif | |
a5e8199a JT |
202 | flash->erase = spi_flash_cmd_erase_ops; |
203 | flash->read = spi_flash_cmd_read_ops; | |
4d4ec992 JT |
204 | |
205 | /* Compute the flash size */ | |
f0be6ded | 206 | flash->page_size = (ext_jedec == 0x4d00) ? 512 : 256; |
4d4ec992 JT |
207 | flash->sector_size = params->sector_size; |
208 | flash->size = flash->sector_size * params->nr_sectors; | |
209 | ||
f4f51a8f JT |
210 | /* Compute erase sector and command */ |
211 | if (params->flags & SECT_4K) { | |
212 | flash->erase_cmd = CMD_ERASE_4K; | |
213 | flash->erase_size = 4096; | |
214 | } else if (params->flags & SECT_32K) { | |
215 | flash->erase_cmd = CMD_ERASE_32K; | |
216 | flash->erase_size = 32768; | |
217 | } else { | |
218 | flash->erase_cmd = CMD_ERASE_64K; | |
219 | flash->erase_size = flash->sector_size; | |
220 | } | |
221 | ||
0f623280 JT |
222 | /* Poll cmd seclection */ |
223 | flash->poll_cmd = CMD_READ_STATUS; | |
224 | #ifdef CONFIG_SPI_FLASH_STMICRO | |
225 | if (params->flags & E_FSR) | |
226 | flash->poll_cmd = CMD_FLAG_STATUS; | |
227 | #endif | |
228 | ||
ce22b922 | 229 | /* Configure the BAR - discover bank cmds and read current bank */ |
4d5e29a6 | 230 | #ifdef CONFIG_SPI_FLASH_BAR |
4d5e29a6 | 231 | u8 curr_bank = 0; |
4d5e29a6 | 232 | if (flash->size > SPI_FLASH_16MB_BOUN) { |
32ebd1a7 JT |
233 | flash->bank_read_cmd = (idcode[0] == 0x01) ? |
234 | CMD_BANKADDR_BRRD : CMD_EXTNADDR_RDEAR; | |
235 | flash->bank_write_cmd = (idcode[0] == 0x01) ? | |
236 | CMD_BANKADDR_BRWR : CMD_EXTNADDR_WREAR; | |
237 | ||
238 | if (spi_flash_read_common(flash, &flash->bank_read_cmd, 1, | |
239 | &curr_bank, 1)) { | |
4d5e29a6 | 240 | debug("SF: fail to read bank addr register\n"); |
32ebd1a7 | 241 | return NULL; |
4d5e29a6 JT |
242 | } |
243 | flash->bank_curr = curr_bank; | |
244 | } else { | |
245 | flash->bank_curr = curr_bank; | |
246 | } | |
32ebd1a7 | 247 | #endif |
4d5e29a6 | 248 | |
32ebd1a7 JT |
249 | /* Flash powers up read-only, so clear BP# bits */ |
250 | #if defined(CONFIG_SPI_FLASH_ATMEL) || \ | |
251 | defined(CONFIG_SPI_FLASH_MACRONIX) || \ | |
252 | defined(CONFIG_SPI_FLASH_SST) | |
253 | spi_flash_cmd_write_status(flash, 0); | |
4d5e29a6 JT |
254 | #endif |
255 | ||
32ebd1a7 JT |
256 | return flash; |
257 | } | |
258 | ||
4d5e29a6 JT |
259 | #ifdef CONFIG_OF_CONTROL |
260 | int spi_flash_decode_fdt(const void *blob, struct spi_flash *flash) | |
261 | { | |
262 | fdt_addr_t addr; | |
263 | fdt_size_t size; | |
264 | int node; | |
265 | ||
266 | /* If there is no node, do nothing */ | |
267 | node = fdtdec_next_compatible(blob, 0, COMPAT_GENERIC_SPI_FLASH); | |
268 | if (node < 0) | |
269 | return 0; | |
270 | ||
271 | addr = fdtdec_get_addr_size(blob, node, "memory-map", &size); | |
272 | if (addr == FDT_ADDR_T_NONE) { | |
273 | debug("%s: Cannot decode address\n", __func__); | |
274 | return 0; | |
275 | } | |
276 | ||
277 | if (flash->size != size) { | |
278 | debug("%s: Memory map must cover entire device\n", __func__); | |
279 | return -1; | |
280 | } | |
281 | flash->memory_map = (void *)addr; | |
282 | ||
283 | return 0; | |
284 | } | |
285 | #endif /* CONFIG_OF_CONTROL */ | |
286 | ||
4d5e29a6 JT |
287 | struct spi_flash *spi_flash_probe(unsigned int bus, unsigned int cs, |
288 | unsigned int max_hz, unsigned int spi_mode) | |
289 | { | |
290 | struct spi_slave *spi; | |
291 | struct spi_flash *flash = NULL; | |
32ebd1a7 | 292 | u8 idcode[5]; |
4d4ec992 | 293 | int ret; |
4d5e29a6 | 294 | |
4d4ec992 | 295 | /* Setup spi_slave */ |
4d5e29a6 JT |
296 | spi = spi_setup_slave(bus, cs, max_hz, spi_mode); |
297 | if (!spi) { | |
298 | printf("SF: Failed to set up slave\n"); | |
299 | return NULL; | |
300 | } | |
301 | ||
4d4ec992 | 302 | /* Claim spi bus */ |
4d5e29a6 JT |
303 | ret = spi_claim_bus(spi); |
304 | if (ret) { | |
305 | debug("SF: Failed to claim SPI bus: %d\n", ret); | |
306 | goto err_claim_bus; | |
307 | } | |
308 | ||
309 | /* Read the ID codes */ | |
310 | ret = spi_flash_cmd(spi, CMD_READ_ID, idcode, sizeof(idcode)); | |
4d4ec992 JT |
311 | if (ret) { |
312 | printf("SF: Failed to get idcodes\n"); | |
4d5e29a6 | 313 | goto err_read_id; |
4d4ec992 | 314 | } |
4d5e29a6 JT |
315 | |
316 | #ifdef DEBUG | |
317 | printf("SF: Got idcodes\n"); | |
318 | print_buffer(0, idcode, 1, sizeof(idcode), 0); | |
319 | #endif | |
320 | ||
a5e8199a JT |
321 | /* Validate params from spi_flash_params table */ |
322 | flash = spi_flash_validate_params(spi, idcode); | |
4d4ec992 JT |
323 | if (!flash) |
324 | goto err_read_id; | |
4d5e29a6 | 325 | |
4d5e29a6 JT |
326 | #ifdef CONFIG_OF_CONTROL |
327 | if (spi_flash_decode_fdt(gd->fdt_blob, flash)) { | |
328 | debug("SF: FDT decode error\n"); | |
4d4ec992 | 329 | goto err_read_id; |
4d5e29a6 JT |
330 | } |
331 | #endif | |
332 | #ifndef CONFIG_SPL_BUILD | |
333 | printf("SF: Detected %s with page size ", flash->name); | |
3ea708f0 JT |
334 | print_size(flash->page_size, ", erase size "); |
335 | print_size(flash->erase_size, ", total "); | |
4d5e29a6 JT |
336 | print_size(flash->size, ""); |
337 | if (flash->memory_map) | |
338 | printf(", mapped at %p", flash->memory_map); | |
339 | puts("\n"); | |
340 | #endif | |
341 | #ifndef CONFIG_SPI_FLASH_BAR | |
342 | if (flash->size > SPI_FLASH_16MB_BOUN) { | |
343 | puts("SF: Warning - Only lower 16MiB accessible,"); | |
344 | puts(" Full access #define CONFIG_SPI_FLASH_BAR\n"); | |
345 | } | |
346 | #endif | |
347 | ||
4d4ec992 | 348 | /* Release spi bus */ |
4d5e29a6 JT |
349 | spi_release_bus(spi); |
350 | ||
351 | return flash; | |
352 | ||
4d5e29a6 JT |
353 | err_read_id: |
354 | spi_release_bus(spi); | |
355 | err_claim_bus: | |
356 | spi_free_slave(spi); | |
357 | return NULL; | |
358 | } | |
359 | ||
4d5e29a6 JT |
360 | void spi_flash_free(struct spi_flash *flash) |
361 | { | |
362 | spi_free_slave(flash->spi); | |
363 | free(flash); | |
364 | } |