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83d290c5 | 1 | // SPDX-License-Identifier: GPL-2.0+ |
750326e5 PYC |
2 | /* |
3 | * Faraday FTMAC100 Ethernet | |
4 | * | |
5 | * (C) Copyright 2009 Faraday Technology | |
6 | * Po-Yu Chuang <ratbert@faraday-tech.com> | |
750326e5 PYC |
7 | */ |
8 | ||
9 | #include <config.h> | |
d678a59d | 10 | #include <common.h> |
1eb69ae4 | 11 | #include <cpu_func.h> |
7b51b576 | 12 | #include <env.h> |
750326e5 PYC |
13 | #include <malloc.h> |
14 | #include <net.h> | |
add396d6 SA |
15 | #include <phy.h> |
16 | #include <miiphy.h> | |
17 | #include <dm/device_compat.h> | |
401d1c4f | 18 | #include <asm/global_data.h> |
c05ed00a | 19 | #include <linux/delay.h> |
be71a179 | 20 | #include <linux/io.h> |
add396d6 | 21 | #include <linux/iopoll.h> |
750326e5 PYC |
22 | |
23 | #include "ftmac100.h" | |
be71a179 | 24 | #include <dm.h> |
5afc87ea | 25 | |
be71a179 | 26 | DECLARE_GLOBAL_DATA_PTR; |
5afc87ea | 27 | |
750326e5 PYC |
28 | #define ETH_ZLEN 60 |
29 | ||
add396d6 SA |
30 | /* Timeout for a mdio read/write operation */ |
31 | #define FTMAC100_MDIO_TIMEOUT_USEC 10000 | |
32 | ||
750326e5 | 33 | struct ftmac100_data { |
6f6e6e09 PYC |
34 | struct ftmac100_txdes txdes[1]; |
35 | struct ftmac100_rxdes rxdes[PKTBUFSRX]; | |
750326e5 | 36 | int rx_index; |
be71a179 | 37 | const char *name; |
9628c3e8 | 38 | struct ftmac100 *ftmac100; |
add396d6 | 39 | struct mii_dev *bus; |
750326e5 PYC |
40 | }; |
41 | ||
42 | /* | |
43 | * Reset MAC | |
44 | */ | |
be71a179 | 45 | static void ftmac100_reset(struct ftmac100_data *priv) |
750326e5 | 46 | { |
9628c3e8 | 47 | struct ftmac100 *ftmac100 = priv->ftmac100; |
750326e5 PYC |
48 | |
49 | debug ("%s()\n", __func__); | |
50 | ||
51 | writel (FTMAC100_MACCR_SW_RST, &ftmac100->maccr); | |
52 | ||
53 | while (readl (&ftmac100->maccr) & FTMAC100_MACCR_SW_RST) | |
1341494c | 54 | mdelay(1); |
55 | /* | |
56 | * When soft reset complete, write mac address immediately maybe fail somehow | |
57 | * Wait for a while can avoid this problem | |
58 | */ | |
59 | mdelay(1); | |
750326e5 PYC |
60 | } |
61 | ||
62 | /* | |
63 | * Set MAC address | |
64 | */ | |
be71a179 | 65 | static void ftmac100_set_mac(struct ftmac100_data *priv , |
66 | const unsigned char *mac) | |
750326e5 | 67 | { |
9628c3e8 | 68 | struct ftmac100 *ftmac100 = priv->ftmac100; |
750326e5 PYC |
69 | unsigned int maddr = mac[0] << 8 | mac[1]; |
70 | unsigned int laddr = mac[2] << 24 | mac[3] << 16 | mac[4] << 8 | mac[5]; | |
71 | ||
72 | debug ("%s(%x %x)\n", __func__, maddr, laddr); | |
73 | ||
74 | writel (maddr, &ftmac100->mac_madr); | |
75 | writel (laddr, &ftmac100->mac_ladr); | |
76 | } | |
77 | ||
750326e5 | 78 | /* |
be71a179 | 79 | * Disable MAC |
750326e5 | 80 | */ |
be71a179 | 81 | static void _ftmac100_halt(struct ftmac100_data *priv) |
750326e5 | 82 | { |
9628c3e8 | 83 | struct ftmac100 *ftmac100 = priv->ftmac100; |
750326e5 | 84 | debug ("%s()\n", __func__); |
750326e5 PYC |
85 | writel (0, &ftmac100->maccr); |
86 | } | |
87 | ||
be71a179 | 88 | /* |
89 | * Initialize MAC | |
90 | */ | |
91 | static int _ftmac100_init(struct ftmac100_data *priv, unsigned char enetaddr[6]) | |
750326e5 | 92 | { |
9628c3e8 | 93 | struct ftmac100 *ftmac100 = priv->ftmac100; |
6f6e6e09 PYC |
94 | struct ftmac100_txdes *txdes = priv->txdes; |
95 | struct ftmac100_rxdes *rxdes = priv->rxdes; | |
750326e5 PYC |
96 | unsigned int maccr; |
97 | int i; | |
750326e5 PYC |
98 | debug ("%s()\n", __func__); |
99 | ||
be71a179 | 100 | ftmac100_reset(priv); |
750326e5 PYC |
101 | |
102 | /* set the ethernet address */ | |
be71a179 | 103 | ftmac100_set_mac(priv, enetaddr); |
750326e5 | 104 | |
750326e5 PYC |
105 | |
106 | /* disable all interrupts */ | |
107 | ||
108 | writel (0, &ftmac100->imr); | |
109 | ||
110 | /* initialize descriptors */ | |
111 | ||
112 | priv->rx_index = 0; | |
113 | ||
114 | txdes[0].txdes1 = FTMAC100_TXDES1_EDOTR; | |
115 | rxdes[PKTBUFSRX - 1].rxdes1 = FTMAC100_RXDES1_EDORR; | |
116 | ||
117 | for (i = 0; i < PKTBUFSRX; i++) { | |
118 | /* RXBUF_BADR */ | |
28b52a6f | 119 | rxdes[i].rxdes2 = (unsigned int)(unsigned long)net_rx_packets[i]; |
750326e5 PYC |
120 | rxdes[i].rxdes1 |= FTMAC100_RXDES1_RXBUF_SIZE (PKTSIZE_ALIGN); |
121 | rxdes[i].rxdes0 = FTMAC100_RXDES0_RXDMA_OWN; | |
122 | } | |
123 | ||
124 | /* transmit ring */ | |
125 | ||
28b52a6f | 126 | writel ((unsigned long)txdes, &ftmac100->txr_badr); |
750326e5 PYC |
127 | |
128 | /* receive ring */ | |
129 | ||
28b52a6f | 130 | writel ((unsigned long)rxdes, &ftmac100->rxr_badr); |
750326e5 PYC |
131 | |
132 | /* poll receive descriptor automatically */ | |
133 | ||
134 | writel (FTMAC100_APTC_RXPOLL_CNT (1), &ftmac100->aptc); | |
135 | ||
136 | /* enable transmitter, receiver */ | |
137 | ||
138 | maccr = FTMAC100_MACCR_XMT_EN | | |
139 | FTMAC100_MACCR_RCV_EN | | |
140 | FTMAC100_MACCR_XDMA_EN | | |
141 | FTMAC100_MACCR_RDMA_EN | | |
142 | FTMAC100_MACCR_CRC_APD | | |
143 | FTMAC100_MACCR_ENRX_IN_HALFTX | | |
144 | FTMAC100_MACCR_RX_RUNT | | |
145 | FTMAC100_MACCR_RX_BROADPKT; | |
146 | ||
147 | writel (maccr, &ftmac100->maccr); | |
148 | ||
149 | return 0; | |
150 | } | |
151 | ||
152 | /* | |
be71a179 | 153 | * Free receiving buffer |
750326e5 | 154 | */ |
be71a179 | 155 | static int _ftmac100_free_pkt(struct ftmac100_data *priv) |
156 | { | |
157 | struct ftmac100_rxdes *curr_des; | |
158 | curr_des = &priv->rxdes[priv->rx_index]; | |
159 | /* release buffer to DMA */ | |
160 | curr_des->rxdes0 |= FTMAC100_RXDES0_RXDMA_OWN; | |
161 | priv->rx_index = (priv->rx_index + 1) % PKTBUFSRX; | |
162 | return 0; | |
163 | } | |
164 | ||
165 | /* | |
166 | * Receive a data block via Ethernet | |
167 | */ | |
168 | static int __ftmac100_recv(struct ftmac100_data *priv) | |
750326e5 | 169 | { |
6f6e6e09 | 170 | struct ftmac100_rxdes *curr_des; |
750326e5 PYC |
171 | unsigned short rxlen; |
172 | ||
173 | curr_des = &priv->rxdes[priv->rx_index]; | |
750326e5 | 174 | if (curr_des->rxdes0 & FTMAC100_RXDES0_RXDMA_OWN) |
be71a179 | 175 | return 0; |
750326e5 PYC |
176 | |
177 | if (curr_des->rxdes0 & (FTMAC100_RXDES0_RX_ERR | | |
178 | FTMAC100_RXDES0_CRC_ERR | | |
179 | FTMAC100_RXDES0_FTL | | |
180 | FTMAC100_RXDES0_RUNT | | |
181 | FTMAC100_RXDES0_RX_ODD_NB)) { | |
be71a179 | 182 | return 0; |
750326e5 PYC |
183 | } |
184 | ||
185 | rxlen = FTMAC100_RXDES0_RFL (curr_des->rxdes0); | |
ce4e2370 | 186 | invalidate_dcache_range(curr_des->rxdes2,curr_des->rxdes2+rxlen); |
750326e5 PYC |
187 | debug ("%s(): RX buffer %d, %x received\n", |
188 | __func__, priv->rx_index, rxlen); | |
189 | ||
be71a179 | 190 | return rxlen; |
750326e5 PYC |
191 | } |
192 | ||
193 | /* | |
194 | * Send a data block via Ethernet | |
195 | */ | |
be71a179 | 196 | static int _ftmac100_send(struct ftmac100_data *priv, void *packet, int length) |
750326e5 | 197 | { |
9628c3e8 | 198 | struct ftmac100 *ftmac100 = priv->ftmac100; |
6f6e6e09 | 199 | struct ftmac100_txdes *curr_des = priv->txdes; |
8d8fd5b6 | 200 | ulong start; |
750326e5 PYC |
201 | |
202 | if (curr_des->txdes0 & FTMAC100_TXDES0_TXDMA_OWN) { | |
203 | debug ("%s(): no TX descriptor available\n", __func__); | |
204 | return -1; | |
205 | } | |
206 | ||
28b52a6f | 207 | debug ("%s(%lx, %x)\n", __func__, (unsigned long)packet, length); |
750326e5 PYC |
208 | |
209 | length = (length < ETH_ZLEN) ? ETH_ZLEN : length; | |
210 | ||
211 | /* initiate a transmit sequence */ | |
212 | ||
28b52a6f RC |
213 | flush_dcache_range((unsigned long)packet,(unsigned long)packet+length); |
214 | curr_des->txdes2 = (unsigned int)(unsigned long)packet; /* TXBUF_BADR */ | |
750326e5 PYC |
215 | |
216 | curr_des->txdes1 &= FTMAC100_TXDES1_EDOTR; | |
217 | curr_des->txdes1 |= FTMAC100_TXDES1_FTS | | |
218 | FTMAC100_TXDES1_LTS | | |
219 | FTMAC100_TXDES1_TXBUF_SIZE (length); | |
220 | ||
221 | curr_des->txdes0 = FTMAC100_TXDES0_TXDMA_OWN; | |
222 | ||
223 | /* start transmit */ | |
224 | ||
225 | writel (1, &ftmac100->txpd); | |
226 | ||
227 | /* wait for transfer to succeed */ | |
228 | ||
8d8fd5b6 | 229 | start = get_timer(0); |
750326e5 | 230 | while (curr_des->txdes0 & FTMAC100_TXDES0_TXDMA_OWN) { |
8d8fd5b6 | 231 | if (get_timer(start) >= 5) { |
750326e5 PYC |
232 | debug ("%s(): timed out\n", __func__); |
233 | return -1; | |
234 | } | |
235 | } | |
236 | ||
237 | debug ("%s(): packet sent\n", __func__); | |
238 | ||
239 | return 0; | |
240 | } | |
241 | ||
be71a179 | 242 | static int ftmac100_start(struct udevice *dev) |
243 | { | |
c69cda25 | 244 | struct eth_pdata *plat = dev_get_plat(dev); |
be71a179 | 245 | struct ftmac100_data *priv = dev_get_priv(dev); |
246 | ||
247 | return _ftmac100_init(priv, plat->enetaddr); | |
248 | } | |
249 | ||
250 | static void ftmac100_stop(struct udevice *dev) | |
251 | { | |
252 | struct ftmac100_data *priv = dev_get_priv(dev); | |
253 | _ftmac100_halt(priv); | |
254 | } | |
255 | ||
256 | static int ftmac100_send(struct udevice *dev, void *packet, int length) | |
257 | { | |
258 | struct ftmac100_data *priv = dev_get_priv(dev); | |
259 | int ret; | |
260 | ret = _ftmac100_send(priv , packet , length); | |
261 | return ret ? 0 : -ETIMEDOUT; | |
262 | } | |
263 | ||
264 | static int ftmac100_recv(struct udevice *dev, int flags, uchar **packetp) | |
265 | { | |
266 | struct ftmac100_data *priv = dev_get_priv(dev); | |
267 | struct ftmac100_rxdes *curr_des; | |
268 | curr_des = &priv->rxdes[priv->rx_index]; | |
269 | int len; | |
270 | len = __ftmac100_recv(priv); | |
271 | if (len) | |
28b52a6f | 272 | *packetp = (uchar *)(unsigned long)curr_des->rxdes2; |
be71a179 | 273 | |
274 | return len ? len : -EAGAIN; | |
275 | } | |
276 | ||
277 | static int ftmac100_free_pkt(struct udevice *dev, uchar *packet, int length) | |
278 | { | |
279 | struct ftmac100_data *priv = dev_get_priv(dev); | |
280 | _ftmac100_free_pkt(priv); | |
281 | return 0; | |
282 | } | |
283 | ||
284 | int ftmac100_read_rom_hwaddr(struct udevice *dev) | |
285 | { | |
c69cda25 | 286 | struct eth_pdata *pdata = dev_get_plat(dev); |
35affd7a | 287 | eth_env_get_enetaddr("ethaddr", pdata->enetaddr); |
be71a179 | 288 | return 0; |
289 | } | |
290 | ||
291 | static const char *dtbmacaddr(u32 ifno) | |
292 | { | |
293 | int node, len; | |
294 | char enet[16]; | |
295 | const char *mac; | |
296 | const char *path; | |
297 | if (gd->fdt_blob == NULL) { | |
298 | printf("%s: don't have a valid gd->fdt_blob!\n", __func__); | |
299 | return NULL; | |
300 | } | |
301 | node = fdt_path_offset(gd->fdt_blob, "/aliases"); | |
302 | if (node < 0) | |
303 | return NULL; | |
304 | ||
305 | sprintf(enet, "ethernet%d", ifno); | |
306 | path = fdt_getprop(gd->fdt_blob, node, enet, NULL); | |
307 | if (!path) { | |
308 | printf("no alias for %s\n", enet); | |
309 | return NULL; | |
310 | } | |
311 | node = fdt_path_offset(gd->fdt_blob, path); | |
312 | mac = fdt_getprop(gd->fdt_blob, node, "mac-address", &len); | |
313 | if (mac && is_valid_ethaddr((u8 *)mac)) | |
314 | return mac; | |
315 | ||
316 | return NULL; | |
317 | } | |
318 | ||
d1998a9f | 319 | static int ftmac100_of_to_plat(struct udevice *dev) |
be71a179 | 320 | { |
321 | struct ftmac100_data *priv = dev_get_priv(dev); | |
c69cda25 | 322 | struct eth_pdata *pdata = dev_get_plat(dev); |
be71a179 | 323 | const char *mac; |
2548493a | 324 | pdata->iobase = dev_read_addr(dev); |
9628c3e8 | 325 | priv->ftmac100 = phys_to_virt(pdata->iobase); |
be71a179 | 326 | mac = dtbmacaddr(0); |
327 | if (mac) | |
328 | memcpy(pdata->enetaddr , mac , 6); | |
329 | ||
330 | return 0; | |
331 | } | |
332 | ||
add396d6 SA |
333 | /* |
334 | * struct mii_bus functions | |
335 | */ | |
336 | static int ftmac100_mdio_read(struct mii_dev *bus, int addr, int devad, | |
337 | int reg) | |
338 | { | |
339 | struct ftmac100_data *priv = bus->priv; | |
340 | struct ftmac100 *ftmac100 = priv->ftmac100; | |
341 | int phycr = FTMAC100_PHYCR_PHYAD(addr) | | |
342 | FTMAC100_PHYCR_REGAD(reg) | | |
343 | FTMAC100_PHYCR_MIIRD; | |
344 | int ret; | |
345 | ||
346 | writel(phycr, &ftmac100->phycr); | |
347 | ||
348 | ret = readl_poll_timeout(&ftmac100->phycr, phycr, | |
349 | !(phycr & FTMAC100_PHYCR_MIIRD), | |
350 | FTMAC100_MDIO_TIMEOUT_USEC); | |
351 | if (ret) | |
352 | pr_err("%s: mdio read failed (addr=0x%x reg=0x%x)\n", | |
353 | bus->name, addr, reg); | |
354 | else | |
355 | ret = phycr & FTMAC100_PHYCR_MIIRDATA; | |
356 | ||
357 | return ret; | |
358 | } | |
359 | ||
360 | static int ftmac100_mdio_write(struct mii_dev *bus, int addr, int devad, | |
361 | int reg, u16 value) | |
362 | { | |
363 | struct ftmac100_data *priv = bus->priv; | |
364 | struct ftmac100 *ftmac100 = priv->ftmac100; | |
365 | int phycr = FTMAC100_PHYCR_PHYAD(addr) | | |
366 | FTMAC100_PHYCR_REGAD(reg) | | |
367 | FTMAC100_PHYCR_MIIWR; | |
368 | int ret; | |
369 | ||
370 | writel(value, &ftmac100->phywdata); | |
371 | writel(phycr, &ftmac100->phycr); | |
372 | ||
373 | ret = readl_poll_timeout(&ftmac100->phycr, phycr, | |
374 | !(phycr & FTMAC100_PHYCR_MIIWR), | |
375 | FTMAC100_MDIO_TIMEOUT_USEC); | |
376 | if (ret) | |
377 | pr_err("%s: mdio write failed (addr=0x%x reg=0x%x)\n", | |
378 | bus->name, addr, reg); | |
379 | ||
380 | return ret; | |
381 | } | |
382 | ||
383 | static int ftmac100_mdio_init(struct udevice *dev) | |
384 | { | |
385 | struct ftmac100_data *priv = dev_get_priv(dev); | |
386 | struct mii_dev *bus; | |
387 | int ret; | |
388 | ||
389 | bus = mdio_alloc(); | |
390 | if (!bus) | |
391 | return -ENOMEM; | |
392 | ||
393 | bus->read = ftmac100_mdio_read; | |
394 | bus->write = ftmac100_mdio_write; | |
395 | bus->priv = priv; | |
396 | ||
397 | ret = mdio_register_seq(bus, dev_seq(dev)); | |
398 | if (ret) { | |
399 | mdio_free(bus); | |
400 | return ret; | |
401 | } | |
402 | ||
403 | priv->bus = bus; | |
404 | ||
405 | return 0; | |
406 | } | |
407 | ||
be71a179 | 408 | static int ftmac100_probe(struct udevice *dev) |
409 | { | |
410 | struct ftmac100_data *priv = dev_get_priv(dev); | |
411 | priv->name = dev->name; | |
add396d6 SA |
412 | int ret = 0; |
413 | ||
414 | ret = ftmac100_mdio_init(dev); | |
415 | if (ret) { | |
416 | dev_err(dev, "Failed to initialize mdiobus: %d\n", ret); | |
417 | goto out; | |
418 | } | |
419 | ||
420 | out: | |
421 | return ret; | |
422 | } | |
423 | ||
424 | static int ftmac100_remove(struct udevice *dev) | |
425 | { | |
426 | struct ftmac100_data *priv = dev_get_priv(dev); | |
427 | ||
428 | mdio_unregister(priv->bus); | |
429 | mdio_free(priv->bus); | |
430 | ||
be71a179 | 431 | return 0; |
432 | } | |
433 | ||
434 | static int ftmac100_bind(struct udevice *dev) | |
435 | { | |
436 | return device_set_name(dev, dev->name); | |
437 | } | |
438 | ||
439 | static const struct eth_ops ftmac100_ops = { | |
440 | .start = ftmac100_start, | |
441 | .send = ftmac100_send, | |
442 | .recv = ftmac100_recv, | |
443 | .stop = ftmac100_stop, | |
444 | .free_pkt = ftmac100_free_pkt, | |
445 | }; | |
446 | ||
447 | static const struct udevice_id ftmac100_ids[] = { | |
448 | { .compatible = "andestech,atmac100" }, | |
449 | { } | |
450 | }; | |
451 | ||
452 | U_BOOT_DRIVER(ftmac100) = { | |
e9a1d8bf | 453 | .name = "ftmac100", |
be71a179 | 454 | .id = UCLASS_ETH, |
455 | .of_match = ftmac100_ids, | |
456 | .bind = ftmac100_bind, | |
d1998a9f | 457 | .of_to_plat = ftmac100_of_to_plat, |
be71a179 | 458 | .probe = ftmac100_probe, |
add396d6 | 459 | .remove = ftmac100_remove, |
be71a179 | 460 | .ops = &ftmac100_ops, |
41575d8e | 461 | .priv_auto = sizeof(struct ftmac100_data), |
caa4daa2 | 462 | .plat_auto = sizeof(struct eth_pdata), |
be71a179 | 463 | .flags = DM_FLAG_ALLOC_PRIV_DMA, |
464 | }; |