[people/ms/u-boot.git] / drivers / net / xilinx_emaclite.c

/*
 * (C) Copyright 2007-2009 Michal Simek
 * (C) Copyright 2003 Xilinx Inc.
 *
 * Michal SIMEK <monstr@monstr.eu>
 *
 * See file CREDITS for list of people who contributed to this
 * project.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 */

#include <common.h>
#include <net.h>
#include <config.h>
#include <malloc.h>
#include <asm/io.h>

#undef DEBUG

#define ENET_ADDR_LENGTH	6

/* EmacLite constants */
#define XEL_BUFFER_OFFSET	0x0800	/* Next buffer's offset */
#define XEL_TPLR_OFFSET		0x07F4	/* Tx packet length */
#define XEL_TSR_OFFSET		0x07FC	/* Tx status */
#define XEL_RSR_OFFSET		0x17FC	/* Rx status */
#define XEL_RXBUFF_OFFSET	0x1000	/* Receive Buffer */

/* Xmit complete */
#define XEL_TSR_XMIT_BUSY_MASK		0x00000001UL
/* Xmit interrupt enable bit */
#define XEL_TSR_XMIT_IE_MASK		0x00000008UL
/* Buffer is active, SW bit only */
#define XEL_TSR_XMIT_ACTIVE_MASK	0x80000000UL
/* Program the MAC address */
#define XEL_TSR_PROGRAM_MASK		0x00000002UL
/* define for programming the MAC address into the EMAC Lite */
#define XEL_TSR_PROG_MAC_ADDR	(XEL_TSR_XMIT_BUSY_MASK | XEL_TSR_PROGRAM_MASK)

/* Transmit packet length upper byte */
#define XEL_TPLR_LENGTH_MASK_HI		0x0000FF00UL
/* Transmit packet length lower byte */
#define XEL_TPLR_LENGTH_MASK_LO		0x000000FFUL

/* Recv complete */
#define XEL_RSR_RECV_DONE_MASK		0x00000001UL
/* Recv interrupt enable bit */
#define XEL_RSR_RECV_IE_MASK		0x00000008UL

struct xemaclite {
	u32 nexttxbuffertouse;	/* Next TX buffer to write to */
	u32 nextrxbuffertouse;	/* Next RX buffer to read from */
	u32 txpp;		/* TX ping pong buffer */
	u32 rxpp;		/* RX ping pong buffer */
};

static u32 etherrxbuff[PKTSIZE_ALIGN/4]; /* Receive buffer */

static void xemaclite_alignedread (u32 *srcptr, void *destptr, u32 bytecount)
{
	u32 i;
	u32 alignbuffer;
	u32 *to32ptr;
	u32 *from32ptr;
	u8 *to8ptr;
	u8 *from8ptr;

	from32ptr = (u32 *) srcptr;

	/* Word aligned buffer, no correction needed. */
	to32ptr = (u32 *) destptr;
	while (bytecount > 3) {
		*to32ptr++ = *from32ptr++;
		bytecount -= 4;
	}
	to8ptr = (u8 *) to32ptr;

	alignbuffer = *from32ptr++;
	from8ptr = (u8 *) & alignbuffer;

	for (i = 0; i < bytecount; i++) {
		*to8ptr++ = *from8ptr++;
	}
}

static void xemaclite_alignedwrite (void *srcptr, u32 destptr, u32 bytecount)
{
	u32 i;
	u32 alignbuffer;
	u32 *to32ptr = (u32 *) destptr;
	u32 *from32ptr;
	u8 *to8ptr;
	u8 *from8ptr;

	from32ptr = (u32 *) srcptr;
	while (bytecount > 3) {

		*to32ptr++ = *from32ptr++;
		bytecount -= 4;
	}

	alignbuffer = 0;
	to8ptr = (u8 *) & alignbuffer;
	from8ptr = (u8 *) from32ptr;

	for (i = 0; i < bytecount; i++) {
		*to8ptr++ = *from8ptr++;
	}

	*to32ptr++ = alignbuffer;
}

static void emaclite_halt(struct eth_device *dev)
{
	debug ("eth_halt\n");
}

static int emaclite_init(struct eth_device *dev, bd_t *bis)
{
	struct xemaclite *emaclite = dev->priv;
	debug ("EmacLite Initialization Started\n");

/*
 * TX - TX_PING & TX_PONG initialization
 */
	/* Restart PING TX */
	out_be32 (dev->iobase + XEL_TSR_OFFSET, 0);
	/* Copy MAC address */
	xemaclite_alignedwrite (dev->enetaddr,
		dev->iobase, ENET_ADDR_LENGTH);
	/* Set the length */
	out_be32 (dev->iobase + XEL_TPLR_OFFSET, ENET_ADDR_LENGTH);
	/* Update the MAC address in the EMAC Lite */
	out_be32 (dev->iobase + XEL_TSR_OFFSET, XEL_TSR_PROG_MAC_ADDR);
	/* Wait for EMAC Lite to finish with the MAC address update */
	while ((in_be32 (dev->iobase + XEL_TSR_OFFSET) &
		XEL_TSR_PROG_MAC_ADDR) != 0)
		;

	if (emaclite->txpp) {
		/* The same operation with PONG TX */
		out_be32 (dev->iobase + XEL_TSR_OFFSET + XEL_BUFFER_OFFSET, 0);
		xemaclite_alignedwrite(dev->enetaddr, dev->iobase +
			XEL_BUFFER_OFFSET, ENET_ADDR_LENGTH);
		out_be32 (dev->iobase + XEL_TPLR_OFFSET, ENET_ADDR_LENGTH);
		out_be32 (dev->iobase + XEL_TSR_OFFSET + XEL_BUFFER_OFFSET,
			XEL_TSR_PROG_MAC_ADDR);
		while ((in_be32 (dev->iobase + XEL_TSR_OFFSET +
			XEL_BUFFER_OFFSET) & XEL_TSR_PROG_MAC_ADDR) != 0)
			;
	}

/*
 * RX - RX_PING & RX_PONG initialization
 */
	/* Write out the value to flush the RX buffer */
	out_be32 (dev->iobase + XEL_RSR_OFFSET, XEL_RSR_RECV_IE_MASK);

	if (emaclite->rxpp)
		out_be32 (dev->iobase + XEL_RSR_OFFSET + XEL_BUFFER_OFFSET,
			XEL_RSR_RECV_IE_MASK);

	debug ("EmacLite Initialization complete\n");
	return 0;
}

static int xemaclite_txbufferavailable(struct eth_device *dev)
{
	u32 reg;
	u32 txpingbusy;
	u32 txpongbusy;
	struct xemaclite *emaclite = dev->priv;

	/*
	 * Read the other buffer register
	 * and determine if the other buffer is available
	 */
	reg = in_be32 (dev->iobase +
			emaclite->nexttxbuffertouse + 0);
	txpingbusy = ((reg & XEL_TSR_XMIT_BUSY_MASK) ==
			XEL_TSR_XMIT_BUSY_MASK);

	reg = in_be32 (dev->iobase +
			(emaclite->nexttxbuffertouse ^ XEL_TSR_OFFSET) + 0);
	txpongbusy = ((reg & XEL_TSR_XMIT_BUSY_MASK) ==
			XEL_TSR_XMIT_BUSY_MASK);

	return (!(txpingbusy && txpongbusy));
}

static int emaclite_send (struct eth_device *dev, volatile void *ptr, int len)
{
	u32 reg;
	u32 baseaddress;
	struct xemaclite *emaclite = dev->priv;

	u32 maxtry = 1000;

	if (len > PKTSIZE)
		len = PKTSIZE;

	while (!xemaclite_txbufferavailable(dev) && maxtry) {
		udelay (10);
		maxtry--;
	}

	if (!maxtry) {
		printf ("Error: Timeout waiting for ethernet TX buffer\n");
		/* Restart PING TX */
		out_be32 (dev->iobase + XEL_TSR_OFFSET, 0);
		if (emaclite->txpp) {
			out_be32 (dev->iobase + XEL_TSR_OFFSET +
				XEL_BUFFER_OFFSET, 0);
		}
		return -1;
	}

	/* Determine the expected TX buffer address */
	baseaddress = (dev->iobase + emaclite->nexttxbuffertouse);

	/* Determine if the expected buffer address is empty */
	reg = in_be32 (baseaddress + XEL_TSR_OFFSET);
	if (((reg & XEL_TSR_XMIT_BUSY_MASK) == 0)
		&& ((in_be32 ((baseaddress) + XEL_TSR_OFFSET)
			& XEL_TSR_XMIT_ACTIVE_MASK) == 0)) {

		if (emaclite->txpp)
			emaclite->nexttxbuffertouse ^= XEL_BUFFER_OFFSET;

		debug ("Send packet from 0x%x\n", baseaddress);
		/* Write the frame to the buffer */
		xemaclite_alignedwrite ((void *) ptr, baseaddress, len);
		out_be32 (baseaddress + XEL_TPLR_OFFSET,(len &
			(XEL_TPLR_LENGTH_MASK_HI | XEL_TPLR_LENGTH_MASK_LO)));
		reg = in_be32 (baseaddress + XEL_TSR_OFFSET);
		reg |= XEL_TSR_XMIT_BUSY_MASK;
		if ((reg & XEL_TSR_XMIT_IE_MASK) != 0) {
			reg |= XEL_TSR_XMIT_ACTIVE_MASK;
		}
		out_be32 (baseaddress + XEL_TSR_OFFSET, reg);
		return 0;
	}

	if (emaclite->txpp) {
		/* Switch to second buffer */
		baseaddress ^= XEL_BUFFER_OFFSET;
		/* Determine if the expected buffer address is empty */
		reg = in_be32 (baseaddress + XEL_TSR_OFFSET);
		if (((reg & XEL_TSR_XMIT_BUSY_MASK) == 0)
			&& ((in_be32 ((baseaddress) + XEL_TSR_OFFSET)
				& XEL_TSR_XMIT_ACTIVE_MASK) == 0)) {
			debug("Send packet from 0x%x\n", baseaddress);
			/* Write the frame to the buffer */
			xemaclite_alignedwrite((void *) ptr, baseaddress, len);
			out_be32 (baseaddress + XEL_TPLR_OFFSET, (len &
				(XEL_TPLR_LENGTH_MASK_HI |
					XEL_TPLR_LENGTH_MASK_LO)));
			reg = in_be32 (baseaddress + XEL_TSR_OFFSET);
			reg |= XEL_TSR_XMIT_BUSY_MASK;
			if ((reg & XEL_TSR_XMIT_IE_MASK) != 0)
				reg |= XEL_TSR_XMIT_ACTIVE_MASK;
			out_be32 (baseaddress + XEL_TSR_OFFSET, reg);
			return 0;
		}
	}

	puts ("Error while sending frame\n");
	return -1;
}

static int emaclite_recv(struct eth_device *dev)
{
	u32 length;
	u32 reg;
	u32 baseaddress;
	struct xemaclite *emaclite = dev->priv;

	baseaddress = dev->iobase + emaclite->nextrxbuffertouse;
	reg = in_be32 (baseaddress + XEL_RSR_OFFSET);
	debug ("Testing data at address 0x%x\n", baseaddress);
	if ((reg & XEL_RSR_RECV_DONE_MASK) == XEL_RSR_RECV_DONE_MASK) {
		if (emaclite->rxpp)
			emaclite->nextrxbuffertouse ^= XEL_BUFFER_OFFSET;
	} else {

		if (!emaclite->rxpp) {
			debug ("No data was available - address 0x%x\n",
								baseaddress);
			return 0;
		} else {
			baseaddress ^= XEL_BUFFER_OFFSET;
			reg = in_be32 (baseaddress + XEL_RSR_OFFSET);
			if ((reg & XEL_RSR_RECV_DONE_MASK) !=
						XEL_RSR_RECV_DONE_MASK) {
				debug("No data was available - address 0x%x\n",
						baseaddress);
				return 0;
			}
		}
	}
	/* Get the length of the frame that arrived */
	switch(((ntohl(in_be32 (baseaddress + XEL_RXBUFF_OFFSET + 0xC))) &
			0xFFFF0000 ) >> 16) {
		case 0x806:
			length = 42 + 20; /* FIXME size of ARP */
			debug ("ARP Packet\n");
			break;
		case 0x800:
			length = 14 + 14 +
			(((ntohl(in_be32 (baseaddress + XEL_RXBUFF_OFFSET + 0x10))) &
			0xFFFF0000) >> 16); /* FIXME size of IP packet */
			debug ("IP Packet\n");
			break;
		default:
			debug("Other Packet\n");
			length = PKTSIZE;
			break;
	}

	xemaclite_alignedread ((u32 *) (baseaddress + XEL_RXBUFF_OFFSET),
			etherrxbuff, length);

	/* Acknowledge the frame */
	reg = in_be32 (baseaddress + XEL_RSR_OFFSET);
	reg &= ~XEL_RSR_RECV_DONE_MASK;
	out_be32 (baseaddress + XEL_RSR_OFFSET, reg);

	debug ("Packet receive from 0x%x, length %dB\n", baseaddress, length);
	NetReceive ((uchar *) etherrxbuff, length);
	return length;

}

int xilinx_emaclite_initialize (bd_t *bis, int base_addr)
{
	struct eth_device *dev;
	struct xemaclite *emaclite;

	dev = calloc(1, sizeof(*dev));
	if (dev == NULL)
		return -1;

	emaclite = calloc(1, sizeof(struct xemaclite));
	if (emaclite == NULL) {
		free(dev);
		return -1;
	}

	dev->priv = emaclite;

#ifdef CONFIG_XILINX_EMACLITE_TX_PING_PONG
	emaclite->txpp = 1;
#endif
#ifdef CONFIG_XILINX_EMACLITE_RX_PING_PONG
	emaclite->rxpp = 1;
#endif

	sprintf(dev->name, "Xelite.%x", base_addr);

	dev->iobase = base_addr;
	dev->init = emaclite_init;
	dev->halt = emaclite_halt;
	dev->send = emaclite_send;
	dev->recv = emaclite_recv;

	eth_register(dev);

	return 1;
}
Commit	Line	Data
78d19a39 MS	1	/*
	2	* (C) Copyright 2007-2009 Michal Simek
	3	* (C) Copyright 2003 Xilinx Inc.
89c53891	4	*
89c53891 MS	5	* Michal SIMEK <monstr@monstr.eu>
89c53891 MS	6	*
78d19a39 MS	7	* See file CREDITS for list of people who contributed to this
	8	* project.
	9	*
	10	* This program is free software; you can redistribute it and/or
	11	* modify it under the terms of the GNU General Public License as
	12	* published by the Free Software Foundation; either version 2 of
	13	* the License, or (at your option) any later version.
	14	*
	15	* This program is distributed in the hope that it will be useful,
	16	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	17	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	18	* GNU General Public License for more details.
89c53891	19	*
78d19a39 MS	20	* You should have received a copy of the GNU General Public License
	21	* along with this program; if not, write to the Free Software
	22	* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
	23	* MA 02111-1307 USA
	24	*/
89c53891 MS	25
	26	#include <common.h>
	27	#include <net.h>
	28	#include <config.h>
042272a6	29	#include <malloc.h>
89c53891 MS	30	#include <asm/io.h>
	31
	32	#undef DEBUG
	33
89c53891 MS	34	#define ENET_ADDR_LENGTH 6
	35
	36	/* EmacLite constants */
	37	#define XEL_BUFFER_OFFSET 0x0800 /* Next buffer's offset */
	38	#define XEL_TPLR_OFFSET 0x07F4 /* Tx packet length */
	39	#define XEL_TSR_OFFSET 0x07FC /* Tx status */
	40	#define XEL_RSR_OFFSET 0x17FC /* Rx status */
	41	#define XEL_RXBUFF_OFFSET 0x1000 /* Receive Buffer */
	42
	43	/* Xmit complete */
	44	#define XEL_TSR_XMIT_BUSY_MASK 0x00000001UL
	45	/* Xmit interrupt enable bit */
	46	#define XEL_TSR_XMIT_IE_MASK 0x00000008UL
	47	/* Buffer is active, SW bit only */
	48	#define XEL_TSR_XMIT_ACTIVE_MASK 0x80000000UL
	49	/* Program the MAC address */
	50	#define XEL_TSR_PROGRAM_MASK 0x00000002UL
	51	/* define for programming the MAC address into the EMAC Lite */
	52	#define XEL_TSR_PROG_MAC_ADDR (XEL_TSR_XMIT_BUSY_MASK \| XEL_TSR_PROGRAM_MASK)
	53
	54	/* Transmit packet length upper byte */
	55	#define XEL_TPLR_LENGTH_MASK_HI 0x0000FF00UL
	56	/* Transmit packet length lower byte */
	57	#define XEL_TPLR_LENGTH_MASK_LO 0x000000FFUL
	58
	59	/* Recv complete */
	60	#define XEL_RSR_RECV_DONE_MASK 0x00000001UL
	61	/* Recv interrupt enable bit */
	62	#define XEL_RSR_RECV_IE_MASK 0x00000008UL
	63
773cfa8d	64	struct xemaclite {
042272a6 MS	65	u32 nexttxbuffertouse; /* Next TX buffer to write to */
042272a6 MS	66	u32 nextrxbuffertouse; /* Next RX buffer to read from */
947324b9 MS	67	u32 txpp; /* TX ping pong buffer */
947324b9 MS	68	u32 rxpp; /* RX ping pong buffer */
773cfa8d	69	};
89c53891	70
f2a7806f	71	static u32 etherrxbuff[PKTSIZE_ALIGN/4]; /* Receive buffer */
89c53891	72
042272a6	73	static void xemaclite_alignedread (u32 srcptr, void destptr, u32 bytecount)
89c53891	74	{
042272a6	75	u32 i;
89c53891 MS	76	u32 alignbuffer;
	77	u32 *to32ptr;
	78	u32 *from32ptr;
	79	u8 *to8ptr;
	80	u8 *from8ptr;
	81
	82	from32ptr = (u32 *) srcptr;
	83
	84	/* Word aligned buffer, no correction needed. */
	85	to32ptr = (u32 *) destptr;
	86	while (bytecount > 3) {
	87	to32ptr++ = from32ptr++;
	88	bytecount -= 4;
	89	}
	90	to8ptr = (u8 *) to32ptr;
	91
	92	alignbuffer = *from32ptr++;
	93	from8ptr = (u8 *) & alignbuffer;
	94
	95	for (i = 0; i < bytecount; i++) {
	96	to8ptr++ = from8ptr++;
	97	}
	98	}
	99
042272a6	100	static void xemaclite_alignedwrite (void *srcptr, u32 destptr, u32 bytecount)
89c53891	101	{
042272a6	102	u32 i;
89c53891 MS	103	u32 alignbuffer;
	104	u32 to32ptr = (u32 ) destptr;
	105	u32 *from32ptr;
	106	u8 *to8ptr;
	107	u8 *from8ptr;
	108
	109	from32ptr = (u32 *) srcptr;
	110	while (bytecount > 3) {
	111
	112	to32ptr++ = from32ptr++;
	113	bytecount -= 4;
	114	}
	115
	116	alignbuffer = 0;
	117	to8ptr = (u8 *) & alignbuffer;
	118	from8ptr = (u8 *) from32ptr;
	119
	120	for (i = 0; i < bytecount; i++) {
	121	to8ptr++ = from8ptr++;
	122	}
	123
	124	*to32ptr++ = alignbuffer;
	125	}
	126
042272a6	127	static void emaclite_halt(struct eth_device *dev)
89c53891 MS	128	{
	129	debug ("eth_halt\n");
	130	}
	131
042272a6	132	static int emaclite_init(struct eth_device dev, bd_t bis)
89c53891	133	{
947324b9	134	struct xemaclite *emaclite = dev->priv;
89c53891	135	debug ("EmacLite Initialization Started\n");
89c53891 MS	136
	137	/*
	138	* TX - TX_PING & TX_PONG initialization
	139	*/
	140	/* Restart PING TX */
8d95ddbb	141	out_be32 (dev->iobase + XEL_TSR_OFFSET, 0);
89c53891	142	/* Copy MAC address */
042272a6	143	xemaclite_alignedwrite (dev->enetaddr,
8d95ddbb	144	dev->iobase, ENET_ADDR_LENGTH);
89c53891	145	/* Set the length */
8d95ddbb	146	out_be32 (dev->iobase + XEL_TPLR_OFFSET, ENET_ADDR_LENGTH);
89c53891	147	/* Update the MAC address in the EMAC Lite */
8d95ddbb	148	out_be32 (dev->iobase + XEL_TSR_OFFSET, XEL_TSR_PROG_MAC_ADDR);
89c53891	149	/* Wait for EMAC Lite to finish with the MAC address update */
8d95ddbb MS	150	while ((in_be32 (dev->iobase + XEL_TSR_OFFSET) &
	151	XEL_TSR_PROG_MAC_ADDR) != 0)
	152	;
89c53891	153
947324b9 MS	154	if (emaclite->txpp) {
	155	/* The same operation with PONG TX */
	156	out_be32 (dev->iobase + XEL_TSR_OFFSET + XEL_BUFFER_OFFSET, 0);
	157	xemaclite_alignedwrite(dev->enetaddr, dev->iobase +
	158	XEL_BUFFER_OFFSET, ENET_ADDR_LENGTH);
	159	out_be32 (dev->iobase + XEL_TPLR_OFFSET, ENET_ADDR_LENGTH);
	160	out_be32 (dev->iobase + XEL_TSR_OFFSET + XEL_BUFFER_OFFSET,
	161	XEL_TSR_PROG_MAC_ADDR);
	162	while ((in_be32 (dev->iobase + XEL_TSR_OFFSET +
	163	XEL_BUFFER_OFFSET) & XEL_TSR_PROG_MAC_ADDR) != 0)
	164	;
	165	}
89c53891 MS	166
	167	/*
	168	* RX - RX_PING & RX_PONG initialization
	169	*/
	170	/* Write out the value to flush the RX buffer */
8d95ddbb	171	out_be32 (dev->iobase + XEL_RSR_OFFSET, XEL_RSR_RECV_IE_MASK);
947324b9 MS	172
	173	if (emaclite->rxpp)
	174	out_be32 (dev->iobase + XEL_RSR_OFFSET + XEL_BUFFER_OFFSET,
	175	XEL_RSR_RECV_IE_MASK);
89c53891 MS	176
	177	debug ("EmacLite Initialization complete\n");
	178	return 0;
	179	}
	180
773cfa8d	181	static int xemaclite_txbufferavailable(struct eth_device *dev)
89c53891 MS	182	{
	183	u32 reg;
	184	u32 txpingbusy;
	185	u32 txpongbusy;
773cfa8d MS	186	struct xemaclite *emaclite = dev->priv;
773cfa8d MS	187
89c53891 MS	188	/*
	189	* Read the other buffer register
	190	* and determine if the other buffer is available
	191	*/
773cfa8d MS	192	reg = in_be32 (dev->iobase +
773cfa8d MS	193	emaclite->nexttxbuffertouse + 0);
89c53891 MS	194	txpingbusy = ((reg & XEL_TSR_XMIT_BUSY_MASK) ==
	195	XEL_TSR_XMIT_BUSY_MASK);
	196
773cfa8d MS	197	reg = in_be32 (dev->iobase +
773cfa8d MS	198	(emaclite->nexttxbuffertouse ^ XEL_TSR_OFFSET) + 0);
89c53891 MS	199	txpongbusy = ((reg & XEL_TSR_XMIT_BUSY_MASK) ==
	200	XEL_TSR_XMIT_BUSY_MASK);
	201
	202	return (!(txpingbusy && txpongbusy));
	203	}
	204
042272a6 MS	205	static int emaclite_send (struct eth_device dev, volatile void ptr, int len)
	206	{
	207	u32 reg;
	208	u32 baseaddress;
773cfa8d	209	struct xemaclite *emaclite = dev->priv;
89c53891	210
042272a6	211	u32 maxtry = 1000;
89c53891	212
80439252 MS	213	if (len > PKTSIZE)
80439252 MS	214	len = PKTSIZE;
89c53891	215
773cfa8d	216	while (!xemaclite_txbufferavailable(dev) && maxtry) {
89c53891 MS	217	udelay (10);
	218	maxtry--;
	219	}
	220
	221	if (!maxtry) {
	222	printf ("Error: Timeout waiting for ethernet TX buffer\n");
	223	/* Restart PING TX */
8d95ddbb	224	out_be32 (dev->iobase + XEL_TSR_OFFSET, 0);
947324b9 MS	225	if (emaclite->txpp) {
	226	out_be32 (dev->iobase + XEL_TSR_OFFSET +
	227	XEL_BUFFER_OFFSET, 0);
	228	}
95efa79d	229	return -1;
89c53891 MS	230	}
	231
	232	/* Determine the expected TX buffer address */
773cfa8d	233	baseaddress = (dev->iobase + emaclite->nexttxbuffertouse);
89c53891 MS	234
	235	/* Determine if the expected buffer address is empty */
	236	reg = in_be32 (baseaddress + XEL_TSR_OFFSET);
	237	if (((reg & XEL_TSR_XMIT_BUSY_MASK) == 0)
	238	&& ((in_be32 ((baseaddress) + XEL_TSR_OFFSET)
	239	& XEL_TSR_XMIT_ACTIVE_MASK) == 0)) {
	240
947324b9 MS	241	if (emaclite->txpp)
	242	emaclite->nexttxbuffertouse ^= XEL_BUFFER_OFFSET;
	243
89c53891 MS	244	debug ("Send packet from 0x%x\n", baseaddress);
	245	/* Write the frame to the buffer */
	246	xemaclite_alignedwrite ((void *) ptr, baseaddress, len);
	247	out_be32 (baseaddress + XEL_TPLR_OFFSET,(len &
	248	(XEL_TPLR_LENGTH_MASK_HI \| XEL_TPLR_LENGTH_MASK_LO)));
	249	reg = in_be32 (baseaddress + XEL_TSR_OFFSET);
	250	reg \|= XEL_TSR_XMIT_BUSY_MASK;
	251	if ((reg & XEL_TSR_XMIT_IE_MASK) != 0) {
	252	reg \|= XEL_TSR_XMIT_ACTIVE_MASK;
	253	}
	254	out_be32 (baseaddress + XEL_TSR_OFFSET, reg);
95efa79d	255	return 0;
89c53891	256	}
947324b9 MS	257
	258	if (emaclite->txpp) {
	259	/* Switch to second buffer */
	260	baseaddress ^= XEL_BUFFER_OFFSET;
	261	/* Determine if the expected buffer address is empty */
89c53891	262	reg = in_be32 (baseaddress + XEL_TSR_OFFSET);
947324b9 MS	263	if (((reg & XEL_TSR_XMIT_BUSY_MASK) == 0)
	264	&& ((in_be32 ((baseaddress) + XEL_TSR_OFFSET)
	265	& XEL_TSR_XMIT_ACTIVE_MASK) == 0)) {
	266	debug("Send packet from 0x%x\n", baseaddress);
	267	/* Write the frame to the buffer */
	268	xemaclite_alignedwrite((void *) ptr, baseaddress, len);
	269	out_be32 (baseaddress + XEL_TPLR_OFFSET, (len &
	270	(XEL_TPLR_LENGTH_MASK_HI \|
	271	XEL_TPLR_LENGTH_MASK_LO)));
	272	reg = in_be32 (baseaddress + XEL_TSR_OFFSET);
	273	reg \|= XEL_TSR_XMIT_BUSY_MASK;
	274	if ((reg & XEL_TSR_XMIT_IE_MASK) != 0)
	275	reg \|= XEL_TSR_XMIT_ACTIVE_MASK;
	276	out_be32 (baseaddress + XEL_TSR_OFFSET, reg);
	277	return 0;
89c53891	278	}
89c53891	279	}
947324b9	280
89c53891	281	puts ("Error while sending frame\n");
95efa79d	282	return -1;
89c53891 MS	283	}
89c53891 MS	284
042272a6	285	static int emaclite_recv(struct eth_device *dev)
89c53891	286	{
042272a6 MS	287	u32 length;
	288	u32 reg;
	289	u32 baseaddress;
773cfa8d	290	struct xemaclite *emaclite = dev->priv;
89c53891	291
773cfa8d	292	baseaddress = dev->iobase + emaclite->nextrxbuffertouse;
89c53891 MS	293	reg = in_be32 (baseaddress + XEL_RSR_OFFSET);
	294	debug ("Testing data at address 0x%x\n", baseaddress);
	295	if ((reg & XEL_RSR_RECV_DONE_MASK) == XEL_RSR_RECV_DONE_MASK) {
947324b9 MS	296	if (emaclite->rxpp)
947324b9 MS	297	emaclite->nextrxbuffertouse ^= XEL_BUFFER_OFFSET;
89c53891	298	} else {
947324b9 MS	299
947324b9 MS	300	if (!emaclite->rxpp) {
89c53891	301	debug ("No data was available - address 0x%x\n",
947324b9	302	baseaddress);
89c53891	303	return 0;
947324b9 MS	304	} else {
	305	baseaddress ^= XEL_BUFFER_OFFSET;
	306	reg = in_be32 (baseaddress + XEL_RSR_OFFSET);
	307	if ((reg & XEL_RSR_RECV_DONE_MASK) !=
	308	XEL_RSR_RECV_DONE_MASK) {
	309	debug("No data was available - address 0x%x\n",
	310	baseaddress);
	311	return 0;
	312	}
89c53891	313	}
89c53891 MS	314	}
89c53891 MS	315	/* Get the length of the frame that arrived */
3f91ec0f	316	switch(((ntohl(in_be32 (baseaddress + XEL_RXBUFF_OFFSET + 0xC))) &
89c53891 MS	317	0xFFFF0000 ) >> 16) {
	318	case 0x806:
	319	length = 42 + 20; /* FIXME size of ARP */
	320	debug ("ARP Packet\n");
	321	break;
	322	case 0x800:
	323	length = 14 + 14 +
3f91ec0f	324	(((ntohl(in_be32 (baseaddress + XEL_RXBUFF_OFFSET + 0x10))) &
89c53891 MS	325	0xFFFF0000) >> 16); /* FIXME size of IP packet */
	326	debug ("IP Packet\n");
	327	break;
	328	default:
80439252 MS	329	debug("Other Packet\n");
80439252 MS	330	length = PKTSIZE;
89c53891 MS	331	break;
	332	}
	333
	334	xemaclite_alignedread ((u32 *) (baseaddress + XEL_RXBUFF_OFFSET),
	335	etherrxbuff, length);
	336
	337	/* Acknowledge the frame */
	338	reg = in_be32 (baseaddress + XEL_RSR_OFFSET);
	339	reg &= ~XEL_RSR_RECV_DONE_MASK;
	340	out_be32 (baseaddress + XEL_RSR_OFFSET, reg);
	341
	342	debug ("Packet receive from 0x%x, length %dB\n", baseaddress, length);
	343	NetReceive ((uchar *) etherrxbuff, length);
95efa79d	344	return length;
89c53891 MS	345
89c53891 MS	346	}
042272a6 MS	347
	348	int xilinx_emaclite_initialize (bd_t *bis, int base_addr)
	349	{
	350	struct eth_device *dev;
773cfa8d	351	struct xemaclite *emaclite;
042272a6	352
28ae02e5	353	dev = calloc(1, sizeof(*dev));
042272a6	354	if (dev == NULL)
95efa79d	355	return -1;
042272a6	356
773cfa8d MS	357	emaclite = calloc(1, sizeof(struct xemaclite));
	358	if (emaclite == NULL) {
	359	free(dev);
	360	return -1;
	361	}
	362
	363	dev->priv = emaclite;
	364
947324b9 MS	365	#ifdef CONFIG_XILINX_EMACLITE_TX_PING_PONG
	366	emaclite->txpp = 1;
	367	#endif
	368	#ifdef CONFIG_XILINX_EMACLITE_RX_PING_PONG
	369	emaclite->rxpp = 1;
	370	#endif
	371
25a02551	372	sprintf(dev->name, "Xelite.%x", base_addr);
042272a6 MS	373
042272a6 MS	374	dev->iobase = base_addr;
042272a6 MS	375	dev->init = emaclite_init;
	376	dev->halt = emaclite_halt;
	377	dev->send = emaclite_send;
	378	dev->recv = emaclite_recv;
	379
	380	eth_register(dev);
	381
95efa79d	382	return 1;
042272a6	383	}