]>
Commit | Line | Data |
---|---|---|
89c53891 MS |
1 | /****************************************************************************** |
2 | * | |
3 | * XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" | |
4 | * AS A COURTESY TO YOU, SOLELY FOR USE IN DEVELOPING PROGRAMS AND | |
5 | * SOLUTIONS FOR XILINX DEVICES. BY PROVIDING THIS DESIGN, CODE, | |
6 | * OR INFORMATION AS ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, | |
7 | * APPLICATION OR STANDARD, XILINX IS MAKING NO REPRESENTATION | |
8 | * THAT THIS IMPLEMENTATION IS FREE FROM ANY CLAIMS OF INFRINGEMENT, | |
9 | * AND YOU ARE RESPONSIBLE FOR OBTAINING ANY RIGHTS YOU MAY REQUIRE | |
10 | * FOR YOUR IMPLEMENTATION. XILINX EXPRESSLY DISCLAIMS ANY | |
11 | * WARRANTY WHATSOEVER WITH RESPECT TO THE ADEQUACY OF THE | |
12 | * IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY WARRANTIES OR | |
13 | * REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM CLAIMS OF | |
14 | * INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS | |
15 | * FOR A PARTICULAR PURPOSE. | |
16 | * | |
17 | * (C) Copyright 2007-2008 Michal Simek | |
18 | * Michal SIMEK <monstr@monstr.eu> | |
19 | * | |
20 | * (c) Copyright 2003 Xilinx Inc. | |
21 | * All rights reserved. | |
22 | * | |
23 | ******************************************************************************/ | |
24 | ||
25 | #include <common.h> | |
26 | #include <net.h> | |
27 | #include <config.h> | |
28 | #include <asm/io.h> | |
29 | ||
30 | #undef DEBUG | |
31 | ||
32 | #define ENET_MAX_MTU PKTSIZE | |
33 | #define ENET_MAX_MTU_ALIGNED PKTSIZE_ALIGN | |
34 | #define ENET_ADDR_LENGTH 6 | |
35 | ||
36 | /* EmacLite constants */ | |
37 | #define XEL_BUFFER_OFFSET 0x0800 /* Next buffer's offset */ | |
38 | #define XEL_TPLR_OFFSET 0x07F4 /* Tx packet length */ | |
39 | #define XEL_TSR_OFFSET 0x07FC /* Tx status */ | |
40 | #define XEL_RSR_OFFSET 0x17FC /* Rx status */ | |
41 | #define XEL_RXBUFF_OFFSET 0x1000 /* Receive Buffer */ | |
42 | ||
43 | /* Xmit complete */ | |
44 | #define XEL_TSR_XMIT_BUSY_MASK 0x00000001UL | |
45 | /* Xmit interrupt enable bit */ | |
46 | #define XEL_TSR_XMIT_IE_MASK 0x00000008UL | |
47 | /* Buffer is active, SW bit only */ | |
48 | #define XEL_TSR_XMIT_ACTIVE_MASK 0x80000000UL | |
49 | /* Program the MAC address */ | |
50 | #define XEL_TSR_PROGRAM_MASK 0x00000002UL | |
51 | /* define for programming the MAC address into the EMAC Lite */ | |
52 | #define XEL_TSR_PROG_MAC_ADDR (XEL_TSR_XMIT_BUSY_MASK | XEL_TSR_PROGRAM_MASK) | |
53 | ||
54 | /* Transmit packet length upper byte */ | |
55 | #define XEL_TPLR_LENGTH_MASK_HI 0x0000FF00UL | |
56 | /* Transmit packet length lower byte */ | |
57 | #define XEL_TPLR_LENGTH_MASK_LO 0x000000FFUL | |
58 | ||
59 | /* Recv complete */ | |
60 | #define XEL_RSR_RECV_DONE_MASK 0x00000001UL | |
61 | /* Recv interrupt enable bit */ | |
62 | #define XEL_RSR_RECV_IE_MASK 0x00000008UL | |
63 | ||
64 | typedef struct { | |
65 | unsigned int baseaddress; /* Base address for device (IPIF) */ | |
66 | unsigned int nexttxbuffertouse; /* Next TX buffer to write to */ | |
67 | unsigned int nextrxbuffertouse; /* Next RX buffer to read from */ | |
68 | unsigned char deviceid; /* Unique ID of device - for future */ | |
69 | } xemaclite; | |
70 | ||
71 | static xemaclite emaclite; | |
72 | ||
73 | static char etherrxbuff[PKTSIZE_ALIGN/4]; /* Receive buffer */ | |
74 | ||
75 | /* hardcoded MAC address for the Xilinx EMAC Core when env is nowhere*/ | |
76 | #ifdef CFG_ENV_IS_NOWHERE | |
77 | static u8 emacaddr[ENET_ADDR_LENGTH] = { 0x00, 0x0a, 0x35, 0x00, 0x22, 0x01 }; | |
78 | #else | |
79 | static u8 emacaddr[ENET_ADDR_LENGTH]; | |
80 | #endif | |
81 | ||
82 | void xemaclite_alignedread (u32 * srcptr, void *destptr, unsigned bytecount) | |
83 | { | |
84 | unsigned int i; | |
85 | u32 alignbuffer; | |
86 | u32 *to32ptr; | |
87 | u32 *from32ptr; | |
88 | u8 *to8ptr; | |
89 | u8 *from8ptr; | |
90 | ||
91 | from32ptr = (u32 *) srcptr; | |
92 | ||
93 | /* Word aligned buffer, no correction needed. */ | |
94 | to32ptr = (u32 *) destptr; | |
95 | while (bytecount > 3) { | |
96 | *to32ptr++ = *from32ptr++; | |
97 | bytecount -= 4; | |
98 | } | |
99 | to8ptr = (u8 *) to32ptr; | |
100 | ||
101 | alignbuffer = *from32ptr++; | |
102 | from8ptr = (u8 *) & alignbuffer; | |
103 | ||
104 | for (i = 0; i < bytecount; i++) { | |
105 | *to8ptr++ = *from8ptr++; | |
106 | } | |
107 | } | |
108 | ||
109 | void xemaclite_alignedwrite (void *srcptr, u32 destptr, unsigned bytecount) | |
110 | { | |
111 | unsigned i; | |
112 | u32 alignbuffer; | |
113 | u32 *to32ptr = (u32 *) destptr; | |
114 | u32 *from32ptr; | |
115 | u8 *to8ptr; | |
116 | u8 *from8ptr; | |
117 | ||
118 | from32ptr = (u32 *) srcptr; | |
119 | while (bytecount > 3) { | |
120 | ||
121 | *to32ptr++ = *from32ptr++; | |
122 | bytecount -= 4; | |
123 | } | |
124 | ||
125 | alignbuffer = 0; | |
126 | to8ptr = (u8 *) & alignbuffer; | |
127 | from8ptr = (u8 *) from32ptr; | |
128 | ||
129 | for (i = 0; i < bytecount; i++) { | |
130 | *to8ptr++ = *from8ptr++; | |
131 | } | |
132 | ||
133 | *to32ptr++ = alignbuffer; | |
134 | } | |
135 | ||
136 | void eth_halt (void) | |
137 | { | |
138 | debug ("eth_halt\n"); | |
139 | } | |
140 | ||
141 | int eth_init (bd_t * bis) | |
142 | { | |
143 | debug ("EmacLite Initialization Started\n"); | |
144 | memset (&emaclite, 0, sizeof (xemaclite)); | |
145 | emaclite.baseaddress = XILINX_EMACLITE_BASEADDR; | |
146 | ||
147 | if (!getenv("ethaddr")) { | |
148 | memcpy(bis->bi_enetaddr, emacaddr, ENET_ADDR_LENGTH); | |
149 | } | |
150 | ||
151 | /* | |
152 | * TX - TX_PING & TX_PONG initialization | |
153 | */ | |
154 | /* Restart PING TX */ | |
155 | out_be32 (emaclite.baseaddress + XEL_TSR_OFFSET, 0); | |
156 | /* Copy MAC address */ | |
157 | xemaclite_alignedwrite (bis->bi_enetaddr, | |
158 | emaclite.baseaddress, ENET_ADDR_LENGTH); | |
159 | /* Set the length */ | |
160 | out_be32 (emaclite.baseaddress + XEL_TPLR_OFFSET, ENET_ADDR_LENGTH); | |
161 | /* Update the MAC address in the EMAC Lite */ | |
162 | out_be32 (emaclite.baseaddress + XEL_TSR_OFFSET, XEL_TSR_PROG_MAC_ADDR); | |
163 | /* Wait for EMAC Lite to finish with the MAC address update */ | |
164 | while ((in_be32 (emaclite.baseaddress + XEL_TSR_OFFSET) & | |
165 | XEL_TSR_PROG_MAC_ADDR) != 0) ; | |
166 | ||
167 | #ifdef CONFIG_XILINX_EMACLITE_TX_PING_PONG | |
168 | /* The same operation with PONG TX */ | |
169 | out_be32 (emaclite.baseaddress + XEL_TSR_OFFSET + XEL_BUFFER_OFFSET, 0); | |
170 | xemaclite_alignedwrite (bis->bi_enetaddr, emaclite.baseaddress + | |
171 | XEL_BUFFER_OFFSET, ENET_ADDR_LENGTH); | |
172 | out_be32 (emaclite.baseaddress + XEL_TPLR_OFFSET, ENET_ADDR_LENGTH); | |
173 | out_be32 (emaclite.baseaddress + XEL_TSR_OFFSET + XEL_BUFFER_OFFSET, | |
174 | XEL_TSR_PROG_MAC_ADDR); | |
175 | while ((in_be32 (emaclite.baseaddress + XEL_TSR_OFFSET + | |
176 | XEL_BUFFER_OFFSET) & XEL_TSR_PROG_MAC_ADDR) != 0) ; | |
177 | #endif | |
178 | ||
179 | /* | |
180 | * RX - RX_PING & RX_PONG initialization | |
181 | */ | |
182 | /* Write out the value to flush the RX buffer */ | |
183 | out_be32 (emaclite.baseaddress + XEL_RSR_OFFSET, XEL_RSR_RECV_IE_MASK); | |
184 | #ifdef CONFIG_XILINX_EMACLITE_RX_PING_PONG | |
185 | out_be32 (emaclite.baseaddress + XEL_RSR_OFFSET + XEL_BUFFER_OFFSET, | |
186 | XEL_RSR_RECV_IE_MASK); | |
187 | #endif | |
188 | ||
189 | debug ("EmacLite Initialization complete\n"); | |
190 | return 0; | |
191 | } | |
192 | ||
193 | int xemaclite_txbufferavailable (xemaclite * instanceptr) | |
194 | { | |
195 | u32 reg; | |
196 | u32 txpingbusy; | |
197 | u32 txpongbusy; | |
198 | /* | |
199 | * Read the other buffer register | |
200 | * and determine if the other buffer is available | |
201 | */ | |
202 | reg = in_be32 (instanceptr->baseaddress + | |
203 | instanceptr->nexttxbuffertouse + 0); | |
204 | txpingbusy = ((reg & XEL_TSR_XMIT_BUSY_MASK) == | |
205 | XEL_TSR_XMIT_BUSY_MASK); | |
206 | ||
207 | reg = in_be32 (instanceptr->baseaddress + | |
208 | (instanceptr->nexttxbuffertouse ^ XEL_TSR_OFFSET) + 0); | |
209 | txpongbusy = ((reg & XEL_TSR_XMIT_BUSY_MASK) == | |
210 | XEL_TSR_XMIT_BUSY_MASK); | |
211 | ||
212 | return (!(txpingbusy && txpongbusy)); | |
213 | } | |
214 | ||
215 | int eth_send (volatile void *ptr, int len) { | |
216 | ||
217 | unsigned int reg; | |
218 | unsigned int baseaddress; | |
219 | ||
220 | unsigned maxtry = 1000; | |
221 | ||
222 | if (len > ENET_MAX_MTU) | |
223 | len = ENET_MAX_MTU; | |
224 | ||
225 | while (!xemaclite_txbufferavailable (&emaclite) && maxtry) { | |
226 | udelay (10); | |
227 | maxtry--; | |
228 | } | |
229 | ||
230 | if (!maxtry) { | |
231 | printf ("Error: Timeout waiting for ethernet TX buffer\n"); | |
232 | /* Restart PING TX */ | |
233 | out_be32 (emaclite.baseaddress + XEL_TSR_OFFSET, 0); | |
234 | #ifdef CONFIG_XILINX_EMACLITE_TX_PING_PONG | |
235 | out_be32 (emaclite.baseaddress + XEL_TSR_OFFSET + | |
236 | XEL_BUFFER_OFFSET, 0); | |
237 | #endif | |
238 | return 0; | |
239 | } | |
240 | ||
241 | /* Determine the expected TX buffer address */ | |
242 | baseaddress = (emaclite.baseaddress + emaclite.nexttxbuffertouse); | |
243 | ||
244 | /* Determine if the expected buffer address is empty */ | |
245 | reg = in_be32 (baseaddress + XEL_TSR_OFFSET); | |
246 | if (((reg & XEL_TSR_XMIT_BUSY_MASK) == 0) | |
247 | && ((in_be32 ((baseaddress) + XEL_TSR_OFFSET) | |
248 | & XEL_TSR_XMIT_ACTIVE_MASK) == 0)) { | |
249 | ||
250 | #ifdef CONFIG_XILINX_EMACLITE_TX_PING_PONG | |
251 | emaclite.nexttxbuffertouse ^= XEL_BUFFER_OFFSET; | |
252 | #endif | |
253 | debug ("Send packet from 0x%x\n", baseaddress); | |
254 | /* Write the frame to the buffer */ | |
255 | xemaclite_alignedwrite ((void *) ptr, baseaddress, len); | |
256 | out_be32 (baseaddress + XEL_TPLR_OFFSET,(len & | |
257 | (XEL_TPLR_LENGTH_MASK_HI | XEL_TPLR_LENGTH_MASK_LO))); | |
258 | reg = in_be32 (baseaddress + XEL_TSR_OFFSET); | |
259 | reg |= XEL_TSR_XMIT_BUSY_MASK; | |
260 | if ((reg & XEL_TSR_XMIT_IE_MASK) != 0) { | |
261 | reg |= XEL_TSR_XMIT_ACTIVE_MASK; | |
262 | } | |
263 | out_be32 (baseaddress + XEL_TSR_OFFSET, reg); | |
264 | return 1; | |
265 | } | |
266 | #ifdef CONFIG_XILINX_EMACLITE_TX_PING_PONG | |
267 | /* Switch to second buffer */ | |
268 | baseaddress ^= XEL_BUFFER_OFFSET; | |
269 | /* Determine if the expected buffer address is empty */ | |
270 | reg = in_be32 (baseaddress + XEL_TSR_OFFSET); | |
271 | if (((reg & XEL_TSR_XMIT_BUSY_MASK) == 0) | |
272 | && ((in_be32 ((baseaddress) + XEL_TSR_OFFSET) | |
273 | & XEL_TSR_XMIT_ACTIVE_MASK) == 0)) { | |
274 | debug ("Send packet from 0x%x\n", baseaddress); | |
275 | /* Write the frame to the buffer */ | |
276 | xemaclite_alignedwrite ((void *) ptr, baseaddress, len); | |
277 | out_be32 (baseaddress + XEL_TPLR_OFFSET,(len & | |
278 | (XEL_TPLR_LENGTH_MASK_HI | XEL_TPLR_LENGTH_MASK_LO))); | |
279 | reg = in_be32 (baseaddress + XEL_TSR_OFFSET); | |
280 | reg |= XEL_TSR_XMIT_BUSY_MASK; | |
281 | if ((reg & XEL_TSR_XMIT_IE_MASK) != 0) { | |
282 | reg |= XEL_TSR_XMIT_ACTIVE_MASK; | |
283 | } | |
284 | out_be32 (baseaddress + XEL_TSR_OFFSET, reg); | |
285 | return 1; | |
286 | } | |
287 | #endif | |
288 | puts ("Error while sending frame\n"); | |
289 | return 0; | |
290 | } | |
291 | ||
292 | int eth_rx (void) | |
293 | { | |
294 | unsigned int length; | |
295 | unsigned int reg; | |
296 | unsigned int baseaddress; | |
297 | ||
298 | baseaddress = emaclite.baseaddress + emaclite.nextrxbuffertouse; | |
299 | reg = in_be32 (baseaddress + XEL_RSR_OFFSET); | |
300 | debug ("Testing data at address 0x%x\n", baseaddress); | |
301 | if ((reg & XEL_RSR_RECV_DONE_MASK) == XEL_RSR_RECV_DONE_MASK) { | |
302 | #ifdef CONFIG_XILINX_EMACLITE_RX_PING_PONG | |
303 | emaclite.nextrxbuffertouse ^= XEL_BUFFER_OFFSET; | |
304 | #endif | |
305 | } else { | |
306 | #ifndef CONFIG_XILINX_EMACLITE_RX_PING_PONG | |
307 | debug ("No data was available - address 0x%x\n", baseaddress); | |
308 | return 0; | |
309 | #else | |
310 | baseaddress ^= XEL_BUFFER_OFFSET; | |
311 | reg = in_be32 (baseaddress + XEL_RSR_OFFSET); | |
312 | if ((reg & XEL_RSR_RECV_DONE_MASK) != | |
313 | XEL_RSR_RECV_DONE_MASK) { | |
314 | debug ("No data was available - address 0x%x\n", | |
315 | baseaddress); | |
316 | return 0; | |
317 | } | |
318 | #endif | |
319 | } | |
320 | /* Get the length of the frame that arrived */ | |
321 | switch(((in_be32 (baseaddress + XEL_RXBUFF_OFFSET + 0xC)) & | |
322 | 0xFFFF0000 ) >> 16) { | |
323 | case 0x806: | |
324 | length = 42 + 20; /* FIXME size of ARP */ | |
325 | debug ("ARP Packet\n"); | |
326 | break; | |
327 | case 0x800: | |
328 | length = 14 + 14 + | |
329 | (((in_be32 (baseaddress + XEL_RXBUFF_OFFSET + 0x10)) & | |
330 | 0xFFFF0000) >> 16); /* FIXME size of IP packet */ | |
331 | debug ("IP Packet\n"); | |
332 | break; | |
333 | default: | |
334 | debug ("Other Packet\n"); | |
335 | length = ENET_MAX_MTU; | |
336 | break; | |
337 | } | |
338 | ||
339 | xemaclite_alignedread ((u32 *) (baseaddress + XEL_RXBUFF_OFFSET), | |
340 | etherrxbuff, length); | |
341 | ||
342 | /* Acknowledge the frame */ | |
343 | reg = in_be32 (baseaddress + XEL_RSR_OFFSET); | |
344 | reg &= ~XEL_RSR_RECV_DONE_MASK; | |
345 | out_be32 (baseaddress + XEL_RSR_OFFSET, reg); | |
346 | ||
347 | debug ("Packet receive from 0x%x, length %dB\n", baseaddress, length); | |
348 | NetReceive ((uchar *) etherrxbuff, length); | |
349 | return 1; | |
350 | ||
351 | } |