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Commit | Line | Data |
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9d407995 WD |
1 | /* -------------------------------------------------------------------- */ |
2 | /* TQM8xxL Boards by TQ Components */ | |
3 | /* SC8xx Boards by SinoVee Microsystems */ | |
4 | /* -------------------------------------------------------------------- */ | |
5 | #include <common.h> | |
6e967031 | 6 | #include <asm/io.h> |
966083e9 | 7 | #ifdef CONFIG_8xx |
9d407995 | 8 | #include <mpc8xx.h> |
966083e9 | 9 | #endif |
9d407995 WD |
10 | #include <pcmcia.h> |
11 | ||
12 | #undef CONFIG_PCMCIA | |
13 | ||
cb51c0bf | 14 | #if defined(CONFIG_CMD_PCMCIA) |
9d407995 WD |
15 | #define CONFIG_PCMCIA |
16 | #endif | |
17 | ||
fc843a02 | 18 | #if defined(CONFIG_IDE) && defined(CONFIG_IDE_8xx_PCCARD) |
9d407995 WD |
19 | #define CONFIG_PCMCIA |
20 | #endif | |
21 | ||
22 | #if defined(CONFIG_PCMCIA) \ | |
d1a4aafd | 23 | && defined(CONFIG_TQM8xxL) |
9d407995 | 24 | |
5d2a5ef7 | 25 | #if defined(CONFIG_TQM8xxL) |
9d407995 | 26 | #define PCMCIA_BOARD_MSG "TQM8xxL" |
9d407995 WD |
27 | #endif |
28 | ||
9d407995 WD |
29 | static inline void power_config(int slot) |
30 | { | |
6e967031 | 31 | immap_t *immap = (immap_t *)CONFIG_SYS_IMMR; |
9d407995 | 32 | /* |
6e967031 MV |
33 | * Configure Port C pins for |
34 | * 5 Volts Enable and 3 Volts enable | |
35 | */ | |
36 | clrbits_be16(&immap->im_ioport.iop_pcpar, 0x0002 | 0x0004); | |
37 | clrbits_be16(&immap->im_ioport.iop_pcso, 0x0002 | 0x0004); | |
9d407995 WD |
38 | } |
39 | ||
40 | static inline void power_off(int slot) | |
41 | { | |
6e967031 MV |
42 | immap_t *immap = (immap_t *)CONFIG_SYS_IMMR; |
43 | clrbits_be16(&immap->im_ioport.iop_pcdat, 0x0002 | 0x0004); | |
9d407995 WD |
44 | } |
45 | ||
46 | static inline void power_on_5_0(int slot) | |
47 | { | |
6e967031 MV |
48 | immap_t *immap = (immap_t *)CONFIG_SYS_IMMR; |
49 | setbits_be16(&immap->im_ioport.iop_pcdat, 0x0004); | |
50 | setbits_be16(&immap->im_ioport.iop_pcdir, 0x0002 | 0x0004); | |
9d407995 WD |
51 | } |
52 | ||
53 | static inline void power_on_3_3(int slot) | |
54 | { | |
6e967031 MV |
55 | immap_t *immap = (immap_t *)CONFIG_SYS_IMMR; |
56 | setbits_be16(&immap->im_ioport.iop_pcdat, 0x0002); | |
57 | setbits_be16(&immap->im_ioport.iop_pcdir, 0x0002 | 0x0004); | |
9d407995 WD |
58 | } |
59 | ||
6e967031 MV |
60 | /* |
61 | * Function to retrieve the PIPR register, used for debuging purposes. | |
62 | */ | |
63 | static inline uint32_t debug_get_pipr(void) | |
64 | { | |
65 | uint32_t pipr = 0; | |
66 | #ifdef DEBUG | |
67 | immap_t *immap = (immap_t *)CONFIG_SYS_IMMR; | |
68 | pipr = in_be32(&immap->im_pcmcia.pcmc_pipr); | |
69 | #endif | |
70 | return pipr; | |
71 | } | |
72 | ||
73 | ||
9d407995 WD |
74 | static inline int check_card_is_absent(int slot) |
75 | { | |
6e967031 MV |
76 | immap_t *immap = (immap_t *)CONFIG_SYS_IMMR; |
77 | uint32_t pipr = in_be32(&immap->im_pcmcia.pcmc_pipr); | |
78 | return pipr & (0x18000000 >> (slot << 4)); | |
9d407995 | 79 | } |
9d407995 | 80 | |
9d407995 | 81 | #define NSCU_GCRX_CXOE __MY_PCMCIA_GCRX_CXOE |
9d407995 WD |
82 | |
83 | int pcmcia_hardware_enable(int slot) | |
84 | { | |
6e967031 | 85 | immap_t *immap = (immap_t *)CONFIG_SYS_IMMR; |
9d407995 WD |
86 | uint reg, mask; |
87 | ||
6e967031 | 88 | debug("hardware_enable: " PCMCIA_BOARD_MSG " Slot %c\n", 'A'+slot); |
9d407995 WD |
89 | |
90 | udelay(10000); | |
91 | ||
92 | /* | |
6e967031 MV |
93 | * Configure SIUMCR to enable PCMCIA port B |
94 | * (VFLS[0:1] are not used for debugging, we connect FRZ# instead) | |
95 | */ | |
9d407995 | 96 | |
6e967031 MV |
97 | /* Set DBGC to 00 */ |
98 | clrbits_be32(&immap->im_siu_conf.sc_siumcr, SIUMCR_DBGC11); | |
99 | ||
100 | /* Clear interrupt state, and disable interrupts */ | |
101 | out_be32(&immap->im_pcmcia.pcmc_pscr, PCMCIA_MASK(slot)); | |
102 | clrbits_be32(&immap->im_pcmcia.pcmc_per, PCMCIA_MASK(slot)); | |
9d407995 WD |
103 | |
104 | /* | |
6e967031 MV |
105 | * Disable interrupts, DMA, and PCMCIA buffers |
106 | * (isolate the interface) and assert RESET signal | |
107 | */ | |
108 | debug("Disable PCMCIA buffers and assert RESET\n"); | |
9d407995 WD |
109 | reg = 0; |
110 | reg |= __MY_PCMCIA_GCRX_CXRESET; /* active high */ | |
111 | reg |= NSCU_GCRX_CXOE; | |
112 | ||
113 | PCMCIA_PGCRX(slot) = reg; | |
114 | udelay(500); | |
115 | ||
116 | power_config(slot); | |
117 | power_off(slot); | |
118 | ||
119 | /* | |
120 | * Make sure there is a card in the slot, then configure the interface. | |
121 | */ | |
122 | udelay(10000); | |
6e967031 MV |
123 | reg = debug_get_pipr(); |
124 | debug("[%d] %s: PIPR(%p)=0x%x\n", __LINE__, __FUNCTION__, | |
125 | &immap->im_pcmcia.pcmc_pipr, reg); | |
b87dfd28 | 126 | |
9d407995 WD |
127 | if (check_card_is_absent(slot)) { |
128 | printf (" No Card found\n"); | |
129 | return (1); | |
130 | } | |
131 | ||
132 | /* | |
6e967031 MV |
133 | * Power On. |
134 | */ | |
9d407995 | 135 | mask = PCMCIA_VS1(slot) | PCMCIA_VS2(slot); |
6e967031 | 136 | reg = in_be32(&immap->im_pcmcia.pcmc_pipr); |
9d407995 WD |
137 | debug ("PIPR: 0x%x ==> VS1=o%s, VS2=o%s\n", |
138 | reg, | |
6e967031 MV |
139 | (reg & PCMCIA_VS1(slot)) ? "n" : "ff", |
140 | (reg & PCMCIA_VS2(slot)) ? "n" : "ff"); | |
b87dfd28 | 141 | |
9d407995 WD |
142 | if ((reg & mask) == mask) { |
143 | power_on_5_0(slot); | |
144 | puts (" 5.0V card found: "); | |
145 | } else { | |
146 | power_on_3_3(slot); | |
147 | puts (" 3.3V card found: "); | |
148 | } | |
149 | ||
150 | #if 0 | |
151 | /* VCC switch error flag, PCMCIA slot INPACK_ pin */ | |
152 | cp->cp_pbdir &= ~(0x0020 | 0x0010); | |
153 | cp->cp_pbpar &= ~(0x0020 | 0x0010); | |
154 | udelay(500000); | |
155 | #endif | |
156 | ||
157 | udelay(1000); | |
6e967031 | 158 | debug("Enable PCMCIA buffers and stop RESET\n"); |
9d407995 WD |
159 | reg = PCMCIA_PGCRX(slot); |
160 | reg &= ~__MY_PCMCIA_GCRX_CXRESET; /* active high */ | |
161 | reg |= __MY_PCMCIA_GCRX_CXOE; /* active low */ | |
162 | reg &= ~NSCU_GCRX_CXOE; | |
b87dfd28 | 163 | |
9d407995 WD |
164 | PCMCIA_PGCRX(slot) = reg; |
165 | ||
166 | udelay(250000); /* some cards need >150 ms to come up :-( */ | |
167 | ||
6e967031 | 168 | debug("# hardware_enable done\n"); |
9d407995 WD |
169 | |
170 | return (0); | |
171 | } | |
172 | ||
173 | ||
cb51c0bf | 174 | #if defined(CONFIG_CMD_PCMCIA) |
9d407995 WD |
175 | int pcmcia_hardware_disable(int slot) |
176 | { | |
9d407995 WD |
177 | u_long reg; |
178 | ||
6e967031 | 179 | debug("hardware_disable: " PCMCIA_BOARD_MSG " Slot %c\n", 'A'+slot); |
9d407995 WD |
180 | |
181 | /* remove all power */ | |
182 | power_off(slot); | |
183 | ||
6e967031 | 184 | debug("Disable PCMCIA buffers and assert RESET\n"); |
9d407995 WD |
185 | reg = 0; |
186 | reg |= __MY_PCMCIA_GCRX_CXRESET; /* active high */ | |
187 | reg |= NSCU_GCRX_CXOE; /* active low */ | |
188 | ||
189 | PCMCIA_PGCRX(slot) = reg; | |
190 | ||
191 | udelay(10000); | |
192 | ||
193 | return (0); | |
194 | } | |
ddb5d86f | 195 | #endif |
9d407995 WD |
196 | |
197 | int pcmcia_voltage_set(int slot, int vcc, int vpp) | |
198 | { | |
966083e9 | 199 | u_long reg; |
6e967031 | 200 | uint32_t pipr = 0; |
9d407995 | 201 | |
6e967031 | 202 | debug("voltage_set: " PCMCIA_BOARD_MSG |
9d407995 WD |
203 | " Slot %c, Vcc=%d.%d, Vpp=%d.%d\n", |
204 | 'A'+slot, vcc/10, vcc%10, vpp/10, vcc%10); | |
205 | ||
206 | /* | |
6e967031 MV |
207 | * Disable PCMCIA buffers (isolate the interface) |
208 | * and assert RESET signal | |
209 | */ | |
210 | debug("Disable PCMCIA buffers and assert RESET\n"); | |
9d407995 WD |
211 | reg = PCMCIA_PGCRX(slot); |
212 | reg |= __MY_PCMCIA_GCRX_CXRESET; /* active high */ | |
213 | reg &= ~__MY_PCMCIA_GCRX_CXOE; /* active low */ | |
214 | reg |= NSCU_GCRX_CXOE; /* active low */ | |
b87dfd28 | 215 | |
9d407995 WD |
216 | PCMCIA_PGCRX(slot) = reg; |
217 | udelay(500); | |
218 | ||
6e967031 | 219 | debug("PCMCIA power OFF\n"); |
9d407995 WD |
220 | power_config(slot); |
221 | power_off(slot); | |
222 | ||
223 | switch(vcc) { | |
53677ef1 | 224 | case 0: break; |
9d407995 WD |
225 | case 33: power_on_3_3(slot); break; |
226 | case 50: power_on_5_0(slot); break; | |
53677ef1 | 227 | default: goto done; |
9d407995 WD |
228 | } |
229 | ||
230 | /* Checking supported voltages */ | |
6e967031 MV |
231 | pipr = debug_get_pipr(); |
232 | debug("PIPR: 0x%x --> %s\n", pipr, | |
233 | (pipr & 0x00008000) ? "only 5 V" : "can do 3.3V"); | |
9d407995 WD |
234 | |
235 | if (vcc) | |
236 | debug("PCMCIA powered at %sV\n", (vcc == 50) ? "5.0" : "3.3"); | |
237 | else | |
238 | debug("PCMCIA powered down\n"); | |
239 | ||
240 | done: | |
241 | debug("Enable PCMCIA buffers and stop RESET\n"); | |
242 | reg = PCMCIA_PGCRX(slot); | |
243 | reg &= ~__MY_PCMCIA_GCRX_CXRESET; /* active high */ | |
244 | reg |= __MY_PCMCIA_GCRX_CXOE; /* active low */ | |
245 | reg &= ~NSCU_GCRX_CXOE; /* active low */ | |
246 | ||
247 | PCMCIA_PGCRX(slot) = reg; | |
248 | udelay(500); | |
249 | ||
250 | debug("voltage_set: " PCMCIA_BOARD_MSG " Slot %c, DONE\n", slot+'A'); | |
6e967031 | 251 | return 0; |
9d407995 WD |
252 | } |
253 | ||
d1a4aafd | 254 | #endif /* CONFIG_PCMCIA && CONFIG_TQM8xxL */ |