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3335786a SR |
1 | /* |
2 | * Copyright (C) 2015-2016 Marvell International Ltd. | |
3 | * | |
4 | * Copyright (C) 2016 Stefan Roese <sr@denx.de> | |
5 | * | |
6 | * SPDX-License-Identifier: GPL-2.0+ | |
7 | */ | |
8 | ||
9 | #include <common.h> | |
10 | #include <dm.h> | |
11 | #include <fdtdec.h> | |
12 | #include <linux/errno.h> | |
13 | #include <asm/io.h> | |
14 | ||
15 | #include "comphy.h" | |
16 | ||
17 | #define COMPHY_MAX_CHIP 4 | |
18 | ||
19 | DECLARE_GLOBAL_DATA_PTR; | |
20 | ||
21 | static char *get_speed_string(u32 speed) | |
22 | { | |
23 | char *speed_strings[] = {"1.25 Gbps", "1.5 Gbps", "2.5 Gbps", | |
24 | "3.0 Gbps", "3.125 Gbps", "5 Gbps", "6 Gbps", | |
25 | "6.25 Gbps", "10.31 Gbps" }; | |
26 | ||
27 | if (speed < 0 || speed > PHY_SPEED_MAX) | |
28 | return "invalid"; | |
29 | ||
30 | return speed_strings[speed]; | |
31 | } | |
32 | ||
33 | static char *get_type_string(u32 type) | |
34 | { | |
35 | char *type_strings[] = {"UNCONNECTED", "PEX0", "PEX1", "PEX2", "PEX3", | |
36 | "SATA0", "SATA1", "SATA2", "SATA3", "SGMII0", | |
37 | "SGMII1", "SGMII2", "SGMII3", "QSGMII", | |
38 | "USB3_HOST0", "USB3_HOST1", "USB3_DEVICE", | |
39 | "XAUI0", "XAUI1", "XAUI2", "XAUI3", | |
40 | "RXAUI0", "RXAUI1", "KR"}; | |
41 | ||
42 | if (type < 0 || type > PHY_TYPE_MAX) | |
43 | return "invalid"; | |
44 | ||
45 | return type_strings[type]; | |
46 | } | |
47 | ||
48 | void reg_set(void __iomem *addr, u32 data, u32 mask) | |
49 | { | |
50 | debug("Write to address = %#010lx, data = %#010x (mask = %#010x) - ", | |
51 | (unsigned long)addr, data, mask); | |
52 | debug("old value = %#010x ==> ", readl(addr)); | |
53 | reg_set_silent(addr, data, mask); | |
54 | debug("new value %#010x\n", readl(addr)); | |
55 | } | |
56 | ||
57 | void reg_set_silent(void __iomem *addr, u32 data, u32 mask) | |
58 | { | |
59 | u32 reg_data; | |
60 | ||
61 | reg_data = readl(addr); | |
62 | reg_data &= ~mask; | |
63 | reg_data |= data; | |
64 | writel(reg_data, addr); | |
65 | } | |
66 | ||
67 | void reg_set16(void __iomem *addr, u16 data, u16 mask) | |
68 | { | |
69 | debug("Write to address = %#010lx, data = %#06x (mask = %#06x) - ", | |
70 | (unsigned long)addr, data, mask); | |
71 | debug("old value = %#06x ==> ", readw(addr)); | |
72 | reg_set_silent16(addr, data, mask); | |
73 | debug("new value %#06x\n", readw(addr)); | |
74 | } | |
75 | ||
76 | void reg_set_silent16(void __iomem *addr, u16 data, u16 mask) | |
77 | { | |
78 | u16 reg_data; | |
79 | ||
80 | reg_data = readw(addr); | |
81 | reg_data &= ~mask; | |
82 | reg_data |= data; | |
83 | writew(reg_data, addr); | |
84 | } | |
85 | ||
86 | void comphy_print(struct chip_serdes_phy_config *chip_cfg, | |
87 | struct comphy_map *comphy_map_data) | |
88 | { | |
89 | u32 lane; | |
90 | ||
91 | for (lane = 0; lane < chip_cfg->comphy_lanes_count; | |
92 | lane++, comphy_map_data++) { | |
93 | if (comphy_map_data->type == PHY_TYPE_UNCONNECTED) | |
94 | continue; | |
95 | ||
96 | if (comphy_map_data->speed == PHY_SPEED_INVALID) { | |
97 | printf("Comphy-%d: %-13s\n", lane, | |
98 | get_type_string(comphy_map_data->type)); | |
99 | } else { | |
100 | printf("Comphy-%d: %-13s %-10s\n", lane, | |
101 | get_type_string(comphy_map_data->type), | |
102 | get_speed_string(comphy_map_data->speed)); | |
103 | } | |
104 | } | |
105 | } | |
106 | ||
107 | static int comphy_probe(struct udevice *dev) | |
108 | { | |
109 | const void *blob = gd->fdt_blob; | |
e160f7d4 | 110 | int node = dev_of_offset(dev); |
3335786a SR |
111 | struct chip_serdes_phy_config *chip_cfg = dev_get_priv(dev); |
112 | struct comphy_map comphy_map_data[MAX_LANE_OPTIONS]; | |
113 | int subnode; | |
114 | int lane; | |
e8c3156e | 115 | int last_idx = 0; |
3335786a SR |
116 | |
117 | /* Save base addresses for later use */ | |
118 | chip_cfg->comphy_base_addr = (void *)dev_get_addr_index(dev, 0); | |
119 | if (IS_ERR(chip_cfg->comphy_base_addr)) | |
120 | return PTR_ERR(chip_cfg->comphy_base_addr); | |
121 | ||
122 | chip_cfg->hpipe3_base_addr = (void *)dev_get_addr_index(dev, 1); | |
123 | if (IS_ERR(chip_cfg->hpipe3_base_addr)) | |
124 | return PTR_ERR(chip_cfg->hpipe3_base_addr); | |
125 | ||
126 | chip_cfg->comphy_lanes_count = fdtdec_get_int(blob, node, | |
127 | "max-lanes", 0); | |
128 | if (chip_cfg->comphy_lanes_count <= 0) { | |
129 | dev_err(&dev->dev, "comphy max lanes is wrong\n"); | |
130 | return -EINVAL; | |
131 | } | |
132 | ||
133 | chip_cfg->comphy_mux_bitcount = fdtdec_get_int(blob, node, | |
134 | "mux-bitcount", 0); | |
135 | if (chip_cfg->comphy_mux_bitcount <= 0) { | |
136 | dev_err(&dev->dev, "comphy mux bit count is wrong\n"); | |
137 | return -EINVAL; | |
138 | } | |
139 | ||
140 | if (of_device_is_compatible(dev, "marvell,comphy-armada-3700")) | |
141 | chip_cfg->ptr_comphy_chip_init = comphy_a3700_init; | |
142 | ||
c0132f60 SR |
143 | if (of_device_is_compatible(dev, "marvell,comphy-cp110")) |
144 | chip_cfg->ptr_comphy_chip_init = comphy_cp110_init; | |
145 | ||
3335786a SR |
146 | /* |
147 | * Bail out if no chip_init function is defined, e.g. no | |
148 | * compatible node is found | |
149 | */ | |
150 | if (!chip_cfg->ptr_comphy_chip_init) { | |
151 | dev_err(&dev->dev, "comphy: No compatible DT node found\n"); | |
152 | return -ENODEV; | |
153 | } | |
154 | ||
155 | lane = 0; | |
df87e6b1 | 156 | fdt_for_each_subnode(subnode, blob, node) { |
3335786a SR |
157 | /* Skip disabled ports */ |
158 | if (!fdtdec_get_is_enabled(blob, subnode)) | |
159 | continue; | |
160 | ||
161 | comphy_map_data[lane].speed = fdtdec_get_int( | |
162 | blob, subnode, "phy-speed", PHY_TYPE_INVALID); | |
163 | comphy_map_data[lane].type = fdtdec_get_int( | |
164 | blob, subnode, "phy-type", PHY_SPEED_INVALID); | |
165 | comphy_map_data[lane].invert = fdtdec_get_int( | |
166 | blob, subnode, "phy-invert", PHY_POLARITY_NO_INVERT); | |
167 | comphy_map_data[lane].clk_src = fdtdec_get_bool(blob, subnode, | |
168 | "clk-src"); | |
169 | if (comphy_map_data[lane].type == PHY_TYPE_INVALID) { | |
170 | printf("no phy type for lane %d, setting lane as unconnected\n", | |
171 | lane + 1); | |
172 | } | |
173 | ||
174 | lane++; | |
175 | } | |
176 | ||
177 | /* Save comphy index for MultiCP devices (A8K) */ | |
178 | chip_cfg->comphy_index = dev->seq; | |
179 | /* PHY power UP sequence */ | |
180 | chip_cfg->ptr_comphy_chip_init(chip_cfg, comphy_map_data); | |
181 | /* PHY print SerDes status */ | |
e8c3156e SR |
182 | if (of_machine_is_compatible("marvell,armada8040")) |
183 | printf("Comphy chip #%d:\n", chip_cfg->comphy_index); | |
3335786a SR |
184 | comphy_print(chip_cfg, comphy_map_data); |
185 | ||
e8c3156e SR |
186 | /* |
187 | * Only run the dedicated PHY init code once, in the last PHY init call | |
188 | */ | |
189 | if (of_machine_is_compatible("marvell,armada8040")) | |
190 | last_idx = 1; | |
191 | ||
192 | if (chip_cfg->comphy_index == last_idx) { | |
193 | /* Initialize dedicated PHYs (not muxed SerDes lanes) */ | |
194 | comphy_dedicated_phys_init(); | |
195 | } | |
3335786a SR |
196 | |
197 | return 0; | |
198 | } | |
199 | ||
200 | static const struct udevice_id comphy_ids[] = { | |
201 | { .compatible = "marvell,mvebu-comphy" }, | |
202 | { } | |
203 | }; | |
204 | ||
205 | U_BOOT_DRIVER(mvebu_comphy) = { | |
206 | .name = "mvebu_comphy", | |
207 | .id = UCLASS_MISC, | |
208 | .of_match = comphy_ids, | |
209 | .probe = comphy_probe, | |
210 | .priv_auto_alloc_size = sizeof(struct chip_serdes_phy_config), | |
211 | }; |