[thirdparty/u-boot.git] / drivers / power / power_spi.c

// SPDX-License-Identifier: GPL-2.0+
/*
 * Copyright (C) 2011 Samsung Electronics
 * Lukasz Majewski <l.majewski@samsung.com>
 *
 * (C) Copyright 2010
 * Stefano Babic, DENX Software Engineering, sbabic@denx.de
 *
 * (C) Copyright 2008-2009 Freescale Semiconductor, Inc.
 */

#include <common.h>
#include <linux/types.h>
#include <power/pmic.h>
#include <spi.h>

static struct spi_slave *slave;

static u32 pmic_reg(struct pmic *p, u32 reg, u32 *val, u32 write)
{
	u32 pmic_tx, pmic_rx;
	u32 tmp;

	if (!slave) {
		slave = spi_setup_slave(p->bus, p->hw.spi.cs, p->hw.spi.clk,
					p->hw.spi.mode);

		if (!slave)
			return -ENODEV;
	}

	if (check_reg(p, reg))
		return -EINVAL;

	if (spi_claim_bus(slave))
		return -EBUSY;

	pmic_tx = p->hw.spi.prepare_tx(reg, val, write);

	tmp = cpu_to_be32(pmic_tx);

	if (spi_xfer(slave, pmic_spi_bitlen, &tmp, &pmic_rx,
			pmic_spi_flags))
		goto err;

	if (write) {
		pmic_tx = p->hw.spi.prepare_tx(reg, val, 0);
		tmp = cpu_to_be32(pmic_tx);
		if (spi_xfer(slave, pmic_spi_bitlen, &tmp, &pmic_rx,
			pmic_spi_flags))
			goto err;
	}

	spi_release_bus(slave);
	*val = cpu_to_be32(pmic_rx);

	return 0;

err:
	spi_release_bus(slave);
	return -ENOTSUPP;
}

int pmic_reg_write(struct pmic *p, u32 reg, u32 val)
{
	return pmic_reg(p, reg, &val, 1);
}

int pmic_reg_read(struct pmic *p, u32 reg, u32 *val)
{
	return pmic_reg(p, reg, val, 0);
}
Commit	Line	Data
83d290c5	1	// SPDX-License-Identifier: GPL-2.0+
e542b7f0 ŁM	2	/*
	3	* Copyright (C) 2011 Samsung Electronics
	4	* Lukasz Majewski <l.majewski@samsung.com>
	5	*
	6	* (C) Copyright 2010
	7	* Stefano Babic, DENX Software Engineering, sbabic@denx.de
	8	*
	9	* (C) Copyright 2008-2009 Freescale Semiconductor, Inc.
e542b7f0 ŁM	10	*/
e542b7f0 ŁM	11
d678a59d	12	#include <common.h>
e542b7f0	13	#include <linux/types.h>
c7336815	14	#include <power/pmic.h>
e542b7f0 ŁM	15	#include <spi.h>
	16
	17	static struct spi_slave *slave;
	18
e542b7f0 ŁM	19	static u32 pmic_reg(struct pmic p, u32 reg, u32 val, u32 write)
	20	{
	21	u32 pmic_tx, pmic_rx;
	22	u32 tmp;
	23
	24	if (!slave) {
5b471dee TR	25	slave = spi_setup_slave(p->bus, p->hw.spi.cs, p->hw.spi.clk,
5b471dee TR	26	p->hw.spi.mode);
e542b7f0 ŁM	27
e542b7f0 ŁM	28	if (!slave)
505cf475	29	return -ENODEV;
e542b7f0 ŁM	30	}
e542b7f0 ŁM	31
c7336815	32	if (check_reg(p, reg))
505cf475	33	return -EINVAL;
e542b7f0 ŁM	34
e542b7f0 ŁM	35	if (spi_claim_bus(slave))
505cf475	36	return -EBUSY;
e542b7f0 ŁM	37
	38	pmic_tx = p->hw.spi.prepare_tx(reg, val, write);
	39
	40	tmp = cpu_to_be32(pmic_tx);
	41
	42	if (spi_xfer(slave, pmic_spi_bitlen, &tmp, &pmic_rx,
5b471dee TR	43	pmic_spi_flags))
5b471dee TR	44	goto err;
e542b7f0 ŁM	45
e542b7f0 ŁM	46	if (write) {
435a7285	47	pmic_tx = p->hw.spi.prepare_tx(reg, val, 0);
e542b7f0 ŁM	48	tmp = cpu_to_be32(pmic_tx);
e542b7f0 ŁM	49	if (spi_xfer(slave, pmic_spi_bitlen, &tmp, &pmic_rx,
5b471dee TR	50	pmic_spi_flags))
5b471dee TR	51	goto err;
e542b7f0 ŁM	52	}
	53
	54	spi_release_bus(slave);
	55	*val = cpu_to_be32(pmic_rx);
	56
	57	return 0;
5b471dee TR	58
	59	err:
	60	spi_release_bus(slave);
505cf475	61	return -ENOTSUPP;
e542b7f0 ŁM	62	}
	63
	64	int pmic_reg_write(struct pmic *p, u32 reg, u32 val)
	65	{
505cf475	66	return pmic_reg(p, reg, &val, 1);
e542b7f0 ŁM	67	}
	68
	69	int pmic_reg_read(struct pmic p, u32 reg, u32 val)
	70	{
505cf475	71	return pmic_reg(p, reg, val, 0);
e542b7f0	72	}