[people/ms/linux.git] / drivers / reset / reset-imx7.c

/*
 * Copyright (c) 2017, Impinj, Inc.
 *
 * i.MX7 System Reset Controller (SRC) driver
 *
 * Author: Andrey Smirnov <andrew.smirnov@gmail.com>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; version 2 of the License.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
 * GNU General Public License for more details.
 */

#include <linux/mfd/syscon.h>
#include <linux/mod_devicetable.h>
#include <linux/of_device.h>
#include <linux/platform_device.h>
#include <linux/reset-controller.h>
#include <linux/regmap.h>
#include <dt-bindings/reset/imx7-reset.h>

struct imx7_src_signal {
	unsigned int offset, bit;
};

struct imx7_src_variant {
	const struct imx7_src_signal *signals;
	unsigned int signals_num;
	struct reset_control_ops ops;
};

struct imx7_src {
	struct reset_controller_dev rcdev;
	struct regmap *regmap;
	const struct imx7_src_signal *signals;
};

enum imx7_src_registers {
	SRC_A7RCR0		= 0x0004,
	SRC_M4RCR		= 0x000c,
	SRC_ERCR		= 0x0014,
	SRC_HSICPHY_RCR		= 0x001c,
	SRC_USBOPHY1_RCR	= 0x0020,
	SRC_USBOPHY2_RCR	= 0x0024,
	SRC_MIPIPHY_RCR		= 0x0028,
	SRC_PCIEPHY_RCR		= 0x002c,
	SRC_DDRC_RCR		= 0x1000,
};

static int imx7_reset_update(struct imx7_src *imx7src,
			     unsigned long id, unsigned int value)
{
	const struct imx7_src_signal *signal = &imx7src->signals[id];

	return regmap_update_bits(imx7src->regmap,
				  signal->offset, signal->bit, value);
}

static const struct imx7_src_signal imx7_src_signals[IMX7_RESET_NUM] = {
	[IMX7_RESET_A7_CORE_POR_RESET0] = { SRC_A7RCR0, BIT(0) },
	[IMX7_RESET_A7_CORE_POR_RESET1] = { SRC_A7RCR0, BIT(1) },
	[IMX7_RESET_A7_CORE_RESET0]     = { SRC_A7RCR0, BIT(4) },
	[IMX7_RESET_A7_CORE_RESET1]	= { SRC_A7RCR0, BIT(5) },
	[IMX7_RESET_A7_DBG_RESET0]	= { SRC_A7RCR0, BIT(8) },
	[IMX7_RESET_A7_DBG_RESET1]	= { SRC_A7RCR0, BIT(9) },
	[IMX7_RESET_A7_ETM_RESET0]	= { SRC_A7RCR0, BIT(12) },
	[IMX7_RESET_A7_ETM_RESET1]	= { SRC_A7RCR0, BIT(13) },
	[IMX7_RESET_A7_SOC_DBG_RESET]	= { SRC_A7RCR0, BIT(20) },
	[IMX7_RESET_A7_L2RESET]		= { SRC_A7RCR0, BIT(21) },
	[IMX7_RESET_SW_M4C_RST]		= { SRC_M4RCR, BIT(1) },
	[IMX7_RESET_SW_M4P_RST]		= { SRC_M4RCR, BIT(2) },
	[IMX7_RESET_EIM_RST]		= { SRC_ERCR, BIT(0) },
	[IMX7_RESET_HSICPHY_PORT_RST]	= { SRC_HSICPHY_RCR, BIT(1) },
	[IMX7_RESET_USBPHY1_POR]	= { SRC_USBOPHY1_RCR, BIT(0) },
	[IMX7_RESET_USBPHY1_PORT_RST]	= { SRC_USBOPHY1_RCR, BIT(1) },
	[IMX7_RESET_USBPHY2_POR]	= { SRC_USBOPHY2_RCR, BIT(0) },
	[IMX7_RESET_USBPHY2_PORT_RST]	= { SRC_USBOPHY2_RCR, BIT(1) },
	[IMX7_RESET_MIPI_PHY_MRST]	= { SRC_MIPIPHY_RCR, BIT(1) },
	[IMX7_RESET_MIPI_PHY_SRST]	= { SRC_MIPIPHY_RCR, BIT(2) },
	[IMX7_RESET_PCIEPHY]		= { SRC_PCIEPHY_RCR, BIT(2) | BIT(1) },
	[IMX7_RESET_PCIEPHY_PERST]	= { SRC_PCIEPHY_RCR, BIT(3) },
	[IMX7_RESET_PCIE_CTRL_APPS_EN]	= { SRC_PCIEPHY_RCR, BIT(6) },
	[IMX7_RESET_PCIE_CTRL_APPS_TURNOFF] = { SRC_PCIEPHY_RCR, BIT(11) },
	[IMX7_RESET_DDRC_PRST]		= { SRC_DDRC_RCR, BIT(0) },
	[IMX7_RESET_DDRC_CORE_RST]	= { SRC_DDRC_RCR, BIT(1) },
};

static struct imx7_src *to_imx7_src(struct reset_controller_dev *rcdev)
{
	return container_of(rcdev, struct imx7_src, rcdev);
}

static int imx7_reset_set(struct reset_controller_dev *rcdev,
			  unsigned long id, bool assert)
{
	struct imx7_src *imx7src = to_imx7_src(rcdev);
	const unsigned int bit = imx7src->signals[id].bit;
	unsigned int value = assert ? bit : 0;

	switch (id) {
	case IMX7_RESET_PCIEPHY:
		/*
		 * wait for more than 10us to release phy g_rst and
		 * btnrst
		 */
		if (!assert)
			udelay(10);
		break;

	case IMX7_RESET_PCIE_CTRL_APPS_EN:
		value = assert ? 0 : bit;
		break;
	}

	return imx7_reset_update(imx7src, id, value);
}

static int imx7_reset_assert(struct reset_controller_dev *rcdev,
			     unsigned long id)
{
	return imx7_reset_set(rcdev, id, true);
}

static int imx7_reset_deassert(struct reset_controller_dev *rcdev,
			       unsigned long id)
{
	return imx7_reset_set(rcdev, id, false);
}

static const struct imx7_src_variant variant_imx7 = {
	.signals = imx7_src_signals,
	.signals_num = ARRAY_SIZE(imx7_src_signals),
	.ops = {
		.assert   = imx7_reset_assert,
		.deassert = imx7_reset_deassert,
	},
};

static int imx7_reset_probe(struct platform_device *pdev)
{
	struct imx7_src *imx7src;
	struct device *dev = &pdev->dev;
	struct regmap_config config = { .name = "src" };
	const struct imx7_src_variant *variant = of_device_get_match_data(dev);

	imx7src = devm_kzalloc(dev, sizeof(*imx7src), GFP_KERNEL);
	if (!imx7src)
		return -ENOMEM;

	imx7src->signals = variant->signals;
	imx7src->regmap = syscon_node_to_regmap(dev->of_node);
	if (IS_ERR(imx7src->regmap)) {
		dev_err(dev, "Unable to get imx7-src regmap");
		return PTR_ERR(imx7src->regmap);
	}
	regmap_attach_dev(dev, imx7src->regmap, &config);

	imx7src->rcdev.owner     = THIS_MODULE;
	imx7src->rcdev.nr_resets = variant->signals_num;
	imx7src->rcdev.ops       = &variant->ops;
	imx7src->rcdev.of_node   = dev->of_node;

	return devm_reset_controller_register(dev, &imx7src->rcdev);
}

static const struct of_device_id imx7_reset_dt_ids[] = {
	{ .compatible = "fsl,imx7d-src", .data = &variant_imx7 },
	{ /* sentinel */ },
};

static struct platform_driver imx7_reset_driver = {
	.probe	= imx7_reset_probe,
	.driver = {
		.name		= KBUILD_MODNAME,
		.of_match_table	= imx7_reset_dt_ids,
	},
};
builtin_platform_driver(imx7_reset_driver);
Commit	Line	Data
abf97755 AS	1	/*
	2	* Copyright (c) 2017, Impinj, Inc.
	3	*
	4	* i.MX7 System Reset Controller (SRC) driver
	5	*
	6	* Author: Andrey Smirnov <andrew.smirnov@gmail.com>
	7	*
	8	* This program is free software; you can redistribute it and/or modify
	9	* it under the terms of the GNU General Public License as published by
	10	* the Free Software Foundation; version 2 of the License.
	11	*
	12	* This program is distributed in the hope that it will be useful,
	13	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	14	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	15	* GNU General Public License for more details.
	16	*/
	17
	18	#include <linux/mfd/syscon.h>
ac316725	19	#include <linux/mod_devicetable.h>
10590358	20	#include <linux/of_device.h>
abf97755 AS	21	#include <linux/platform_device.h>
	22	#include <linux/reset-controller.h>
	23	#include <linux/regmap.h>
	24	#include <dt-bindings/reset/imx7-reset.h>
	25
10590358 AS	26	struct imx7_src_signal {
	27	unsigned int offset, bit;
	28	};
	29
	30	struct imx7_src_variant {
	31	const struct imx7_src_signal *signals;
	32	unsigned int signals_num;
	33	struct reset_control_ops ops;
	34	};
	35
abf97755 AS	36	struct imx7_src {
	37	struct reset_controller_dev rcdev;
	38	struct regmap *regmap;
10590358	39	const struct imx7_src_signal *signals;
abf97755 AS	40	};
	41
	42	enum imx7_src_registers {
	43	SRC_A7RCR0 = 0x0004,
	44	SRC_M4RCR = 0x000c,
	45	SRC_ERCR = 0x0014,
	46	SRC_HSICPHY_RCR = 0x001c,
	47	SRC_USBOPHY1_RCR = 0x0020,
	48	SRC_USBOPHY2_RCR = 0x0024,
	49	SRC_MIPIPHY_RCR = 0x0028,
	50	SRC_PCIEPHY_RCR = 0x002c,
	51	SRC_DDRC_RCR = 0x1000,
	52	};
	53
10590358 AS	54	static int imx7_reset_update(struct imx7_src *imx7src,
	55	unsigned long id, unsigned int value)
	56	{
	57	const struct imx7_src_signal *signal = &imx7src->signals[id];
	58
	59	return regmap_update_bits(imx7src->regmap,
	60	signal->offset, signal->bit, value);
	61	}
abf97755 AS	62
	63	static const struct imx7_src_signal imx7_src_signals[IMX7_RESET_NUM] = {
	64	[IMX7_RESET_A7_CORE_POR_RESET0] = { SRC_A7RCR0, BIT(0) },
	65	[IMX7_RESET_A7_CORE_POR_RESET1] = { SRC_A7RCR0, BIT(1) },
	66	[IMX7_RESET_A7_CORE_RESET0] = { SRC_A7RCR0, BIT(4) },
	67	[IMX7_RESET_A7_CORE_RESET1] = { SRC_A7RCR0, BIT(5) },
	68	[IMX7_RESET_A7_DBG_RESET0] = { SRC_A7RCR0, BIT(8) },
	69	[IMX7_RESET_A7_DBG_RESET1] = { SRC_A7RCR0, BIT(9) },
	70	[IMX7_RESET_A7_ETM_RESET0] = { SRC_A7RCR0, BIT(12) },
	71	[IMX7_RESET_A7_ETM_RESET1] = { SRC_A7RCR0, BIT(13) },
	72	[IMX7_RESET_A7_SOC_DBG_RESET] = { SRC_A7RCR0, BIT(20) },
	73	[IMX7_RESET_A7_L2RESET] = { SRC_A7RCR0, BIT(21) },
	74	[IMX7_RESET_SW_M4C_RST] = { SRC_M4RCR, BIT(1) },
	75	[IMX7_RESET_SW_M4P_RST] = { SRC_M4RCR, BIT(2) },
	76	[IMX7_RESET_EIM_RST] = { SRC_ERCR, BIT(0) },
	77	[IMX7_RESET_HSICPHY_PORT_RST] = { SRC_HSICPHY_RCR, BIT(1) },
	78	[IMX7_RESET_USBPHY1_POR] = { SRC_USBOPHY1_RCR, BIT(0) },
	79	[IMX7_RESET_USBPHY1_PORT_RST] = { SRC_USBOPHY1_RCR, BIT(1) },
	80	[IMX7_RESET_USBPHY2_POR] = { SRC_USBOPHY2_RCR, BIT(0) },
	81	[IMX7_RESET_USBPHY2_PORT_RST] = { SRC_USBOPHY2_RCR, BIT(1) },
	82	[IMX7_RESET_MIPI_PHY_MRST] = { SRC_MIPIPHY_RCR, BIT(1) },
	83	[IMX7_RESET_MIPI_PHY_SRST] = { SRC_MIPIPHY_RCR, BIT(2) },
	84	[IMX7_RESET_PCIEPHY] = { SRC_PCIEPHY_RCR, BIT(2) \| BIT(1) },
	85	[IMX7_RESET_PCIEPHY_PERST] = { SRC_PCIEPHY_RCR, BIT(3) },
	86	[IMX7_RESET_PCIE_CTRL_APPS_EN] = { SRC_PCIEPHY_RCR, BIT(6) },
de248327	87	[IMX7_RESET_PCIE_CTRL_APPS_TURNOFF] = { SRC_PCIEPHY_RCR, BIT(11) },
abf97755 AS	88	[IMX7_RESET_DDRC_PRST] = { SRC_DDRC_RCR, BIT(0) },
	89	[IMX7_RESET_DDRC_CORE_RST] = { SRC_DDRC_RCR, BIT(1) },
	90	};
	91
	92	static struct imx7_src to_imx7_src(struct reset_controller_dev rcdev)
	93	{
	94	return container_of(rcdev, struct imx7_src, rcdev);
	95	}
	96
	97	static int imx7_reset_set(struct reset_controller_dev *rcdev,
	98	unsigned long id, bool assert)
	99	{
	100	struct imx7_src *imx7src = to_imx7_src(rcdev);
10590358 AS	101	const unsigned int bit = imx7src->signals[id].bit;
10590358 AS	102	unsigned int value = assert ? bit : 0;
abf97755 AS	103
	104	switch (id) {
	105	case IMX7_RESET_PCIEPHY:
	106	/*
	107	* wait for more than 10us to release phy g_rst and
	108	* btnrst
	109	*/
	110	if (!assert)
	111	udelay(10);
	112	break;
	113
	114	case IMX7_RESET_PCIE_CTRL_APPS_EN:
10590358	115	value = assert ? 0 : bit;
abf97755 AS	116	break;
	117	}
	118
10590358	119	return imx7_reset_update(imx7src, id, value);
abf97755 AS	120	}
	121
	122	static int imx7_reset_assert(struct reset_controller_dev *rcdev,
	123	unsigned long id)
	124	{
	125	return imx7_reset_set(rcdev, id, true);
	126	}
	127
	128	static int imx7_reset_deassert(struct reset_controller_dev *rcdev,
	129	unsigned long id)
	130	{
	131	return imx7_reset_set(rcdev, id, false);
	132	}
	133
10590358 AS	134	static const struct imx7_src_variant variant_imx7 = {
	135	.signals = imx7_src_signals,
	136	.signals_num = ARRAY_SIZE(imx7_src_signals),
	137	.ops = {
	138	.assert = imx7_reset_assert,
	139	.deassert = imx7_reset_deassert,
	140	},
abf97755 AS	141	};
	142
	143	static int imx7_reset_probe(struct platform_device *pdev)
	144	{
	145	struct imx7_src *imx7src;
	146	struct device *dev = &pdev->dev;
	147	struct regmap_config config = { .name = "src" };
10590358	148	const struct imx7_src_variant *variant = of_device_get_match_data(dev);
abf97755 AS	149
	150	imx7src = devm_kzalloc(dev, sizeof(*imx7src), GFP_KERNEL);
	151	if (!imx7src)
	152	return -ENOMEM;
	153
10590358	154	imx7src->signals = variant->signals;
abf97755 AS	155	imx7src->regmap = syscon_node_to_regmap(dev->of_node);
	156	if (IS_ERR(imx7src->regmap)) {
	157	dev_err(dev, "Unable to get imx7-src regmap");
	158	return PTR_ERR(imx7src->regmap);
	159	}
	160	regmap_attach_dev(dev, imx7src->regmap, &config);
	161
	162	imx7src->rcdev.owner = THIS_MODULE;
10590358 AS	163	imx7src->rcdev.nr_resets = variant->signals_num;
10590358 AS	164	imx7src->rcdev.ops = &variant->ops;
abf97755 AS	165	imx7src->rcdev.of_node = dev->of_node;
	166
	167	return devm_reset_controller_register(dev, &imx7src->rcdev);
	168	}
	169
	170	static const struct of_device_id imx7_reset_dt_ids[] = {
10590358	171	{ .compatible = "fsl,imx7d-src", .data = &variant_imx7 },
abf97755 AS	172	{ /* sentinel */ },
	173	};
	174
	175	static struct platform_driver imx7_reset_driver = {
	176	.probe = imx7_reset_probe,
	177	.driver = {
	178	.name = KBUILD_MODNAME,
	179	.of_match_table = imx7_reset_dt_ids,
	180	},
	181	};
	182	builtin_platform_driver(imx7_reset_driver);