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rename CFG_ macros to CONFIG_SYS
[people/ms/u-boot.git] / drivers / rtc / ds1306.c
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1/*
2 * (C) Copyright 2002 SIXNET, dge@sixnetio.com.
3 *
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4 * (C) Copyright 2004, Li-Pro.Net <www.li-pro.net>
5 * Stephan Linz <linz@li-pro.net>
6 *
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7 * See file CREDITS for list of people who contributed to this
8 * project.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * MA 02111-1307 USA
24 */
25
26/*
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27 * Date & Time support for DS1306 RTC using SPI:
28 *
29 * - SXNI855T: it uses its own soft SPI here in this file
30 * - all other: use the external spi_xfer() function
31 * (see include/spi.h)
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32 */
33
34#include <common.h>
35#include <command.h>
36#include <rtc.h>
ec4c544b 37#include <spi.h>
affae2bf 38
871c18dd 39#if defined(CONFIG_CMD_DATE)
affae2bf 40
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41#define RTC_SECONDS 0x00
42#define RTC_MINUTES 0x01
43#define RTC_HOURS 0x02
44#define RTC_DAY_OF_WEEK 0x03
45#define RTC_DATE_OF_MONTH 0x04
46#define RTC_MONTH 0x05
47#define RTC_YEAR 0x06
48
49#define RTC_SECONDS_ALARM0 0x07
50#define RTC_MINUTES_ALARM0 0x08
51#define RTC_HOURS_ALARM0 0x09
52#define RTC_DAY_OF_WEEK_ALARM0 0x0a
53
54#define RTC_SECONDS_ALARM1 0x0b
55#define RTC_MINUTES_ALARM1 0x0c
56#define RTC_HOURS_ALARM1 0x0d
57#define RTC_DAY_OF_WEEK_ALARM1 0x0e
58
59#define RTC_CONTROL 0x0f
60#define RTC_STATUS 0x10
61#define RTC_TRICKLE_CHARGER 0x11
62
63#define RTC_USER_RAM_BASE 0x20
64
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65static unsigned int bin2bcd (unsigned int n);
66static unsigned char bcd2bin (unsigned char c);
ec4c544b 67
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68/* ************************************************************************* */
69#ifdef CONFIG_SXNI855T /* !!! SHOULD BE CHANGED TO NEW CODE !!! */
70
71static void soft_spi_send (unsigned char n);
72static unsigned char soft_spi_read (void);
73static void init_spi (void);
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74
75/*-----------------------------------------------------------------------
76 * Definitions
77 */
78
79#define PB_SPISCK 0x00000002 /* PB 30 */
80#define PB_SPIMOSI 0x00000004 /* PB 29 */
81#define PB_SPIMISO 0x00000008 /* PB 28 */
82#define PB_SPI_CE 0x00010000 /* PB 15 */
83
84/* ------------------------------------------------------------------------- */
85
86/* read clock time from DS1306 and return it in *tmp */
b73a19e1 87int rtc_get (struct rtc_time *tmp)
affae2bf 88{
6d0f6bcf 89 volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
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90 unsigned char spi_byte; /* Data Byte */
91
92 init_spi (); /* set port B for software SPI */
93
94 /* Now we can enable the DS1306 RTC */
95 immap->im_cpm.cp_pbdat |= PB_SPI_CE;
96 udelay (10);
97
98 /* Shift out the address (0) of the time in the Clock Chip */
99 soft_spi_send (0);
100
101 /* Put the clock readings into the rtc_time structure */
102 tmp->tm_sec = bcd2bin (soft_spi_read ()); /* Read seconds */
103 tmp->tm_min = bcd2bin (soft_spi_read ()); /* Read minutes */
104
105 /* Hours are trickier */
106 spi_byte = soft_spi_read (); /* Read Hours into temporary value */
107 if (spi_byte & 0x40) {
108 /* 12 hour mode bit is set (time is in 1-12 format) */
109 if (spi_byte & 0x20) {
110 /* since PM we add 11 to get 0-23 for hours */
111 tmp->tm_hour = (bcd2bin (spi_byte & 0x1F)) + 11;
112 } else {
113 /* since AM we subtract 1 to get 0-23 for hours */
114 tmp->tm_hour = (bcd2bin (spi_byte & 0x1F)) - 1;
115 }
116 } else {
117 /* Otherwise, 0-23 hour format */
118 tmp->tm_hour = (bcd2bin (spi_byte & 0x3F));
119 }
affae2bf 120
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121 soft_spi_read (); /* Read and discard Day of week */
122 tmp->tm_mday = bcd2bin (soft_spi_read ()); /* Read Day of the Month */
123 tmp->tm_mon = bcd2bin (soft_spi_read ()); /* Read Month */
affae2bf 124
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125 /* Read Year and convert to this century */
126 tmp->tm_year = bcd2bin (soft_spi_read ()) + 2000;
affae2bf 127
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128 /* Now we can disable the DS1306 RTC */
129 immap->im_cpm.cp_pbdat &= ~PB_SPI_CE; /* Disable DS1306 Chip */
130 udelay (10);
affae2bf 131
ec4c544b 132 GregorianDay (tmp); /* Determine the day of week */
affae2bf 133
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134 debug ("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
135 tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
136 tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
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137
138 return 0;
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139}
140
141/* ------------------------------------------------------------------------- */
142
143/* set clock time in DS1306 RTC and in MPC8xx RTC */
d1e23194 144int rtc_set (struct rtc_time *tmp)
ec4c544b 145{
6d0f6bcf 146 volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
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147
148 init_spi (); /* set port B for software SPI */
149
150 /* Now we can enable the DS1306 RTC */
151 immap->im_cpm.cp_pbdat |= PB_SPI_CE; /* Enable DS1306 Chip */
152 udelay (10);
153
154 /* First disable write protect in the clock chip control register */
155 soft_spi_send (0x8F); /* send address of the control register */
156 soft_spi_send (0x00); /* send control register contents */
157
158 /* Now disable the DS1306 to terminate the write */
159 immap->im_cpm.cp_pbdat &= ~PB_SPI_CE;
160 udelay (10);
161
162 /* Now enable the DS1306 to initiate a new write */
163 immap->im_cpm.cp_pbdat |= PB_SPI_CE;
164 udelay (10);
165
166 /* Next, send the address of the clock time write registers */
167 soft_spi_send (0x80); /* send address of the first time register */
168
169 /* Use Burst Mode to send all of the time data to the clock */
170 bin2bcd (tmp->tm_sec);
171 soft_spi_send (bin2bcd (tmp->tm_sec)); /* Send Seconds */
172 soft_spi_send (bin2bcd (tmp->tm_min)); /* Send Minutes */
173 soft_spi_send (bin2bcd (tmp->tm_hour)); /* Send Hour */
174 soft_spi_send (bin2bcd (tmp->tm_wday)); /* Send Day of the Week */
175 soft_spi_send (bin2bcd (tmp->tm_mday)); /* Send Day of Month */
176 soft_spi_send (bin2bcd (tmp->tm_mon)); /* Send Month */
177 soft_spi_send (bin2bcd (tmp->tm_year - 2000)); /* Send Year */
178
179 /* Now we can disable the Clock chip to terminate the burst write */
180 immap->im_cpm.cp_pbdat &= ~PB_SPI_CE; /* Disable DS1306 Chip */
181 udelay (10);
182
183 /* Now we can enable the Clock chip to initiate a new write */
184 immap->im_cpm.cp_pbdat |= PB_SPI_CE; /* Enable DS1306 Chip */
185 udelay (10);
186
187 /* First we Enable write protect in the clock chip control register */
188 soft_spi_send (0x8F); /* send address of the control register */
189 soft_spi_send (0x40); /* send out Control Register contents */
190
191 /* Now disable the DS1306 */
192 immap->im_cpm.cp_pbdat &= ~PB_SPI_CE; /* Disable DS1306 Chip */
193 udelay (10);
194
195 /* Set standard MPC8xx clock to the same time so Linux will
196 * see the time even if it doesn't have a DS1306 clock driver.
197 * This helps with experimenting with standard kernels.
198 */
199 {
200 ulong tim;
201
202 tim = mktime (tmp->tm_year, tmp->tm_mon, tmp->tm_mday,
203 tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
204
205 immap->im_sitk.sitk_rtck = KAPWR_KEY;
206 immap->im_sit.sit_rtc = tim;
affae2bf 207 }
affae2bf 208
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209 debug ("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
210 tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
211 tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
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212
213 return 0;
ec4c544b 214}
affae2bf 215
ec4c544b 216/* ------------------------------------------------------------------------- */
affae2bf 217
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218/* Initialize Port B for software SPI */
219static void init_spi (void)
220{
6d0f6bcf 221 volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
affae2bf 222
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223 /* Force output pins to begin at logic 0 */
224 immap->im_cpm.cp_pbdat &= ~(PB_SPI_CE | PB_SPIMOSI | PB_SPISCK);
affae2bf 225
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226 /* Set these 3 signals as outputs */
227 immap->im_cpm.cp_pbdir |= (PB_SPIMOSI | PB_SPI_CE | PB_SPISCK);
228
229 immap->im_cpm.cp_pbdir &= ~PB_SPIMISO; /* Make MISO pin an input */
230 udelay (10);
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231}
232
233/* ------------------------------------------------------------------------- */
234
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235/* NOTE: soft_spi_send() assumes that the I/O lines are configured already */
236static void soft_spi_send (unsigned char n)
affae2bf 237{
6d0f6bcf 238 volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
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239 unsigned char bitpos; /* bit position to receive */
240 unsigned char i; /* Loop Control */
241
242 /* bit position to send, start with most significant bit */
243 bitpos = 0x80;
244
245 /* Send 8 bits to software SPI */
246 for (i = 0; i < 8; i++) { /* Loop for 8 bits */
247 immap->im_cpm.cp_pbdat |= PB_SPISCK; /* Raise SCK */
248
249 if (n & bitpos)
250 immap->im_cpm.cp_pbdat |= PB_SPIMOSI; /* Set MOSI to 1 */
251 else
252 immap->im_cpm.cp_pbdat &= ~PB_SPIMOSI; /* Set MOSI to 0 */
253 udelay (10);
254
255 immap->im_cpm.cp_pbdat &= ~PB_SPISCK; /* Lower SCK */
256 udelay (10);
257
258 bitpos >>= 1; /* Shift for next bit position */
259 }
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260}
261
262/* ------------------------------------------------------------------------- */
263
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264/* NOTE: soft_spi_read() assumes that the I/O lines are configured already */
265static unsigned char soft_spi_read (void)
affae2bf 266{
6d0f6bcf 267 volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
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268
269 unsigned char spi_byte = 0; /* Return value, assume success */
270 unsigned char bitpos; /* bit position to receive */
271 unsigned char i; /* Loop Control */
272
273 /* bit position to receive, start with most significant bit */
274 bitpos = 0x80;
275
276 /* Read 8 bits here */
277 for (i = 0; i < 8; i++) { /* Do 8 bits in loop */
278 immap->im_cpm.cp_pbdat |= PB_SPISCK; /* Raise SCK */
279 udelay (10);
280 if (immap->im_cpm.cp_pbdat & PB_SPIMISO) /* Get a bit of data */
281 spi_byte |= bitpos; /* Set data accordingly */
282 immap->im_cpm.cp_pbdat &= ~PB_SPISCK; /* Lower SCK */
283 udelay (10);
284 bitpos >>= 1; /* Shift for next bit position */
285 }
286
287 return spi_byte; /* Return the byte read */
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288}
289
290/* ------------------------------------------------------------------------- */
291
ec4c544b 292void rtc_reset (void)
affae2bf 293{
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294 return; /* nothing to do */
295}
296
297#else /* not CONFIG_SXNI855T */
298/* ************************************************************************* */
299
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300static unsigned char rtc_read (unsigned char reg);
301static void rtc_write (unsigned char reg, unsigned char val);
302
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303static struct spi_slave *slave;
304
ec4c544b 305/* read clock time from DS1306 and return it in *tmp */
b73a19e1 306int rtc_get (struct rtc_time *tmp)
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307{
308 unsigned char sec, min, hour, mday, wday, mon, year;
309
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310 /*
311 * Assuming Vcc = 2.0V (lowest speed)
312 *
313 * REVISIT: If we add an rtc_init() function we can do this
314 * step just once.
315 */
316 if (!slave) {
6d0f6bcf 317 slave = spi_setup_slave(0, CONFIG_SYS_SPI_RTC_DEVID, 600000,
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318 SPI_MODE_3 | SPI_CS_HIGH);
319 if (!slave)
320 return;
321 }
322
323 if (spi_claim_bus(slave))
324 return;
325
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326 sec = rtc_read (RTC_SECONDS);
327 min = rtc_read (RTC_MINUTES);
328 hour = rtc_read (RTC_HOURS);
329 mday = rtc_read (RTC_DATE_OF_MONTH);
330 wday = rtc_read (RTC_DAY_OF_WEEK);
331 mon = rtc_read (RTC_MONTH);
332 year = rtc_read (RTC_YEAR);
333
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334 spi_release_bus(slave);
335
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336 debug ("Get RTC year: %02x mon: %02x mday: %02x wday: %02x "
337 "hr: %02x min: %02x sec: %02x\n",
338 year, mon, mday, wday, hour, min, sec);
339 debug ("Alarms[0]: wday: %02x hour: %02x min: %02x sec: %02x\n",
340 rtc_read (RTC_DAY_OF_WEEK_ALARM0),
341 rtc_read (RTC_HOURS_ALARM0),
342 rtc_read (RTC_MINUTES_ALARM0), rtc_read (RTC_SECONDS_ALARM0));
343 debug ("Alarms[1]: wday: %02x hour: %02x min: %02x sec: %02x\n",
344 rtc_read (RTC_DAY_OF_WEEK_ALARM1),
345 rtc_read (RTC_HOURS_ALARM1),
346 rtc_read (RTC_MINUTES_ALARM1), rtc_read (RTC_SECONDS_ALARM1));
347
348 tmp->tm_sec = bcd2bin (sec & 0x7F); /* convert Seconds */
349 tmp->tm_min = bcd2bin (min & 0x7F); /* convert Minutes */
350
351 /* convert Hours */
352 tmp->tm_hour = (hour & 0x40)
353 ? ((hour & 0x20) /* 12 hour mode */
354 ? bcd2bin (hour & 0x1F) + 11 /* PM */
355 : bcd2bin (hour & 0x1F) - 1 /* AM */
356 )
357 : bcd2bin (hour & 0x3F); /* 24 hour mode */
358
359 tmp->tm_mday = bcd2bin (mday & 0x3F); /* convert Day of the Month */
360 tmp->tm_mon = bcd2bin (mon & 0x1F); /* convert Month */
361 tmp->tm_year = bcd2bin (year) + 2000; /* convert Year */
362 tmp->tm_wday = bcd2bin (wday & 0x07) - 1; /* convert Day of the Week */
363 tmp->tm_yday = 0;
364 tmp->tm_isdst = 0;
365
366 debug ("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
367 tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
368 tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
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369
370 return 0;
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371}
372
373/* ------------------------------------------------------------------------- */
374
ec4c544b 375/* set clock time from *tmp in DS1306 RTC */
d1e23194 376int rtc_set (struct rtc_time *tmp)
affae2bf 377{
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378 /* Assuming Vcc = 2.0V (lowest speed) */
379 if (!slave) {
6d0f6bcf 380 slave = spi_setup_slave(0, CONFIG_SYS_SPI_RTC_DEVID, 600000,
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381 SPI_MODE_3 | SPI_CS_HIGH);
382 if (!slave)
383 return;
384 }
385
386 if (spi_claim_bus(slave))
387 return;
388
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389 debug ("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
390 tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
391 tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
392
ec4c544b 393 rtc_write (RTC_SECONDS, bin2bcd (tmp->tm_sec));
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394 rtc_write (RTC_MINUTES, bin2bcd (tmp->tm_min));
395 rtc_write (RTC_HOURS, bin2bcd (tmp->tm_hour));
396 rtc_write (RTC_DAY_OF_WEEK, bin2bcd (tmp->tm_wday + 1));
397 rtc_write (RTC_DATE_OF_MONTH, bin2bcd (tmp->tm_mday));
398 rtc_write (RTC_MONTH, bin2bcd (tmp->tm_mon));
399 rtc_write (RTC_YEAR, bin2bcd (tmp->tm_year - 2000));
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400
401 spi_release_bus(slave);
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402}
403
404/* ------------------------------------------------------------------------- */
405
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406/* reset the DS1306 */
407void rtc_reset (void)
408{
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409 /* Assuming Vcc = 2.0V (lowest speed) */
410 if (!slave) {
6d0f6bcf 411 slave = spi_setup_slave(0, CONFIG_SYS_SPI_RTC_DEVID, 600000,
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412 SPI_MODE_3 | SPI_CS_HIGH);
413 if (!slave)
414 return;
415 }
416
417 if (spi_claim_bus(slave))
418 return;
419
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420 /* clear the control register */
421 rtc_write (RTC_CONTROL, 0x00); /* 1st step: reset WP */
422 rtc_write (RTC_CONTROL, 0x00); /* 2nd step: reset 1Hz, AIE1, AIE0 */
423
424 /* reset all alarms */
425 rtc_write (RTC_SECONDS_ALARM0, 0x00);
426 rtc_write (RTC_SECONDS_ALARM1, 0x00);
427 rtc_write (RTC_MINUTES_ALARM0, 0x00);
428 rtc_write (RTC_MINUTES_ALARM1, 0x00);
429 rtc_write (RTC_HOURS_ALARM0, 0x00);
430 rtc_write (RTC_HOURS_ALARM1, 0x00);
431 rtc_write (RTC_DAY_OF_WEEK_ALARM0, 0x00);
432 rtc_write (RTC_DAY_OF_WEEK_ALARM1, 0x00);
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433
434 spi_release_bus(slave);
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435}
436
437/* ------------------------------------------------------------------------- */
affae2bf 438
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439static unsigned char rtc_read (unsigned char reg)
440{
d255bb0e 441 int ret;
affae2bf 442
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443 ret = spi_w8r8(slave, reg);
444 return ret < 0 ? 0 : ret;
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445}
446
447/* ------------------------------------------------------------------------- */
448
ec4c544b 449static void rtc_write (unsigned char reg, unsigned char val)
affae2bf 450{
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451 unsigned char dout[2]; /* SPI Output Data Bytes */
452 unsigned char din[2]; /* SPI Input Data Bytes */
affae2bf 453
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454 dout[0] = 0x80 | reg;
455 dout[1] = val;
affae2bf 456
d255bb0e 457 spi_xfer (slave, 16, dout, din, SPI_XFER_BEGIN | SPI_XFER_END);
ec4c544b 458}
affae2bf 459
ec4c544b 460#endif /* end of code exclusion (see #ifdef CONFIG_SXNI855T above) */
affae2bf 461
ec4c544b 462/* ------------------------------------------------------------------------- */
affae2bf 463
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464static unsigned char bcd2bin (unsigned char n)
465{
466 return ((((n >> 4) & 0x0F) * 10) + (n & 0x0F));
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467}
468
469/* ------------------------------------------------------------------------- */
470
ec4c544b 471static unsigned int bin2bcd (unsigned int n)
affae2bf 472{
ec4c544b 473 return (((n / 10) << 4) | (n % 10));
affae2bf 474}
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475/* ------------------------------------------------------------------------- */
476
477#endif