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1cb8e980 WD |
1 | /* |
2 | * (C) Copyright 2001, 2002, 2003 | |
3 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. | |
4 | * Keith Outwater, keith_outwater@mvis.com` | |
5 | * Steven Scholz, steven.scholz@imc-berlin.de | |
6 | * | |
7 | * See file CREDITS for list of people who contributed to this | |
8 | * project. | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or | |
11 | * modify it under the terms of the GNU General Public License as | |
12 | * published by the Free Software Foundation; either version 2 of | |
13 | * the License, or (at your option) any later version. | |
14 | * | |
15 | * This program is distributed in the hope that it will be useful, | |
16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
18 | * GNU General Public License for more details. | |
19 | * | |
20 | * You should have received a copy of the GNU General Public License | |
21 | * along with this program; if not, write to the Free Software | |
22 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
23 | * MA 02111-1307 USA | |
24 | */ | |
25 | ||
26 | /* | |
27 | * Date & Time support (no alarms) for Dallas Semiconductor (now Maxim) | |
7f70e853 | 28 | * DS1307 and DS1338 Real Time Clock (RTC). |
1cb8e980 WD |
29 | * |
30 | * based on ds1337.c | |
31 | */ | |
32 | ||
33 | #include <common.h> | |
34 | #include <command.h> | |
35 | #include <rtc.h> | |
36 | #include <i2c.h> | |
37 | ||
871c18dd | 38 | #if defined(CONFIG_CMD_DATE) |
1cb8e980 WD |
39 | |
40 | /*---------------------------------------------------------------------*/ | |
41 | #undef DEBUG_RTC | |
42 | ||
43 | #ifdef DEBUG_RTC | |
44 | #define DEBUGR(fmt,args...) printf(fmt ,##args) | |
45 | #else | |
46 | #define DEBUGR(fmt,args...) | |
47 | #endif | |
48 | /*---------------------------------------------------------------------*/ | |
49 | ||
6d0f6bcf JCPV |
50 | #ifndef CONFIG_SYS_I2C_RTC_ADDR |
51 | # define CONFIG_SYS_I2C_RTC_ADDR 0x68 | |
1cb8e980 WD |
52 | #endif |
53 | ||
6d0f6bcf | 54 | #if defined(CONFIG_RTC_DS1307) && (CONFIG_SYS_I2C_SPEED > 100000) |
1cb8e980 WD |
55 | # error The DS1307 is specified only up to 100kHz! |
56 | #endif | |
57 | ||
58 | /* | |
59 | * RTC register addresses | |
60 | */ | |
61 | #define RTC_SEC_REG_ADDR 0x00 | |
62 | #define RTC_MIN_REG_ADDR 0x01 | |
63 | #define RTC_HR_REG_ADDR 0x02 | |
64 | #define RTC_DAY_REG_ADDR 0x03 | |
65 | #define RTC_DATE_REG_ADDR 0x04 | |
66 | #define RTC_MON_REG_ADDR 0x05 | |
67 | #define RTC_YR_REG_ADDR 0x06 | |
68 | #define RTC_CTL_REG_ADDR 0x07 | |
69 | ||
70 | #define RTC_SEC_BIT_CH 0x80 /* Clock Halt (in Register 0) */ | |
71 | ||
72 | #define RTC_CTL_BIT_RS0 0x01 /* Rate select 0 */ | |
73 | #define RTC_CTL_BIT_RS1 0x02 /* Rate select 1 */ | |
74 | #define RTC_CTL_BIT_SQWE 0x10 /* Square Wave Enable */ | |
75 | #define RTC_CTL_BIT_OUT 0x80 /* Output Control */ | |
76 | ||
77 | static uchar rtc_read (uchar reg); | |
78 | static void rtc_write (uchar reg, uchar val); | |
79 | static uchar bin2bcd (unsigned int n); | |
80 | static unsigned bcd2bin (uchar c); | |
81 | ||
82 | /* | |
83 | * Get the current time from the RTC | |
84 | */ | |
b73a19e1 | 85 | int rtc_get (struct rtc_time *tmp) |
1cb8e980 | 86 | { |
b73a19e1 | 87 | int rel = 0; |
1cb8e980 WD |
88 | uchar sec, min, hour, mday, wday, mon, year; |
89 | ||
90 | sec = rtc_read (RTC_SEC_REG_ADDR); | |
91 | min = rtc_read (RTC_MIN_REG_ADDR); | |
92 | hour = rtc_read (RTC_HR_REG_ADDR); | |
93 | wday = rtc_read (RTC_DAY_REG_ADDR); | |
94 | mday = rtc_read (RTC_DATE_REG_ADDR); | |
95 | mon = rtc_read (RTC_MON_REG_ADDR); | |
96 | year = rtc_read (RTC_YR_REG_ADDR); | |
97 | ||
98 | DEBUGR ("Get RTC year: %02x mon: %02x mday: %02x wday: %02x " | |
99 | "hr: %02x min: %02x sec: %02x\n", | |
100 | year, mon, mday, wday, hour, min, sec); | |
101 | ||
102 | if (sec & RTC_SEC_BIT_CH) { | |
103 | printf ("### Warning: RTC oscillator has stopped\n"); | |
104 | /* clear the CH flag */ | |
105 | rtc_write (RTC_SEC_REG_ADDR, | |
106 | rtc_read (RTC_SEC_REG_ADDR) & ~RTC_SEC_BIT_CH); | |
b73a19e1 | 107 | rel = -1; |
1cb8e980 | 108 | } |
8bde7f77 | 109 | |
1cb8e980 WD |
110 | tmp->tm_sec = bcd2bin (sec & 0x7F); |
111 | tmp->tm_min = bcd2bin (min & 0x7F); | |
112 | tmp->tm_hour = bcd2bin (hour & 0x3F); | |
113 | tmp->tm_mday = bcd2bin (mday & 0x3F); | |
114 | tmp->tm_mon = bcd2bin (mon & 0x1F); | |
115 | tmp->tm_year = bcd2bin (year) + ( bcd2bin (year) >= 70 ? 1900 : 2000); | |
116 | tmp->tm_wday = bcd2bin ((wday - 1) & 0x07); | |
117 | tmp->tm_yday = 0; | |
118 | tmp->tm_isdst= 0; | |
119 | ||
120 | DEBUGR ("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", | |
121 | tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, | |
122 | tmp->tm_hour, tmp->tm_min, tmp->tm_sec); | |
b73a19e1 YT |
123 | |
124 | return rel; | |
1cb8e980 WD |
125 | } |
126 | ||
127 | ||
128 | /* | |
129 | * Set the RTC | |
130 | */ | |
d1e23194 | 131 | int rtc_set (struct rtc_time *tmp) |
1cb8e980 WD |
132 | { |
133 | DEBUGR ("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", | |
134 | tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, | |
135 | tmp->tm_hour, tmp->tm_min, tmp->tm_sec); | |
136 | ||
137 | if (tmp->tm_year < 1970 || tmp->tm_year > 2069) | |
138 | printf("WARNING: year should be between 1970 and 2069!\n"); | |
8bde7f77 | 139 | |
1cb8e980 WD |
140 | rtc_write (RTC_YR_REG_ADDR, bin2bcd (tmp->tm_year % 100)); |
141 | rtc_write (RTC_MON_REG_ADDR, bin2bcd (tmp->tm_mon)); | |
142 | rtc_write (RTC_DAY_REG_ADDR, bin2bcd (tmp->tm_wday + 1)); | |
143 | rtc_write (RTC_DATE_REG_ADDR, bin2bcd (tmp->tm_mday)); | |
144 | rtc_write (RTC_HR_REG_ADDR, bin2bcd (tmp->tm_hour)); | |
145 | rtc_write (RTC_MIN_REG_ADDR, bin2bcd (tmp->tm_min)); | |
146 | rtc_write (RTC_SEC_REG_ADDR, bin2bcd (tmp->tm_sec)); | |
d1e23194 JCPV |
147 | |
148 | return 0; | |
1cb8e980 WD |
149 | } |
150 | ||
151 | ||
152 | /* | |
8bde7f77 WD |
153 | * Reset the RTC. We setting the date back to 1970-01-01. |
154 | * We also enable the oscillator output on the SQW/OUT pin and program | |
1cb8e980 WD |
155 | * it for 32,768 Hz output. Note that according to the datasheet, turning |
156 | * on the square wave output increases the current drain on the backup | |
157 | * battery to something between 480nA and 800nA. | |
158 | */ | |
159 | void rtc_reset (void) | |
160 | { | |
161 | struct rtc_time tmp; | |
162 | ||
163 | rtc_write (RTC_SEC_REG_ADDR, 0x00); /* clearing Clock Halt */ | |
164 | rtc_write (RTC_CTL_REG_ADDR, RTC_CTL_BIT_SQWE | RTC_CTL_BIT_RS1 | RTC_CTL_BIT_RS0); | |
165 | ||
166 | tmp.tm_year = 1970; | |
167 | tmp.tm_mon = 1; | |
168 | tmp.tm_mday= 1; | |
169 | tmp.tm_hour = 0; | |
170 | tmp.tm_min = 0; | |
171 | tmp.tm_sec = 0; | |
172 | ||
173 | rtc_set(&tmp); | |
174 | ||
175 | printf ( "RTC: %4d-%02d-%02d %2d:%02d:%02d UTC\n", | |
176 | tmp.tm_year, tmp.tm_mon, tmp.tm_mday, | |
177 | tmp.tm_hour, tmp.tm_min, tmp.tm_sec); | |
178 | ||
179 | return; | |
180 | } | |
181 | ||
182 | ||
183 | /* | |
184 | * Helper functions | |
185 | */ | |
186 | ||
187 | static | |
188 | uchar rtc_read (uchar reg) | |
189 | { | |
6d0f6bcf | 190 | return (i2c_reg_read (CONFIG_SYS_I2C_RTC_ADDR, reg)); |
1cb8e980 WD |
191 | } |
192 | ||
193 | ||
194 | static void rtc_write (uchar reg, uchar val) | |
195 | { | |
6d0f6bcf | 196 | i2c_reg_write (CONFIG_SYS_I2C_RTC_ADDR, reg, val); |
1cb8e980 WD |
197 | } |
198 | ||
199 | static unsigned bcd2bin (uchar n) | |
200 | { | |
201 | return ((((n >> 4) & 0x0F) * 10) + (n & 0x0F)); | |
202 | } | |
203 | ||
204 | static unsigned char bin2bcd (unsigned int n) | |
205 | { | |
206 | return (((n / 10) << 4) | (n % 10)); | |
207 | } | |
208 | ||
068b60a0 | 209 | #endif |