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[SCSI] be2iscsi: Fix CID allocation/freeing to support Dual chute mode
[people/arne_f/kernel.git] / drivers / scsi / be2iscsi / be_main.c
CommitLineData
6733b39a 1/**
533c165f 2 * Copyright (C) 2005 - 2013 Emulex
6733b39a
JK		 3 * All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License version 2
7 * as published by the Free Software Foundation. The full GNU General
8 * Public License is included in this distribution in the file called COPYING.
9 *
255fa9a3 10 * Written by: Jayamohan Kallickal (jayamohan.kallickal@emulex.com)
6733b39a
JK		 11 *
12 * Contact Information:
255fa9a3 13 * linux-drivers@emulex.com
6733b39a 14 *
255fa9a3
JK		 15 * Emulex
16 * 3333 Susan Street
17 * Costa Mesa, CA 92626
6733b39a 18 */
255fa9a3 19
6733b39a
JK		 20#include <linux/reboot.h>
21#include <linux/delay.h>
5a0e3ad6 22#include <linux/slab.h>
6733b39a
JK		 23#include <linux/interrupt.h>
24#include <linux/blkdev.h>
25#include <linux/pci.h>
26#include <linux/string.h>
27#include <linux/kernel.h>
28#include <linux/semaphore.h>
c7acc5b8 29#include <linux/iscsi_boot_sysfs.h>
acf3368f 30#include <linux/module.h>
ffce3e2e 31#include <linux/bsg-lib.h>
6733b39a
JK		 32
33#include <scsi/libiscsi.h>
ffce3e2e
JK		 34#include <scsi/scsi_bsg_iscsi.h>
35#include <scsi/scsi_netlink.h>
6733b39a
JK		 36#include <scsi/scsi_transport_iscsi.h>
37#include <scsi/scsi_transport.h>
38#include <scsi/scsi_cmnd.h>
39#include <scsi/scsi_device.h>
40#include <scsi/scsi_host.h>
41#include <scsi/scsi.h>
42#include "be_main.h"
43#include "be_iscsi.h"
44#include "be_mgmt.h"
0a513dd8 45#include "be_cmds.h"
6733b39a
JK		 46
47static unsigned int be_iopoll_budget = 10;
48static unsigned int be_max_phys_size = 64;
bfead3b2 49static unsigned int enable_msix = 1;
6733b39a
JK		 50
51MODULE_DEVICE_TABLE(pci, beiscsi_pci_id_table);
52MODULE_DESCRIPTION(DRV_DESC " " BUILD_STR);
76d15dbd 53MODULE_VERSION(BUILD_STR);
2f635883 54MODULE_AUTHOR("Emulex Corporation");
6733b39a
JK		 55MODULE_LICENSE("GPL");
56module_param(be_iopoll_budget, int, 0);
57module_param(enable_msix, int, 0);
58module_param(be_max_phys_size, uint, S_IRUGO);
99bc5d55
JSJ		 59MODULE_PARM_DESC(be_max_phys_size,
60 "Maximum Size (In Kilobytes) of physically contiguous "
61 "memory that can be allocated. Range is 16 - 128");
62
63#define beiscsi_disp_param(_name)\
64ssize_t \
65beiscsi_##_name##_disp(struct device *dev,\
66 struct device_attribute *attrib, char *buf) \
67{ \
68 struct Scsi_Host *shost = class_to_shost(dev);\
69 struct beiscsi_hba *phba = iscsi_host_priv(shost); \
70 uint32_t param_val = 0; \
71 param_val = phba->attr_##_name;\
72 return snprintf(buf, PAGE_SIZE, "%d\n",\
73 phba->attr_##_name);\
74}
75
76#define beiscsi_change_param(_name, _minval, _maxval, _defaval)\
77int \
78beiscsi_##_name##_change(struct beiscsi_hba *phba, uint32_t val)\
79{\
80 if (val >= _minval && val <= _maxval) {\
81 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,\
82 "BA_%d : beiscsi_"#_name" updated "\
83 "from 0x%x ==> 0x%x\n",\
84 phba->attr_##_name, val); \
85 phba->attr_##_name = val;\
86 return 0;\
87 } \
88 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT, \
89 "BA_%d beiscsi_"#_name" attribute "\
90 "cannot be updated to 0x%x, "\
91 "range allowed is ["#_minval" - "#_maxval"]\n", val);\
92 return -EINVAL;\
93}
94
95#define beiscsi_store_param(_name) \
96ssize_t \
97beiscsi_##_name##_store(struct device *dev,\
98 struct device_attribute *attr, const char *buf,\
99 size_t count) \
100{ \
101 struct Scsi_Host *shost = class_to_shost(dev);\
102 struct beiscsi_hba *phba = iscsi_host_priv(shost);\
103 uint32_t param_val = 0;\
104 if (!isdigit(buf[0]))\
105 return -EINVAL;\
106 if (sscanf(buf, "%i", &param_val) != 1)\
107 return -EINVAL;\
108 if (beiscsi_##_name##_change(phba, param_val) == 0) \
109 return strlen(buf);\
110 else \
111 return -EINVAL;\
112}
113
114#define beiscsi_init_param(_name, _minval, _maxval, _defval) \
115int \
116beiscsi_##_name##_init(struct beiscsi_hba *phba, uint32_t val) \
117{ \
118 if (val >= _minval && val <= _maxval) {\
119 phba->attr_##_name = val;\
120 return 0;\
121 } \
122 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,\
123 "BA_%d beiscsi_"#_name" attribute " \
124 "cannot be updated to 0x%x, "\
125 "range allowed is ["#_minval" - "#_maxval"]\n", val);\
126 phba->attr_##_name = _defval;\
127 return -EINVAL;\
128}
129
130#define BEISCSI_RW_ATTR(_name, _minval, _maxval, _defval, _descp) \
131static uint beiscsi_##_name = _defval;\
132module_param(beiscsi_##_name, uint, S_IRUGO);\
133MODULE_PARM_DESC(beiscsi_##_name, _descp);\
134beiscsi_disp_param(_name)\
135beiscsi_change_param(_name, _minval, _maxval, _defval)\
136beiscsi_store_param(_name)\
137beiscsi_init_param(_name, _minval, _maxval, _defval)\
138DEVICE_ATTR(beiscsi_##_name, S_IRUGO | S_IWUSR,\
139 beiscsi_##_name##_disp, beiscsi_##_name##_store)
140
141/*
142 * When new log level added update the
143 * the MAX allowed value for log_enable
144 */
145BEISCSI_RW_ATTR(log_enable, 0x00,
146 0xFF, 0x00, "Enable logging Bit Mask\n"
147 "\t\t\t\tInitialization Events : 0x01\n"
148 "\t\t\t\tMailbox Events : 0x02\n"
149 "\t\t\t\tMiscellaneous Events : 0x04\n"
150 "\t\t\t\tError Handling : 0x08\n"
151 "\t\t\t\tIO Path Events : 0x10\n"
152 "\t\t\t\tConfiguration Path : 0x20\n");
153
5cac7596 154DEVICE_ATTR(beiscsi_drvr_ver, S_IRUGO, beiscsi_drvr_ver_disp, NULL);
26000db7 155DEVICE_ATTR(beiscsi_adapter_family, S_IRUGO, beiscsi_adap_family_disp, NULL);
22661e25 156DEVICE_ATTR(beiscsi_fw_ver, S_IRUGO, beiscsi_fw_ver_disp, NULL);
7ad4dfe1 157DEVICE_ATTR(beiscsi_active_cid_count, S_IRUGO, beiscsi_active_cid_disp, NULL);
99bc5d55
JSJ		 158struct device_attribute *beiscsi_attrs[] = {
159 &dev_attr_beiscsi_log_enable,
5cac7596 160 &dev_attr_beiscsi_drvr_ver,
26000db7 161 &dev_attr_beiscsi_adapter_family,
22661e25 162 &dev_attr_beiscsi_fw_ver,
7ad4dfe1 163 &dev_attr_beiscsi_active_cid_count,
99bc5d55
JSJ		 164 NULL,
165};
6733b39a 166
6763daae
JSJ		 167static char const *cqe_desc[] = {
168 "RESERVED_DESC",
169 "SOL_CMD_COMPLETE",
170 "SOL_CMD_KILLED_DATA_DIGEST_ERR",
171 "CXN_KILLED_PDU_SIZE_EXCEEDS_DSL",
172 "CXN_KILLED_BURST_LEN_MISMATCH",
173 "CXN_KILLED_AHS_RCVD",
174 "CXN_KILLED_HDR_DIGEST_ERR",
175 "CXN_KILLED_UNKNOWN_HDR",
176 "CXN_KILLED_STALE_ITT_TTT_RCVD",
177 "CXN_KILLED_INVALID_ITT_TTT_RCVD",
178 "CXN_KILLED_RST_RCVD",
179 "CXN_KILLED_TIMED_OUT",
180 "CXN_KILLED_RST_SENT",
181 "CXN_KILLED_FIN_RCVD",
182 "CXN_KILLED_BAD_UNSOL_PDU_RCVD",
183 "CXN_KILLED_BAD_WRB_INDEX_ERROR",
184 "CXN_KILLED_OVER_RUN_RESIDUAL",
185 "CXN_KILLED_UNDER_RUN_RESIDUAL",
186 "CMD_KILLED_INVALID_STATSN_RCVD",
187 "CMD_KILLED_INVALID_R2T_RCVD",
188 "CMD_CXN_KILLED_LUN_INVALID",
189 "CMD_CXN_KILLED_ICD_INVALID",
190 "CMD_CXN_KILLED_ITT_INVALID",
191 "CMD_CXN_KILLED_SEQ_OUTOFORDER",
192 "CMD_CXN_KILLED_INVALID_DATASN_RCVD",
193 "CXN_INVALIDATE_NOTIFY",
194 "CXN_INVALIDATE_INDEX_NOTIFY",
195 "CMD_INVALIDATED_NOTIFY",
196 "UNSOL_HDR_NOTIFY",
197 "UNSOL_DATA_NOTIFY",
198 "UNSOL_DATA_DIGEST_ERROR_NOTIFY",
199 "DRIVERMSG_NOTIFY",
200 "CXN_KILLED_CMND_DATA_NOT_ON_SAME_CONN",
201 "SOL_CMD_KILLED_DIF_ERR",
202 "CXN_KILLED_SYN_RCVD",
203 "CXN_KILLED_IMM_DATA_RCVD"
204};
205
6733b39a
JK		 206static int beiscsi_slave_configure(struct scsi_device *sdev)
207{
208 blk_queue_max_segment_size(sdev->request_queue, 65536);
209 return 0;
210}
211
4183122d
JK		 212static int beiscsi_eh_abort(struct scsi_cmnd *sc)
213{
214 struct iscsi_cls_session *cls_session;
215 struct iscsi_task *aborted_task = (struct iscsi_task *)sc->SCp.ptr;
216 struct beiscsi_io_task *aborted_io_task;
217 struct iscsi_conn *conn;
218 struct beiscsi_conn *beiscsi_conn;
219 struct beiscsi_hba *phba;
220 struct iscsi_session *session;
221 struct invalidate_command_table *inv_tbl;
3cbb7a74 222 struct be_dma_mem nonemb_cmd;
4183122d
JK		 223 unsigned int cid, tag, num_invalidate;
224
225 cls_session = starget_to_session(scsi_target(sc->device));
226 session = cls_session->dd_data;
227
228 spin_lock_bh(&session->lock);
229 if (!aborted_task || !aborted_task->sc) {
230 /* we raced */
231 spin_unlock_bh(&session->lock);
232 return SUCCESS;
233 }
234
235 aborted_io_task = aborted_task->dd_data;
236 if (!aborted_io_task->scsi_cmnd) {
237 /* raced or invalid command */
238 spin_unlock_bh(&session->lock);
239 return SUCCESS;
240 }
241 spin_unlock_bh(&session->lock);
242 conn = aborted_task->conn;
243 beiscsi_conn = conn->dd_data;
244 phba = beiscsi_conn->phba;
245
246 /* invalidate iocb */
247 cid = beiscsi_conn->beiscsi_conn_cid;
248 inv_tbl = phba->inv_tbl;
249 memset(inv_tbl, 0x0, sizeof(*inv_tbl));
250 inv_tbl->cid = cid;
251 inv_tbl->icd = aborted_io_task->psgl_handle->sgl_index;
252 num_invalidate = 1;
3cbb7a74
JK		 253 nonemb_cmd.va = pci_alloc_consistent(phba->ctrl.pdev,
254 sizeof(struct invalidate_commands_params_in),
255 &nonemb_cmd.dma);
256 if (nonemb_cmd.va == NULL) {
99bc5d55
JSJ		 257 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_EH,
258 "BM_%d : Failed to allocate memory for"
259 "mgmt_invalidate_icds\n");
3cbb7a74
JK		 260 return FAILED;
261 }
262 nonemb_cmd.size = sizeof(struct invalidate_commands_params_in);
263
264 tag = mgmt_invalidate_icds(phba, inv_tbl, num_invalidate,
265 cid, &nonemb_cmd);
4183122d 266 if (!tag) {
99bc5d55
JSJ		 267 beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_EH,
268 "BM_%d : mgmt_invalidate_icds could not be"
269 "submitted\n");
3cbb7a74
JK		 270 pci_free_consistent(phba->ctrl.pdev, nonemb_cmd.size,
271 nonemb_cmd.va, nonemb_cmd.dma);
272
4183122d 273 return FAILED;
4183122d 274 }
e175defe
JSJ		 275
276 beiscsi_mccq_compl(phba, tag, NULL, nonemb_cmd.va);
3cbb7a74
JK		 277 pci_free_consistent(phba->ctrl.pdev, nonemb_cmd.size,
278 nonemb_cmd.va, nonemb_cmd.dma);
4183122d
JK		 279 return iscsi_eh_abort(sc);
280}
281
282static int beiscsi_eh_device_reset(struct scsi_cmnd *sc)
283{
284 struct iscsi_task *abrt_task;
285 struct beiscsi_io_task *abrt_io_task;
286 struct iscsi_conn *conn;
287 struct beiscsi_conn *beiscsi_conn;
288 struct beiscsi_hba *phba;
289 struct iscsi_session *session;
290 struct iscsi_cls_session *cls_session;
291 struct invalidate_command_table *inv_tbl;
3cbb7a74 292 struct be_dma_mem nonemb_cmd;
4183122d 293 unsigned int cid, tag, i, num_invalidate;
4183122d
JK		 294
295 /* invalidate iocbs */
296 cls_session = starget_to_session(scsi_target(sc->device));
297 session = cls_session->dd_data;
298 spin_lock_bh(&session->lock);
db7f7709
JK		 299 if (!session->leadconn || session->state != ISCSI_STATE_LOGGED_IN) {
300 spin_unlock_bh(&session->lock);
301 return FAILED;
302 }
4183122d
JK		 303 conn = session->leadconn;
304 beiscsi_conn = conn->dd_data;
305 phba = beiscsi_conn->phba;
306 cid = beiscsi_conn->beiscsi_conn_cid;
307 inv_tbl = phba->inv_tbl;
308 memset(inv_tbl, 0x0, sizeof(*inv_tbl) * BE2_CMDS_PER_CXN);
309 num_invalidate = 0;
310 for (i = 0; i < conn->session->cmds_max; i++) {
311 abrt_task = conn->session->cmds[i];
312 abrt_io_task = abrt_task->dd_data;
313 if (!abrt_task->sc || abrt_task->state == ISCSI_TASK_FREE)
314 continue;
315
316 if (abrt_task->sc->device->lun != abrt_task->sc->device->lun)
317 continue;
318
319 inv_tbl->cid = cid;
320 inv_tbl->icd = abrt_io_task->psgl_handle->sgl_index;
321 num_invalidate++;
322 inv_tbl++;
323 }
324 spin_unlock_bh(&session->lock);
325 inv_tbl = phba->inv_tbl;
326
3cbb7a74
JK		 327 nonemb_cmd.va = pci_alloc_consistent(phba->ctrl.pdev,
328 sizeof(struct invalidate_commands_params_in),
329 &nonemb_cmd.dma);
330 if (nonemb_cmd.va == NULL) {
99bc5d55
JSJ		 331 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_EH,
332 "BM_%d : Failed to allocate memory for"
333 "mgmt_invalidate_icds\n");
3cbb7a74
JK		 334 return FAILED;
335 }
336 nonemb_cmd.size = sizeof(struct invalidate_commands_params_in);
337 memset(nonemb_cmd.va, 0, nonemb_cmd.size);
338 tag = mgmt_invalidate_icds(phba, inv_tbl, num_invalidate,
339 cid, &nonemb_cmd);
4183122d 340 if (!tag) {
99bc5d55
JSJ		 341 beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_EH,
342 "BM_%d : mgmt_invalidate_icds could not be"
343 " submitted\n");
3cbb7a74
JK		 344 pci_free_consistent(phba->ctrl.pdev, nonemb_cmd.size,
345 nonemb_cmd.va, nonemb_cmd.dma);
4183122d 346 return FAILED;
4183122d 347 }
e175defe
JSJ		 348
349 beiscsi_mccq_compl(phba, tag, NULL, nonemb_cmd.va);
3cbb7a74
JK		 350 pci_free_consistent(phba->ctrl.pdev, nonemb_cmd.size,
351 nonemb_cmd.va, nonemb_cmd.dma);
4183122d 352 return iscsi_eh_device_reset(sc);
4183122d
JK		 353}
354
c7acc5b8
JK		 355static ssize_t beiscsi_show_boot_tgt_info(void *data, int type, char *buf)
356{
357 struct beiscsi_hba *phba = data;
f457a46f
MC		 358 struct mgmt_session_info *boot_sess = &phba->boot_sess;
359 struct mgmt_conn_info *boot_conn = &boot_sess->conn_list[0];
c7acc5b8
JK		 360 char *str = buf;
361 int rc;
362
363 switch (type) {
364 case ISCSI_BOOT_TGT_NAME:
365 rc = sprintf(buf, "%.*s\n",
f457a46f
MC		 366 (int)strlen(boot_sess->target_name),
367 (char *)&boot_sess->target_name);
c7acc5b8
JK		 368 break;
369 case ISCSI_BOOT_TGT_IP_ADDR:
f457a46f 370 if (boot_conn->dest_ipaddr.ip_type == 0x1)
c7acc5b8 371 rc = sprintf(buf, "%pI4\n",
0e43895e 372 (char *)&boot_conn->dest_ipaddr.addr);
c7acc5b8
JK		 373 else
374 rc = sprintf(str, "%pI6\n",
0e43895e 375 (char *)&boot_conn->dest_ipaddr.addr);
c7acc5b8
JK		 376 break;
377 case ISCSI_BOOT_TGT_PORT:
f457a46f 378 rc = sprintf(str, "%d\n", boot_conn->dest_port);
c7acc5b8
JK		 379 break;
380
381 case ISCSI_BOOT_TGT_CHAP_NAME:
382 rc = sprintf(str, "%.*s\n",
f457a46f
MC		 383 boot_conn->negotiated_login_options.auth_data.chap.
384 target_chap_name_length,
385 (char *)&boot_conn->negotiated_login_options.
386 auth_data.chap.target_chap_name);
c7acc5b8
JK		 387 break;
388 case ISCSI_BOOT_TGT_CHAP_SECRET:
389 rc = sprintf(str, "%.*s\n",
f457a46f
MC		 390 boot_conn->negotiated_login_options.auth_data.chap.
391 target_secret_length,
392 (char *)&boot_conn->negotiated_login_options.
393 auth_data.chap.target_secret);
c7acc5b8
JK		 394 break;
395 case ISCSI_BOOT_TGT_REV_CHAP_NAME:
396 rc = sprintf(str, "%.*s\n",
f457a46f
MC		 397 boot_conn->negotiated_login_options.auth_data.chap.
398 intr_chap_name_length,
399 (char *)&boot_conn->negotiated_login_options.
400 auth_data.chap.intr_chap_name);
c7acc5b8
JK		 401 break;
402 case ISCSI_BOOT_TGT_REV_CHAP_SECRET:
f457a46f
MC		 403 rc = sprintf(str, "%.*s\n",
404 boot_conn->negotiated_login_options.auth_data.chap.
405 intr_secret_length,
406 (char *)&boot_conn->negotiated_login_options.
407 auth_data.chap.intr_secret);
c7acc5b8
JK		 408 break;
409 case ISCSI_BOOT_TGT_FLAGS:
f457a46f 410 rc = sprintf(str, "2\n");
c7acc5b8
JK		 411 break;
412 case ISCSI_BOOT_TGT_NIC_ASSOC:
f457a46f 413 rc = sprintf(str, "0\n");
c7acc5b8
JK		 414 break;
415 default:
416 rc = -ENOSYS;
417 break;
418 }
419 return rc;
420}
421
422static ssize_t beiscsi_show_boot_ini_info(void *data, int type, char *buf)
423{
424 struct beiscsi_hba *phba = data;
425 char *str = buf;
426 int rc;
427
428 switch (type) {
429 case ISCSI_BOOT_INI_INITIATOR_NAME:
430 rc = sprintf(str, "%s\n", phba->boot_sess.initiator_iscsiname);
431 break;
432 default:
433 rc = -ENOSYS;
434 break;
435 }
436 return rc;
437}
438
439static ssize_t beiscsi_show_boot_eth_info(void *data, int type, char *buf)
440{
441 struct beiscsi_hba *phba = data;
442 char *str = buf;
443 int rc;
444
445 switch (type) {
446 case ISCSI_BOOT_ETH_FLAGS:
f457a46f 447 rc = sprintf(str, "2\n");
c7acc5b8
JK		 448 break;
449 case ISCSI_BOOT_ETH_INDEX:
f457a46f 450 rc = sprintf(str, "0\n");
c7acc5b8
JK		 451 break;
452 case ISCSI_BOOT_ETH_MAC:
0e43895e
MC		 453 rc = beiscsi_get_macaddr(str, phba);
454 break;
c7acc5b8
JK		 455 default:
456 rc = -ENOSYS;
457 break;
458 }
459 return rc;
460}
461
462
587a1f16 463static umode_t beiscsi_tgt_get_attr_visibility(void *data, int type)
c7acc5b8 464{
587a1f16 465 umode_t rc;
c7acc5b8
JK		 466
467 switch (type) {
468 case ISCSI_BOOT_TGT_NAME:
469 case ISCSI_BOOT_TGT_IP_ADDR:
470 case ISCSI_BOOT_TGT_PORT:
471 case ISCSI_BOOT_TGT_CHAP_NAME:
472 case ISCSI_BOOT_TGT_CHAP_SECRET:
473 case ISCSI_BOOT_TGT_REV_CHAP_NAME:
474 case ISCSI_BOOT_TGT_REV_CHAP_SECRET:
475 case ISCSI_BOOT_TGT_NIC_ASSOC:
476 case ISCSI_BOOT_TGT_FLAGS:
477 rc = S_IRUGO;
478 break;
479 default:
480 rc = 0;
481 break;
482 }
483 return rc;
484}
485
587a1f16 486static umode_t beiscsi_ini_get_attr_visibility(void *data, int type)
c7acc5b8 487{
587a1f16 488 umode_t rc;
c7acc5b8
JK		 489
490 switch (type) {
491 case ISCSI_BOOT_INI_INITIATOR_NAME:
492 rc = S_IRUGO;
493 break;
494 default:
495 rc = 0;
496 break;
497 }
498 return rc;
499}
500
501
587a1f16 502static umode_t beiscsi_eth_get_attr_visibility(void *data, int type)
c7acc5b8 503{
587a1f16 504 umode_t rc;
c7acc5b8
JK		 505
506 switch (type) {
507 case ISCSI_BOOT_ETH_FLAGS:
508 case ISCSI_BOOT_ETH_MAC:
509 case ISCSI_BOOT_ETH_INDEX:
510 rc = S_IRUGO;
511 break;
512 default:
513 rc = 0;
514 break;
515 }
516 return rc;
517}
518
bfead3b2
JK		 519/*------------------- PCI Driver operations and data ----------------- */
520static DEFINE_PCI_DEVICE_TABLE(beiscsi_pci_id_table) = {
521 { PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID1) },
f98c96b0 522 { PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID2) },
bfead3b2
JK		 523 { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID1) },
524 { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID2) },
525 { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID3) },
139a1b1e 526 { PCI_DEVICE(ELX_VENDOR_ID, OC_SKH_ID1) },
bfead3b2
JK		 527 { 0 }
528};
529MODULE_DEVICE_TABLE(pci, beiscsi_pci_id_table);
530
99bc5d55 531
6733b39a
JK		 532static struct scsi_host_template beiscsi_sht = {
533 .module = THIS_MODULE,
2f635883 534 .name = "Emulex 10Gbe open-iscsi Initiator Driver",
6733b39a
JK		 535 .proc_name = DRV_NAME,
536 .queuecommand = iscsi_queuecommand,
6733b39a
JK		 537 .change_queue_depth = iscsi_change_queue_depth,
538 .slave_configure = beiscsi_slave_configure,
539 .target_alloc = iscsi_target_alloc,
4183122d
JK		 540 .eh_abort_handler = beiscsi_eh_abort,
541 .eh_device_reset_handler = beiscsi_eh_device_reset,
309ce156 542 .eh_target_reset_handler = iscsi_eh_session_reset,
99bc5d55 543 .shost_attrs = beiscsi_attrs,
6733b39a
JK		 544 .sg_tablesize = BEISCSI_SGLIST_ELEMENTS,
545 .can_queue = BE2_IO_DEPTH,
546 .this_id = -1,
547 .max_sectors = BEISCSI_MAX_SECTORS,
548 .cmd_per_lun = BEISCSI_CMD_PER_LUN,
549 .use_clustering = ENABLE_CLUSTERING,
ffce3e2e
JK		 550 .vendor_id = SCSI_NL_VID_TYPE_PCI | BE_VENDOR_ID,
551
6733b39a 552};
6733b39a 553
bfead3b2 554static struct scsi_transport_template *beiscsi_scsi_transport;
6733b39a
JK		 555
556static struct beiscsi_hba *beiscsi_hba_alloc(struct pci_dev *pcidev)
557{
558 struct beiscsi_hba *phba;
559 struct Scsi_Host *shost;
560
561 shost = iscsi_host_alloc(&beiscsi_sht, sizeof(*phba), 0);
562 if (!shost) {
99bc5d55
JSJ		 563 dev_err(&pcidev->dev,
564 "beiscsi_hba_alloc - iscsi_host_alloc failed\n");
6733b39a
JK		 565 return NULL;
566 }
567 shost->dma_boundary = pcidev->dma_mask;
568 shost->max_id = BE2_MAX_SESSIONS;
569 shost->max_channel = 0;
570 shost->max_cmd_len = BEISCSI_MAX_CMD_LEN;
571 shost->max_lun = BEISCSI_NUM_MAX_LUN;
572 shost->transportt = beiscsi_scsi_transport;
6733b39a
JK		 573 phba = iscsi_host_priv(shost);
574 memset(phba, 0, sizeof(*phba));
575 phba->shost = shost;
576 phba->pcidev = pci_dev_get(pcidev);
2807afb7 577 pci_set_drvdata(pcidev, phba);
0e43895e 578 phba->interface_handle = 0xFFFFFFFF;
6733b39a
JK		 579
580 if (iscsi_host_add(shost, &phba->pcidev->dev))
581 goto free_devices;
c7acc5b8 582
6733b39a
JK		 583 return phba;
584
585free_devices:
586 pci_dev_put(phba->pcidev);
587 iscsi_host_free(phba->shost);
588 return NULL;
589}
590
591static void beiscsi_unmap_pci_function(struct beiscsi_hba *phba)
592{
593 if (phba->csr_va) {
594 iounmap(phba->csr_va);
595 phba->csr_va = NULL;
596 }
597 if (phba->db_va) {
598 iounmap(phba->db_va);
599 phba->db_va = NULL;
600 }
601 if (phba->pci_va) {
602 iounmap(phba->pci_va);
603 phba->pci_va = NULL;
604 }
605}
606
607static int beiscsi_map_pci_bars(struct beiscsi_hba *phba,
608 struct pci_dev *pcidev)
609{
610 u8 __iomem *addr;
f98c96b0 611 int pcicfg_reg;
6733b39a
JK		 612
613 addr = ioremap_nocache(pci_resource_start(pcidev, 2),
614 pci_resource_len(pcidev, 2));
615 if (addr == NULL)
616 return -ENOMEM;
617 phba->ctrl.csr = addr;
618 phba->csr_va = addr;
619 phba->csr_pa.u.a64.address = pci_resource_start(pcidev, 2);
620
621 addr = ioremap_nocache(pci_resource_start(pcidev, 4), 128 * 1024);
622 if (addr == NULL)
623 goto pci_map_err;
624 phba->ctrl.db = addr;
625 phba->db_va = addr;
626 phba->db_pa.u.a64.address = pci_resource_start(pcidev, 4);
627
f98c96b0
JK		 628 if (phba->generation == BE_GEN2)
629 pcicfg_reg = 1;
630 else
631 pcicfg_reg = 0;
632
633 addr = ioremap_nocache(pci_resource_start(pcidev, pcicfg_reg),
634 pci_resource_len(pcidev, pcicfg_reg));
635
6733b39a
JK		 636 if (addr == NULL)
637 goto pci_map_err;
638 phba->ctrl.pcicfg = addr;
639 phba->pci_va = addr;
f98c96b0 640 phba->pci_pa.u.a64.address = pci_resource_start(pcidev, pcicfg_reg);
6733b39a
JK		 641 return 0;
642
643pci_map_err:
644 beiscsi_unmap_pci_function(phba);
645 return -ENOMEM;
646}
647
648static int beiscsi_enable_pci(struct pci_dev *pcidev)
649{
650 int ret;
651
652 ret = pci_enable_device(pcidev);
653 if (ret) {
99bc5d55
JSJ		 654 dev_err(&pcidev->dev,
655 "beiscsi_enable_pci - enable device failed\n");
6733b39a
JK		 656 return ret;
657 }
658
bfead3b2 659 pci_set_master(pcidev);
6733b39a
JK		 660 if (pci_set_consistent_dma_mask(pcidev, DMA_BIT_MASK(64))) {
661 ret = pci_set_consistent_dma_mask(pcidev, DMA_BIT_MASK(32));
662 if (ret) {
663 dev_err(&pcidev->dev, "Could not set PCI DMA Mask\n");
664 pci_disable_device(pcidev);
665 return ret;
666 }
667 }
668 return 0;
669}
670
671static int be_ctrl_init(struct beiscsi_hba *phba, struct pci_dev *pdev)
672{
673 struct be_ctrl_info *ctrl = &phba->ctrl;
674 struct be_dma_mem *mbox_mem_alloc = &ctrl->mbox_mem_alloced;
675 struct be_dma_mem *mbox_mem_align = &ctrl->mbox_mem;
676 int status = 0;
677
678 ctrl->pdev = pdev;
679 status = beiscsi_map_pci_bars(phba, pdev);
680 if (status)
681 return status;
6733b39a
JK		 682 mbox_mem_alloc->size = sizeof(struct be_mcc_mailbox) + 16;
683 mbox_mem_alloc->va = pci_alloc_consistent(pdev,
684 mbox_mem_alloc->size,
685 &mbox_mem_alloc->dma);
686 if (!mbox_mem_alloc->va) {
687 beiscsi_unmap_pci_function(phba);
a49e06d5 688 return -ENOMEM;
6733b39a
JK		 689 }
690
691 mbox_mem_align->size = sizeof(struct be_mcc_mailbox);
692 mbox_mem_align->va = PTR_ALIGN(mbox_mem_alloc->va, 16);
693 mbox_mem_align->dma = PTR_ALIGN(mbox_mem_alloc->dma, 16);
694 memset(mbox_mem_align->va, 0, sizeof(struct be_mcc_mailbox));
695 spin_lock_init(&ctrl->mbox_lock);
bfead3b2
JK		 696 spin_lock_init(&phba->ctrl.mcc_lock);
697 spin_lock_init(&phba->ctrl.mcc_cq_lock);
698
6733b39a
JK		 699 return status;
700}
701
843ae752
JK		 702/**
703 * beiscsi_get_params()- Set the config paramters
704 * @phba: ptr device priv structure
705 **/
6733b39a
JK		 706static void beiscsi_get_params(struct beiscsi_hba *phba)
707{
843ae752
JK		 708 uint32_t total_cid_count = 0;
709 uint32_t total_icd_count = 0;
710 uint8_t ulp_num = 0;
711
712 total_cid_count = BEISCSI_GET_CID_COUNT(phba, BEISCSI_ULP0) +
713 BEISCSI_GET_CID_COUNT(phba, BEISCSI_ULP1);
714
715 for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++)
716 if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
717 total_icd_count = phba->fw_config.
718 iscsi_icd_count[ulp_num];
719 break;
720 }
721
722 phba->params.ios_per_ctrl = (total_icd_count -
723 (total_cid_count +
724 BE2_TMFS + BE2_NOPOUT_REQ));
725 phba->params.cxns_per_ctrl = total_cid_count;
726 phba->params.asyncpdus_per_ctrl = total_cid_count;
727 phba->params.icds_per_ctrl = total_icd_count;
6733b39a
JK		 728 phba->params.num_sge_per_io = BE2_SGE;
729 phba->params.defpdu_hdr_sz = BE2_DEFPDU_HDR_SZ;
730 phba->params.defpdu_data_sz = BE2_DEFPDU_DATA_SZ;
731 phba->params.eq_timer = 64;
843ae752
JK		 732 phba->params.num_eq_entries = 1024;
733 phba->params.num_cq_entries = 1024;
6733b39a
JK		 734 phba->params.wrbs_per_cxn = 256;
735}
736
737static void hwi_ring_eq_db(struct beiscsi_hba *phba,
738 unsigned int id, unsigned int clr_interrupt,
739 unsigned int num_processed,
740 unsigned char rearm, unsigned char event)
741{
742 u32 val = 0;
743 val |= id & DB_EQ_RING_ID_MASK;
744 if (rearm)
745 val |= 1 << DB_EQ_REARM_SHIFT;
746 if (clr_interrupt)
747 val |= 1 << DB_EQ_CLR_SHIFT;
748 if (event)
749 val |= 1 << DB_EQ_EVNT_SHIFT;
750 val |= num_processed << DB_EQ_NUM_POPPED_SHIFT;
751 iowrite32(val, phba->db_va + DB_EQ_OFFSET);
752}
753
bfead3b2
JK		 754/**
755 * be_isr_mcc - The isr routine of the driver.
756 * @irq: Not used
757 * @dev_id: Pointer to host adapter structure
758 */
759static irqreturn_t be_isr_mcc(int irq, void *dev_id)
760{
761 struct beiscsi_hba *phba;
762 struct be_eq_entry *eqe = NULL;
763 struct be_queue_info *eq;
764 struct be_queue_info *mcc;
765 unsigned int num_eq_processed;
766 struct be_eq_obj *pbe_eq;
767 unsigned long flags;
768
769 pbe_eq = dev_id;
770 eq = &pbe_eq->q;
771 phba = pbe_eq->phba;
772 mcc = &phba->ctrl.mcc_obj.cq;
773 eqe = queue_tail_node(eq);
bfead3b2
JK		 774
775 num_eq_processed = 0;
776
777 while (eqe->dw[offsetof(struct amap_eq_entry, valid) / 32]
778 & EQE_VALID_MASK) {
779 if (((eqe->dw[offsetof(struct amap_eq_entry,
780 resource_id) / 32] &
781 EQE_RESID_MASK) >> 16) == mcc->id) {
782 spin_lock_irqsave(&phba->isr_lock, flags);
72fb46a9 783 pbe_eq->todo_mcc_cq = true;
bfead3b2
JK		 784 spin_unlock_irqrestore(&phba->isr_lock, flags);
785 }
786 AMAP_SET_BITS(struct amap_eq_entry, valid, eqe, 0);
787 queue_tail_inc(eq);
788 eqe = queue_tail_node(eq);
789 num_eq_processed++;
790 }
72fb46a9
JSJ		 791 if (pbe_eq->todo_mcc_cq)
792 queue_work(phba->wq, &pbe_eq->work_cqs);
bfead3b2
JK		 793 if (num_eq_processed)
794 hwi_ring_eq_db(phba, eq->id, 1, num_eq_processed, 1, 1);
795
796 return IRQ_HANDLED;
797}
798
799/**
800 * be_isr_msix - The isr routine of the driver.
801 * @irq: Not used
802 * @dev_id: Pointer to host adapter structure
803 */
804static irqreturn_t be_isr_msix(int irq, void *dev_id)
805{
806 struct beiscsi_hba *phba;
807 struct be_eq_entry *eqe = NULL;
808 struct be_queue_info *eq;
809 struct be_queue_info *cq;
810 unsigned int num_eq_processed;
811 struct be_eq_obj *pbe_eq;
812 unsigned long flags;
813
814 pbe_eq = dev_id;
815 eq = &pbe_eq->q;
816 cq = pbe_eq->cq;
817 eqe = queue_tail_node(eq);
bfead3b2
JK		 818
819 phba = pbe_eq->phba;
820 num_eq_processed = 0;
821 if (blk_iopoll_enabled) {
822 while (eqe->dw[offsetof(struct amap_eq_entry, valid) / 32]
823 & EQE_VALID_MASK) {
824 if (!blk_iopoll_sched_prep(&pbe_eq->iopoll))
825 blk_iopoll_sched(&pbe_eq->iopoll);
826
827 AMAP_SET_BITS(struct amap_eq_entry, valid, eqe, 0);
828 queue_tail_inc(eq);
829 eqe = queue_tail_node(eq);
830 num_eq_processed++;
831 }
bfead3b2
JK		 832 } else {
833 while (eqe->dw[offsetof(struct amap_eq_entry, valid) / 32]
834 & EQE_VALID_MASK) {
835 spin_lock_irqsave(&phba->isr_lock, flags);
72fb46a9 836 pbe_eq->todo_cq = true;
bfead3b2
JK		 837 spin_unlock_irqrestore(&phba->isr_lock, flags);
838 AMAP_SET_BITS(struct amap_eq_entry, valid, eqe, 0);
839 queue_tail_inc(eq);
840 eqe = queue_tail_node(eq);
841 num_eq_processed++;
842 }
bfead3b2 843
72fb46a9
JSJ		 844 if (pbe_eq->todo_cq)
845 queue_work(phba->wq, &pbe_eq->work_cqs);
bfead3b2 846 }
72fb46a9
JSJ		 847
848 if (num_eq_processed)
849 hwi_ring_eq_db(phba, eq->id, 1, num_eq_processed, 0, 1);
850
851 return IRQ_HANDLED;
bfead3b2
JK		 852}
853
6733b39a
JK		 854/**
855 * be_isr - The isr routine of the driver.
856 * @irq: Not used
857 * @dev_id: Pointer to host adapter structure
858 */
859static irqreturn_t be_isr(int irq, void *dev_id)
860{
861 struct beiscsi_hba *phba;
862 struct hwi_controller *phwi_ctrlr;
863 struct hwi_context_memory *phwi_context;
864 struct be_eq_entry *eqe = NULL;
865 struct be_queue_info *eq;
866 struct be_queue_info *cq;
bfead3b2 867 struct be_queue_info *mcc;
6733b39a 868 unsigned long flags, index;
bfead3b2 869 unsigned int num_mcceq_processed, num_ioeq_processed;
6733b39a 870 struct be_ctrl_info *ctrl;
bfead3b2 871 struct be_eq_obj *pbe_eq;
6733b39a
JK		 872 int isr;
873
874 phba = dev_id;
6eab04a8 875 ctrl = &phba->ctrl;
bfead3b2
JK		 876 isr = ioread32(ctrl->csr + CEV_ISR0_OFFSET +
877 (PCI_FUNC(ctrl->pdev->devfn) * CEV_ISR_SIZE));
878 if (!isr)
879 return IRQ_NONE;
6733b39a
JK		 880
881 phwi_ctrlr = phba->phwi_ctrlr;
882 phwi_context = phwi_ctrlr->phwi_ctxt;
bfead3b2
JK		 883 pbe_eq = &phwi_context->be_eq[0];
884
885 eq = &phwi_context->be_eq[0].q;
886 mcc = &phba->ctrl.mcc_obj.cq;
6733b39a
JK		 887 index = 0;
888 eqe = queue_tail_node(eq);
6733b39a 889
bfead3b2
JK		 890 num_ioeq_processed = 0;
891 num_mcceq_processed = 0;
6733b39a
JK		 892 if (blk_iopoll_enabled) {
893 while (eqe->dw[offsetof(struct amap_eq_entry, valid) / 32]
894 & EQE_VALID_MASK) {
bfead3b2
JK		 895 if (((eqe->dw[offsetof(struct amap_eq_entry,
896 resource_id) / 32] &
897 EQE_RESID_MASK) >> 16) == mcc->id) {
898 spin_lock_irqsave(&phba->isr_lock, flags);
72fb46a9 899 pbe_eq->todo_mcc_cq = true;
bfead3b2
JK		 900 spin_unlock_irqrestore(&phba->isr_lock, flags);
901 num_mcceq_processed++;
902 } else {
903 if (!blk_iopoll_sched_prep(&pbe_eq->iopoll))
904 blk_iopoll_sched(&pbe_eq->iopoll);
905 num_ioeq_processed++;
906 }
6733b39a
JK		 907 AMAP_SET_BITS(struct amap_eq_entry, valid, eqe, 0);
908 queue_tail_inc(eq);
909 eqe = queue_tail_node(eq);
6733b39a 910 }
bfead3b2 911 if (num_ioeq_processed || num_mcceq_processed) {
72fb46a9
JSJ		 912 if (pbe_eq->todo_mcc_cq)
913 queue_work(phba->wq, &pbe_eq->work_cqs);
bfead3b2 914
756d29c8 915 if ((num_mcceq_processed) && (!num_ioeq_processed))
bfead3b2
JK		 916 hwi_ring_eq_db(phba, eq->id, 0,
917 (num_ioeq_processed +
918 num_mcceq_processed) , 1, 1);
919 else
920 hwi_ring_eq_db(phba, eq->id, 0,
921 (num_ioeq_processed +
922 num_mcceq_processed), 0, 1);
923
6733b39a
JK		 924 return IRQ_HANDLED;
925 } else
926 return IRQ_NONE;
927 } else {
bfead3b2 928 cq = &phwi_context->be_cq[0];
6733b39a
JK		 929 while (eqe->dw[offsetof(struct amap_eq_entry, valid) / 32]
930 & EQE_VALID_MASK) {
931
932 if (((eqe->dw[offsetof(struct amap_eq_entry,
933 resource_id) / 32] &
934 EQE_RESID_MASK) >> 16) != cq->id) {
935 spin_lock_irqsave(&phba->isr_lock, flags);
72fb46a9 936 pbe_eq->todo_mcc_cq = true;
6733b39a
JK		 937 spin_unlock_irqrestore(&phba->isr_lock, flags);
938 } else {
939 spin_lock_irqsave(&phba->isr_lock, flags);
72fb46a9 940 pbe_eq->todo_cq = true;
6733b39a
JK		 941 spin_unlock_irqrestore(&phba->isr_lock, flags);
942 }
943 AMAP_SET_BITS(struct amap_eq_entry, valid, eqe, 0);
944 queue_tail_inc(eq);
945 eqe = queue_tail_node(eq);
bfead3b2 946 num_ioeq_processed++;
6733b39a 947 }
72fb46a9
JSJ		 948 if (pbe_eq->todo_cq || pbe_eq->todo_mcc_cq)
949 queue_work(phba->wq, &pbe_eq->work_cqs);
6733b39a 950
bfead3b2
JK		 951 if (num_ioeq_processed) {
952 hwi_ring_eq_db(phba, eq->id, 0,
953 num_ioeq_processed, 1, 1);
6733b39a
JK		 954 return IRQ_HANDLED;
955 } else
956 return IRQ_NONE;
957 }
958}
959
960static int beiscsi_init_irqs(struct beiscsi_hba *phba)
961{
962 struct pci_dev *pcidev = phba->pcidev;
bfead3b2
JK		 963 struct hwi_controller *phwi_ctrlr;
964 struct hwi_context_memory *phwi_context;
4f5af07e 965 int ret, msix_vec, i, j;
6733b39a 966
bfead3b2
JK		 967 phwi_ctrlr = phba->phwi_ctrlr;
968 phwi_context = phwi_ctrlr->phwi_ctxt;
969
970 if (phba->msix_enabled) {
971 for (i = 0; i < phba->num_cpus; i++) {
8fcfb210
JK		 972 phba->msi_name[i] = kzalloc(BEISCSI_MSI_NAME,
973 GFP_KERNEL);
974 if (!phba->msi_name[i]) {
975 ret = -ENOMEM;
976 goto free_msix_irqs;
977 }
978
979 sprintf(phba->msi_name[i], "beiscsi_%02x_%02x",
980 phba->shost->host_no, i);
bfead3b2 981 msix_vec = phba->msix_entries[i].vector;
8fcfb210
JK		 982 ret = request_irq(msix_vec, be_isr_msix, 0,
983 phba->msi_name[i],
bfead3b2 984 &phwi_context->be_eq[i]);
4f5af07e 985 if (ret) {
99bc5d55
JSJ		 986 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
987 "BM_%d : beiscsi_init_irqs-Failed to"
988 "register msix for i = %d\n",
989 i);
8fcfb210 990 kfree(phba->msi_name[i]);
4f5af07e
JK		 991 goto free_msix_irqs;
992 }
bfead3b2 993 }
8fcfb210
JK		 994 phba->msi_name[i] = kzalloc(BEISCSI_MSI_NAME, GFP_KERNEL);
995 if (!phba->msi_name[i]) {
996 ret = -ENOMEM;
997 goto free_msix_irqs;
998 }
999 sprintf(phba->msi_name[i], "beiscsi_mcc_%02x",
1000 phba->shost->host_no);
bfead3b2 1001 msix_vec = phba->msix_entries[i].vector;
8fcfb210 1002 ret = request_irq(msix_vec, be_isr_mcc, 0, phba->msi_name[i],
bfead3b2 1003 &phwi_context->be_eq[i]);
4f5af07e 1004 if (ret) {
99bc5d55
JSJ		 1005 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT ,
1006 "BM_%d : beiscsi_init_irqs-"
1007 "Failed to register beiscsi_msix_mcc\n");
8fcfb210 1008 kfree(phba->msi_name[i]);
4f5af07e
JK		 1009 goto free_msix_irqs;
1010 }
1011
bfead3b2
JK		 1012 } else {
1013 ret = request_irq(pcidev->irq, be_isr, IRQF_SHARED,
1014 "beiscsi", phba);
1015 if (ret) {
99bc5d55
JSJ		 1016 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
1017 "BM_%d : beiscsi_init_irqs-"
1018 "Failed to register irq\\n");
bfead3b2
JK		 1019 return ret;
1020 }
6733b39a
JK		 1021 }
1022 return 0;
4f5af07e 1023free_msix_irqs:
8fcfb210
JK		 1024 for (j = i - 1; j >= 0; j--) {
1025 kfree(phba->msi_name[j]);
1026 msix_vec = phba->msix_entries[j].vector;
4f5af07e 1027 free_irq(msix_vec, &phwi_context->be_eq[j]);
8fcfb210 1028 }
4f5af07e 1029 return ret;
6733b39a
JK		 1030}
1031
1032static void hwi_ring_cq_db(struct beiscsi_hba *phba,
1033 unsigned int id, unsigned int num_processed,
1034 unsigned char rearm, unsigned char event)
1035{
1036 u32 val = 0;
1037 val |= id & DB_CQ_RING_ID_MASK;
1038 if (rearm)
1039 val |= 1 << DB_CQ_REARM_SHIFT;
1040 val |= num_processed << DB_CQ_NUM_POPPED_SHIFT;
1041 iowrite32(val, phba->db_va + DB_CQ_OFFSET);
1042}
1043
6733b39a
JK		 1044static unsigned int
1045beiscsi_process_async_pdu(struct beiscsi_conn *beiscsi_conn,
1046 struct beiscsi_hba *phba,
6733b39a
JK		 1047 struct pdu_base *ppdu,
1048 unsigned long pdu_len,
1049 void *pbuffer, unsigned long buf_len)
1050{
1051 struct iscsi_conn *conn = beiscsi_conn->conn;
1052 struct iscsi_session *session = conn->session;
bfead3b2
JK		 1053 struct iscsi_task *task;
1054 struct beiscsi_io_task *io_task;
1055 struct iscsi_hdr *login_hdr;
6733b39a
JK		 1056
1057 switch (ppdu->dw[offsetof(struct amap_pdu_base, opcode) / 32] &
1058 PDUBASE_OPCODE_MASK) {
1059 case ISCSI_OP_NOOP_IN:
1060 pbuffer = NULL;
1061 buf_len = 0;
1062 break;
1063 case ISCSI_OP_ASYNC_EVENT:
1064 break;
1065 case ISCSI_OP_REJECT:
1066 WARN_ON(!pbuffer);
1067 WARN_ON(!(buf_len == 48));
99bc5d55
JSJ		 1068 beiscsi_log(phba, KERN_ERR,
1069 BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
1070 "BM_%d : In ISCSI_OP_REJECT\n");
6733b39a
JK		 1071 break;
1072 case ISCSI_OP_LOGIN_RSP:
7bd6e25c 1073 case ISCSI_OP_TEXT_RSP:
bfead3b2
JK		 1074 task = conn->login_task;
1075 io_task = task->dd_data;
1076 login_hdr = (struct iscsi_hdr *)ppdu;
1077 login_hdr->itt = io_task->libiscsi_itt;
6733b39a
JK		 1078 break;
1079 default:
99bc5d55
JSJ		 1080 beiscsi_log(phba, KERN_WARNING,
1081 BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
1082 "BM_%d : Unrecognized opcode 0x%x in async msg\n",
1083 (ppdu->
6733b39a 1084 dw[offsetof(struct amap_pdu_base, opcode) / 32]
99bc5d55 1085 & PDUBASE_OPCODE_MASK));
6733b39a
JK		 1086 return 1;
1087 }
1088
1089 spin_lock_bh(&session->lock);
1090 __iscsi_complete_pdu(conn, (struct iscsi_hdr *)ppdu, pbuffer, buf_len);
1091 spin_unlock_bh(&session->lock);
1092 return 0;
1093}
1094
1095static struct sgl_handle *alloc_io_sgl_handle(struct beiscsi_hba *phba)
1096{
1097 struct sgl_handle *psgl_handle;
1098
1099 if (phba->io_sgl_hndl_avbl) {
99bc5d55
JSJ		 1100 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_IO,
1101 "BM_%d : In alloc_io_sgl_handle,"
1102 " io_sgl_alloc_index=%d\n",
1103 phba->io_sgl_alloc_index);
1104
6733b39a
JK		 1105 psgl_handle = phba->io_sgl_hndl_base[phba->
1106 io_sgl_alloc_index];
1107 phba->io_sgl_hndl_base[phba->io_sgl_alloc_index] = NULL;
1108 phba->io_sgl_hndl_avbl--;
bfead3b2
JK		 1109 if (phba->io_sgl_alloc_index == (phba->params.
1110 ios_per_ctrl - 1))
6733b39a
JK		 1111 phba->io_sgl_alloc_index = 0;
1112 else
1113 phba->io_sgl_alloc_index++;
1114 } else
1115 psgl_handle = NULL;
1116 return psgl_handle;
1117}
1118
1119static void
1120free_io_sgl_handle(struct beiscsi_hba *phba, struct sgl_handle *psgl_handle)
1121{
99bc5d55
JSJ		 1122 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_IO,
1123 "BM_%d : In free_,io_sgl_free_index=%d\n",
1124 phba->io_sgl_free_index);
1125
6733b39a
JK		 1126 if (phba->io_sgl_hndl_base[phba->io_sgl_free_index]) {
1127 /*
1128 * this can happen if clean_task is called on a task that
1129 * failed in xmit_task or alloc_pdu.
1130 */
99bc5d55
JSJ		 1131 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_IO,
1132 "BM_%d : Double Free in IO SGL io_sgl_free_index=%d,"
1133 "value there=%p\n", phba->io_sgl_free_index,
1134 phba->io_sgl_hndl_base
1135 [phba->io_sgl_free_index]);
6733b39a
JK		 1136 return;
1137 }
1138 phba->io_sgl_hndl_base[phba->io_sgl_free_index] = psgl_handle;
1139 phba->io_sgl_hndl_avbl++;
1140 if (phba->io_sgl_free_index == (phba->params.ios_per_ctrl - 1))
1141 phba->io_sgl_free_index = 0;
1142 else
1143 phba->io_sgl_free_index++;
1144}
1145
1146/**
1147 * alloc_wrb_handle - To allocate a wrb handle
1148 * @phba: The hba pointer
1149 * @cid: The cid to use for allocation
6733b39a
JK		 1150 *
1151 * This happens under session_lock until submission to chip
1152 */
d5431488 1153struct wrb_handle *alloc_wrb_handle(struct beiscsi_hba *phba, unsigned int cid)
6733b39a
JK		 1154{
1155 struct hwi_wrb_context *pwrb_context;
1156 struct hwi_controller *phwi_ctrlr;
d5431488 1157 struct wrb_handle *pwrb_handle, *pwrb_handle_tmp;
a7909b39 1158 uint16_t cri_index = BE_GET_CRI_FROM_CID(cid);
6733b39a
JK		 1159
1160 phwi_ctrlr = phba->phwi_ctrlr;
a7909b39 1161 pwrb_context = &phwi_ctrlr->wrb_context[cri_index];
d5431488 1162 if (pwrb_context->wrb_handles_available >= 2) {
bfead3b2
JK		 1163 pwrb_handle = pwrb_context->pwrb_handle_base[
1164 pwrb_context->alloc_index];
1165 pwrb_context->wrb_handles_available--;
bfead3b2
JK		 1166 if (pwrb_context->alloc_index ==
1167 (phba->params.wrbs_per_cxn - 1))
1168 pwrb_context->alloc_index = 0;
1169 else
1170 pwrb_context->alloc_index++;
d5431488
JK		 1171 pwrb_handle_tmp = pwrb_context->pwrb_handle_base[
1172 pwrb_context->alloc_index];
1173 pwrb_handle->nxt_wrb_index = pwrb_handle_tmp->wrb_index;
bfead3b2
JK		 1174 } else
1175 pwrb_handle = NULL;
6733b39a
JK		 1176 return pwrb_handle;
1177}
1178
1179/**
1180 * free_wrb_handle - To free the wrb handle back to pool
1181 * @phba: The hba pointer
1182 * @pwrb_context: The context to free from
1183 * @pwrb_handle: The wrb_handle to free
1184 *
1185 * This happens under session_lock until submission to chip
1186 */
1187static void
1188free_wrb_handle(struct beiscsi_hba *phba, struct hwi_wrb_context *pwrb_context,
1189 struct wrb_handle *pwrb_handle)
1190{
32951dd8 1191 pwrb_context->pwrb_handle_base[pwrb_context->free_index] = pwrb_handle;
bfead3b2
JK		 1192 pwrb_context->wrb_handles_available++;
1193 if (pwrb_context->free_index == (phba->params.wrbs_per_cxn - 1))
1194 pwrb_context->free_index = 0;
1195 else
1196 pwrb_context->free_index++;
1197
99bc5d55
JSJ		 1198 beiscsi_log(phba, KERN_INFO,
1199 BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
1200 "BM_%d : FREE WRB: pwrb_handle=%p free_index=0x%x"
1201 "wrb_handles_available=%d\n",
1202 pwrb_handle, pwrb_context->free_index,
1203 pwrb_context->wrb_handles_available);
6733b39a
JK		 1204}
1205
1206static struct sgl_handle *alloc_mgmt_sgl_handle(struct beiscsi_hba *phba)
1207{
1208 struct sgl_handle *psgl_handle;
1209
1210 if (phba->eh_sgl_hndl_avbl) {
1211 psgl_handle = phba->eh_sgl_hndl_base[phba->eh_sgl_alloc_index];
1212 phba->eh_sgl_hndl_base[phba->eh_sgl_alloc_index] = NULL;
99bc5d55
JSJ		 1213 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_CONFIG,
1214 "BM_%d : mgmt_sgl_alloc_index=%d=0x%x\n",
1215 phba->eh_sgl_alloc_index,
1216 phba->eh_sgl_alloc_index);
1217
6733b39a
JK		 1218 phba->eh_sgl_hndl_avbl--;
1219 if (phba->eh_sgl_alloc_index ==
1220 (phba->params.icds_per_ctrl - phba->params.ios_per_ctrl -
1221 1))
1222 phba->eh_sgl_alloc_index = 0;
1223 else
1224 phba->eh_sgl_alloc_index++;
1225 } else
1226 psgl_handle = NULL;
1227 return psgl_handle;
1228}
1229
1230void
1231free_mgmt_sgl_handle(struct beiscsi_hba *phba, struct sgl_handle *psgl_handle)
1232{
1233
99bc5d55
JSJ		 1234 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_CONFIG,
1235 "BM_%d : In free_mgmt_sgl_handle,"
1236 "eh_sgl_free_index=%d\n",
1237 phba->eh_sgl_free_index);
1238
6733b39a
JK		 1239 if (phba->eh_sgl_hndl_base[phba->eh_sgl_free_index]) {
1240 /*
1241 * this can happen if clean_task is called on a task that
1242 * failed in xmit_task or alloc_pdu.
1243 */
99bc5d55
JSJ		 1244 beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_CONFIG,
1245 "BM_%d : Double Free in eh SGL ,"
1246 "eh_sgl_free_index=%d\n",
1247 phba->eh_sgl_free_index);
6733b39a
JK		 1248 return;
1249 }
1250 phba->eh_sgl_hndl_base[phba->eh_sgl_free_index] = psgl_handle;
1251 phba->eh_sgl_hndl_avbl++;
1252 if (phba->eh_sgl_free_index ==
1253 (phba->params.icds_per_ctrl - phba->params.ios_per_ctrl - 1))
1254 phba->eh_sgl_free_index = 0;
1255 else
1256 phba->eh_sgl_free_index++;
1257}
1258
1259static void
1260be_complete_io(struct beiscsi_conn *beiscsi_conn,
73133261
JSJ		 1261 struct iscsi_task *task,
1262 struct common_sol_cqe *csol_cqe)
6733b39a
JK		 1263{
1264 struct beiscsi_io_task *io_task = task->dd_data;
1265 struct be_status_bhs *sts_bhs =
1266 (struct be_status_bhs *)io_task->cmd_bhs;
1267 struct iscsi_conn *conn = beiscsi_conn->conn;
6733b39a
JK		 1268 unsigned char *sense;
1269 u32 resid = 0, exp_cmdsn, max_cmdsn;
1270 u8 rsp, status, flags;
1271
73133261
JSJ		 1272 exp_cmdsn = csol_cqe->exp_cmdsn;
1273 max_cmdsn = (csol_cqe->exp_cmdsn +
1274 csol_cqe->cmd_wnd - 1);
1275 rsp = csol_cqe->i_resp;
1276 status = csol_cqe->i_sts;
1277 flags = csol_cqe->i_flags;
1278 resid = csol_cqe->res_cnt;
1279
bd535451
JK		 1280 if (!task->sc) {
1281 if (io_task->scsi_cmnd)
1282 scsi_dma_unmap(io_task->scsi_cmnd);
6733b39a 1283
bd535451
JK		 1284 return;
1285 }
6733b39a
JK		 1286 task->sc->result = (DID_OK << 16) | status;
1287 if (rsp != ISCSI_STATUS_CMD_COMPLETED) {
1288 task->sc->result = DID_ERROR << 16;
1289 goto unmap;
1290 }
1291
1292 /* bidi not initially supported */
1293 if (flags & (ISCSI_FLAG_CMD_UNDERFLOW | ISCSI_FLAG_CMD_OVERFLOW)) {
6733b39a
JK		 1294 if (!status && (flags & ISCSI_FLAG_CMD_OVERFLOW))
1295 task->sc->result = DID_ERROR << 16;
1296
1297 if (flags & ISCSI_FLAG_CMD_UNDERFLOW) {
1298 scsi_set_resid(task->sc, resid);
1299 if (!status && (scsi_bufflen(task->sc) - resid <
1300 task->sc->underflow))
1301 task->sc->result = DID_ERROR << 16;
1302 }
1303 }
1304
1305 if (status == SAM_STAT_CHECK_CONDITION) {
4053a4be 1306 u16 sense_len;
bfead3b2 1307 unsigned short *slen = (unsigned short *)sts_bhs->sense_info;
4053a4be 1308
6733b39a 1309 sense = sts_bhs->sense_info + sizeof(unsigned short);
4053a4be 1310 sense_len = be16_to_cpu(*slen);
6733b39a
JK		 1311 memcpy(task->sc->sense_buffer, sense,
1312 min_t(u16, sense_len, SCSI_SENSE_BUFFERSIZE));
1313 }
756d29c8 1314
73133261
JSJ		 1315 if (io_task->cmd_bhs->iscsi_hdr.flags & ISCSI_FLAG_CMD_READ)
1316 conn->rxdata_octets += resid;
6733b39a
JK		 1317unmap:
1318 scsi_dma_unmap(io_task->scsi_cmnd);
1319 iscsi_complete_scsi_task(task, exp_cmdsn, max_cmdsn);
1320}
1321
1322static void
1323be_complete_logout(struct beiscsi_conn *beiscsi_conn,
73133261
JSJ		 1324 struct iscsi_task *task,
1325 struct common_sol_cqe *csol_cqe)
6733b39a
JK		 1326{
1327 struct iscsi_logout_rsp *hdr;
bfead3b2 1328 struct beiscsi_io_task *io_task = task->dd_data;
6733b39a
JK		 1329 struct iscsi_conn *conn = beiscsi_conn->conn;
1330
1331 hdr = (struct iscsi_logout_rsp *)task->hdr;
7bd6e25c 1332 hdr->opcode = ISCSI_OP_LOGOUT_RSP;
6733b39a
JK		 1333 hdr->t2wait = 5;
1334 hdr->t2retain = 0;
73133261
JSJ		 1335 hdr->flags = csol_cqe->i_flags;
1336 hdr->response = csol_cqe->i_resp;
702dc5e8
JK		 1337 hdr->exp_cmdsn = cpu_to_be32(csol_cqe->exp_cmdsn);
1338 hdr->max_cmdsn = cpu_to_be32(csol_cqe->exp_cmdsn +
1339 csol_cqe->cmd_wnd - 1);
73133261 1340
7bd6e25c
JK		 1341 hdr->dlength[0] = 0;
1342 hdr->dlength[1] = 0;
1343 hdr->dlength[2] = 0;
6733b39a 1344 hdr->hlength = 0;
bfead3b2 1345 hdr->itt = io_task->libiscsi_itt;
6733b39a
JK		 1346 __iscsi_complete_pdu(conn, (struct iscsi_hdr *)hdr, NULL, 0);
1347}
1348
1349static void
1350be_complete_tmf(struct beiscsi_conn *beiscsi_conn,
73133261
JSJ		 1351 struct iscsi_task *task,
1352 struct common_sol_cqe *csol_cqe)
6733b39a
JK		 1353{
1354 struct iscsi_tm_rsp *hdr;
1355 struct iscsi_conn *conn = beiscsi_conn->conn;
bfead3b2 1356 struct beiscsi_io_task *io_task = task->dd_data;
6733b39a
JK		 1357
1358 hdr = (struct iscsi_tm_rsp *)task->hdr;
7bd6e25c 1359 hdr->opcode = ISCSI_OP_SCSI_TMFUNC_RSP;
73133261
JSJ		 1360 hdr->flags = csol_cqe->i_flags;
1361 hdr->response = csol_cqe->i_resp;
702dc5e8
JK		 1362 hdr->exp_cmdsn = cpu_to_be32(csol_cqe->exp_cmdsn);
1363 hdr->max_cmdsn = cpu_to_be32(csol_cqe->exp_cmdsn +
1364 csol_cqe->cmd_wnd - 1);
73133261 1365
bfead3b2 1366 hdr->itt = io_task->libiscsi_itt;
6733b39a
JK		 1367 __iscsi_complete_pdu(conn, (struct iscsi_hdr *)hdr, NULL, 0);
1368}
1369
1370static void
1371hwi_complete_drvr_msgs(struct beiscsi_conn *beiscsi_conn,
1372 struct beiscsi_hba *phba, struct sol_cqe *psol)
1373{
1374 struct hwi_wrb_context *pwrb_context;
bfead3b2 1375 struct wrb_handle *pwrb_handle = NULL;
6733b39a 1376 struct hwi_controller *phwi_ctrlr;
bfead3b2
JK		 1377 struct iscsi_task *task;
1378 struct beiscsi_io_task *io_task;
a7909b39 1379 uint16_t wrb_index, cid, cri_index;
6733b39a
JK		 1380
1381 phwi_ctrlr = phba->phwi_ctrlr;
2c9dfd36
JK		 1382 if (is_chip_be2_be3r(phba)) {
1383 wrb_index = AMAP_GET_BITS(struct amap_it_dmsg_cqe,
73133261 1384 wrb_idx, psol);
2c9dfd36 1385 cid = AMAP_GET_BITS(struct amap_it_dmsg_cqe,
73133261
JSJ		 1386 cid, psol);
1387 } else {
2c9dfd36 1388 wrb_index = AMAP_GET_BITS(struct amap_it_dmsg_cqe_v2,
73133261 1389 wrb_idx, psol);
2c9dfd36 1390 cid = AMAP_GET_BITS(struct amap_it_dmsg_cqe_v2,
73133261
JSJ		 1391 cid, psol);
1392 }
1393
a7909b39
JK		 1394 cri_index = BE_GET_CRI_FROM_CID(cid);
1395 pwrb_context = &phwi_ctrlr->wrb_context[cri_index];
73133261 1396 pwrb_handle = pwrb_context->pwrb_handle_basestd[wrb_index];
32951dd8 1397 task = pwrb_handle->pio_handle;
35e66019 1398
bfead3b2 1399 io_task = task->dd_data;
4a4a11b9
JK		 1400 memset(io_task->pwrb_handle->pwrb, 0, sizeof(struct iscsi_wrb));
1401 iscsi_put_task(task);
6733b39a
JK		 1402}
1403
1404static void
1405be_complete_nopin_resp(struct beiscsi_conn *beiscsi_conn,
73133261
JSJ		 1406 struct iscsi_task *task,
1407 struct common_sol_cqe *csol_cqe)
6733b39a
JK		 1408{
1409 struct iscsi_nopin *hdr;
1410 struct iscsi_conn *conn = beiscsi_conn->conn;
bfead3b2 1411 struct beiscsi_io_task *io_task = task->dd_data;
6733b39a
JK		 1412
1413 hdr = (struct iscsi_nopin *)task->hdr;
73133261
JSJ		 1414 hdr->flags = csol_cqe->i_flags;
1415 hdr->exp_cmdsn = cpu_to_be32(csol_cqe->exp_cmdsn);
702dc5e8
JK		 1416 hdr->max_cmdsn = cpu_to_be32(csol_cqe->exp_cmdsn +
1417 csol_cqe->cmd_wnd - 1);
73133261 1418
6733b39a 1419 hdr->opcode = ISCSI_OP_NOOP_IN;
bfead3b2 1420 hdr->itt = io_task->libiscsi_itt;
6733b39a
JK		 1421 __iscsi_complete_pdu(conn, (struct iscsi_hdr *)hdr, NULL, 0);
1422}
1423
73133261
JSJ		 1424static void adapter_get_sol_cqe(struct beiscsi_hba *phba,
1425 struct sol_cqe *psol,
1426 struct common_sol_cqe *csol_cqe)
1427{
2c9dfd36
JK		 1428 if (is_chip_be2_be3r(phba)) {
1429 csol_cqe->exp_cmdsn = AMAP_GET_BITS(struct amap_sol_cqe,
1430 i_exp_cmd_sn, psol);
1431 csol_cqe->res_cnt = AMAP_GET_BITS(struct amap_sol_cqe,
1432 i_res_cnt, psol);
1433 csol_cqe->cmd_wnd = AMAP_GET_BITS(struct amap_sol_cqe,
1434 i_cmd_wnd, psol);
1435 csol_cqe->wrb_index = AMAP_GET_BITS(struct amap_sol_cqe,
1436 wrb_index, psol);
1437 csol_cqe->cid = AMAP_GET_BITS(struct amap_sol_cqe,
1438 cid, psol);
1439 csol_cqe->hw_sts = AMAP_GET_BITS(struct amap_sol_cqe,
1440 hw_sts, psol);
1441 csol_cqe->i_resp = AMAP_GET_BITS(struct amap_sol_cqe,
1442 i_resp, psol);
1443 csol_cqe->i_sts = AMAP_GET_BITS(struct amap_sol_cqe,
1444 i_sts, psol);
1445 csol_cqe->i_flags = AMAP_GET_BITS(struct amap_sol_cqe,
1446 i_flags, psol);
1447 } else {
73133261
JSJ		 1448 csol_cqe->exp_cmdsn = AMAP_GET_BITS(struct amap_sol_cqe_v2,
1449 i_exp_cmd_sn, psol);
1450 csol_cqe->res_cnt = AMAP_GET_BITS(struct amap_sol_cqe_v2,
1451 i_res_cnt, psol);
1452 csol_cqe->wrb_index = AMAP_GET_BITS(struct amap_sol_cqe_v2,
1453 wrb_index, psol);
1454 csol_cqe->cid = AMAP_GET_BITS(struct amap_sol_cqe_v2,
1455 cid, psol);
1456 csol_cqe->hw_sts = AMAP_GET_BITS(struct amap_sol_cqe_v2,
1457 hw_sts, psol);
702dc5e8 1458 csol_cqe->cmd_wnd = AMAP_GET_BITS(struct amap_sol_cqe_v2,
73133261
JSJ		 1459 i_cmd_wnd, psol);
1460 if (AMAP_GET_BITS(struct amap_sol_cqe_v2,
1461 cmd_cmpl, psol))
1462 csol_cqe->i_sts = AMAP_GET_BITS(struct amap_sol_cqe_v2,
1463 i_sts, psol);
1464 else
1465 csol_cqe->i_resp = AMAP_GET_BITS(struct amap_sol_cqe_v2,
1466 i_sts, psol);
1467 if (AMAP_GET_BITS(struct amap_sol_cqe_v2,
1468 u, psol))
1469 csol_cqe->i_flags = ISCSI_FLAG_CMD_UNDERFLOW;
1470
1471 if (AMAP_GET_BITS(struct amap_sol_cqe_v2,
1472 o, psol))
1473 csol_cqe->i_flags |= ISCSI_FLAG_CMD_OVERFLOW;
73133261
JSJ		 1474 }
1475}
1476
1477
6733b39a
JK		 1478static void hwi_complete_cmd(struct beiscsi_conn *beiscsi_conn,
1479 struct beiscsi_hba *phba, struct sol_cqe *psol)
1480{
1481 struct hwi_wrb_context *pwrb_context;
1482 struct wrb_handle *pwrb_handle;
1483 struct iscsi_wrb *pwrb = NULL;
1484 struct hwi_controller *phwi_ctrlr;
1485 struct iscsi_task *task;
bfead3b2 1486 unsigned int type;
6733b39a
JK		 1487 struct iscsi_conn *conn = beiscsi_conn->conn;
1488 struct iscsi_session *session = conn->session;
73133261 1489 struct common_sol_cqe csol_cqe = {0};
a7909b39 1490 uint16_t cri_index = 0;
6733b39a
JK		 1491
1492 phwi_ctrlr = phba->phwi_ctrlr;
73133261
JSJ		 1493
1494 /* Copy the elements to a common structure */
1495 adapter_get_sol_cqe(phba, psol, &csol_cqe);
1496
a7909b39
JK		 1497 cri_index = BE_GET_CRI_FROM_CID(csol_cqe.cid);
1498 pwrb_context = &phwi_ctrlr->wrb_context[cri_index];
73133261
JSJ		 1499
1500 pwrb_handle = pwrb_context->pwrb_handle_basestd[
1501 csol_cqe.wrb_index];
1502
32951dd8
JK		 1503 task = pwrb_handle->pio_handle;
1504 pwrb = pwrb_handle->pwrb;
73133261 1505 type = ((struct beiscsi_io_task *)task->dd_data)->wrb_type;
32951dd8 1506
bfead3b2
JK		 1507 spin_lock_bh(&session->lock);
1508 switch (type) {
6733b39a
JK		 1509 case HWH_TYPE_IO:
1510 case HWH_TYPE_IO_RD:
1511 if ((task->hdr->opcode & ISCSI_OPCODE_MASK) ==
dafab8e0 1512 ISCSI_OP_NOOP_OUT)
73133261 1513 be_complete_nopin_resp(beiscsi_conn, task, &csol_cqe);
dafab8e0 1514 else
73133261 1515 be_complete_io(beiscsi_conn, task, &csol_cqe);
6733b39a
JK		 1516 break;
1517
1518 case HWH_TYPE_LOGOUT:
dafab8e0 1519 if ((task->hdr->opcode & ISCSI_OPCODE_MASK) == ISCSI_OP_LOGOUT)
73133261 1520 be_complete_logout(beiscsi_conn, task, &csol_cqe);
dafab8e0 1521 else
73133261 1522 be_complete_tmf(beiscsi_conn, task, &csol_cqe);
6733b39a
JK		 1523 break;
1524
1525 case HWH_TYPE_LOGIN:
99bc5d55
JSJ		 1526 beiscsi_log(phba, KERN_ERR,
1527 BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
1528 "BM_%d :\t\t No HWH_TYPE_LOGIN Expected in"
1529 " hwi_complete_cmd- Solicited path\n");
6733b39a
JK		 1530 break;
1531
6733b39a 1532 case HWH_TYPE_NOP:
73133261 1533 be_complete_nopin_resp(beiscsi_conn, task, &csol_cqe);
6733b39a
JK		 1534 break;
1535
1536 default:
99bc5d55
JSJ		 1537 beiscsi_log(phba, KERN_WARNING,
1538 BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
1539 "BM_%d : In hwi_complete_cmd, unknown type = %d"
1540 "wrb_index 0x%x CID 0x%x\n", type,
73133261
JSJ		 1541 csol_cqe.wrb_index,
1542 csol_cqe.cid);
6733b39a
JK		 1543 break;
1544 }
35e66019 1545
6733b39a
JK		 1546 spin_unlock_bh(&session->lock);
1547}
1548
1549static struct list_head *hwi_get_async_busy_list(struct hwi_async_pdu_context
1550 *pasync_ctx, unsigned int is_header,
1551 unsigned int host_write_ptr)
1552{
1553 if (is_header)
1554 return &pasync_ctx->async_entry[host_write_ptr].
1555 header_busy_list;
1556 else
1557 return &pasync_ctx->async_entry[host_write_ptr].data_busy_list;
1558}
1559
1560static struct async_pdu_handle *
1561hwi_get_async_handle(struct beiscsi_hba *phba,
1562 struct beiscsi_conn *beiscsi_conn,
1563 struct hwi_async_pdu_context *pasync_ctx,
1564 struct i_t_dpdu_cqe *pdpdu_cqe, unsigned int *pcq_index)
1565{
1566 struct be_bus_address phys_addr;
1567 struct list_head *pbusy_list;
1568 struct async_pdu_handle *pasync_handle = NULL;
6733b39a 1569 unsigned char is_header = 0;
73133261
JSJ		 1570 unsigned int index, dpl;
1571
2c9dfd36
JK		 1572 if (is_chip_be2_be3r(phba)) {
1573 dpl = AMAP_GET_BITS(struct amap_i_t_dpdu_cqe,
73133261 1574 dpl, pdpdu_cqe);
2c9dfd36 1575 index = AMAP_GET_BITS(struct amap_i_t_dpdu_cqe,
73133261
JSJ		 1576 index, pdpdu_cqe);
1577 } else {
2c9dfd36 1578 dpl = AMAP_GET_BITS(struct amap_i_t_dpdu_cqe_v2,
73133261 1579 dpl, pdpdu_cqe);
2c9dfd36 1580 index = AMAP_GET_BITS(struct amap_i_t_dpdu_cqe_v2,
73133261
JSJ		 1581 index, pdpdu_cqe);
1582 }
6733b39a
JK		 1583
1584 phys_addr.u.a32.address_lo =
73133261
JSJ		 1585 (pdpdu_cqe->dw[offsetof(struct amap_i_t_dpdu_cqe,
1586 db_addr_lo) / 32] - dpl);
6733b39a 1587 phys_addr.u.a32.address_hi =
73133261
JSJ		 1588 pdpdu_cqe->dw[offsetof(struct amap_i_t_dpdu_cqe,
1589 db_addr_hi) / 32];
6733b39a
JK		 1590
1591 phys_addr.u.a64.address =
1592 *((unsigned long long *)(&phys_addr.u.a64.address));
1593
1594 switch (pdpdu_cqe->dw[offsetof(struct amap_i_t_dpdu_cqe, code) / 32]
1595 & PDUCQE_CODE_MASK) {
1596 case UNSOL_HDR_NOTIFY:
1597 is_header = 1;
1598
73133261
JSJ		 1599 pbusy_list = hwi_get_async_busy_list(pasync_ctx,
1600 is_header, index);
6733b39a
JK		 1601 break;
1602 case UNSOL_DATA_NOTIFY:
73133261
JSJ		 1603 pbusy_list = hwi_get_async_busy_list(pasync_ctx,
1604 is_header, index);
6733b39a
JK		 1605 break;
1606 default:
1607 pbusy_list = NULL;
99bc5d55
JSJ		 1608 beiscsi_log(phba, KERN_WARNING,
1609 BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
1610 "BM_%d : Unexpected code=%d\n",
1611 pdpdu_cqe->dw[offsetof(struct amap_i_t_dpdu_cqe,
1612 code) / 32] & PDUCQE_CODE_MASK);
6733b39a
JK		 1613 return NULL;
1614 }
1615
6733b39a
JK		 1616 WARN_ON(list_empty(pbusy_list));
1617 list_for_each_entry(pasync_handle, pbusy_list, link) {
dc63aac6 1618 if (pasync_handle->pa.u.a64.address == phys_addr.u.a64.address)
6733b39a
JK		 1619 break;
1620 }
1621
1622 WARN_ON(!pasync_handle);
1623
8a86e833
JK		 1624 pasync_handle->cri = BE_GET_ASYNC_CRI_FROM_CID(
1625 beiscsi_conn->beiscsi_conn_cid);
6733b39a 1626 pasync_handle->is_header = is_header;
73133261
JSJ		 1627 pasync_handle->buffer_len = dpl;
1628 *pcq_index = index;
6733b39a 1629
6733b39a
JK		 1630 return pasync_handle;
1631}
1632
1633static unsigned int
99bc5d55
JSJ		 1634hwi_update_async_writables(struct beiscsi_hba *phba,
1635 struct hwi_async_pdu_context *pasync_ctx,
1636 unsigned int is_header, unsigned int cq_index)
6733b39a
JK		 1637{
1638 struct list_head *pbusy_list;
1639 struct async_pdu_handle *pasync_handle;
1640 unsigned int num_entries, writables = 0;
1641 unsigned int *pep_read_ptr, *pwritables;
1642
dc63aac6 1643 num_entries = pasync_ctx->num_entries;
6733b39a
JK		 1644 if (is_header) {
1645 pep_read_ptr = &pasync_ctx->async_header.ep_read_ptr;
1646 pwritables = &pasync_ctx->async_header.writables;
6733b39a
JK		 1647 } else {
1648 pep_read_ptr = &pasync_ctx->async_data.ep_read_ptr;
1649 pwritables = &pasync_ctx->async_data.writables;
6733b39a
JK		 1650 }
1651
1652 while ((*pep_read_ptr) != cq_index) {
1653 (*pep_read_ptr)++;
1654 *pep_read_ptr = (*pep_read_ptr) % num_entries;
1655
1656 pbusy_list = hwi_get_async_busy_list(pasync_ctx, is_header,
1657 *pep_read_ptr);
1658 if (writables == 0)
1659 WARN_ON(list_empty(pbusy_list));
1660
1661 if (!list_empty(pbusy_list)) {
1662 pasync_handle = list_entry(pbusy_list->next,
1663 struct async_pdu_handle,
1664 link);
1665 WARN_ON(!pasync_handle);
1666 pasync_handle->consumed = 1;
1667 }
1668
1669 writables++;
1670 }
1671
1672 if (!writables) {
99bc5d55
JSJ		 1673 beiscsi_log(phba, KERN_ERR,
1674 BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
1675 "BM_%d : Duplicate notification received - index 0x%x!!\n",
1676 cq_index);
6733b39a
JK		 1677 WARN_ON(1);
1678 }
1679
1680 *pwritables = *pwritables + writables;
1681 return 0;
1682}
1683
9728d8d0 1684static void hwi_free_async_msg(struct beiscsi_hba *phba,
8a86e833
JK		 1685 struct hwi_async_pdu_context *pasync_ctx,
1686 unsigned int cri)
6733b39a 1687{
6733b39a
JK		 1688 struct async_pdu_handle *pasync_handle, *tmp_handle;
1689 struct list_head *plist;
6733b39a 1690
6733b39a 1691 plist = &pasync_ctx->async_entry[cri].wait_queue.list;
6733b39a
JK		 1692 list_for_each_entry_safe(pasync_handle, tmp_handle, plist, link) {
1693 list_del(&pasync_handle->link);
1694
9728d8d0 1695 if (pasync_handle->is_header) {
6733b39a
JK		 1696 list_add_tail(&pasync_handle->link,
1697 &pasync_ctx->async_header.free_list);
1698 pasync_ctx->async_header.free_entries++;
6733b39a
JK		 1699 } else {
1700 list_add_tail(&pasync_handle->link,
1701 &pasync_ctx->async_data.free_list);
1702 pasync_ctx->async_data.free_entries++;
6733b39a
JK		 1703 }
1704 }
1705
1706 INIT_LIST_HEAD(&pasync_ctx->async_entry[cri].wait_queue.list);
1707 pasync_ctx->async_entry[cri].wait_queue.hdr_received = 0;
1708 pasync_ctx->async_entry[cri].wait_queue.bytes_received = 0;
6733b39a
JK		 1709}
1710
1711static struct phys_addr *
1712hwi_get_ring_address(struct hwi_async_pdu_context *pasync_ctx,
1713 unsigned int is_header, unsigned int host_write_ptr)
1714{
1715 struct phys_addr *pasync_sge = NULL;
1716
1717 if (is_header)
1718 pasync_sge = pasync_ctx->async_header.ring_base;
1719 else
1720 pasync_sge = pasync_ctx->async_data.ring_base;
1721
1722 return pasync_sge + host_write_ptr;
1723}
1724
1725static void hwi_post_async_buffers(struct beiscsi_hba *phba,
8a86e833 1726 unsigned int is_header, uint8_t ulp_num)
6733b39a
JK		 1727{
1728 struct hwi_controller *phwi_ctrlr;
1729 struct hwi_async_pdu_context *pasync_ctx;
1730 struct async_pdu_handle *pasync_handle;
1731 struct list_head *pfree_link, *pbusy_list;
1732 struct phys_addr *pasync_sge;
1733 unsigned int ring_id, num_entries;
8a86e833 1734 unsigned int host_write_num, doorbell_offset;
6733b39a
JK		 1735 unsigned int writables;
1736 unsigned int i = 0;
1737 u32 doorbell = 0;
1738
1739 phwi_ctrlr = phba->phwi_ctrlr;
8a86e833 1740 pasync_ctx = HWI_GET_ASYNC_PDU_CTX(phwi_ctrlr, ulp_num);
dc63aac6 1741 num_entries = pasync_ctx->num_entries;
6733b39a
JK		 1742
1743 if (is_header) {
6733b39a
JK		 1744 writables = min(pasync_ctx->async_header.writables,
1745 pasync_ctx->async_header.free_entries);
1746 pfree_link = pasync_ctx->async_header.free_list.next;
1747 host_write_num = pasync_ctx->async_header.host_write_ptr;
8a86e833
JK		 1748 ring_id = phwi_ctrlr->default_pdu_hdr[ulp_num].id;
1749 doorbell_offset = phwi_ctrlr->default_pdu_hdr[ulp_num].
1750 doorbell_offset;
6733b39a 1751 } else {
6733b39a
JK		 1752 writables = min(pasync_ctx->async_data.writables,
1753 pasync_ctx->async_data.free_entries);
1754 pfree_link = pasync_ctx->async_data.free_list.next;
1755 host_write_num = pasync_ctx->async_data.host_write_ptr;
8a86e833
JK		 1756 ring_id = phwi_ctrlr->default_pdu_data[ulp_num].id;
1757 doorbell_offset = phwi_ctrlr->default_pdu_data[ulp_num].
1758 doorbell_offset;
6733b39a
JK		 1759 }
1760
1761 writables = (writables / 8) * 8;
1762 if (writables) {
1763 for (i = 0; i < writables; i++) {
1764 pbusy_list =
1765 hwi_get_async_busy_list(pasync_ctx, is_header,
1766 host_write_num);
1767 pasync_handle =
1768 list_entry(pfree_link, struct async_pdu_handle,
1769 link);
1770 WARN_ON(!pasync_handle);
1771 pasync_handle->consumed = 0;
1772
1773 pfree_link = pfree_link->next;
1774
1775 pasync_sge = hwi_get_ring_address(pasync_ctx,
1776 is_header, host_write_num);
1777
1778 pasync_sge->hi = pasync_handle->pa.u.a32.address_lo;
1779 pasync_sge->lo = pasync_handle->pa.u.a32.address_hi;
1780
1781 list_move(&pasync_handle->link, pbusy_list);
1782
1783 host_write_num++;
1784 host_write_num = host_write_num % num_entries;
1785 }
1786
1787 if (is_header) {
1788 pasync_ctx->async_header.host_write_ptr =
1789 host_write_num;
1790 pasync_ctx->async_header.free_entries -= writables;
1791 pasync_ctx->async_header.writables -= writables;
1792 pasync_ctx->async_header.busy_entries += writables;
1793 } else {
1794 pasync_ctx->async_data.host_write_ptr = host_write_num;
1795 pasync_ctx->async_data.free_entries -= writables;
1796 pasync_ctx->async_data.writables -= writables;
1797 pasync_ctx->async_data.busy_entries += writables;
1798 }
1799
1800 doorbell |= ring_id & DB_DEF_PDU_RING_ID_MASK;
1801 doorbell |= 1 << DB_DEF_PDU_REARM_SHIFT;
1802 doorbell |= 0 << DB_DEF_PDU_EVENT_SHIFT;
1803 doorbell |= (writables & DB_DEF_PDU_CQPROC_MASK)
1804 << DB_DEF_PDU_CQPROC_SHIFT;
1805
8a86e833 1806 iowrite32(doorbell, phba->db_va + doorbell_offset);
6733b39a
JK		 1807 }
1808}
1809
1810static void hwi_flush_default_pdu_buffer(struct beiscsi_hba *phba,
1811 struct beiscsi_conn *beiscsi_conn,
1812 struct i_t_dpdu_cqe *pdpdu_cqe)
1813{
1814 struct hwi_controller *phwi_ctrlr;
1815 struct hwi_async_pdu_context *pasync_ctx;
1816 struct async_pdu_handle *pasync_handle = NULL;
1817 unsigned int cq_index = -1;
8a86e833
JK		 1818 uint16_t cri_index = BE_GET_CRI_FROM_CID(
1819 beiscsi_conn->beiscsi_conn_cid);
6733b39a
JK		 1820
1821 phwi_ctrlr = phba->phwi_ctrlr;
8a86e833
JK		 1822 pasync_ctx = HWI_GET_ASYNC_PDU_CTX(phwi_ctrlr,
1823 BEISCSI_GET_ULP_FROM_CRI(phwi_ctrlr,
1824 cri_index));
6733b39a
JK		 1825
1826 pasync_handle = hwi_get_async_handle(phba, beiscsi_conn, pasync_ctx,
1827 pdpdu_cqe, &cq_index);
1828 BUG_ON(pasync_handle->is_header != 0);
1829 if (pasync_handle->consumed == 0)
99bc5d55
JSJ		 1830 hwi_update_async_writables(phba, pasync_ctx,
1831 pasync_handle->is_header, cq_index);
6733b39a 1832
8a86e833
JK		 1833 hwi_free_async_msg(phba, pasync_ctx, pasync_handle->cri);
1834 hwi_post_async_buffers(phba, pasync_handle->is_header,
1835 BEISCSI_GET_ULP_FROM_CRI(phwi_ctrlr,
1836 cri_index));
6733b39a
JK		 1837}
1838
1839static unsigned int
1840hwi_fwd_async_msg(struct beiscsi_conn *beiscsi_conn,
1841 struct beiscsi_hba *phba,
1842 struct hwi_async_pdu_context *pasync_ctx, unsigned short cri)
1843{
1844 struct list_head *plist;
1845 struct async_pdu_handle *pasync_handle;
1846 void *phdr = NULL;
1847 unsigned int hdr_len = 0, buf_len = 0;
1848 unsigned int status, index = 0, offset = 0;
1849 void *pfirst_buffer = NULL;
1850 unsigned int num_buf = 0;
1851
1852 plist = &pasync_ctx->async_entry[cri].wait_queue.list;
1853
1854 list_for_each_entry(pasync_handle, plist, link) {
1855 if (index == 0) {
1856 phdr = pasync_handle->pbuffer;
1857 hdr_len = pasync_handle->buffer_len;
1858 } else {
1859 buf_len = pasync_handle->buffer_len;
1860 if (!num_buf) {
1861 pfirst_buffer = pasync_handle->pbuffer;
1862 num_buf++;
1863 }
1864 memcpy(pfirst_buffer + offset,
1865 pasync_handle->pbuffer, buf_len);
f2ba02b8 1866 offset += buf_len;
6733b39a
JK		 1867 }
1868 index++;
1869 }
1870
1871 status = beiscsi_process_async_pdu(beiscsi_conn, phba,
7da50879 1872 phdr, hdr_len, pfirst_buffer,
f2ba02b8 1873 offset);
6733b39a 1874
8a86e833 1875 hwi_free_async_msg(phba, pasync_ctx, cri);
6733b39a
JK		 1876 return 0;
1877}
1878
1879static unsigned int
1880hwi_gather_async_pdu(struct beiscsi_conn *beiscsi_conn,
1881 struct beiscsi_hba *phba,
1882 struct async_pdu_handle *pasync_handle)
1883{
1884 struct hwi_async_pdu_context *pasync_ctx;
1885 struct hwi_controller *phwi_ctrlr;
1886 unsigned int bytes_needed = 0, status = 0;
1887 unsigned short cri = pasync_handle->cri;
1888 struct pdu_base *ppdu;
1889
1890 phwi_ctrlr = phba->phwi_ctrlr;
8a86e833
JK		 1891 pasync_ctx = HWI_GET_ASYNC_PDU_CTX(phwi_ctrlr,
1892 BEISCSI_GET_ULP_FROM_CRI(phwi_ctrlr,
1893 BE_GET_CRI_FROM_CID(beiscsi_conn->
1894 beiscsi_conn_cid)));
6733b39a
JK		 1895
1896 list_del(&pasync_handle->link);
1897 if (pasync_handle->is_header) {
1898 pasync_ctx->async_header.busy_entries--;
1899 if (pasync_ctx->async_entry[cri].wait_queue.hdr_received) {
8a86e833 1900 hwi_free_async_msg(phba, pasync_ctx, cri);
6733b39a
JK		 1901 BUG();
1902 }
1903
1904 pasync_ctx->async_entry[cri].wait_queue.bytes_received = 0;
1905 pasync_ctx->async_entry[cri].wait_queue.hdr_received = 1;
1906 pasync_ctx->async_entry[cri].wait_queue.hdr_len =
1907 (unsigned short)pasync_handle->buffer_len;
1908 list_add_tail(&pasync_handle->link,
1909 &pasync_ctx->async_entry[cri].wait_queue.list);
1910
1911 ppdu = pasync_handle->pbuffer;
1912 bytes_needed = ((((ppdu->dw[offsetof(struct amap_pdu_base,
1913 data_len_hi) / 32] & PDUBASE_DATALENHI_MASK) << 8) &
1914 0xFFFF0000) | ((be16_to_cpu((ppdu->
1915 dw[offsetof(struct amap_pdu_base, data_len_lo) / 32]
1916 & PDUBASE_DATALENLO_MASK) >> 16)) & 0x0000FFFF));
1917
1918 if (status == 0) {
1919 pasync_ctx->async_entry[cri].wait_queue.bytes_needed =
1920 bytes_needed;
1921
1922 if (bytes_needed == 0)
1923 status = hwi_fwd_async_msg(beiscsi_conn, phba,
1924 pasync_ctx, cri);
1925 }
1926 } else {
1927 pasync_ctx->async_data.busy_entries--;
1928 if (pasync_ctx->async_entry[cri].wait_queue.hdr_received) {
1929 list_add_tail(&pasync_handle->link,
1930 &pasync_ctx->async_entry[cri].wait_queue.
1931 list);
1932 pasync_ctx->async_entry[cri].wait_queue.
1933 bytes_received +=
1934 (unsigned short)pasync_handle->buffer_len;
1935
1936 if (pasync_ctx->async_entry[cri].wait_queue.
1937 bytes_received >=
1938 pasync_ctx->async_entry[cri].wait_queue.
1939 bytes_needed)
1940 status = hwi_fwd_async_msg(beiscsi_conn, phba,
1941 pasync_ctx, cri);
1942 }
1943 }
1944 return status;
1945}
1946
1947static void hwi_process_default_pdu_ring(struct beiscsi_conn *beiscsi_conn,
1948 struct beiscsi_hba *phba,
1949 struct i_t_dpdu_cqe *pdpdu_cqe)
1950{
1951 struct hwi_controller *phwi_ctrlr;
1952 struct hwi_async_pdu_context *pasync_ctx;
1953 struct async_pdu_handle *pasync_handle = NULL;
1954 unsigned int cq_index = -1;
8a86e833
JK		 1955 uint16_t cri_index = BE_GET_CRI_FROM_CID(
1956 beiscsi_conn->beiscsi_conn_cid);
6733b39a
JK		 1957
1958 phwi_ctrlr = phba->phwi_ctrlr;
8a86e833
JK		 1959 pasync_ctx = HWI_GET_ASYNC_PDU_CTX(phwi_ctrlr,
1960 BEISCSI_GET_ULP_FROM_CRI(phwi_ctrlr,
1961 cri_index));
1962
6733b39a
JK		 1963 pasync_handle = hwi_get_async_handle(phba, beiscsi_conn, pasync_ctx,
1964 pdpdu_cqe, &cq_index);
1965
1966 if (pasync_handle->consumed == 0)
99bc5d55
JSJ		 1967 hwi_update_async_writables(phba, pasync_ctx,
1968 pasync_handle->is_header, cq_index);
1969
6733b39a 1970 hwi_gather_async_pdu(beiscsi_conn, phba, pasync_handle);
8a86e833
JK		 1971 hwi_post_async_buffers(phba, pasync_handle->is_header,
1972 BEISCSI_GET_ULP_FROM_CRI(
1973 phwi_ctrlr, cri_index));
6733b39a
JK		 1974}
1975
756d29c8
JK		 1976static void beiscsi_process_mcc_isr(struct beiscsi_hba *phba)
1977{
1978 struct be_queue_info *mcc_cq;
1979 struct be_mcc_compl *mcc_compl;
1980 unsigned int num_processed = 0;
1981
1982 mcc_cq = &phba->ctrl.mcc_obj.cq;
1983 mcc_compl = queue_tail_node(mcc_cq);
1984 mcc_compl->flags = le32_to_cpu(mcc_compl->flags);
1985 while (mcc_compl->flags & CQE_FLAGS_VALID_MASK) {
1986
1987 if (num_processed >= 32) {
1988 hwi_ring_cq_db(phba, mcc_cq->id,
1989 num_processed, 0, 0);
1990 num_processed = 0;
1991 }
1992 if (mcc_compl->flags & CQE_FLAGS_ASYNC_MASK) {
1993 /* Interpret flags as an async trailer */
1994 if (is_link_state_evt(mcc_compl->flags))
1995 /* Interpret compl as a async link evt */
1996 beiscsi_async_link_state_process(phba,
1997 (struct be_async_event_link_state *) mcc_compl);
1998 else
99bc5d55
JSJ		 1999 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_MBOX,
2000 "BM_%d : Unsupported Async Event, flags"
2001 " = 0x%08x\n",
2002 mcc_compl->flags);
756d29c8
JK		 2003 } else if (mcc_compl->flags & CQE_FLAGS_COMPLETED_MASK) {
2004 be_mcc_compl_process_isr(&phba->ctrl, mcc_compl);
2005 atomic_dec(&phba->ctrl.mcc_obj.q.used);
2006 }
2007
2008 mcc_compl->flags = 0;
2009 queue_tail_inc(mcc_cq);
2010 mcc_compl = queue_tail_node(mcc_cq);
2011 mcc_compl->flags = le32_to_cpu(mcc_compl->flags);
2012 num_processed++;
2013 }
2014
2015 if (num_processed > 0)
2016 hwi_ring_cq_db(phba, mcc_cq->id, num_processed, 1, 0);
2017
2018}
bfead3b2 2019
6763daae
JSJ		 2020/**
2021 * beiscsi_process_cq()- Process the Completion Queue
2022 * @pbe_eq: Event Q on which the Completion has come
2023 *
2024 * return
2025 * Number of Completion Entries processed.
2026 **/
bfead3b2 2027static unsigned int beiscsi_process_cq(struct be_eq_obj *pbe_eq)
6733b39a 2028{
6733b39a
JK		 2029 struct be_queue_info *cq;
2030 struct sol_cqe *sol;
2031 struct dmsg_cqe *dmsg;
2032 unsigned int num_processed = 0;
2033 unsigned int tot_nump = 0;
0a513dd8 2034 unsigned short code = 0, cid = 0;
a7909b39 2035 uint16_t cri_index = 0;
6733b39a 2036 struct beiscsi_conn *beiscsi_conn;
c2462288
JK		 2037 struct beiscsi_endpoint *beiscsi_ep;
2038 struct iscsi_endpoint *ep;
bfead3b2 2039 struct beiscsi_hba *phba;
6733b39a 2040
bfead3b2 2041 cq = pbe_eq->cq;
6733b39a 2042 sol = queue_tail_node(cq);
bfead3b2 2043 phba = pbe_eq->phba;
6733b39a
JK		 2044
2045 while (sol->dw[offsetof(struct amap_sol_cqe, valid) / 32] &
2046 CQE_VALID_MASK) {
2047 be_dws_le_to_cpu(sol, sizeof(struct sol_cqe));
2048
73133261
JSJ		 2049 code = (sol->dw[offsetof(struct amap_sol_cqe, code) /
2050 32] & CQE_CODE_MASK);
2051
2052 /* Get the CID */
2c9dfd36
JK		 2053 if (is_chip_be2_be3r(phba)) {
2054 cid = AMAP_GET_BITS(struct amap_sol_cqe, cid, sol);
2055 } else {
73133261
JSJ		 2056 if ((code == DRIVERMSG_NOTIFY) ||
2057 (code == UNSOL_HDR_NOTIFY) ||
2058 (code == UNSOL_DATA_NOTIFY))
2059 cid = AMAP_GET_BITS(
2060 struct amap_i_t_dpdu_cqe_v2,
2061 cid, sol);
2062 else
2063 cid = AMAP_GET_BITS(struct amap_sol_cqe_v2,
2064 cid, sol);
2c9dfd36 2065 }
32951dd8 2066
a7909b39
JK		 2067 cri_index = BE_GET_CRI_FROM_CID(cid);
2068 ep = phba->ep_array[cri_index];
c2462288
JK		 2069 beiscsi_ep = ep->dd_data;
2070 beiscsi_conn = beiscsi_ep->conn;
756d29c8 2071
6733b39a 2072 if (num_processed >= 32) {
bfead3b2 2073 hwi_ring_cq_db(phba, cq->id,
6733b39a
JK		 2074 num_processed, 0, 0);
2075 tot_nump += num_processed;
2076 num_processed = 0;
2077 }
2078
0a513dd8 2079 switch (code) {
6733b39a
JK		 2080 case SOL_CMD_COMPLETE:
2081 hwi_complete_cmd(beiscsi_conn, phba, sol);
2082 break;
2083 case DRIVERMSG_NOTIFY:
99bc5d55
JSJ		 2084 beiscsi_log(phba, KERN_INFO,
2085 BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
6763daae
JSJ		 2086 "BM_%d : Received %s[%d] on CID : %d\n",
2087 cqe_desc[code], code, cid);
99bc5d55 2088
6733b39a
JK		 2089 dmsg = (struct dmsg_cqe *)sol;
2090 hwi_complete_drvr_msgs(beiscsi_conn, phba, sol);
2091 break;
2092 case UNSOL_HDR_NOTIFY:
99bc5d55
JSJ		 2093 beiscsi_log(phba, KERN_INFO,
2094 BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
6763daae
JSJ		 2095 "BM_%d : Received %s[%d] on CID : %d\n",
2096 cqe_desc[code], code, cid);
99bc5d55 2097
8f09a3b9 2098 spin_lock_bh(&phba->async_pdu_lock);
bfead3b2
JK		 2099 hwi_process_default_pdu_ring(beiscsi_conn, phba,
2100 (struct i_t_dpdu_cqe *)sol);
8f09a3b9 2101 spin_unlock_bh(&phba->async_pdu_lock);
bfead3b2 2102 break;
6733b39a 2103 case UNSOL_DATA_NOTIFY:
99bc5d55
JSJ		 2104 beiscsi_log(phba, KERN_INFO,
2105 BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
6763daae
JSJ		 2106 "BM_%d : Received %s[%d] on CID : %d\n",
2107 cqe_desc[code], code, cid);
99bc5d55 2108
8f09a3b9 2109 spin_lock_bh(&phba->async_pdu_lock);
6733b39a
JK		 2110 hwi_process_default_pdu_ring(beiscsi_conn, phba,
2111 (struct i_t_dpdu_cqe *)sol);
8f09a3b9 2112 spin_unlock_bh(&phba->async_pdu_lock);
6733b39a
JK		 2113 break;
2114 case CXN_INVALIDATE_INDEX_NOTIFY:
2115 case CMD_INVALIDATED_NOTIFY:
2116 case CXN_INVALIDATE_NOTIFY:
99bc5d55
JSJ		 2117 beiscsi_log(phba, KERN_ERR,
2118 BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
6763daae
JSJ		 2119 "BM_%d : Ignoring %s[%d] on CID : %d\n",
2120 cqe_desc[code], code, cid);
6733b39a
JK		 2121 break;
2122 case SOL_CMD_KILLED_DATA_DIGEST_ERR:
2123 case CMD_KILLED_INVALID_STATSN_RCVD:
2124 case CMD_KILLED_INVALID_R2T_RCVD:
2125 case CMD_CXN_KILLED_LUN_INVALID:
2126 case CMD_CXN_KILLED_ICD_INVALID:
2127 case CMD_CXN_KILLED_ITT_INVALID:
2128 case CMD_CXN_KILLED_SEQ_OUTOFORDER:
2129 case CMD_CXN_KILLED_INVALID_DATASN_RCVD:
99bc5d55
JSJ		 2130 beiscsi_log(phba, KERN_ERR,
2131 BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
6763daae
JSJ		 2132 "BM_%d : Cmd Notification %s[%d] on CID : %d\n",
2133 cqe_desc[code], code, cid);
6733b39a
JK		 2134 break;
2135 case UNSOL_DATA_DIGEST_ERROR_NOTIFY:
99bc5d55
JSJ		 2136 beiscsi_log(phba, KERN_ERR,
2137 BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
6763daae
JSJ		 2138 "BM_%d : Dropping %s[%d] on DPDU ring on CID : %d\n",
2139 cqe_desc[code], code, cid);
8f09a3b9 2140 spin_lock_bh(&phba->async_pdu_lock);
6733b39a
JK		 2141 hwi_flush_default_pdu_buffer(phba, beiscsi_conn,
2142 (struct i_t_dpdu_cqe *) sol);
8f09a3b9 2143 spin_unlock_bh(&phba->async_pdu_lock);
6733b39a
JK		 2144 break;
2145 case CXN_KILLED_PDU_SIZE_EXCEEDS_DSL:
2146 case CXN_KILLED_BURST_LEN_MISMATCH:
2147 case CXN_KILLED_AHS_RCVD:
2148 case CXN_KILLED_HDR_DIGEST_ERR:
2149 case CXN_KILLED_UNKNOWN_HDR:
2150 case CXN_KILLED_STALE_ITT_TTT_RCVD:
2151 case CXN_KILLED_INVALID_ITT_TTT_RCVD:
2152 case CXN_KILLED_TIMED_OUT:
2153 case CXN_KILLED_FIN_RCVD:
6763daae
JSJ		 2154 case CXN_KILLED_RST_SENT:
2155 case CXN_KILLED_RST_RCVD:
6733b39a
JK		 2156 case CXN_KILLED_BAD_UNSOL_PDU_RCVD:
2157 case CXN_KILLED_BAD_WRB_INDEX_ERROR:
2158 case CXN_KILLED_OVER_RUN_RESIDUAL:
2159 case CXN_KILLED_UNDER_RUN_RESIDUAL:
2160 case CXN_KILLED_CMND_DATA_NOT_ON_SAME_CONN:
99bc5d55
JSJ		 2161 beiscsi_log(phba, KERN_ERR,
2162 BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
6763daae
JSJ		 2163 "BM_%d : Event %s[%d] received on CID : %d\n",
2164 cqe_desc[code], code, cid);
0a513dd8
JSJ		 2165 if (beiscsi_conn)
2166 iscsi_conn_failure(beiscsi_conn->conn,
2167 ISCSI_ERR_CONN_FAILED);
6733b39a
JK		 2168 break;
2169 default:
99bc5d55
JSJ		 2170 beiscsi_log(phba, KERN_ERR,
2171 BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
6763daae
JSJ		 2172 "BM_%d : Invalid CQE Event Received Code : %d"
2173 "CID 0x%x...\n",
0a513dd8 2174 code, cid);
6733b39a
JK		 2175 break;
2176 }
2177
2178 AMAP_SET_BITS(struct amap_sol_cqe, valid, sol, 0);
2179 queue_tail_inc(cq);
2180 sol = queue_tail_node(cq);
2181 num_processed++;
2182 }
2183
2184 if (num_processed > 0) {
2185 tot_nump += num_processed;
bfead3b2 2186 hwi_ring_cq_db(phba, cq->id, num_processed, 1, 0);
6733b39a
JK		 2187 }
2188 return tot_nump;
2189}
2190
756d29c8 2191void beiscsi_process_all_cqs(struct work_struct *work)
6733b39a
JK		 2192{
2193 unsigned long flags;
bfead3b2
JK		 2194 struct hwi_controller *phwi_ctrlr;
2195 struct hwi_context_memory *phwi_context;
72fb46a9
JSJ		 2196 struct beiscsi_hba *phba;
2197 struct be_eq_obj *pbe_eq =
2198 container_of(work, struct be_eq_obj, work_cqs);
6733b39a 2199
72fb46a9 2200 phba = pbe_eq->phba;
bfead3b2
JK		 2201 phwi_ctrlr = phba->phwi_ctrlr;
2202 phwi_context = phwi_ctrlr->phwi_ctxt;
bfead3b2 2203
72fb46a9 2204 if (pbe_eq->todo_mcc_cq) {
6733b39a 2205 spin_lock_irqsave(&phba->isr_lock, flags);
72fb46a9 2206 pbe_eq->todo_mcc_cq = false;
6733b39a 2207 spin_unlock_irqrestore(&phba->isr_lock, flags);
756d29c8 2208 beiscsi_process_mcc_isr(phba);
6733b39a
JK		 2209 }
2210
72fb46a9 2211 if (pbe_eq->todo_cq) {
6733b39a 2212 spin_lock_irqsave(&phba->isr_lock, flags);
72fb46a9 2213 pbe_eq->todo_cq = false;
6733b39a 2214 spin_unlock_irqrestore(&phba->isr_lock, flags);
bfead3b2 2215 beiscsi_process_cq(pbe_eq);
6733b39a 2216 }
72fb46a9
JSJ		 2217
2218 /* rearm EQ for further interrupts */
2219 hwi_ring_eq_db(phba, pbe_eq->q.id, 0, 0, 1, 1);
6733b39a
JK		 2220}
2221
2222static int be_iopoll(struct blk_iopoll *iop, int budget)
2223{
ad3f428e 2224 unsigned int ret;
6733b39a 2225 struct beiscsi_hba *phba;
bfead3b2 2226 struct be_eq_obj *pbe_eq;
6733b39a 2227
bfead3b2
JK		 2228 pbe_eq = container_of(iop, struct be_eq_obj, iopoll);
2229 ret = beiscsi_process_cq(pbe_eq);
6733b39a 2230 if (ret < budget) {
bfead3b2 2231 phba = pbe_eq->phba;
6733b39a 2232 blk_iopoll_complete(iop);
99bc5d55
JSJ		 2233 beiscsi_log(phba, KERN_INFO,
2234 BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
2235 "BM_%d : rearm pbe_eq->q.id =%d\n",
2236 pbe_eq->q.id);
bfead3b2 2237 hwi_ring_eq_db(phba, pbe_eq->q.id, 0, 0, 1, 1);
6733b39a
JK		 2238 }
2239 return ret;
2240}
2241
09a1093a
JSJ		 2242static void
2243hwi_write_sgl_v2(struct iscsi_wrb *pwrb, struct scatterlist *sg,
2244 unsigned int num_sg, struct beiscsi_io_task *io_task)
2245{
2246 struct iscsi_sge *psgl;
2247 unsigned int sg_len, index;
2248 unsigned int sge_len = 0;
2249 unsigned long long addr;
2250 struct scatterlist *l_sg;
2251 unsigned int offset;
2252
2253 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, iscsi_bhs_addr_lo, pwrb,
2254 io_task->bhs_pa.u.a32.address_lo);
2255 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, iscsi_bhs_addr_hi, pwrb,
2256 io_task->bhs_pa.u.a32.address_hi);
2257
2258 l_sg = sg;
2259 for (index = 0; (index < num_sg) && (index < 2); index++,
2260 sg = sg_next(sg)) {
2261 if (index == 0) {
2262 sg_len = sg_dma_len(sg);
2263 addr = (u64) sg_dma_address(sg);
2264 AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
2265 sge0_addr_lo, pwrb,
2266 lower_32_bits(addr));
2267 AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
2268 sge0_addr_hi, pwrb,
2269 upper_32_bits(addr));
2270 AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
2271 sge0_len, pwrb,
2272 sg_len);
2273 sge_len = sg_len;
2274 } else {
2275 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sge1_r2t_offset,
2276 pwrb, sge_len);
2277 sg_len = sg_dma_len(sg);
2278 addr = (u64) sg_dma_address(sg);
2279 AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
2280 sge1_addr_lo, pwrb,
2281 lower_32_bits(addr));
2282 AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
2283 sge1_addr_hi, pwrb,
2284 upper_32_bits(addr));
2285 AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
2286 sge1_len, pwrb,
2287 sg_len);
2288 }
2289 }
2290 psgl = (struct iscsi_sge *)io_task->psgl_handle->pfrag;
2291 memset(psgl, 0, sizeof(*psgl) * BE2_SGE);
2292
2293 AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, io_task->bhs_len - 2);
2294
2295 AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl,
2296 io_task->bhs_pa.u.a32.address_hi);
2297 AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl,
2298 io_task->bhs_pa.u.a32.address_lo);
2299
2300 if (num_sg == 1) {
2301 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sge0_last, pwrb,
2302 1);
2303 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sge1_last, pwrb,
2304 0);
2305 } else if (num_sg == 2) {
2306 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sge0_last, pwrb,
2307 0);
2308 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sge1_last, pwrb,
2309 1);
2310 } else {
2311 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sge0_last, pwrb,
2312 0);
2313 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sge1_last, pwrb,
2314 0);
2315 }
2316
2317 sg = l_sg;
2318 psgl++;
2319 psgl++;
2320 offset = 0;
2321 for (index = 0; index < num_sg; index++, sg = sg_next(sg), psgl++) {
2322 sg_len = sg_dma_len(sg);
2323 addr = (u64) sg_dma_address(sg);
2324 AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl,
2325 lower_32_bits(addr));
2326 AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl,
2327 upper_32_bits(addr));
2328 AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, sg_len);
2329 AMAP_SET_BITS(struct amap_iscsi_sge, sge_offset, psgl, offset);
2330 AMAP_SET_BITS(struct amap_iscsi_sge, last_sge, psgl, 0);
2331 offset += sg_len;
2332 }
2333 psgl--;
2334 AMAP_SET_BITS(struct amap_iscsi_sge, last_sge, psgl, 1);
2335}
2336
6733b39a
JK		 2337static void
2338hwi_write_sgl(struct iscsi_wrb *pwrb, struct scatterlist *sg,
2339 unsigned int num_sg, struct beiscsi_io_task *io_task)
2340{
2341 struct iscsi_sge *psgl;
58ff4bd0 2342 unsigned int sg_len, index;
6733b39a
JK		 2343 unsigned int sge_len = 0;
2344 unsigned long long addr;
2345 struct scatterlist *l_sg;
2346 unsigned int offset;
2347
2348 AMAP_SET_BITS(struct amap_iscsi_wrb, iscsi_bhs_addr_lo, pwrb,
2349 io_task->bhs_pa.u.a32.address_lo);
2350 AMAP_SET_BITS(struct amap_iscsi_wrb, iscsi_bhs_addr_hi, pwrb,
2351 io_task->bhs_pa.u.a32.address_hi);
2352
2353 l_sg = sg;
48bd86cf
JK		 2354 for (index = 0; (index < num_sg) && (index < 2); index++,
2355 sg = sg_next(sg)) {
6733b39a
JK		 2356 if (index == 0) {
2357 sg_len = sg_dma_len(sg);
2358 addr = (u64) sg_dma_address(sg);
2359 AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_addr_lo, pwrb,
457ff3b7 2360 ((u32)(addr & 0xFFFFFFFF)));
6733b39a 2361 AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_addr_hi, pwrb,
457ff3b7 2362 ((u32)(addr >> 32)));
6733b39a
JK		 2363 AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_len, pwrb,
2364 sg_len);
2365 sge_len = sg_len;
6733b39a 2366 } else {
6733b39a
JK		 2367 AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_r2t_offset,
2368 pwrb, sge_len);
2369 sg_len = sg_dma_len(sg);
2370 addr = (u64) sg_dma_address(sg);
2371 AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_addr_lo, pwrb,
457ff3b7 2372 ((u32)(addr & 0xFFFFFFFF)));
6733b39a 2373 AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_addr_hi, pwrb,
457ff3b7 2374 ((u32)(addr >> 32)));
6733b39a
JK		 2375 AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_len, pwrb,
2376 sg_len);
2377 }
2378 }
2379 psgl = (struct iscsi_sge *)io_task->psgl_handle->pfrag;
2380 memset(psgl, 0, sizeof(*psgl) * BE2_SGE);
2381
2382 AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, io_task->bhs_len - 2);
2383
2384 AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl,
2385 io_task->bhs_pa.u.a32.address_hi);
2386 AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl,
2387 io_task->bhs_pa.u.a32.address_lo);
2388
caf818f1
JK		 2389 if (num_sg == 1) {
2390 AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_last, pwrb,
2391 1);
2392 AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_last, pwrb,
2393 0);
2394 } else if (num_sg == 2) {
2395 AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_last, pwrb,
2396 0);
2397 AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_last, pwrb,
2398 1);
2399 } else {
2400 AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_last, pwrb,
2401 0);
2402 AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_last, pwrb,
2403 0);
2404 }
6733b39a
JK		 2405 sg = l_sg;
2406 psgl++;
2407 psgl++;
2408 offset = 0;
48bd86cf 2409 for (index = 0; index < num_sg; index++, sg = sg_next(sg), psgl++) {
6733b39a
JK		 2410 sg_len = sg_dma_len(sg);
2411 addr = (u64) sg_dma_address(sg);
2412 AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl,
2413 (addr & 0xFFFFFFFF));
2414 AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl,
2415 (addr >> 32));
2416 AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, sg_len);
2417 AMAP_SET_BITS(struct amap_iscsi_sge, sge_offset, psgl, offset);
2418 AMAP_SET_BITS(struct amap_iscsi_sge, last_sge, psgl, 0);
2419 offset += sg_len;
2420 }
2421 psgl--;
2422 AMAP_SET_BITS(struct amap_iscsi_sge, last_sge, psgl, 1);
2423}
2424
d629c471
JSJ		 2425/**
2426 * hwi_write_buffer()- Populate the WRB with task info
2427 * @pwrb: ptr to the WRB entry
2428 * @task: iscsi task which is to be executed
2429 **/
6733b39a
JK		 2430static void hwi_write_buffer(struct iscsi_wrb *pwrb, struct iscsi_task *task)
2431{
2432 struct iscsi_sge *psgl;
6733b39a
JK		 2433 struct beiscsi_io_task *io_task = task->dd_data;
2434 struct beiscsi_conn *beiscsi_conn = io_task->conn;
2435 struct beiscsi_hba *phba = beiscsi_conn->phba;
09a1093a 2436 uint8_t dsp_value = 0;
6733b39a
JK		 2437
2438 io_task->bhs_len = sizeof(struct be_nonio_bhs) - 2;
2439 AMAP_SET_BITS(struct amap_iscsi_wrb, iscsi_bhs_addr_lo, pwrb,
2440 io_task->bhs_pa.u.a32.address_lo);
2441 AMAP_SET_BITS(struct amap_iscsi_wrb, iscsi_bhs_addr_hi, pwrb,
2442 io_task->bhs_pa.u.a32.address_hi);
2443
2444 if (task->data) {
09a1093a
JSJ		 2445
2446 /* Check for the data_count */
2447 dsp_value = (task->data_count) ? 1 : 0;
2448
2c9dfd36
JK		 2449 if (is_chip_be2_be3r(phba))
2450 AMAP_SET_BITS(struct amap_iscsi_wrb, dsp,
09a1093a
JSJ		 2451 pwrb, dsp_value);
2452 else
2c9dfd36 2453 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, dsp,
09a1093a
JSJ		 2454 pwrb, dsp_value);
2455
2456 /* Map addr only if there is data_count */
2457 if (dsp_value) {
d629c471
JSJ		 2458 io_task->mtask_addr = pci_map_single(phba->pcidev,
2459 task->data,
2460 task->data_count,
2461 PCI_DMA_TODEVICE);
d629c471 2462 io_task->mtask_data_count = task->data_count;
09a1093a 2463 } else
d629c471 2464 io_task->mtask_addr = 0;
09a1093a 2465
6733b39a 2466 AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_addr_lo, pwrb,
d629c471 2467 lower_32_bits(io_task->mtask_addr));
6733b39a 2468 AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_addr_hi, pwrb,
d629c471 2469 upper_32_bits(io_task->mtask_addr));
6733b39a
JK		 2470 AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_len, pwrb,
2471 task->data_count);
2472
2473 AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_last, pwrb, 1);
2474 } else {
2475 AMAP_SET_BITS(struct amap_iscsi_wrb, dsp, pwrb, 0);
d629c471 2476 io_task->mtask_addr = 0;
6733b39a
JK		 2477 }
2478
2479 psgl = (struct iscsi_sge *)io_task->psgl_handle->pfrag;
2480
2481 AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, io_task->bhs_len);
2482
2483 AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl,
2484 io_task->bhs_pa.u.a32.address_hi);
2485 AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl,
2486 io_task->bhs_pa.u.a32.address_lo);
2487 if (task->data) {
2488 psgl++;
2489 AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl, 0);
2490 AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl, 0);
2491 AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, 0);
2492 AMAP_SET_BITS(struct amap_iscsi_sge, sge_offset, psgl, 0);
2493 AMAP_SET_BITS(struct amap_iscsi_sge, rsvd0, psgl, 0);
2494 AMAP_SET_BITS(struct amap_iscsi_sge, last_sge, psgl, 0);
2495
2496 psgl++;
2497 if (task->data) {
2498 AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl,
d629c471 2499 lower_32_bits(io_task->mtask_addr));
6733b39a 2500 AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl,
d629c471 2501 upper_32_bits(io_task->mtask_addr));
6733b39a
JK		 2502 }
2503 AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, 0x106);
2504 }
2505 AMAP_SET_BITS(struct amap_iscsi_sge, last_sge, psgl, 1);
2506}
2507
843ae752
JK		 2508/**
2509 * beiscsi_find_mem_req()- Find mem needed
2510 * @phba: ptr to HBA struct
2511 **/
6733b39a
JK		 2512static void beiscsi_find_mem_req(struct beiscsi_hba *phba)
2513{
8a86e833 2514 uint8_t mem_descr_index, ulp_num;
bfead3b2 2515 unsigned int num_cq_pages, num_async_pdu_buf_pages;
6733b39a
JK		 2516 unsigned int num_async_pdu_data_pages, wrb_sz_per_cxn;
2517 unsigned int num_async_pdu_buf_sgl_pages, num_async_pdu_data_sgl_pages;
2518
2519 num_cq_pages = PAGES_REQUIRED(phba->params.num_cq_entries * \
2520 sizeof(struct sol_cqe));
6733b39a
JK		 2521
2522 phba->params.hwi_ws_sz = sizeof(struct hwi_controller);
2523
2524 phba->mem_req[ISCSI_MEM_GLOBAL_HEADER] = 2 *
2525 BE_ISCSI_PDU_HEADER_SIZE;
2526 phba->mem_req[HWI_MEM_ADDN_CONTEXT] =
2527 sizeof(struct hwi_context_memory);
2528
6733b39a
JK		 2529
2530 phba->mem_req[HWI_MEM_WRB] = sizeof(struct iscsi_wrb)
2531 * (phba->params.wrbs_per_cxn)
2532 * phba->params.cxns_per_ctrl;
2533 wrb_sz_per_cxn = sizeof(struct wrb_handle) *
2534 (phba->params.wrbs_per_cxn);
2535 phba->mem_req[HWI_MEM_WRBH] = roundup_pow_of_two((wrb_sz_per_cxn) *
2536 phba->params.cxns_per_ctrl);
2537
2538 phba->mem_req[HWI_MEM_SGLH] = sizeof(struct sgl_handle) *
2539 phba->params.icds_per_ctrl;
2540 phba->mem_req[HWI_MEM_SGE] = sizeof(struct iscsi_sge) *
2541 phba->params.num_sge_per_io * phba->params.icds_per_ctrl;
8a86e833
JK		 2542 for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
2543 if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
6733b39a 2544
8a86e833
JK		 2545 num_async_pdu_buf_sgl_pages =
2546 PAGES_REQUIRED(BEISCSI_GET_CID_COUNT(
2547 phba, ulp_num) *
2548 sizeof(struct phys_addr));
2549
2550 num_async_pdu_buf_pages =
2551 PAGES_REQUIRED(BEISCSI_GET_CID_COUNT(
2552 phba, ulp_num) *
2553 phba->params.defpdu_hdr_sz);
2554
2555 num_async_pdu_data_pages =
2556 PAGES_REQUIRED(BEISCSI_GET_CID_COUNT(
2557 phba, ulp_num) *
2558 phba->params.defpdu_data_sz);
2559
2560 num_async_pdu_data_sgl_pages =
2561 PAGES_REQUIRED(BEISCSI_GET_CID_COUNT(
2562 phba, ulp_num) *
2563 sizeof(struct phys_addr));
2564
a129d92f
JK		 2565 mem_descr_index = (HWI_MEM_TEMPLATE_HDR_ULP0 +
2566 (ulp_num * MEM_DESCR_OFFSET));
2567 phba->mem_req[mem_descr_index] =
2568 BEISCSI_GET_CID_COUNT(phba, ulp_num) *
2569 BEISCSI_TEMPLATE_HDR_PER_CXN_SIZE;
2570
8a86e833
JK		 2571 mem_descr_index = (HWI_MEM_ASYNC_HEADER_BUF_ULP0 +
2572 (ulp_num * MEM_DESCR_OFFSET));
2573 phba->mem_req[mem_descr_index] =
2574 num_async_pdu_buf_pages *
2575 PAGE_SIZE;
2576
2577 mem_descr_index = (HWI_MEM_ASYNC_DATA_BUF_ULP0 +
2578 (ulp_num * MEM_DESCR_OFFSET));
2579 phba->mem_req[mem_descr_index] =
2580 num_async_pdu_data_pages *
2581 PAGE_SIZE;
2582
2583 mem_descr_index = (HWI_MEM_ASYNC_HEADER_RING_ULP0 +
2584 (ulp_num * MEM_DESCR_OFFSET));
2585 phba->mem_req[mem_descr_index] =
2586 num_async_pdu_buf_sgl_pages *
2587 PAGE_SIZE;
2588
2589 mem_descr_index = (HWI_MEM_ASYNC_DATA_RING_ULP0 +
2590 (ulp_num * MEM_DESCR_OFFSET));
2591 phba->mem_req[mem_descr_index] =
2592 num_async_pdu_data_sgl_pages *
2593 PAGE_SIZE;
2594
2595 mem_descr_index = (HWI_MEM_ASYNC_HEADER_HANDLE_ULP0 +
2596 (ulp_num * MEM_DESCR_OFFSET));
2597 phba->mem_req[mem_descr_index] =
2598 BEISCSI_GET_CID_COUNT(phba, ulp_num) *
2599 sizeof(struct async_pdu_handle);
2600
2601 mem_descr_index = (HWI_MEM_ASYNC_DATA_HANDLE_ULP0 +
2602 (ulp_num * MEM_DESCR_OFFSET));
2603 phba->mem_req[mem_descr_index] =
2604 BEISCSI_GET_CID_COUNT(phba, ulp_num) *
2605 sizeof(struct async_pdu_handle);
2606
2607 mem_descr_index = (HWI_MEM_ASYNC_PDU_CONTEXT_ULP0 +
2608 (ulp_num * MEM_DESCR_OFFSET));
2609 phba->mem_req[mem_descr_index] =
2610 sizeof(struct hwi_async_pdu_context) +
2611 (BEISCSI_GET_CID_COUNT(phba, ulp_num) *
2612 sizeof(struct hwi_async_entry));
2613 }
2614 }
6733b39a
JK		 2615}
2616
2617static int beiscsi_alloc_mem(struct beiscsi_hba *phba)
2618{
6733b39a 2619 dma_addr_t bus_add;
a7909b39
JK		 2620 struct hwi_controller *phwi_ctrlr;
2621 struct be_mem_descriptor *mem_descr;
6733b39a
JK		 2622 struct mem_array *mem_arr, *mem_arr_orig;
2623 unsigned int i, j, alloc_size, curr_alloc_size;
2624
3ec78271 2625 phba->phwi_ctrlr = kzalloc(phba->params.hwi_ws_sz, GFP_KERNEL);
6733b39a
JK		 2626 if (!phba->phwi_ctrlr)
2627 return -ENOMEM;
2628
a7909b39
JK		 2629 /* Allocate memory for wrb_context */
2630 phwi_ctrlr = phba->phwi_ctrlr;
2631 phwi_ctrlr->wrb_context = kzalloc(sizeof(struct hwi_wrb_context) *
2632 phba->params.cxns_per_ctrl,
2633 GFP_KERNEL);
2634 if (!phwi_ctrlr->wrb_context)
2635 return -ENOMEM;
2636
6733b39a
JK		 2637 phba->init_mem = kcalloc(SE_MEM_MAX, sizeof(*mem_descr),
2638 GFP_KERNEL);
2639 if (!phba->init_mem) {
a7909b39 2640 kfree(phwi_ctrlr->wrb_context);
6733b39a
JK		 2641 kfree(phba->phwi_ctrlr);
2642 return -ENOMEM;
2643 }
2644
2645 mem_arr_orig = kmalloc(sizeof(*mem_arr_orig) * BEISCSI_MAX_FRAGS_INIT,
2646 GFP_KERNEL);
2647 if (!mem_arr_orig) {
2648 kfree(phba->init_mem);
a7909b39 2649 kfree(phwi_ctrlr->wrb_context);
6733b39a
JK		 2650 kfree(phba->phwi_ctrlr);
2651 return -ENOMEM;
2652 }
2653
2654 mem_descr = phba->init_mem;
2655 for (i = 0; i < SE_MEM_MAX; i++) {
8a86e833
JK		 2656 if (!phba->mem_req[i]) {
2657 mem_descr->mem_array = NULL;
2658 mem_descr++;
2659 continue;
2660 }
2661
6733b39a
JK		 2662 j = 0;
2663 mem_arr = mem_arr_orig;
2664 alloc_size = phba->mem_req[i];
2665 memset(mem_arr, 0, sizeof(struct mem_array) *
2666 BEISCSI_MAX_FRAGS_INIT);
2667 curr_alloc_size = min(be_max_phys_size * 1024, alloc_size);
2668 do {
2669 mem_arr->virtual_address = pci_alloc_consistent(
2670 phba->pcidev,
2671 curr_alloc_size,
2672 &bus_add);
2673 if (!mem_arr->virtual_address) {
2674 if (curr_alloc_size <= BE_MIN_MEM_SIZE)
2675 goto free_mem;
2676 if (curr_alloc_size -
2677 rounddown_pow_of_two(curr_alloc_size))
2678 curr_alloc_size = rounddown_pow_of_two
2679 (curr_alloc_size);
2680 else
2681 curr_alloc_size = curr_alloc_size / 2;
2682 } else {
2683 mem_arr->bus_address.u.
2684 a64.address = (__u64) bus_add;
2685 mem_arr->size = curr_alloc_size;
2686 alloc_size -= curr_alloc_size;
2687 curr_alloc_size = min(be_max_phys_size *
2688 1024, alloc_size);
2689 j++;
2690 mem_arr++;
2691 }
2692 } while (alloc_size);
2693 mem_descr->num_elements = j;
2694 mem_descr->size_in_bytes = phba->mem_req[i];
2695 mem_descr->mem_array = kmalloc(sizeof(*mem_arr) * j,
2696 GFP_KERNEL);
2697 if (!mem_descr->mem_array)
2698 goto free_mem;
2699
2700 memcpy(mem_descr->mem_array, mem_arr_orig,
2701 sizeof(struct mem_array) * j);
2702 mem_descr++;
2703 }
2704 kfree(mem_arr_orig);
2705 return 0;
2706free_mem:
2707 mem_descr->num_elements = j;
2708 while ((i) || (j)) {
2709 for (j = mem_descr->num_elements; j > 0; j--) {
2710 pci_free_consistent(phba->pcidev,
2711 mem_descr->mem_array[j - 1].size,
2712 mem_descr->mem_array[j - 1].
2713 virtual_address,
457ff3b7
JK		 2714 (unsigned long)mem_descr->
2715 mem_array[j - 1].
6733b39a
JK		 2716 bus_address.u.a64.address);
2717 }
2718 if (i) {
2719 i--;
2720 kfree(mem_descr->mem_array);
2721 mem_descr--;
2722 }
2723 }
2724 kfree(mem_arr_orig);
2725 kfree(phba->init_mem);
a7909b39 2726 kfree(phba->phwi_ctrlr->wrb_context);
6733b39a
JK		 2727 kfree(phba->phwi_ctrlr);
2728 return -ENOMEM;
2729}
2730
2731static int beiscsi_get_memory(struct beiscsi_hba *phba)
2732{
2733 beiscsi_find_mem_req(phba);
2734 return beiscsi_alloc_mem(phba);
2735}
2736
2737static void iscsi_init_global_templates(struct beiscsi_hba *phba)
2738{
2739 struct pdu_data_out *pdata_out;
2740 struct pdu_nop_out *pnop_out;
2741 struct be_mem_descriptor *mem_descr;
2742
2743 mem_descr = phba->init_mem;
2744 mem_descr += ISCSI_MEM_GLOBAL_HEADER;
2745 pdata_out =
2746 (struct pdu_data_out *)mem_descr->mem_array[0].virtual_address;
2747 memset(pdata_out, 0, BE_ISCSI_PDU_HEADER_SIZE);
2748
2749 AMAP_SET_BITS(struct amap_pdu_data_out, opcode, pdata_out,
2750 IIOC_SCSI_DATA);
2751
2752 pnop_out =
2753 (struct pdu_nop_out *)((unsigned char *)mem_descr->mem_array[0].
2754 virtual_address + BE_ISCSI_PDU_HEADER_SIZE);
2755
2756 memset(pnop_out, 0, BE_ISCSI_PDU_HEADER_SIZE);
2757 AMAP_SET_BITS(struct amap_pdu_nop_out, ttt, pnop_out, 0xFFFFFFFF);
2758 AMAP_SET_BITS(struct amap_pdu_nop_out, f_bit, pnop_out, 1);
2759 AMAP_SET_BITS(struct amap_pdu_nop_out, i_bit, pnop_out, 0);
2760}
2761
3ec78271 2762static int beiscsi_init_wrb_handle(struct beiscsi_hba *phba)
6733b39a
JK		 2763{
2764 struct be_mem_descriptor *mem_descr_wrbh, *mem_descr_wrb;
a7909b39 2765 struct hwi_context_memory *phwi_ctxt;
3ec78271 2766 struct wrb_handle *pwrb_handle = NULL;
6733b39a
JK		 2767 struct hwi_controller *phwi_ctrlr;
2768 struct hwi_wrb_context *pwrb_context;
3ec78271
JK		 2769 struct iscsi_wrb *pwrb = NULL;
2770 unsigned int num_cxn_wrbh = 0;
2771 unsigned int num_cxn_wrb = 0, j, idx = 0, index;
6733b39a
JK		 2772
2773 mem_descr_wrbh = phba->init_mem;
2774 mem_descr_wrbh += HWI_MEM_WRBH;
2775
2776 mem_descr_wrb = phba->init_mem;
2777 mem_descr_wrb += HWI_MEM_WRB;
6733b39a
JK		 2778 phwi_ctrlr = phba->phwi_ctrlr;
2779
a7909b39
JK		 2780 /* Allocate memory for WRBQ */
2781 phwi_ctxt = phwi_ctrlr->phwi_ctxt;
2782 phwi_ctxt->be_wrbq = kzalloc(sizeof(struct be_queue_info) *
843ae752 2783 phba->params.cxns_per_ctrl,
a7909b39
JK		 2784 GFP_KERNEL);
2785 if (!phwi_ctxt->be_wrbq) {
2786 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
2787 "BM_%d : WRBQ Mem Alloc Failed\n");
2788 return -ENOMEM;
2789 }
2790
2791 for (index = 0; index < phba->params.cxns_per_ctrl; index++) {
6733b39a 2792 pwrb_context = &phwi_ctrlr->wrb_context[index];
6733b39a
JK		 2793 pwrb_context->pwrb_handle_base =
2794 kzalloc(sizeof(struct wrb_handle *) *
2795 phba->params.wrbs_per_cxn, GFP_KERNEL);
3ec78271 2796 if (!pwrb_context->pwrb_handle_base) {
99bc5d55
JSJ		 2797 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
2798 "BM_%d : Mem Alloc Failed. Failing to load\n");
3ec78271
JK		 2799 goto init_wrb_hndl_failed;
2800 }
6733b39a
JK		 2801 pwrb_context->pwrb_handle_basestd =
2802 kzalloc(sizeof(struct wrb_handle *) *
2803 phba->params.wrbs_per_cxn, GFP_KERNEL);
3ec78271 2804 if (!pwrb_context->pwrb_handle_basestd) {
99bc5d55
JSJ		 2805 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
2806 "BM_%d : Mem Alloc Failed. Failing to load\n");
3ec78271
JK		 2807 goto init_wrb_hndl_failed;
2808 }
2809 if (!num_cxn_wrbh) {
2810 pwrb_handle =
2811 mem_descr_wrbh->mem_array[idx].virtual_address;
2812 num_cxn_wrbh = ((mem_descr_wrbh->mem_array[idx].size) /
2813 ((sizeof(struct wrb_handle)) *
2814 phba->params.wrbs_per_cxn));
2815 idx++;
2816 }
2817 pwrb_context->alloc_index = 0;
2818 pwrb_context->wrb_handles_available = 0;
2819 pwrb_context->free_index = 0;
2820
6733b39a 2821 if (num_cxn_wrbh) {
6733b39a
JK		 2822 for (j = 0; j < phba->params.wrbs_per_cxn; j++) {
2823 pwrb_context->pwrb_handle_base[j] = pwrb_handle;
2824 pwrb_context->pwrb_handle_basestd[j] =
2825 pwrb_handle;
2826 pwrb_context->wrb_handles_available++;
bfead3b2 2827 pwrb_handle->wrb_index = j;
6733b39a
JK		 2828 pwrb_handle++;
2829 }
6733b39a
JK		 2830 num_cxn_wrbh--;
2831 }
2832 }
2833 idx = 0;
a7909b39 2834 for (index = 0; index < phba->params.cxns_per_ctrl; index++) {
6733b39a 2835 pwrb_context = &phwi_ctrlr->wrb_context[index];
3ec78271 2836 if (!num_cxn_wrb) {
6733b39a 2837 pwrb = mem_descr_wrb->mem_array[idx].virtual_address;
7c56533c 2838 num_cxn_wrb = (mem_descr_wrb->mem_array[idx].size) /
3ec78271
JK		 2839 ((sizeof(struct iscsi_wrb) *
2840 phba->params.wrbs_per_cxn));
2841 idx++;
2842 }
2843
2844 if (num_cxn_wrb) {
6733b39a
JK		 2845 for (j = 0; j < phba->params.wrbs_per_cxn; j++) {
2846 pwrb_handle = pwrb_context->pwrb_handle_base[j];
2847 pwrb_handle->pwrb = pwrb;
2848 pwrb++;
2849 }
2850 num_cxn_wrb--;
2851 }
2852 }
3ec78271
JK		 2853 return 0;
2854init_wrb_hndl_failed:
2855 for (j = index; j > 0; j--) {
2856 pwrb_context = &phwi_ctrlr->wrb_context[j];
2857 kfree(pwrb_context->pwrb_handle_base);
2858 kfree(pwrb_context->pwrb_handle_basestd);
2859 }
2860 return -ENOMEM;
6733b39a
JK		 2861}
2862
a7909b39 2863static int hwi_init_async_pdu_ctx(struct beiscsi_hba *phba)
6733b39a 2864{
8a86e833 2865 uint8_t ulp_num;
6733b39a
JK		 2866 struct hwi_controller *phwi_ctrlr;
2867 struct hba_parameters *p = &phba->params;
2868 struct hwi_async_pdu_context *pasync_ctx;
2869 struct async_pdu_handle *pasync_header_h, *pasync_data_h;
dc63aac6 2870 unsigned int index, idx, num_per_mem, num_async_data;
6733b39a
JK		 2871 struct be_mem_descriptor *mem_descr;
2872
8a86e833
JK		 2873 for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
2874 if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
6733b39a 2875
8a86e833
JK		 2876 mem_descr = (struct be_mem_descriptor *)phba->init_mem;
2877 mem_descr += (HWI_MEM_ASYNC_PDU_CONTEXT_ULP0 +
2878 (ulp_num * MEM_DESCR_OFFSET));
2879
2880 phwi_ctrlr = phba->phwi_ctrlr;
2881 phwi_ctrlr->phwi_ctxt->pasync_ctx[ulp_num] =
2882 (struct hwi_async_pdu_context *)
2883 mem_descr->mem_array[0].virtual_address;
2884
2885 pasync_ctx = phwi_ctrlr->phwi_ctxt->pasync_ctx[ulp_num];
2886 memset(pasync_ctx, 0, sizeof(*pasync_ctx));
2887
2888 pasync_ctx->async_entry =
2889 (struct hwi_async_entry *)
2890 ((long unsigned int)pasync_ctx +
2891 sizeof(struct hwi_async_pdu_context));
2892
2893 pasync_ctx->num_entries = BEISCSI_GET_CID_COUNT(phba,
2894 ulp_num);
2895 pasync_ctx->buffer_size = p->defpdu_hdr_sz;
2896
2897 mem_descr = (struct be_mem_descriptor *)phba->init_mem;
2898 mem_descr += HWI_MEM_ASYNC_HEADER_BUF_ULP0 +
2899 (ulp_num * MEM_DESCR_OFFSET);
2900 if (mem_descr->mem_array[0].virtual_address) {
2901 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
2902 "BM_%d : hwi_init_async_pdu_ctx"
2903 " HWI_MEM_ASYNC_HEADER_BUF_ULP%d va=%p\n",
2904 ulp_num,
2905 mem_descr->mem_array[0].
2906 virtual_address);
2907 } else
2908 beiscsi_log(phba, KERN_WARNING,
2909 BEISCSI_LOG_INIT,
2910 "BM_%d : No Virtual address for ULP : %d\n",
2911 ulp_num);
2912
2913 pasync_ctx->async_header.va_base =
6733b39a 2914 mem_descr->mem_array[0].virtual_address;
6733b39a 2915
8a86e833
JK		 2916 pasync_ctx->async_header.pa_base.u.a64.address =
2917 mem_descr->mem_array[0].
2918 bus_address.u.a64.address;
6733b39a 2919
8a86e833
JK		 2920 mem_descr = (struct be_mem_descriptor *)phba->init_mem;
2921 mem_descr += HWI_MEM_ASYNC_HEADER_RING_ULP0 +
2922 (ulp_num * MEM_DESCR_OFFSET);
2923 if (mem_descr->mem_array[0].virtual_address) {
2924 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
2925 "BM_%d : hwi_init_async_pdu_ctx"
2926 " HWI_MEM_ASYNC_HEADER_RING_ULP%d va=%p\n",
2927 ulp_num,
2928 mem_descr->mem_array[0].
2929 virtual_address);
2930 } else
2931 beiscsi_log(phba, KERN_WARNING,
2932 BEISCSI_LOG_INIT,
2933 "BM_%d : No Virtual address for ULP : %d\n",
2934 ulp_num);
2935
2936 pasync_ctx->async_header.ring_base =
2937 mem_descr->mem_array[0].virtual_address;
6733b39a 2938
8a86e833
JK		 2939 mem_descr = (struct be_mem_descriptor *)phba->init_mem;
2940 mem_descr += HWI_MEM_ASYNC_HEADER_HANDLE_ULP0 +
2941 (ulp_num * MEM_DESCR_OFFSET);
2942 if (mem_descr->mem_array[0].virtual_address) {
2943 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
2944 "BM_%d : hwi_init_async_pdu_ctx"
2945 " HWI_MEM_ASYNC_HEADER_HANDLE_ULP%d va=%p\n",
2946 ulp_num,
2947 mem_descr->mem_array[0].
2948 virtual_address);
2949 } else
2950 beiscsi_log(phba, KERN_WARNING,
2951 BEISCSI_LOG_INIT,
2952 "BM_%d : No Virtual address for ULP : %d\n",
2953 ulp_num);
2954
2955 pasync_ctx->async_header.handle_base =
2956 mem_descr->mem_array[0].virtual_address;
2957 pasync_ctx->async_header.writables = 0;
2958 INIT_LIST_HEAD(&pasync_ctx->async_header.free_list);
2959
2960 mem_descr = (struct be_mem_descriptor *)phba->init_mem;
2961 mem_descr += HWI_MEM_ASYNC_DATA_RING_ULP0 +
2962 (ulp_num * MEM_DESCR_OFFSET);
2963 if (mem_descr->mem_array[0].virtual_address) {
2964 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
2965 "BM_%d : hwi_init_async_pdu_ctx"
2966 " HWI_MEM_ASYNC_DATA_RING_ULP%d va=%p\n",
2967 ulp_num,
2968 mem_descr->mem_array[0].
2969 virtual_address);
2970 } else
2971 beiscsi_log(phba, KERN_WARNING,
2972 BEISCSI_LOG_INIT,
2973 "BM_%d : No Virtual address for ULP : %d\n",
2974 ulp_num);
2975
2976 pasync_ctx->async_data.ring_base =
2977 mem_descr->mem_array[0].virtual_address;
6733b39a 2978
8a86e833
JK		 2979 mem_descr = (struct be_mem_descriptor *)phba->init_mem;
2980 mem_descr += HWI_MEM_ASYNC_DATA_HANDLE_ULP0 +
2981 (ulp_num * MEM_DESCR_OFFSET);
2982 if (!mem_descr->mem_array[0].virtual_address)
2983 beiscsi_log(phba, KERN_WARNING,
2984 BEISCSI_LOG_INIT,
2985 "BM_%d : No Virtual address for ULP : %d\n",
2986 ulp_num);
99bc5d55 2987
8a86e833
JK		 2988 pasync_ctx->async_data.handle_base =
2989 mem_descr->mem_array[0].virtual_address;
2990 pasync_ctx->async_data.writables = 0;
2991 INIT_LIST_HEAD(&pasync_ctx->async_data.free_list);
2992
2993 pasync_header_h =
2994 (struct async_pdu_handle *)
2995 pasync_ctx->async_header.handle_base;
2996 pasync_data_h =
2997 (struct async_pdu_handle *)
2998 pasync_ctx->async_data.handle_base;
2999
3000 mem_descr = (struct be_mem_descriptor *)phba->init_mem;
3001 mem_descr += HWI_MEM_ASYNC_DATA_BUF_ULP0 +
3002 (ulp_num * MEM_DESCR_OFFSET);
3003 if (mem_descr->mem_array[0].virtual_address) {
3004 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3005 "BM_%d : hwi_init_async_pdu_ctx"
3006 " HWI_MEM_ASYNC_DATA_BUF_ULP%d va=%p\n",
3007 ulp_num,
3008 mem_descr->mem_array[0].
3009 virtual_address);
3010 } else
3011 beiscsi_log(phba, KERN_WARNING,
3012 BEISCSI_LOG_INIT,
3013 "BM_%d : No Virtual address for ULP : %d\n",
3014 ulp_num);
3015
3016 idx = 0;
dc63aac6
JK		 3017 pasync_ctx->async_data.va_base =
3018 mem_descr->mem_array[idx].virtual_address;
3019 pasync_ctx->async_data.pa_base.u.a64.address =
3020 mem_descr->mem_array[idx].
3021 bus_address.u.a64.address;
3022
3023 num_async_data = ((mem_descr->mem_array[idx].size) /
3024 phba->params.defpdu_data_sz);
8a86e833 3025 num_per_mem = 0;
6733b39a 3026
8a86e833
JK		 3027 for (index = 0; index < BEISCSI_GET_CID_COUNT
3028 (phba, ulp_num); index++) {
3029 pasync_header_h->cri = -1;
3030 pasync_header_h->index = (char)index;
3031 INIT_LIST_HEAD(&pasync_header_h->link);
3032 pasync_header_h->pbuffer =
3033 (void *)((unsigned long)
3034 (pasync_ctx->
3035 async_header.va_base) +
3036 (p->defpdu_hdr_sz * index));
3037
3038 pasync_header_h->pa.u.a64.address =
3039 pasync_ctx->async_header.pa_base.u.a64.
3040 address + (p->defpdu_hdr_sz * index);
3041
3042 list_add_tail(&pasync_header_h->link,
3043 &pasync_ctx->async_header.
3044 free_list);
3045 pasync_header_h++;
3046 pasync_ctx->async_header.free_entries++;
3047 pasync_ctx->async_header.writables++;
3048
3049 INIT_LIST_HEAD(&pasync_ctx->async_entry[index].
3050 wait_queue.list);
3051 INIT_LIST_HEAD(&pasync_ctx->async_entry[index].
3052 header_busy_list);
3053 pasync_data_h->cri = -1;
3054 pasync_data_h->index = (char)index;
3055 INIT_LIST_HEAD(&pasync_data_h->link);
3056
3057 if (!num_async_data) {
3058 num_per_mem = 0;
3059 idx++;
3060 pasync_ctx->async_data.va_base =
3061 mem_descr->mem_array[idx].
3062 virtual_address;
3063 pasync_ctx->async_data.pa_base.u.
3064 a64.address =
3065 mem_descr->mem_array[idx].
3066 bus_address.u.a64.address;
3067 num_async_data =
3068 ((mem_descr->mem_array[idx].
3069 size) /
3070 phba->params.defpdu_data_sz);
3071 }
3072 pasync_data_h->pbuffer =
3073 (void *)((unsigned long)
3074 (pasync_ctx->async_data.va_base) +
3075 (p->defpdu_data_sz * num_per_mem));
3076
3077 pasync_data_h->pa.u.a64.address =
3078 pasync_ctx->async_data.pa_base.u.a64.
3079 address + (p->defpdu_data_sz *
3080 num_per_mem);
3081 num_per_mem++;
3082 num_async_data--;
3083
3084 list_add_tail(&pasync_data_h->link,
3085 &pasync_ctx->async_data.
3086 free_list);
3087 pasync_data_h++;
3088 pasync_ctx->async_data.free_entries++;
3089 pasync_ctx->async_data.writables++;
3090
3091 INIT_LIST_HEAD(&pasync_ctx->async_entry[index].
3092 data_busy_list);
3093 }
6733b39a 3094
8a86e833
JK		 3095 pasync_ctx->async_header.host_write_ptr = 0;
3096 pasync_ctx->async_header.ep_read_ptr = -1;
3097 pasync_ctx->async_data.host_write_ptr = 0;
3098 pasync_ctx->async_data.ep_read_ptr = -1;
3099 }
6733b39a
JK		 3100 }
3101
a7909b39 3102 return 0;
6733b39a
JK		 3103}
3104
3105static int
3106be_sgl_create_contiguous(void *virtual_address,
3107 u64 physical_address, u32 length,
3108 struct be_dma_mem *sgl)
3109{
3110 WARN_ON(!virtual_address);
3111 WARN_ON(!physical_address);
3112 WARN_ON(!length > 0);
3113 WARN_ON(!sgl);
3114
3115 sgl->va = virtual_address;
457ff3b7 3116 sgl->dma = (unsigned long)physical_address;
6733b39a
JK		 3117 sgl->size = length;
3118
3119 return 0;
3120}
3121
3122static void be_sgl_destroy_contiguous(struct be_dma_mem *sgl)
3123{
3124 memset(sgl, 0, sizeof(*sgl));
3125}
3126
3127static void
3128hwi_build_be_sgl_arr(struct beiscsi_hba *phba,
3129 struct mem_array *pmem, struct be_dma_mem *sgl)
3130{
3131 if (sgl->va)
3132 be_sgl_destroy_contiguous(sgl);
3133
3134 be_sgl_create_contiguous(pmem->virtual_address,
3135 pmem->bus_address.u.a64.address,
3136 pmem->size, sgl);
3137}
3138
3139static void
3140hwi_build_be_sgl_by_offset(struct beiscsi_hba *phba,
3141 struct mem_array *pmem, struct be_dma_mem *sgl)
3142{
3143 if (sgl->va)
3144 be_sgl_destroy_contiguous(sgl);
3145
3146 be_sgl_create_contiguous((unsigned char *)pmem->virtual_address,
3147 pmem->bus_address.u.a64.address,
3148 pmem->size, sgl);
3149}
3150
3151static int be_fill_queue(struct be_queue_info *q,
3152 u16 len, u16 entry_size, void *vaddress)
3153{
3154 struct be_dma_mem *mem = &q->dma_mem;
3155
3156 memset(q, 0, sizeof(*q));
3157 q->len = len;
3158 q->entry_size = entry_size;
3159 mem->size = len * entry_size;
3160 mem->va = vaddress;
3161 if (!mem->va)
3162 return -ENOMEM;
3163 memset(mem->va, 0, mem->size);
3164 return 0;
3165}
3166
bfead3b2 3167static int beiscsi_create_eqs(struct beiscsi_hba *phba,
6733b39a
JK		 3168 struct hwi_context_memory *phwi_context)
3169{
bfead3b2 3170 unsigned int i, num_eq_pages;
99bc5d55 3171 int ret = 0, eq_for_mcc;
6733b39a
JK		 3172 struct be_queue_info *eq;
3173 struct be_dma_mem *mem;
6733b39a 3174 void *eq_vaddress;
bfead3b2 3175 dma_addr_t paddr;
6733b39a 3176
bfead3b2
JK		 3177 num_eq_pages = PAGES_REQUIRED(phba->params.num_eq_entries * \
3178 sizeof(struct be_eq_entry));
6733b39a 3179
bfead3b2
JK		 3180 if (phba->msix_enabled)
3181 eq_for_mcc = 1;
3182 else
3183 eq_for_mcc = 0;
3184 for (i = 0; i < (phba->num_cpus + eq_for_mcc); i++) {
3185 eq = &phwi_context->be_eq[i].q;
3186 mem = &eq->dma_mem;
3187 phwi_context->be_eq[i].phba = phba;
3188 eq_vaddress = pci_alloc_consistent(phba->pcidev,
3189 num_eq_pages * PAGE_SIZE,
3190 &paddr);
3191 if (!eq_vaddress)
3192 goto create_eq_error;
3193
3194 mem->va = eq_vaddress;
3195 ret = be_fill_queue(eq, phba->params.num_eq_entries,
3196 sizeof(struct be_eq_entry), eq_vaddress);
3197 if (ret) {
99bc5d55
JSJ		 3198 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3199 "BM_%d : be_fill_queue Failed for EQ\n");
bfead3b2
JK		 3200 goto create_eq_error;
3201 }
6733b39a 3202
bfead3b2
JK		 3203 mem->dma = paddr;
3204 ret = beiscsi_cmd_eq_create(&phba->ctrl, eq,
3205 phwi_context->cur_eqd);
3206 if (ret) {
99bc5d55
JSJ		 3207 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3208 "BM_%d : beiscsi_cmd_eq_create"
3209 "Failed for EQ\n");
bfead3b2
JK		 3210 goto create_eq_error;
3211 }
99bc5d55
JSJ		 3212
3213 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3214 "BM_%d : eqid = %d\n",
3215 phwi_context->be_eq[i].q.id);
6733b39a 3216 }
6733b39a 3217 return 0;
bfead3b2 3218create_eq_error:
107dfcba 3219 for (i = 0; i < (phba->num_cpus + eq_for_mcc); i++) {
bfead3b2
JK		 3220 eq = &phwi_context->be_eq[i].q;
3221 mem = &eq->dma_mem;
3222 if (mem->va)
3223 pci_free_consistent(phba->pcidev, num_eq_pages
3224 * PAGE_SIZE,
3225 mem->va, mem->dma);
3226 }
3227 return ret;
6733b39a
JK		 3228}
3229
bfead3b2 3230static int beiscsi_create_cqs(struct beiscsi_hba *phba,
6733b39a
JK		 3231 struct hwi_context_memory *phwi_context)
3232{
bfead3b2 3233 unsigned int i, num_cq_pages;
99bc5d55 3234 int ret = 0;
6733b39a
JK		 3235 struct be_queue_info *cq, *eq;
3236 struct be_dma_mem *mem;
bfead3b2 3237 struct be_eq_obj *pbe_eq;
6733b39a 3238 void *cq_vaddress;
bfead3b2 3239 dma_addr_t paddr;
6733b39a 3240
bfead3b2
JK		 3241 num_cq_pages = PAGES_REQUIRED(phba->params.num_cq_entries * \
3242 sizeof(struct sol_cqe));
6733b39a 3243
bfead3b2
JK		 3244 for (i = 0; i < phba->num_cpus; i++) {
3245 cq = &phwi_context->be_cq[i];
3246 eq = &phwi_context->be_eq[i].q;
3247 pbe_eq = &phwi_context->be_eq[i];
3248 pbe_eq->cq = cq;
3249 pbe_eq->phba = phba;
3250 mem = &cq->dma_mem;
3251 cq_vaddress = pci_alloc_consistent(phba->pcidev,
3252 num_cq_pages * PAGE_SIZE,
3253 &paddr);
3254 if (!cq_vaddress)
3255 goto create_cq_error;
7da50879 3256 ret = be_fill_queue(cq, phba->params.num_cq_entries,
bfead3b2
JK		 3257 sizeof(struct sol_cqe), cq_vaddress);
3258 if (ret) {
99bc5d55
JSJ		 3259 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3260 "BM_%d : be_fill_queue Failed "
3261 "for ISCSI CQ\n");
bfead3b2
JK		 3262 goto create_cq_error;
3263 }
3264
3265 mem->dma = paddr;
3266 ret = beiscsi_cmd_cq_create(&phba->ctrl, cq, eq, false,
3267 false, 0);
3268 if (ret) {
99bc5d55
JSJ		 3269 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3270 "BM_%d : beiscsi_cmd_eq_create"
3271 "Failed for ISCSI CQ\n");
bfead3b2
JK		 3272 goto create_cq_error;
3273 }
99bc5d55
JSJ		 3274 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3275 "BM_%d : iscsi cq_id is %d for eq_id %d\n"
3276 "iSCSI CQ CREATED\n", cq->id, eq->id);
6733b39a 3277 }
6733b39a 3278 return 0;
bfead3b2
JK		 3279
3280create_cq_error:
3281 for (i = 0; i < phba->num_cpus; i++) {
3282 cq = &phwi_context->be_cq[i];
3283 mem = &cq->dma_mem;
3284 if (mem->va)
3285 pci_free_consistent(phba->pcidev, num_cq_pages
3286 * PAGE_SIZE,
3287 mem->va, mem->dma);
3288 }
3289 return ret;
3290
6733b39a
JK		 3291}
3292
3293static int
3294beiscsi_create_def_hdr(struct beiscsi_hba *phba,
3295 struct hwi_context_memory *phwi_context,
3296 struct hwi_controller *phwi_ctrlr,
8a86e833 3297 unsigned int def_pdu_ring_sz, uint8_t ulp_num)
6733b39a
JK		 3298{
3299 unsigned int idx;
3300 int ret;
3301 struct be_queue_info *dq, *cq;
3302 struct be_dma_mem *mem;
3303 struct be_mem_descriptor *mem_descr;
3304 void *dq_vaddress;
3305
3306 idx = 0;
8a86e833 3307 dq = &phwi_context->be_def_hdrq[ulp_num];
bfead3b2 3308 cq = &phwi_context->be_cq[0];
6733b39a
JK		 3309 mem = &dq->dma_mem;
3310 mem_descr = phba->init_mem;
8a86e833
JK		 3311 mem_descr += HWI_MEM_ASYNC_HEADER_RING_ULP0 +
3312 (ulp_num * MEM_DESCR_OFFSET);
6733b39a
JK		 3313 dq_vaddress = mem_descr->mem_array[idx].virtual_address;
3314 ret = be_fill_queue(dq, mem_descr->mem_array[0].size /
3315 sizeof(struct phys_addr),
3316 sizeof(struct phys_addr), dq_vaddress);
3317 if (ret) {
99bc5d55 3318 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
8a86e833
JK		 3319 "BM_%d : be_fill_queue Failed for DEF PDU HDR on ULP : %d\n",
3320 ulp_num);
3321
6733b39a
JK		 3322 return ret;
3323 }
457ff3b7
JK		 3324 mem->dma = (unsigned long)mem_descr->mem_array[idx].
3325 bus_address.u.a64.address;
6733b39a
JK		 3326 ret = be_cmd_create_default_pdu_queue(&phba->ctrl, cq, dq,
3327 def_pdu_ring_sz,
8a86e833
JK		 3328 phba->params.defpdu_hdr_sz,
3329 BEISCSI_DEFQ_HDR, ulp_num);
6733b39a 3330 if (ret) {
99bc5d55 3331 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
8a86e833
JK		 3332 "BM_%d : be_cmd_create_default_pdu_queue Failed DEFHDR on ULP : %d\n",
3333 ulp_num);
3334
6733b39a
JK		 3335 return ret;
3336 }
99bc5d55 3337
8a86e833
JK		 3338 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3339 "BM_%d : iscsi hdr def pdu id for ULP : %d is %d\n",
3340 ulp_num,
3341 phwi_context->be_def_hdrq[ulp_num].id);
3342 hwi_post_async_buffers(phba, BEISCSI_DEFQ_HDR, ulp_num);
6733b39a
JK		 3343 return 0;
3344}
3345
3346static int
3347beiscsi_create_def_data(struct beiscsi_hba *phba,
3348 struct hwi_context_memory *phwi_context,
3349 struct hwi_controller *phwi_ctrlr,
8a86e833 3350 unsigned int def_pdu_ring_sz, uint8_t ulp_num)
6733b39a
JK		 3351{
3352 unsigned int idx;
3353 int ret;
3354 struct be_queue_info *dataq, *cq;
3355 struct be_dma_mem *mem;
3356 struct be_mem_descriptor *mem_descr;
3357 void *dq_vaddress;
3358
3359 idx = 0;
8a86e833 3360 dataq = &phwi_context->be_def_dataq[ulp_num];
bfead3b2 3361 cq = &phwi_context->be_cq[0];
6733b39a
JK		 3362 mem = &dataq->dma_mem;
3363 mem_descr = phba->init_mem;
8a86e833
JK		 3364 mem_descr += HWI_MEM_ASYNC_DATA_RING_ULP0 +
3365 (ulp_num * MEM_DESCR_OFFSET);
6733b39a
JK		 3366 dq_vaddress = mem_descr->mem_array[idx].virtual_address;
3367 ret = be_fill_queue(dataq, mem_descr->mem_array[0].size /
3368 sizeof(struct phys_addr),
3369 sizeof(struct phys_addr), dq_vaddress);
3370 if (ret) {
99bc5d55 3371 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
8a86e833
JK		 3372 "BM_%d : be_fill_queue Failed for DEF PDU "
3373 "DATA on ULP : %d\n",
3374 ulp_num);
3375
6733b39a
JK		 3376 return ret;
3377 }
457ff3b7
JK		 3378 mem->dma = (unsigned long)mem_descr->mem_array[idx].
3379 bus_address.u.a64.address;
6733b39a
JK		 3380 ret = be_cmd_create_default_pdu_queue(&phba->ctrl, cq, dataq,
3381 def_pdu_ring_sz,
8a86e833
JK		 3382 phba->params.defpdu_data_sz,
3383 BEISCSI_DEFQ_DATA, ulp_num);
6733b39a 3384 if (ret) {
99bc5d55
JSJ		 3385 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3386 "BM_%d be_cmd_create_default_pdu_queue"
8a86e833
JK		 3387 " Failed for DEF PDU DATA on ULP : %d\n",
3388 ulp_num);
6733b39a
JK		 3389 return ret;
3390 }
8a86e833 3391
99bc5d55 3392 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
8a86e833
JK		 3393 "BM_%d : iscsi def data id on ULP : %d is %d\n",
3394 ulp_num,
3395 phwi_context->be_def_dataq[ulp_num].id);
99bc5d55 3396
8a86e833 3397 hwi_post_async_buffers(phba, BEISCSI_DEFQ_DATA, ulp_num);
99bc5d55 3398 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
8a86e833
JK		 3399 "BM_%d : DEFAULT PDU DATA RING CREATED"
3400 "on ULP : %d\n", ulp_num);
99bc5d55 3401
6733b39a
JK		 3402 return 0;
3403}
3404
15a90fe0
JK		 3405
3406static int
3407beiscsi_post_template_hdr(struct beiscsi_hba *phba)
3408{
3409 struct be_mem_descriptor *mem_descr;
3410 struct mem_array *pm_arr;
3411 struct be_dma_mem sgl;
a129d92f 3412 int status, ulp_num;
15a90fe0 3413
a129d92f
JK		 3414 for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
3415 if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
3416 mem_descr = (struct be_mem_descriptor *)phba->init_mem;
3417 mem_descr += HWI_MEM_TEMPLATE_HDR_ULP0 +
3418 (ulp_num * MEM_DESCR_OFFSET);
3419 pm_arr = mem_descr->mem_array;
15a90fe0 3420
a129d92f
JK		 3421 hwi_build_be_sgl_arr(phba, pm_arr, &sgl);
3422 status = be_cmd_iscsi_post_template_hdr(
3423 &phba->ctrl, &sgl);
15a90fe0 3424
a129d92f
JK		 3425 if (status != 0) {
3426 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3427 "BM_%d : Post Template HDR Failed for"
3428 "ULP_%d\n", ulp_num);
3429 return status;
3430 }
3431
3432 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3433 "BM_%d : Template HDR Pages Posted for"
3434 "ULP_%d\n", ulp_num);
15a90fe0
JK		 3435 }
3436 }
15a90fe0
JK		 3437 return 0;
3438}
3439
6733b39a
JK		 3440static int
3441beiscsi_post_pages(struct beiscsi_hba *phba)
3442{
3443 struct be_mem_descriptor *mem_descr;
3444 struct mem_array *pm_arr;
3445 unsigned int page_offset, i;
3446 struct be_dma_mem sgl;
843ae752 3447 int status, ulp_num = 0;
6733b39a
JK		 3448
3449 mem_descr = phba->init_mem;
3450 mem_descr += HWI_MEM_SGE;
3451 pm_arr = mem_descr->mem_array;
3452
90622db3
JK		 3453 for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++)
3454 if (test_bit(ulp_num, &phba->fw_config.ulp_supported))
3455 break;
3456
6733b39a 3457 page_offset = (sizeof(struct iscsi_sge) * phba->params.num_sge_per_io *
843ae752 3458 phba->fw_config.iscsi_icd_start[ulp_num]) / PAGE_SIZE;
6733b39a
JK		 3459 for (i = 0; i < mem_descr->num_elements; i++) {
3460 hwi_build_be_sgl_arr(phba, pm_arr, &sgl);
3461 status = be_cmd_iscsi_post_sgl_pages(&phba->ctrl, &sgl,
3462 page_offset,
3463 (pm_arr->size / PAGE_SIZE));
3464 page_offset += pm_arr->size / PAGE_SIZE;
3465 if (status != 0) {
99bc5d55
JSJ		 3466 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3467 "BM_%d : post sgl failed.\n");
6733b39a
JK		 3468 return status;
3469 }
3470 pm_arr++;
3471 }
99bc5d55
JSJ		 3472 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3473 "BM_%d : POSTED PAGES\n");
6733b39a
JK		 3474 return 0;
3475}
3476
bfead3b2
JK		 3477static void be_queue_free(struct beiscsi_hba *phba, struct be_queue_info *q)
3478{
3479 struct be_dma_mem *mem = &q->dma_mem;
c8b25598 3480 if (mem->va) {
bfead3b2
JK		 3481 pci_free_consistent(phba->pcidev, mem->size,
3482 mem->va, mem->dma);
c8b25598
JK		 3483 mem->va = NULL;
3484 }
bfead3b2
JK		 3485}
3486
3487static int be_queue_alloc(struct beiscsi_hba *phba, struct be_queue_info *q,
3488 u16 len, u16 entry_size)
3489{
3490 struct be_dma_mem *mem = &q->dma_mem;
3491
3492 memset(q, 0, sizeof(*q));
3493 q->len = len;
3494 q->entry_size = entry_size;
3495 mem->size = len * entry_size;
3496 mem->va = pci_alloc_consistent(phba->pcidev, mem->size, &mem->dma);
3497 if (!mem->va)
d3ad2bb3 3498 return -ENOMEM;
bfead3b2
JK		 3499 memset(mem->va, 0, mem->size);
3500 return 0;
3501}
3502
6733b39a
JK		 3503static int
3504beiscsi_create_wrb_rings(struct beiscsi_hba *phba,
3505 struct hwi_context_memory *phwi_context,
3506 struct hwi_controller *phwi_ctrlr)
3507{
3508 unsigned int wrb_mem_index, offset, size, num_wrb_rings;
3509 u64 pa_addr_lo;
4eea99d5 3510 unsigned int idx, num, i, ulp_num;
6733b39a
JK		 3511 struct mem_array *pwrb_arr;
3512 void *wrb_vaddr;
3513 struct be_dma_mem sgl;
3514 struct be_mem_descriptor *mem_descr;
a7909b39 3515 struct hwi_wrb_context *pwrb_context;
6733b39a 3516 int status;
4eea99d5
JK		 3517 uint8_t ulp_count = 0, ulp_base_num = 0;
3518 uint16_t cid_count_ulp[BEISCSI_ULP_COUNT] = { 0 };
6733b39a
JK		 3519
3520 idx = 0;
3521 mem_descr = phba->init_mem;
3522 mem_descr += HWI_MEM_WRB;
3523 pwrb_arr = kmalloc(sizeof(*pwrb_arr) * phba->params.cxns_per_ctrl,
3524 GFP_KERNEL);
3525 if (!pwrb_arr) {
99bc5d55
JSJ		 3526 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3527 "BM_%d : Memory alloc failed in create wrb ring.\n");
6733b39a
JK		 3528 return -ENOMEM;
3529 }
3530 wrb_vaddr = mem_descr->mem_array[idx].virtual_address;
3531 pa_addr_lo = mem_descr->mem_array[idx].bus_address.u.a64.address;
3532 num_wrb_rings = mem_descr->mem_array[idx].size /
3533 (phba->params.wrbs_per_cxn * sizeof(struct iscsi_wrb));
3534
3535 for (num = 0; num < phba->params.cxns_per_ctrl; num++) {
3536 if (num_wrb_rings) {
3537 pwrb_arr[num].virtual_address = wrb_vaddr;
3538 pwrb_arr[num].bus_address.u.a64.address = pa_addr_lo;
3539 pwrb_arr[num].size = phba->params.wrbs_per_cxn *
3540 sizeof(struct iscsi_wrb);
3541 wrb_vaddr += pwrb_arr[num].size;
3542 pa_addr_lo += pwrb_arr[num].size;
3543 num_wrb_rings--;
3544 } else {
3545 idx++;
3546 wrb_vaddr = mem_descr->mem_array[idx].virtual_address;
3547 pa_addr_lo = mem_descr->mem_array[idx].\
3548 bus_address.u.a64.address;
3549 num_wrb_rings = mem_descr->mem_array[idx].size /
3550 (phba->params.wrbs_per_cxn *
3551 sizeof(struct iscsi_wrb));
3552 pwrb_arr[num].virtual_address = wrb_vaddr;
3553 pwrb_arr[num].bus_address.u.a64.address\
3554 = pa_addr_lo;
3555 pwrb_arr[num].size = phba->params.wrbs_per_cxn *
3556 sizeof(struct iscsi_wrb);
3557 wrb_vaddr += pwrb_arr[num].size;
3558 pa_addr_lo += pwrb_arr[num].size;
3559 num_wrb_rings--;
3560 }
3561 }
4eea99d5
JK		 3562
3563 /* Get the ULP Count */
3564 for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++)
3565 if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
3566 ulp_count++;
3567 ulp_base_num = ulp_num;
3568 cid_count_ulp[ulp_num] =
3569 BEISCSI_GET_CID_COUNT(phba, ulp_num);
3570 }
3571
6733b39a
JK		 3572 for (i = 0; i < phba->params.cxns_per_ctrl; i++) {
3573 wrb_mem_index = 0;
3574 offset = 0;
3575 size = 0;
3576
4eea99d5
JK		 3577 if (ulp_count > 1) {
3578 ulp_base_num = (ulp_base_num + 1) % BEISCSI_ULP_COUNT;
3579
3580 if (!cid_count_ulp[ulp_base_num])
3581 ulp_base_num = (ulp_base_num + 1) %
3582 BEISCSI_ULP_COUNT;
3583
3584 cid_count_ulp[ulp_base_num]--;
3585 }
3586
3587
6733b39a
JK		 3588 hwi_build_be_sgl_by_offset(phba, &pwrb_arr[i], &sgl);
3589 status = be_cmd_wrbq_create(&phba->ctrl, &sgl,
4eea99d5
JK		 3590 &phwi_context->be_wrbq[i],
3591 &phwi_ctrlr->wrb_context[i],
3592 ulp_base_num);
6733b39a 3593 if (status != 0) {
99bc5d55
JSJ		 3594 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3595 "BM_%d : wrbq create failed.");
1462b8ff 3596 kfree(pwrb_arr);
6733b39a
JK		 3597 return status;
3598 }
a7909b39 3599 pwrb_context = &phwi_ctrlr->wrb_context[i];
a7909b39 3600 BE_SET_CID_TO_CRI(i, pwrb_context->cid);
6733b39a
JK		 3601 }
3602 kfree(pwrb_arr);
3603 return 0;
3604}
3605
3606static void free_wrb_handles(struct beiscsi_hba *phba)
3607{
3608 unsigned int index;
3609 struct hwi_controller *phwi_ctrlr;
3610 struct hwi_wrb_context *pwrb_context;
3611
3612 phwi_ctrlr = phba->phwi_ctrlr;
a7909b39 3613 for (index = 0; index < phba->params.cxns_per_ctrl; index++) {
6733b39a
JK		 3614 pwrb_context = &phwi_ctrlr->wrb_context[index];
3615 kfree(pwrb_context->pwrb_handle_base);
3616 kfree(pwrb_context->pwrb_handle_basestd);
3617 }
3618}
3619
bfead3b2
JK		 3620static void be_mcc_queues_destroy(struct beiscsi_hba *phba)
3621{
3622 struct be_queue_info *q;
3623 struct be_ctrl_info *ctrl = &phba->ctrl;
3624
3625 q = &phba->ctrl.mcc_obj.q;
3626 if (q->created)
3627 beiscsi_cmd_q_destroy(ctrl, q, QTYPE_MCCQ);
3628 be_queue_free(phba, q);
3629
3630 q = &phba->ctrl.mcc_obj.cq;
3631 if (q->created)
3632 beiscsi_cmd_q_destroy(ctrl, q, QTYPE_CQ);
3633 be_queue_free(phba, q);
3634}
3635
6733b39a
JK		 3636static void hwi_cleanup(struct beiscsi_hba *phba)
3637{
3638 struct be_queue_info *q;
3639 struct be_ctrl_info *ctrl = &phba->ctrl;
3640 struct hwi_controller *phwi_ctrlr;
3641 struct hwi_context_memory *phwi_context;
a7909b39 3642 struct hwi_async_pdu_context *pasync_ctx;
8a86e833 3643 int i, eq_num, ulp_num;
6733b39a
JK		 3644
3645 phwi_ctrlr = phba->phwi_ctrlr;
3646 phwi_context = phwi_ctrlr->phwi_ctxt;
15a90fe0
JK		 3647
3648 be_cmd_iscsi_remove_template_hdr(ctrl);
3649
6733b39a
JK		 3650 for (i = 0; i < phba->params.cxns_per_ctrl; i++) {
3651 q = &phwi_context->be_wrbq[i];
3652 if (q->created)
3653 beiscsi_cmd_q_destroy(ctrl, q, QTYPE_WRBQ);
3654 }
a7909b39 3655 kfree(phwi_context->be_wrbq);
6733b39a
JK		 3656 free_wrb_handles(phba);
3657
8a86e833
JK		 3658 for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
3659 if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
6733b39a 3660
8a86e833
JK		 3661 q = &phwi_context->be_def_hdrq[ulp_num];
3662 if (q->created)
3663 beiscsi_cmd_q_destroy(ctrl, q, QTYPE_DPDUQ);
3664
3665 q = &phwi_context->be_def_dataq[ulp_num];
3666 if (q->created)
3667 beiscsi_cmd_q_destroy(ctrl, q, QTYPE_DPDUQ);
3668
3669 pasync_ctx = phwi_ctrlr->phwi_ctxt->pasync_ctx[ulp_num];
3670 }
3671 }
6733b39a
JK		 3672
3673 beiscsi_cmd_q_destroy(ctrl, NULL, QTYPE_SGL);
3674
bfead3b2
JK		 3675 for (i = 0; i < (phba->num_cpus); i++) {
3676 q = &phwi_context->be_cq[i];
3677 if (q->created)
3678 beiscsi_cmd_q_destroy(ctrl, q, QTYPE_CQ);
3679 }
3680 if (phba->msix_enabled)
3681 eq_num = 1;
3682 else
3683 eq_num = 0;
3684 for (i = 0; i < (phba->num_cpus + eq_num); i++) {
3685 q = &phwi_context->be_eq[i].q;
3686 if (q->created)
3687 beiscsi_cmd_q_destroy(ctrl, q, QTYPE_EQ);
3688 }
3689 be_mcc_queues_destroy(phba);
0283fbb1 3690 be_cmd_fw_uninit(ctrl);
bfead3b2 3691}
6733b39a 3692
bfead3b2
JK		 3693static int be_mcc_queues_create(struct beiscsi_hba *phba,
3694 struct hwi_context_memory *phwi_context)
3695{
3696 struct be_queue_info *q, *cq;
3697 struct be_ctrl_info *ctrl = &phba->ctrl;
3698
3699 /* Alloc MCC compl queue */
3700 cq = &phba->ctrl.mcc_obj.cq;
3701 if (be_queue_alloc(phba, cq, MCC_CQ_LEN,
3702 sizeof(struct be_mcc_compl)))
3703 goto err;
3704 /* Ask BE to create MCC compl queue; */
3705 if (phba->msix_enabled) {
3706 if (beiscsi_cmd_cq_create(ctrl, cq, &phwi_context->be_eq
3707 [phba->num_cpus].q, false, true, 0))
3708 goto mcc_cq_free;
3709 } else {
3710 if (beiscsi_cmd_cq_create(ctrl, cq, &phwi_context->be_eq[0].q,
3711 false, true, 0))
3712 goto mcc_cq_free;
3713 }
3714
3715 /* Alloc MCC queue */
3716 q = &phba->ctrl.mcc_obj.q;
3717 if (be_queue_alloc(phba, q, MCC_Q_LEN, sizeof(struct be_mcc_wrb)))
3718 goto mcc_cq_destroy;
3719
3720 /* Ask BE to create MCC queue */
35e66019 3721 if (beiscsi_cmd_mccq_create(phba, q, cq))
bfead3b2
JK		 3722 goto mcc_q_free;
3723
3724 return 0;
3725
3726mcc_q_free:
3727 be_queue_free(phba, q);
3728mcc_cq_destroy:
3729 beiscsi_cmd_q_destroy(ctrl, cq, QTYPE_CQ);
3730mcc_cq_free:
3731 be_queue_free(phba, cq);
3732err:
d3ad2bb3 3733 return -ENOMEM;
bfead3b2
JK		 3734}
3735
107dfcba
JSJ		 3736/**
3737 * find_num_cpus()- Get the CPU online count
3738 * @phba: ptr to priv structure
3739 *
3740 * CPU count is used for creating EQ.
3741 **/
3742static void find_num_cpus(struct beiscsi_hba *phba)
bfead3b2
JK		 3743{
3744 int num_cpus = 0;
3745
3746 num_cpus = num_online_cpus();
bfead3b2 3747
22abeef0
JSJ		 3748 switch (phba->generation) {
3749 case BE_GEN2:
3750 case BE_GEN3:
3751 phba->num_cpus = (num_cpus > BEISCSI_MAX_NUM_CPUS) ?
3752 BEISCSI_MAX_NUM_CPUS : num_cpus;
3753 break;
3754 case BE_GEN4:
3755 phba->num_cpus = (num_cpus > OC_SKH_MAX_NUM_CPUS) ?
3756 OC_SKH_MAX_NUM_CPUS : num_cpus;
3757 break;
3758 default:
3759 phba->num_cpus = 1;
3760 }
6733b39a
JK		 3761}
3762
3763static int hwi_init_port(struct beiscsi_hba *phba)
3764{
3765 struct hwi_controller *phwi_ctrlr;
3766 struct hwi_context_memory *phwi_context;
3767 unsigned int def_pdu_ring_sz;
3768 struct be_ctrl_info *ctrl = &phba->ctrl;
8a86e833 3769 int status, ulp_num;
6733b39a 3770
6733b39a 3771 phwi_ctrlr = phba->phwi_ctrlr;
6733b39a 3772 phwi_context = phwi_ctrlr->phwi_ctxt;
bfead3b2
JK		 3773 phwi_context->max_eqd = 0;
3774 phwi_context->min_eqd = 0;
3775 phwi_context->cur_eqd = 64;
6733b39a 3776 be_cmd_fw_initialize(&phba->ctrl);
bfead3b2
JK		 3777
3778 status = beiscsi_create_eqs(phba, phwi_context);
6733b39a 3779 if (status != 0) {
99bc5d55
JSJ		 3780 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3781 "BM_%d : EQ not created\n");
6733b39a
JK		 3782 goto error;
3783 }
3784
bfead3b2
JK		 3785 status = be_mcc_queues_create(phba, phwi_context);
3786 if (status != 0)
3787 goto error;
3788
3789 status = mgmt_check_supported_fw(ctrl, phba);
6733b39a 3790 if (status != 0) {
99bc5d55
JSJ		 3791 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3792 "BM_%d : Unsupported fw version\n");
6733b39a
JK		 3793 goto error;
3794 }
3795
bfead3b2 3796 status = beiscsi_create_cqs(phba, phwi_context);
6733b39a 3797 if (status != 0) {
99bc5d55
JSJ		 3798 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3799 "BM_%d : CQ not created\n");
6733b39a
JK		 3800 goto error;
3801 }
3802
8a86e833
JK		 3803 for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
3804 if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
6733b39a 3805
8a86e833
JK		 3806 def_pdu_ring_sz =
3807 BEISCSI_GET_CID_COUNT(phba, ulp_num) *
3808 sizeof(struct phys_addr);
3809
3810 status = beiscsi_create_def_hdr(phba, phwi_context,
3811 phwi_ctrlr,
3812 def_pdu_ring_sz,
3813 ulp_num);
3814 if (status != 0) {
3815 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3816 "BM_%d : Default Header not created for ULP : %d\n",
3817 ulp_num);
3818 goto error;
3819 }
3820
3821 status = beiscsi_create_def_data(phba, phwi_context,
3822 phwi_ctrlr,
3823 def_pdu_ring_sz,
3824 ulp_num);
3825 if (status != 0) {
3826 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3827 "BM_%d : Default Data not created for ULP : %d\n",
3828 ulp_num);
3829 goto error;
3830 }
3831 }
6733b39a
JK		 3832 }
3833
3834 status = beiscsi_post_pages(phba);
3835 if (status != 0) {
99bc5d55
JSJ		 3836 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3837 "BM_%d : Post SGL Pages Failed\n");
6733b39a
JK		 3838 goto error;
3839 }
3840
15a90fe0
JK		 3841 status = beiscsi_post_template_hdr(phba);
3842 if (status != 0) {
3843 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3844 "BM_%d : Template HDR Posting for CXN Failed\n");
3845 }
3846
6733b39a
JK		 3847 status = beiscsi_create_wrb_rings(phba, phwi_context, phwi_ctrlr);
3848 if (status != 0) {
99bc5d55
JSJ		 3849 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3850 "BM_%d : WRB Rings not created\n");
6733b39a
JK		 3851 goto error;
3852 }
3853
8a86e833
JK		 3854 for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
3855 uint16_t async_arr_idx = 0;
3856
3857 if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
3858 uint16_t cri = 0;
3859 struct hwi_async_pdu_context *pasync_ctx;
3860
3861 pasync_ctx = HWI_GET_ASYNC_PDU_CTX(
3862 phwi_ctrlr, ulp_num);
3863 for (cri = 0; cri <
3864 phba->params.cxns_per_ctrl; cri++) {
3865 if (ulp_num == BEISCSI_GET_ULP_FROM_CRI
3866 (phwi_ctrlr, cri))
3867 pasync_ctx->cid_to_async_cri_map[
3868 phwi_ctrlr->wrb_context[cri].cid] =
3869 async_arr_idx++;
3870 }
3871 }
3872 }
3873
99bc5d55
JSJ		 3874 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3875 "BM_%d : hwi_init_port success\n");
6733b39a
JK		 3876 return 0;
3877
3878error:
99bc5d55
JSJ		 3879 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3880 "BM_%d : hwi_init_port failed");
6733b39a 3881 hwi_cleanup(phba);
a49e06d5 3882 return status;
6733b39a
JK		 3883}
3884
6733b39a
JK		 3885static int hwi_init_controller(struct beiscsi_hba *phba)
3886{
3887 struct hwi_controller *phwi_ctrlr;
3888
3889 phwi_ctrlr = phba->phwi_ctrlr;
3890 if (1 == phba->init_mem[HWI_MEM_ADDN_CONTEXT].num_elements) {
3891 phwi_ctrlr->phwi_ctxt = (struct hwi_context_memory *)phba->
3892 init_mem[HWI_MEM_ADDN_CONTEXT].mem_array[0].virtual_address;
99bc5d55
JSJ		 3893 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3894 "BM_%d : phwi_ctrlr->phwi_ctxt=%p\n",
3895 phwi_ctrlr->phwi_ctxt);
6733b39a 3896 } else {
99bc5d55
JSJ		 3897 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3898 "BM_%d : HWI_MEM_ADDN_CONTEXT is more "
3899 "than one element.Failing to load\n");
6733b39a
JK		 3900 return -ENOMEM;
3901 }
3902
3903 iscsi_init_global_templates(phba);
3ec78271
JK		 3904 if (beiscsi_init_wrb_handle(phba))
3905 return -ENOMEM;
3906
a7909b39
JK		 3907 if (hwi_init_async_pdu_ctx(phba)) {
3908 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3909 "BM_%d : hwi_init_async_pdu_ctx failed\n");
3910 return -ENOMEM;
3911 }
3912
6733b39a 3913 if (hwi_init_port(phba) != 0) {
99bc5d55
JSJ		 3914 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3915 "BM_%d : hwi_init_controller failed\n");
3916
6733b39a
JK		 3917 return -ENOMEM;
3918 }
3919 return 0;
3920}
3921
3922static void beiscsi_free_mem(struct beiscsi_hba *phba)
3923{
3924 struct be_mem_descriptor *mem_descr;
3925 int i, j;
3926
3927 mem_descr = phba->init_mem;
3928 i = 0;
3929 j = 0;
3930 for (i = 0; i < SE_MEM_MAX; i++) {
3931 for (j = mem_descr->num_elements; j > 0; j--) {
3932 pci_free_consistent(phba->pcidev,
3933 mem_descr->mem_array[j - 1].size,
3934 mem_descr->mem_array[j - 1].virtual_address,
457ff3b7
JK		 3935 (unsigned long)mem_descr->mem_array[j - 1].
3936 bus_address.u.a64.address);
6733b39a 3937 }
8a86e833 3938
6733b39a
JK		 3939 kfree(mem_descr->mem_array);
3940 mem_descr++;
3941 }
3942 kfree(phba->init_mem);
a7909b39 3943 kfree(phba->phwi_ctrlr->wrb_context);
6733b39a
JK		 3944 kfree(phba->phwi_ctrlr);
3945}
3946
3947static int beiscsi_init_controller(struct beiscsi_hba *phba)
3948{
3949 int ret = -ENOMEM;
3950
3951 ret = beiscsi_get_memory(phba);
3952 if (ret < 0) {
99bc5d55
JSJ		 3953 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3954 "BM_%d : beiscsi_dev_probe -"
3955 "Failed in beiscsi_alloc_memory\n");
6733b39a
JK		 3956 return ret;
3957 }
3958
3959 ret = hwi_init_controller(phba);
3960 if (ret)
3961 goto free_init;
99bc5d55
JSJ		 3962 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3963 "BM_%d : Return success from beiscsi_init_controller");
3964
6733b39a
JK		 3965 return 0;
3966
3967free_init:
3968 beiscsi_free_mem(phba);
a49e06d5 3969 return ret;
6733b39a
JK		 3970}
3971
3972static int beiscsi_init_sgl_handle(struct beiscsi_hba *phba)
3973{
3974 struct be_mem_descriptor *mem_descr_sglh, *mem_descr_sg;
3975 struct sgl_handle *psgl_handle;
3976 struct iscsi_sge *pfrag;
90622db3
JK		 3977 unsigned int arr_index, i, idx;
3978 unsigned int ulp_icd_start, ulp_num = 0;
6733b39a
JK		 3979
3980 phba->io_sgl_hndl_avbl = 0;
3981 phba->eh_sgl_hndl_avbl = 0;
bfead3b2 3982
6733b39a
JK		 3983 mem_descr_sglh = phba->init_mem;
3984 mem_descr_sglh += HWI_MEM_SGLH;
3985 if (1 == mem_descr_sglh->num_elements) {
3986 phba->io_sgl_hndl_base = kzalloc(sizeof(struct sgl_handle *) *
3987 phba->params.ios_per_ctrl,
3988 GFP_KERNEL);
3989 if (!phba->io_sgl_hndl_base) {
99bc5d55
JSJ		 3990 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3991 "BM_%d : Mem Alloc Failed. Failing to load\n");
6733b39a
JK		 3992 return -ENOMEM;
3993 }
3994 phba->eh_sgl_hndl_base = kzalloc(sizeof(struct sgl_handle *) *
3995 (phba->params.icds_per_ctrl -
3996 phba->params.ios_per_ctrl),
3997 GFP_KERNEL);
3998 if (!phba->eh_sgl_hndl_base) {
3999 kfree(phba->io_sgl_hndl_base);
99bc5d55
JSJ		 4000 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4001 "BM_%d : Mem Alloc Failed. Failing to load\n");
6733b39a
JK		 4002 return -ENOMEM;
4003 }
4004 } else {
99bc5d55
JSJ		 4005 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4006 "BM_%d : HWI_MEM_SGLH is more than one element."
4007 "Failing to load\n");
6733b39a
JK		 4008 return -ENOMEM;
4009 }
4010
4011 arr_index = 0;
4012 idx = 0;
4013 while (idx < mem_descr_sglh->num_elements) {
4014 psgl_handle = mem_descr_sglh->mem_array[idx].virtual_address;
4015
4016 for (i = 0; i < (mem_descr_sglh->mem_array[idx].size /
4017 sizeof(struct sgl_handle)); i++) {
4018 if (arr_index < phba->params.ios_per_ctrl) {
4019 phba->io_sgl_hndl_base[arr_index] = psgl_handle;
4020 phba->io_sgl_hndl_avbl++;
4021 arr_index++;
4022 } else {
4023 phba->eh_sgl_hndl_base[arr_index -
4024 phba->params.ios_per_ctrl] =
4025 psgl_handle;
4026 arr_index++;
4027 phba->eh_sgl_hndl_avbl++;
4028 }
4029 psgl_handle++;
4030 }
4031 idx++;
4032 }
99bc5d55
JSJ		 4033 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
4034 "BM_%d : phba->io_sgl_hndl_avbl=%d"
4035 "phba->eh_sgl_hndl_avbl=%d\n",
4036 phba->io_sgl_hndl_avbl,
4037 phba->eh_sgl_hndl_avbl);
4038
6733b39a
JK		 4039 mem_descr_sg = phba->init_mem;
4040 mem_descr_sg += HWI_MEM_SGE;
99bc5d55
JSJ		 4041 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
4042 "\n BM_%d : mem_descr_sg->num_elements=%d\n",
4043 mem_descr_sg->num_elements);
4044
90622db3
JK		 4045 for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++)
4046 if (test_bit(ulp_num, &phba->fw_config.ulp_supported))
4047 break;
4048
4049 ulp_icd_start = phba->fw_config.iscsi_icd_start[ulp_num];
4050
6733b39a
JK		 4051 arr_index = 0;
4052 idx = 0;
4053 while (idx < mem_descr_sg->num_elements) {
4054 pfrag = mem_descr_sg->mem_array[idx].virtual_address;
4055
4056 for (i = 0;
4057 i < (mem_descr_sg->mem_array[idx].size) /
4058 (sizeof(struct iscsi_sge) * phba->params.num_sge_per_io);
4059 i++) {
4060 if (arr_index < phba->params.ios_per_ctrl)
4061 psgl_handle = phba->io_sgl_hndl_base[arr_index];
4062 else
4063 psgl_handle = phba->eh_sgl_hndl_base[arr_index -
4064 phba->params.ios_per_ctrl];
4065 psgl_handle->pfrag = pfrag;
4066 AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, pfrag, 0);
4067 AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, pfrag, 0);
4068 pfrag += phba->params.num_sge_per_io;
90622db3 4069 psgl_handle->sgl_index = ulp_icd_start + arr_index++;
6733b39a
JK		 4070 }
4071 idx++;
4072 }
4073 phba->io_sgl_free_index = 0;
4074 phba->io_sgl_alloc_index = 0;
4075 phba->eh_sgl_free_index = 0;
4076 phba->eh_sgl_alloc_index = 0;
4077 return 0;
4078}
4079
4080static int hba_setup_cid_tbls(struct beiscsi_hba *phba)
4081{
0a3db7c0
JK		 4082 int ret;
4083 uint16_t i, ulp_num;
4084 struct ulp_cid_info *ptr_cid_info = NULL;
6733b39a 4085
0a3db7c0
JK		 4086 for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
4087 if (test_bit(ulp_num, (void *)&phba->fw_config.ulp_supported)) {
4088 ptr_cid_info = kzalloc(sizeof(struct ulp_cid_info),
4089 GFP_KERNEL);
4090
4091 if (!ptr_cid_info) {
4092 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4093 "BM_%d : Failed to allocate memory"
4094 "for ULP_CID_INFO for ULP : %d\n",
4095 ulp_num);
4096 ret = -ENOMEM;
4097 goto free_memory;
4098
4099 }
4100
4101 /* Allocate memory for CID array */
4102 ptr_cid_info->cid_array = kzalloc(sizeof(void *) *
4103 BEISCSI_GET_CID_COUNT(phba,
4104 ulp_num), GFP_KERNEL);
4105 if (!ptr_cid_info->cid_array) {
4106 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4107 "BM_%d : Failed to allocate memory"
4108 "for CID_ARRAY for ULP : %d\n",
4109 ulp_num);
4110 kfree(ptr_cid_info);
4111 ptr_cid_info = NULL;
4112 ret = -ENOMEM;
4113
4114 goto free_memory;
4115 }
4116 ptr_cid_info->avlbl_cids = BEISCSI_GET_CID_COUNT(
4117 phba, ulp_num);
4118
4119 /* Save the cid_info_array ptr */
4120 phba->cid_array_info[ulp_num] = ptr_cid_info;
4121 }
6733b39a 4122 }
c2462288 4123 phba->ep_array = kzalloc(sizeof(struct iscsi_endpoint *) *
a7909b39 4124 phba->params.cxns_per_ctrl, GFP_KERNEL);
6733b39a 4125 if (!phba->ep_array) {
99bc5d55
JSJ		 4126 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4127 "BM_%d : Failed to allocate memory in "
4128 "hba_setup_cid_tbls\n");
0a3db7c0
JK		 4129 ret = -ENOMEM;
4130
4131 goto free_memory;
6733b39a 4132 }
a7909b39
JK		 4133
4134 phba->conn_table = kzalloc(sizeof(struct beiscsi_conn *) *
4135 phba->params.cxns_per_ctrl, GFP_KERNEL);
4136 if (!phba->conn_table) {
4137 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4138 "BM_%d : Failed to allocate memory in"
4139 "hba_setup_cid_tbls\n");
4140
a7909b39 4141 kfree(phba->ep_array);
a7909b39 4142 phba->ep_array = NULL;
0a3db7c0 4143 ret = -ENOMEM;
6733b39a 4144 }
a7909b39 4145
0a3db7c0
JK		 4146 for (i = 0; i < phba->params.cxns_per_ctrl; i++) {
4147 ulp_num = phba->phwi_ctrlr->wrb_context[i].ulp_num;
4148
4149 ptr_cid_info = phba->cid_array_info[ulp_num];
4150 ptr_cid_info->cid_array[ptr_cid_info->cid_alloc++] =
4151 phba->phwi_ctrlr->wrb_context[i].cid;
4152
4153 }
4154
4155 for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
4156 if (test_bit(ulp_num, (void *)&phba->fw_config.ulp_supported)) {
4157 ptr_cid_info = phba->cid_array_info[ulp_num];
a7909b39 4158
0a3db7c0
JK		 4159 ptr_cid_info->cid_alloc = 0;
4160 ptr_cid_info->cid_free = 0;
4161 }
4162 }
6733b39a 4163 return 0;
0a3db7c0
JK		 4164
4165free_memory:
4166 for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
4167 if (test_bit(ulp_num, (void *)&phba->fw_config.ulp_supported)) {
4168 ptr_cid_info = phba->cid_array_info[ulp_num];
4169
4170 if (ptr_cid_info) {
4171 kfree(ptr_cid_info->cid_array);
4172 kfree(ptr_cid_info);
4173 phba->cid_array_info[ulp_num] = NULL;
4174 }
4175 }
4176 }
4177
4178 return ret;
6733b39a
JK		 4179}
4180
238f6b72 4181static void hwi_enable_intr(struct beiscsi_hba *phba)
6733b39a
JK		 4182{
4183 struct be_ctrl_info *ctrl = &phba->ctrl;
4184 struct hwi_controller *phwi_ctrlr;
4185 struct hwi_context_memory *phwi_context;
4186 struct be_queue_info *eq;
4187 u8 __iomem *addr;
bfead3b2 4188 u32 reg, i;
6733b39a
JK		 4189 u32 enabled;
4190
4191 phwi_ctrlr = phba->phwi_ctrlr;
4192 phwi_context = phwi_ctrlr->phwi_ctxt;
4193
6733b39a
JK		 4194 addr = (u8 __iomem *) ((u8 __iomem *) ctrl->pcicfg +
4195 PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET);
4196 reg = ioread32(addr);
6733b39a
JK		 4197
4198 enabled = reg & MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
4199 if (!enabled) {
4200 reg |= MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
99bc5d55
JSJ		 4201 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
4202 "BM_%d : reg =x%08x addr=%p\n", reg, addr);
6733b39a 4203 iowrite32(reg, addr);
665d6d94
JK		 4204 }
4205
4206 if (!phba->msix_enabled) {
4207 eq = &phwi_context->be_eq[0].q;
99bc5d55
JSJ		 4208 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
4209 "BM_%d : eq->id=%d\n", eq->id);
4210
665d6d94
JK		 4211 hwi_ring_eq_db(phba, eq->id, 0, 0, 1, 1);
4212 } else {
4213 for (i = 0; i <= phba->num_cpus; i++) {
4214 eq = &phwi_context->be_eq[i].q;
99bc5d55
JSJ		 4215 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
4216 "BM_%d : eq->id=%d\n", eq->id);
bfead3b2
JK		 4217 hwi_ring_eq_db(phba, eq->id, 0, 0, 1, 1);
4218 }
c03af1ae 4219 }
6733b39a
JK		 4220}
4221
4222static void hwi_disable_intr(struct beiscsi_hba *phba)
4223{
4224 struct be_ctrl_info *ctrl = &phba->ctrl;
4225
4226 u8 __iomem *addr = ctrl->pcicfg + PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET;
4227 u32 reg = ioread32(addr);
4228
4229 u32 enabled = reg & MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
4230 if (enabled) {
4231 reg &= ~MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
4232 iowrite32(reg, addr);
4233 } else
99bc5d55
JSJ		 4234 beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_INIT,
4235 "BM_%d : In hwi_disable_intr, Already Disabled\n");
6733b39a
JK		 4236}
4237
9aef4200
JSJ		 4238/**
4239 * beiscsi_get_boot_info()- Get the boot session info
4240 * @phba: The device priv structure instance
4241 *
4242 * Get the boot target info and store in driver priv structure
4243 *
4244 * return values
4245 * Success: 0
4246 * Failure: Non-Zero Value
4247 **/
c7acc5b8
JK		 4248static int beiscsi_get_boot_info(struct beiscsi_hba *phba)
4249{
0e43895e 4250 struct be_cmd_get_session_resp *session_resp;
c7acc5b8 4251 struct be_dma_mem nonemb_cmd;
e175defe 4252 unsigned int tag;
9aef4200 4253 unsigned int s_handle;
f457a46f 4254 int ret = -ENOMEM;
c7acc5b8 4255
9aef4200
JSJ		 4256 /* Get the session handle of the boot target */
4257 ret = be_mgmt_get_boot_shandle(phba, &s_handle);
4258 if (ret) {
99bc5d55
JSJ		 4259 beiscsi_log(phba, KERN_ERR,
4260 BEISCSI_LOG_INIT | BEISCSI_LOG_CONFIG,
4261 "BM_%d : No boot session\n");
9aef4200 4262 return ret;
c7acc5b8 4263 }
c7acc5b8
JK		 4264 nonemb_cmd.va = pci_alloc_consistent(phba->ctrl.pdev,
4265 sizeof(*session_resp),
4266 &nonemb_cmd.dma);
4267 if (nonemb_cmd.va == NULL) {
99bc5d55
JSJ		 4268 beiscsi_log(phba, KERN_ERR,
4269 BEISCSI_LOG_INIT | BEISCSI_LOG_CONFIG,
4270 "BM_%d : Failed to allocate memory for"
4271 "beiscsi_get_session_info\n");
4272
c7acc5b8
JK		 4273 return -ENOMEM;
4274 }
4275
4276 memset(nonemb_cmd.va, 0, sizeof(*session_resp));
9aef4200 4277 tag = mgmt_get_session_info(phba, s_handle,
0e43895e 4278 &nonemb_cmd);
c7acc5b8 4279 if (!tag) {
99bc5d55
JSJ		 4280 beiscsi_log(phba, KERN_ERR,
4281 BEISCSI_LOG_INIT | BEISCSI_LOG_CONFIG,
4282 "BM_%d : beiscsi_get_session_info"
4283 " Failed\n");
4284
c7acc5b8 4285 goto boot_freemem;
e175defe 4286 }
c7acc5b8 4287
e175defe
JSJ		 4288 ret = beiscsi_mccq_compl(phba, tag, NULL, nonemb_cmd.va);
4289 if (ret) {
99bc5d55
JSJ		 4290 beiscsi_log(phba, KERN_ERR,
4291 BEISCSI_LOG_INIT | BEISCSI_LOG_CONFIG,
e175defe 4292 "BM_%d : beiscsi_get_session_info Failed");
c7acc5b8
JK		 4293 goto boot_freemem;
4294 }
e175defe 4295
c7acc5b8 4296 session_resp = nonemb_cmd.va ;
f457a46f 4297
c7acc5b8
JK		 4298 memcpy(&phba->boot_sess, &session_resp->session_info,
4299 sizeof(struct mgmt_session_info));
f457a46f
MC		 4300 ret = 0;
4301
c7acc5b8
JK		 4302boot_freemem:
4303 pci_free_consistent(phba->ctrl.pdev, nonemb_cmd.size,
4304 nonemb_cmd.va, nonemb_cmd.dma);
f457a46f
MC		 4305 return ret;
4306}
4307
4308static void beiscsi_boot_release(void *data)
4309{
4310 struct beiscsi_hba *phba = data;
4311
4312 scsi_host_put(phba->shost);
4313}
4314
4315static int beiscsi_setup_boot_info(struct beiscsi_hba *phba)
4316{
4317 struct iscsi_boot_kobj *boot_kobj;
4318
4319 /* get boot info using mgmt cmd */
4320 if (beiscsi_get_boot_info(phba))
4321 /* Try to see if we can carry on without this */
4322 return 0;
4323
4324 phba->boot_kset = iscsi_boot_create_host_kset(phba->shost->host_no);
4325 if (!phba->boot_kset)
4326 return -ENOMEM;
4327
4328 /* get a ref because the show function will ref the phba */
4329 if (!scsi_host_get(phba->shost))
4330 goto free_kset;
4331 boot_kobj = iscsi_boot_create_target(phba->boot_kset, 0, phba,
4332 beiscsi_show_boot_tgt_info,
4333 beiscsi_tgt_get_attr_visibility,
4334 beiscsi_boot_release);
4335 if (!boot_kobj)
4336 goto put_shost;
4337
4338 if (!scsi_host_get(phba->shost))
4339 goto free_kset;
4340 boot_kobj = iscsi_boot_create_initiator(phba->boot_kset, 0, phba,
4341 beiscsi_show_boot_ini_info,
4342 beiscsi_ini_get_attr_visibility,
4343 beiscsi_boot_release);
4344 if (!boot_kobj)
4345 goto put_shost;
4346
4347 if (!scsi_host_get(phba->shost))
4348 goto free_kset;
4349 boot_kobj = iscsi_boot_create_ethernet(phba->boot_kset, 0, phba,
4350 beiscsi_show_boot_eth_info,
4351 beiscsi_eth_get_attr_visibility,
4352 beiscsi_boot_release);
4353 if (!boot_kobj)
4354 goto put_shost;
4355 return 0;
4356
4357put_shost:
4358 scsi_host_put(phba->shost);
4359free_kset:
4360 iscsi_boot_destroy_kset(phba->boot_kset);
c7acc5b8
JK		 4361 return -ENOMEM;
4362}
4363
6733b39a
JK		 4364static int beiscsi_init_port(struct beiscsi_hba *phba)
4365{
4366 int ret;
4367
4368 ret = beiscsi_init_controller(phba);
4369 if (ret < 0) {
99bc5d55
JSJ		 4370 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4371 "BM_%d : beiscsi_dev_probe - Failed in"
4372 "beiscsi_init_controller\n");
6733b39a
JK		 4373 return ret;
4374 }
4375 ret = beiscsi_init_sgl_handle(phba);
4376 if (ret < 0) {
99bc5d55
JSJ		 4377 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4378 "BM_%d : beiscsi_dev_probe - Failed in"
4379 "beiscsi_init_sgl_handle\n");
6733b39a
JK		 4380 goto do_cleanup_ctrlr;
4381 }
4382
4383 if (hba_setup_cid_tbls(phba)) {
99bc5d55
JSJ		 4384 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4385 "BM_%d : Failed in hba_setup_cid_tbls\n");
6733b39a
JK		 4386 kfree(phba->io_sgl_hndl_base);
4387 kfree(phba->eh_sgl_hndl_base);
4388 goto do_cleanup_ctrlr;
4389 }
4390
4391 return ret;
4392
4393do_cleanup_ctrlr:
4394 hwi_cleanup(phba);
4395 return ret;
4396}
4397
4398static void hwi_purge_eq(struct beiscsi_hba *phba)
4399{
4400 struct hwi_controller *phwi_ctrlr;
4401 struct hwi_context_memory *phwi_context;
4402 struct be_queue_info *eq;
4403 struct be_eq_entry *eqe = NULL;
bfead3b2 4404 int i, eq_msix;
756d29c8 4405 unsigned int num_processed;
6733b39a
JK		 4406
4407 phwi_ctrlr = phba->phwi_ctrlr;
4408 phwi_context = phwi_ctrlr->phwi_ctxt;
bfead3b2
JK		 4409 if (phba->msix_enabled)
4410 eq_msix = 1;
4411 else
4412 eq_msix = 0;
6733b39a 4413
bfead3b2
JK		 4414 for (i = 0; i < (phba->num_cpus + eq_msix); i++) {
4415 eq = &phwi_context->be_eq[i].q;
6733b39a 4416 eqe = queue_tail_node(eq);
756d29c8 4417 num_processed = 0;
bfead3b2
JK		 4418 while (eqe->dw[offsetof(struct amap_eq_entry, valid) / 32]
4419 & EQE_VALID_MASK) {
4420 AMAP_SET_BITS(struct amap_eq_entry, valid, eqe, 0);
4421 queue_tail_inc(eq);
4422 eqe = queue_tail_node(eq);
756d29c8 4423 num_processed++;
bfead3b2 4424 }
756d29c8
JK		 4425
4426 if (num_processed)
4427 hwi_ring_eq_db(phba, eq->id, 1, num_processed, 1, 1);
6733b39a
JK		 4428 }
4429}
4430
4431static void beiscsi_clean_port(struct beiscsi_hba *phba)
4432{
0a3db7c0
JK		 4433 int mgmt_status, ulp_num;
4434 struct ulp_cid_info *ptr_cid_info = NULL;
6733b39a
JK		 4435
4436 mgmt_status = mgmt_epfw_cleanup(phba, CMD_CONNECTION_CHUTE_0);
4437 if (mgmt_status)
99bc5d55
JSJ		 4438 beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_INIT,
4439 "BM_%d : mgmt_epfw_cleanup FAILED\n");
756d29c8 4440
6733b39a 4441 hwi_purge_eq(phba);
756d29c8 4442 hwi_cleanup(phba);
6733b39a
JK		 4443 kfree(phba->io_sgl_hndl_base);
4444 kfree(phba->eh_sgl_hndl_base);
6733b39a 4445 kfree(phba->ep_array);
a7909b39 4446 kfree(phba->conn_table);
0a3db7c0
JK		 4447
4448 for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
4449 if (test_bit(ulp_num, (void *)&phba->fw_config.ulp_supported)) {
4450 ptr_cid_info = phba->cid_array_info[ulp_num];
4451
4452 if (ptr_cid_info) {
4453 kfree(ptr_cid_info->cid_array);
4454 kfree(ptr_cid_info);
4455 phba->cid_array_info[ulp_num] = NULL;
4456 }
4457 }
4458 }
4459
6733b39a
JK		 4460}
4461
43f388b0
JK		 4462/**
4463 * beiscsi_free_mgmt_task_handles()- Free driver CXN resources
4464 * @beiscsi_conn: ptr to the conn to be cleaned up
4a4a11b9 4465 * @task: ptr to iscsi_task resource to be freed.
43f388b0
JK		 4466 *
4467 * Free driver mgmt resources binded to CXN.
4468 **/
4469void
4a4a11b9
JK		 4470beiscsi_free_mgmt_task_handles(struct beiscsi_conn *beiscsi_conn,
4471 struct iscsi_task *task)
43f388b0
JK		 4472{
4473 struct beiscsi_io_task *io_task;
4474 struct beiscsi_hba *phba = beiscsi_conn->phba;
4475 struct hwi_wrb_context *pwrb_context;
4476 struct hwi_controller *phwi_ctrlr;
a7909b39
JK		 4477 uint16_t cri_index = BE_GET_CRI_FROM_CID(
4478 beiscsi_conn->beiscsi_conn_cid);
43f388b0
JK		 4479
4480 phwi_ctrlr = phba->phwi_ctrlr;
a7909b39
JK		 4481 pwrb_context = &phwi_ctrlr->wrb_context[cri_index];
4482
4a4a11b9 4483 io_task = task->dd_data;
43f388b0
JK		 4484
4485 if (io_task->pwrb_handle) {
4486 memset(io_task->pwrb_handle->pwrb, 0,
4487 sizeof(struct iscsi_wrb));
4488 free_wrb_handle(phba, pwrb_context,
4489 io_task->pwrb_handle);
4490 io_task->pwrb_handle = NULL;
4491 }
4492
4493 if (io_task->psgl_handle) {
4494 spin_lock_bh(&phba->mgmt_sgl_lock);
4495 free_mgmt_sgl_handle(phba,
4496 io_task->psgl_handle);
43f388b0 4497 io_task->psgl_handle = NULL;
4a4a11b9 4498 spin_unlock_bh(&phba->mgmt_sgl_lock);
43f388b0
JK		 4499 }
4500
4501 if (io_task->mtask_addr)
4502 pci_unmap_single(phba->pcidev,
4503 io_task->mtask_addr,
4504 io_task->mtask_data_count,
4505 PCI_DMA_TODEVICE);
4506}
4507
d629c471
JSJ		 4508/**
4509 * beiscsi_cleanup_task()- Free driver resources of the task
4510 * @task: ptr to the iscsi task
4511 *
4512 **/
1282ab76
MC		 4513static void beiscsi_cleanup_task(struct iscsi_task *task)
4514{
4515 struct beiscsi_io_task *io_task = task->dd_data;
4516 struct iscsi_conn *conn = task->conn;
4517 struct beiscsi_conn *beiscsi_conn = conn->dd_data;
4518 struct beiscsi_hba *phba = beiscsi_conn->phba;
4519 struct beiscsi_session *beiscsi_sess = beiscsi_conn->beiscsi_sess;
4520 struct hwi_wrb_context *pwrb_context;
4521 struct hwi_controller *phwi_ctrlr;
a7909b39
JK		 4522 uint16_t cri_index = BE_GET_CRI_FROM_CID(
4523 beiscsi_conn->beiscsi_conn_cid);
1282ab76
MC		 4524
4525 phwi_ctrlr = phba->phwi_ctrlr;
a7909b39 4526 pwrb_context = &phwi_ctrlr->wrb_context[cri_index];
1282ab76
MC		 4527
4528 if (io_task->cmd_bhs) {
4529 pci_pool_free(beiscsi_sess->bhs_pool, io_task->cmd_bhs,
4530 io_task->bhs_pa.u.a64.address);
4531 io_task->cmd_bhs = NULL;
4532 }
4533
4534 if (task->sc) {
4535 if (io_task->pwrb_handle) {
4536 free_wrb_handle(phba, pwrb_context,
4537 io_task->pwrb_handle);
4538 io_task->pwrb_handle = NULL;
4539 }
4540
4541 if (io_task->psgl_handle) {
4542 spin_lock(&phba->io_sgl_lock);
4543 free_io_sgl_handle(phba, io_task->psgl_handle);
4544 spin_unlock(&phba->io_sgl_lock);
4545 io_task->psgl_handle = NULL;
4546 }
4547 } else {
43f388b0 4548 if (!beiscsi_conn->login_in_progress)
4a4a11b9 4549 beiscsi_free_mgmt_task_handles(beiscsi_conn, task);
1282ab76
MC		 4550 }
4551}
4552
6733b39a
JK		 4553void
4554beiscsi_offload_connection(struct beiscsi_conn *beiscsi_conn,
4555 struct beiscsi_offload_params *params)
4556{
4557 struct wrb_handle *pwrb_handle;
6733b39a 4558 struct beiscsi_hba *phba = beiscsi_conn->phba;
1282ab76
MC		 4559 struct iscsi_task *task = beiscsi_conn->task;
4560 struct iscsi_session *session = task->conn->session;
6733b39a
JK		 4561 u32 doorbell = 0;
4562
4563 /*
4564 * We can always use 0 here because it is reserved by libiscsi for
4565 * login/startup related tasks.
4566 */
1282ab76
MC		 4567 beiscsi_conn->login_in_progress = 0;
4568 spin_lock_bh(&session->lock);
4569 beiscsi_cleanup_task(task);
4570 spin_unlock_bh(&session->lock);
4571
a7909b39 4572 pwrb_handle = alloc_wrb_handle(phba, beiscsi_conn->beiscsi_conn_cid);
6733b39a 4573
acb9693c 4574 /* Check for the adapter family */
2c9dfd36 4575 if (is_chip_be2_be3r(phba))
acb9693c
JSJ		 4576 beiscsi_offload_cxn_v0(params, pwrb_handle,
4577 phba->init_mem);
2c9dfd36
JK		 4578 else
4579 beiscsi_offload_cxn_v2(params, pwrb_handle);
6733b39a 4580
acb9693c
JSJ		 4581 be_dws_le_to_cpu(pwrb_handle->pwrb,
4582 sizeof(struct iscsi_target_context_update_wrb));
6733b39a
JK		 4583
4584 doorbell |= beiscsi_conn->beiscsi_conn_cid & DB_WRB_POST_CID_MASK;
32951dd8 4585 doorbell |= (pwrb_handle->wrb_index & DB_DEF_PDU_WRB_INDEX_MASK)
bfead3b2 4586 << DB_DEF_PDU_WRB_INDEX_SHIFT;
6733b39a
JK		 4587 doorbell |= 1 << DB_DEF_PDU_NUM_POSTED_SHIFT;
4588
4589 iowrite32(doorbell, phba->db_va + DB_TXULP0_OFFSET);
4590}
4591
4592static void beiscsi_parse_pdu(struct iscsi_conn *conn, itt_t itt,
4593 int *index, int *age)
4594{
bfead3b2 4595 *index = (int)itt;
6733b39a
JK		 4596 if (age)
4597 *age = conn->session->age;
4598}
4599
4600/**
4601 * beiscsi_alloc_pdu - allocates pdu and related resources
4602 * @task: libiscsi task
4603 * @opcode: opcode of pdu for task
4604 *
4605 * This is called with the session lock held. It will allocate
4606 * the wrb and sgl if needed for the command. And it will prep
4607 * the pdu's itt. beiscsi_parse_pdu will later translate
4608 * the pdu itt to the libiscsi task itt.
4609 */
4610static int beiscsi_alloc_pdu(struct iscsi_task *task, uint8_t opcode)
4611{
4612 struct beiscsi_io_task *io_task = task->dd_data;
4613 struct iscsi_conn *conn = task->conn;
4614 struct beiscsi_conn *beiscsi_conn = conn->dd_data;
4615 struct beiscsi_hba *phba = beiscsi_conn->phba;
4616 struct hwi_wrb_context *pwrb_context;
4617 struct hwi_controller *phwi_ctrlr;
4618 itt_t itt;
a7909b39 4619 uint16_t cri_index = 0;
2afc95bf
JK		 4620 struct beiscsi_session *beiscsi_sess = beiscsi_conn->beiscsi_sess;
4621 dma_addr_t paddr;
6733b39a 4622
2afc95bf 4623 io_task->cmd_bhs = pci_pool_alloc(beiscsi_sess->bhs_pool,
bc7accec 4624 GFP_ATOMIC, &paddr);
2afc95bf
JK		 4625 if (!io_task->cmd_bhs)
4626 return -ENOMEM;
2afc95bf 4627 io_task->bhs_pa.u.a64.address = paddr;
bfead3b2 4628 io_task->libiscsi_itt = (itt_t)task->itt;
6733b39a
JK		 4629 io_task->conn = beiscsi_conn;
4630
4631 task->hdr = (struct iscsi_hdr *)&io_task->cmd_bhs->iscsi_hdr;
4632 task->hdr_max = sizeof(struct be_cmd_bhs);
d2cecf0d 4633 io_task->psgl_handle = NULL;
3ec78271 4634 io_task->pwrb_handle = NULL;
6733b39a
JK		 4635
4636 if (task->sc) {
4637 spin_lock(&phba->io_sgl_lock);
4638 io_task->psgl_handle = alloc_io_sgl_handle(phba);
4639 spin_unlock(&phba->io_sgl_lock);
8359c79b
JSJ		 4640 if (!io_task->psgl_handle) {
4641 beiscsi_log(phba, KERN_ERR,
4642 BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
4643 "BM_%d : Alloc of IO_SGL_ICD Failed"
4644 "for the CID : %d\n",
4645 beiscsi_conn->beiscsi_conn_cid);
2afc95bf 4646 goto free_hndls;
8359c79b 4647 }
d2cecf0d 4648 io_task->pwrb_handle = alloc_wrb_handle(phba,
a7909b39 4649 beiscsi_conn->beiscsi_conn_cid);
8359c79b
JSJ		 4650 if (!io_task->pwrb_handle) {
4651 beiscsi_log(phba, KERN_ERR,
4652 BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
4653 "BM_%d : Alloc of WRB_HANDLE Failed"
4654 "for the CID : %d\n",
4655 beiscsi_conn->beiscsi_conn_cid);
d2cecf0d 4656 goto free_io_hndls;
8359c79b 4657 }
6733b39a
JK		 4658 } else {
4659 io_task->scsi_cmnd = NULL;
d7aea67b 4660 if ((opcode & ISCSI_OPCODE_MASK) == ISCSI_OP_LOGIN) {
43f388b0 4661 beiscsi_conn->task = task;
6733b39a
JK		 4662 if (!beiscsi_conn->login_in_progress) {
4663 spin_lock(&phba->mgmt_sgl_lock);
4664 io_task->psgl_handle = (struct sgl_handle *)
4665 alloc_mgmt_sgl_handle(phba);
4666 spin_unlock(&phba->mgmt_sgl_lock);
8359c79b
JSJ		 4667 if (!io_task->psgl_handle) {
4668 beiscsi_log(phba, KERN_ERR,
4669 BEISCSI_LOG_IO |
4670 BEISCSI_LOG_CONFIG,
4671 "BM_%d : Alloc of MGMT_SGL_ICD Failed"
4672 "for the CID : %d\n",
4673 beiscsi_conn->
4674 beiscsi_conn_cid);
2afc95bf 4675 goto free_hndls;
8359c79b 4676 }
2afc95bf 4677
6733b39a
JK		 4678 beiscsi_conn->login_in_progress = 1;
4679 beiscsi_conn->plogin_sgl_handle =
4680 io_task->psgl_handle;
d2cecf0d
JK		 4681 io_task->pwrb_handle =
4682 alloc_wrb_handle(phba,
a7909b39 4683 beiscsi_conn->beiscsi_conn_cid);
8359c79b
JSJ		 4684 if (!io_task->pwrb_handle) {
4685 beiscsi_log(phba, KERN_ERR,
4686 BEISCSI_LOG_IO |
4687 BEISCSI_LOG_CONFIG,
4688 "BM_%d : Alloc of WRB_HANDLE Failed"
4689 "for the CID : %d\n",
4690 beiscsi_conn->
4691 beiscsi_conn_cid);
4692 goto free_mgmt_hndls;
4693 }
d2cecf0d
JK		 4694 beiscsi_conn->plogin_wrb_handle =
4695 io_task->pwrb_handle;
4696
6733b39a
JK		 4697 } else {
4698 io_task->psgl_handle =
4699 beiscsi_conn->plogin_sgl_handle;
d2cecf0d
JK		 4700 io_task->pwrb_handle =
4701 beiscsi_conn->plogin_wrb_handle;
6733b39a
JK		 4702 }
4703 } else {
4704 spin_lock(&phba->mgmt_sgl_lock);
4705 io_task->psgl_handle = alloc_mgmt_sgl_handle(phba);
4706 spin_unlock(&phba->mgmt_sgl_lock);
8359c79b
JSJ		 4707 if (!io_task->psgl_handle) {
4708 beiscsi_log(phba, KERN_ERR,
4709 BEISCSI_LOG_IO |
4710 BEISCSI_LOG_CONFIG,
4711 "BM_%d : Alloc of MGMT_SGL_ICD Failed"
4712 "for the CID : %d\n",
4713 beiscsi_conn->
4714 beiscsi_conn_cid);
2afc95bf 4715 goto free_hndls;
8359c79b 4716 }
d2cecf0d
JK		 4717 io_task->pwrb_handle =
4718 alloc_wrb_handle(phba,
a7909b39 4719 beiscsi_conn->beiscsi_conn_cid);
8359c79b
JSJ		 4720 if (!io_task->pwrb_handle) {
4721 beiscsi_log(phba, KERN_ERR,
4722 BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
4723 "BM_%d : Alloc of WRB_HANDLE Failed"
4724 "for the CID : %d\n",
4725 beiscsi_conn->beiscsi_conn_cid);
d2cecf0d 4726 goto free_mgmt_hndls;
8359c79b 4727 }
d2cecf0d 4728
6733b39a
JK		 4729 }
4730 }
bfead3b2
JK		 4731 itt = (itt_t) cpu_to_be32(((unsigned int)io_task->pwrb_handle->
4732 wrb_index << 16) | (unsigned int)
4733 (io_task->psgl_handle->sgl_index));
32951dd8 4734 io_task->pwrb_handle->pio_handle = task;
bfead3b2 4735
6733b39a
JK		 4736 io_task->cmd_bhs->iscsi_hdr.itt = itt;
4737 return 0;
2afc95bf 4738
d2cecf0d
JK		 4739free_io_hndls:
4740 spin_lock(&phba->io_sgl_lock);
4741 free_io_sgl_handle(phba, io_task->psgl_handle);
4742 spin_unlock(&phba->io_sgl_lock);
4743 goto free_hndls;
4744free_mgmt_hndls:
4745 spin_lock(&phba->mgmt_sgl_lock);
4746 free_mgmt_sgl_handle(phba, io_task->psgl_handle);
a7909b39 4747 io_task->psgl_handle = NULL;
d2cecf0d 4748 spin_unlock(&phba->mgmt_sgl_lock);
2afc95bf
JK		 4749free_hndls:
4750 phwi_ctrlr = phba->phwi_ctrlr;
a7909b39
JK		 4751 cri_index = BE_GET_CRI_FROM_CID(
4752 beiscsi_conn->beiscsi_conn_cid);
4753 pwrb_context = &phwi_ctrlr->wrb_context[cri_index];
d2cecf0d
JK		 4754 if (io_task->pwrb_handle)
4755 free_wrb_handle(phba, pwrb_context, io_task->pwrb_handle);
2afc95bf
JK		 4756 io_task->pwrb_handle = NULL;
4757 pci_pool_free(beiscsi_sess->bhs_pool, io_task->cmd_bhs,
4758 io_task->bhs_pa.u.a64.address);
1282ab76 4759 io_task->cmd_bhs = NULL;
2afc95bf 4760 return -ENOMEM;
6733b39a 4761}
09a1093a
JSJ		 4762int beiscsi_iotask_v2(struct iscsi_task *task, struct scatterlist *sg,
4763 unsigned int num_sg, unsigned int xferlen,
4764 unsigned int writedir)
4765{
4766
4767 struct beiscsi_io_task *io_task = task->dd_data;
4768 struct iscsi_conn *conn = task->conn;
4769 struct beiscsi_conn *beiscsi_conn = conn->dd_data;
4770 struct beiscsi_hba *phba = beiscsi_conn->phba;
4771 struct iscsi_wrb *pwrb = NULL;
4772 unsigned int doorbell = 0;
4773
4774 pwrb = io_task->pwrb_handle->pwrb;
09a1093a
JSJ		 4775
4776 io_task->cmd_bhs->iscsi_hdr.exp_statsn = 0;
4777 io_task->bhs_len = sizeof(struct be_cmd_bhs);
4778
4779 if (writedir) {
4780 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, type, pwrb,
4781 INI_WR_CMD);
4782 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, dsp, pwrb, 1);
4783 } else {
4784 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, type, pwrb,
4785 INI_RD_CMD);
4786 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, dsp, pwrb, 0);
4787 }
4788
4789 io_task->wrb_type = AMAP_GET_BITS(struct amap_iscsi_wrb_v2,
4790 type, pwrb);
4791
4792 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, lun, pwrb,
4793 cpu_to_be16(*(unsigned short *)
4794 &io_task->cmd_bhs->iscsi_hdr.lun));
4795 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, r2t_exp_dtl, pwrb, xferlen);
4796 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, wrb_idx, pwrb,
4797 io_task->pwrb_handle->wrb_index);
4798 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, cmdsn_itt, pwrb,
4799 be32_to_cpu(task->cmdsn));
4800 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sgl_idx, pwrb,
4801 io_task->psgl_handle->sgl_index);
4802
4803 hwi_write_sgl_v2(pwrb, sg, num_sg, io_task);
4804 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, ptr2nextwrb, pwrb,
4805 io_task->pwrb_handle->nxt_wrb_index);
4806
4807 be_dws_le_to_cpu(pwrb, sizeof(struct iscsi_wrb));
4808
4809 doorbell |= beiscsi_conn->beiscsi_conn_cid & DB_WRB_POST_CID_MASK;
4810 doorbell |= (io_task->pwrb_handle->wrb_index &
4811 DB_DEF_PDU_WRB_INDEX_MASK) <<
4812 DB_DEF_PDU_WRB_INDEX_SHIFT;
4813 doorbell |= 1 << DB_DEF_PDU_NUM_POSTED_SHIFT;
4814 iowrite32(doorbell, phba->db_va + DB_TXULP0_OFFSET);
4815 return 0;
4816}
6733b39a 4817
6733b39a
JK		 4818static int beiscsi_iotask(struct iscsi_task *task, struct scatterlist *sg,
4819 unsigned int num_sg, unsigned int xferlen,
4820 unsigned int writedir)
4821{
4822
4823 struct beiscsi_io_task *io_task = task->dd_data;
4824 struct iscsi_conn *conn = task->conn;
4825 struct beiscsi_conn *beiscsi_conn = conn->dd_data;
4826 struct beiscsi_hba *phba = beiscsi_conn->phba;
4827 struct iscsi_wrb *pwrb = NULL;
4828 unsigned int doorbell = 0;
4829
4830 pwrb = io_task->pwrb_handle->pwrb;
6733b39a
JK		 4831 io_task->cmd_bhs->iscsi_hdr.exp_statsn = 0;
4832 io_task->bhs_len = sizeof(struct be_cmd_bhs);
4833
4834 if (writedir) {
32951dd8
JK		 4835 AMAP_SET_BITS(struct amap_iscsi_wrb, type, pwrb,
4836 INI_WR_CMD);
6733b39a 4837 AMAP_SET_BITS(struct amap_iscsi_wrb, dsp, pwrb, 1);
6733b39a 4838 } else {
32951dd8
JK		 4839 AMAP_SET_BITS(struct amap_iscsi_wrb, type, pwrb,
4840 INI_RD_CMD);
6733b39a
JK		 4841 AMAP_SET_BITS(struct amap_iscsi_wrb, dsp, pwrb, 0);
4842 }
6733b39a 4843
09a1093a
JSJ		 4844 io_task->wrb_type = AMAP_GET_BITS(struct amap_iscsi_wrb,
4845 type, pwrb);
4846
6733b39a 4847 AMAP_SET_BITS(struct amap_iscsi_wrb, lun, pwrb,
dc63aac6
JK		 4848 cpu_to_be16(*(unsigned short *)
4849 &io_task->cmd_bhs->iscsi_hdr.lun));
6733b39a
JK		 4850 AMAP_SET_BITS(struct amap_iscsi_wrb, r2t_exp_dtl, pwrb, xferlen);
4851 AMAP_SET_BITS(struct amap_iscsi_wrb, wrb_idx, pwrb,
4852 io_task->pwrb_handle->wrb_index);
4853 AMAP_SET_BITS(struct amap_iscsi_wrb, cmdsn_itt, pwrb,
4854 be32_to_cpu(task->cmdsn));
4855 AMAP_SET_BITS(struct amap_iscsi_wrb, sgl_icd_idx, pwrb,
4856 io_task->psgl_handle->sgl_index);
4857
4858 hwi_write_sgl(pwrb, sg, num_sg, io_task);
4859
4860 AMAP_SET_BITS(struct amap_iscsi_wrb, ptr2nextwrb, pwrb,
4861 io_task->pwrb_handle->nxt_wrb_index);
4862 be_dws_le_to_cpu(pwrb, sizeof(struct iscsi_wrb));
4863
4864 doorbell |= beiscsi_conn->beiscsi_conn_cid & DB_WRB_POST_CID_MASK;
32951dd8 4865 doorbell |= (io_task->pwrb_handle->wrb_index &
6733b39a
JK		 4866 DB_DEF_PDU_WRB_INDEX_MASK) << DB_DEF_PDU_WRB_INDEX_SHIFT;
4867 doorbell |= 1 << DB_DEF_PDU_NUM_POSTED_SHIFT;
4868
4869 iowrite32(doorbell, phba->db_va + DB_TXULP0_OFFSET);
4870 return 0;
4871}
4872
4873static int beiscsi_mtask(struct iscsi_task *task)
4874{
dafab8e0 4875 struct beiscsi_io_task *io_task = task->dd_data;
6733b39a
JK		 4876 struct iscsi_conn *conn = task->conn;
4877 struct beiscsi_conn *beiscsi_conn = conn->dd_data;
4878 struct beiscsi_hba *phba = beiscsi_conn->phba;
4879 struct iscsi_wrb *pwrb = NULL;
4880 unsigned int doorbell = 0;
dafab8e0 4881 unsigned int cid;
09a1093a 4882 unsigned int pwrb_typeoffset = 0;
6733b39a 4883
bfead3b2 4884 cid = beiscsi_conn->beiscsi_conn_cid;
6733b39a 4885 pwrb = io_task->pwrb_handle->pwrb;
caf818f1 4886 memset(pwrb, 0, sizeof(*pwrb));
09a1093a 4887
2c9dfd36 4888 if (is_chip_be2_be3r(phba)) {
09a1093a
JSJ		 4889 AMAP_SET_BITS(struct amap_iscsi_wrb, cmdsn_itt, pwrb,
4890 be32_to_cpu(task->cmdsn));
4891 AMAP_SET_BITS(struct amap_iscsi_wrb, wrb_idx, pwrb,
4892 io_task->pwrb_handle->wrb_index);
4893 AMAP_SET_BITS(struct amap_iscsi_wrb, sgl_icd_idx, pwrb,
4894 io_task->psgl_handle->sgl_index);
4895 AMAP_SET_BITS(struct amap_iscsi_wrb, r2t_exp_dtl, pwrb,
4896 task->data_count);
4897 AMAP_SET_BITS(struct amap_iscsi_wrb, ptr2nextwrb, pwrb,
4898 io_task->pwrb_handle->nxt_wrb_index);
4899 pwrb_typeoffset = BE_WRB_TYPE_OFFSET;
2c9dfd36
JK		 4900 } else {
4901 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, cmdsn_itt, pwrb,
4902 be32_to_cpu(task->cmdsn));
4903 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, wrb_idx, pwrb,
4904 io_task->pwrb_handle->wrb_index);
4905 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sgl_idx, pwrb,
4906 io_task->psgl_handle->sgl_index);
4907 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, r2t_exp_dtl, pwrb,
4908 task->data_count);
4909 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, ptr2nextwrb, pwrb,
4910 io_task->pwrb_handle->nxt_wrb_index);
4911 pwrb_typeoffset = SKH_WRB_TYPE_OFFSET;
09a1093a
JSJ		 4912 }
4913
dafab8e0 4914
6733b39a
JK		 4915 switch (task->hdr->opcode & ISCSI_OPCODE_MASK) {
4916 case ISCSI_OP_LOGIN:
6733b39a 4917 AMAP_SET_BITS(struct amap_iscsi_wrb, cmdsn_itt, pwrb, 1);
09a1093a 4918 ADAPTER_SET_WRB_TYPE(pwrb, TGT_DM_CMD, pwrb_typeoffset);
6733b39a
JK		 4919 hwi_write_buffer(pwrb, task);
4920 break;
4921 case ISCSI_OP_NOOP_OUT:
1390b01b 4922 if (task->hdr->ttt != ISCSI_RESERVED_TAG) {
09a1093a 4923 ADAPTER_SET_WRB_TYPE(pwrb, TGT_DM_CMD, pwrb_typeoffset);
2c9dfd36
JK		 4924 if (is_chip_be2_be3r(phba))
4925 AMAP_SET_BITS(struct amap_iscsi_wrb,
09a1093a
JSJ		 4926 dmsg, pwrb, 1);
4927 else
2c9dfd36 4928 AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
09a1093a 4929 dmsg, pwrb, 1);
1390b01b 4930 } else {
09a1093a 4931 ADAPTER_SET_WRB_TYPE(pwrb, INI_RD_CMD, pwrb_typeoffset);
2c9dfd36
JK		 4932 if (is_chip_be2_be3r(phba))
4933 AMAP_SET_BITS(struct amap_iscsi_wrb,
09a1093a
JSJ		 4934 dmsg, pwrb, 0);
4935 else
2c9dfd36 4936 AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
09a1093a 4937 dmsg, pwrb, 0);
1390b01b 4938 }
6733b39a
JK		 4939 hwi_write_buffer(pwrb, task);
4940 break;
4941 case ISCSI_OP_TEXT:
09a1093a 4942 ADAPTER_SET_WRB_TYPE(pwrb, TGT_DM_CMD, pwrb_typeoffset);
6733b39a
JK		 4943 hwi_write_buffer(pwrb, task);
4944 break;
4945 case ISCSI_OP_SCSI_TMFUNC:
09a1093a 4946 ADAPTER_SET_WRB_TYPE(pwrb, INI_TMF_CMD, pwrb_typeoffset);
6733b39a
JK		 4947 hwi_write_buffer(pwrb, task);
4948 break;
4949 case ISCSI_OP_LOGOUT:
09a1093a 4950 ADAPTER_SET_WRB_TYPE(pwrb, HWH_TYPE_LOGOUT, pwrb_typeoffset);
6733b39a
JK		 4951 hwi_write_buffer(pwrb, task);
4952 break;
4953
4954 default:
99bc5d55
JSJ		 4955 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_CONFIG,
4956 "BM_%d : opcode =%d Not supported\n",
4957 task->hdr->opcode & ISCSI_OPCODE_MASK);
4958
6733b39a
JK		 4959 return -EINVAL;
4960 }
4961
09a1093a 4962 /* Set the task type */
2c9dfd36
JK		 4963 io_task->wrb_type = (is_chip_be2_be3r(phba)) ?
4964 AMAP_GET_BITS(struct amap_iscsi_wrb, type, pwrb) :
4965 AMAP_GET_BITS(struct amap_iscsi_wrb_v2, type, pwrb);
6733b39a 4966
bfead3b2 4967 doorbell |= cid & DB_WRB_POST_CID_MASK;
32951dd8 4968 doorbell |= (io_task->pwrb_handle->wrb_index &
6733b39a
JK		 4969 DB_DEF_PDU_WRB_INDEX_MASK) << DB_DEF_PDU_WRB_INDEX_SHIFT;
4970 doorbell |= 1 << DB_DEF_PDU_NUM_POSTED_SHIFT;
4971 iowrite32(doorbell, phba->db_va + DB_TXULP0_OFFSET);
4972 return 0;
4973}
4974
4975static int beiscsi_task_xmit(struct iscsi_task *task)
4976{
6733b39a
JK		 4977 struct beiscsi_io_task *io_task = task->dd_data;
4978 struct scsi_cmnd *sc = task->sc;
09a1093a 4979 struct beiscsi_hba *phba = NULL;
6733b39a
JK		 4980 struct scatterlist *sg;
4981 int num_sg;
4982 unsigned int writedir = 0, xferlen = 0;
4983
09a1093a
JSJ		 4984 phba = ((struct beiscsi_conn *)task->conn->dd_data)->phba;
4985
6733b39a
JK		 4986 if (!sc)
4987 return beiscsi_mtask(task);
4988
4989 io_task->scsi_cmnd = sc;
4990 num_sg = scsi_dma_map(sc);
4991 if (num_sg < 0) {
99bc5d55
JSJ		 4992 struct iscsi_conn *conn = task->conn;
4993 struct beiscsi_hba *phba = NULL;
4994
4995 phba = ((struct beiscsi_conn *)conn->dd_data)->phba;
4996 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_IO,
4997 "BM_%d : scsi_dma_map Failed\n");
4998
6733b39a
JK		 4999 return num_sg;
5000 }
6733b39a
JK		 5001 xferlen = scsi_bufflen(sc);
5002 sg = scsi_sglist(sc);
99bc5d55 5003 if (sc->sc_data_direction == DMA_TO_DEVICE)
6733b39a 5004 writedir = 1;
99bc5d55 5005 else
6733b39a 5006 writedir = 0;
99bc5d55 5007
09a1093a 5008 return phba->iotask_fn(task, sg, num_sg, xferlen, writedir);
6733b39a
JK		 5009}
5010
ffce3e2e
JK		 5011/**
5012 * beiscsi_bsg_request - handle bsg request from ISCSI transport
5013 * @job: job to handle
5014 */
5015static int beiscsi_bsg_request(struct bsg_job *job)
5016{
5017 struct Scsi_Host *shost;
5018 struct beiscsi_hba *phba;
5019 struct iscsi_bsg_request *bsg_req = job->request;
5020 int rc = -EINVAL;
5021 unsigned int tag;
5022 struct be_dma_mem nonemb_cmd;
5023 struct be_cmd_resp_hdr *resp;
5024 struct iscsi_bsg_reply *bsg_reply = job->reply;
5025 unsigned short status, extd_status;
5026
5027 shost = iscsi_job_to_shost(job);
5028 phba = iscsi_host_priv(shost);
5029
5030 switch (bsg_req->msgcode) {
5031 case ISCSI_BSG_HST_VENDOR:
5032 nonemb_cmd.va = pci_alloc_consistent(phba->ctrl.pdev,
5033 job->request_payload.payload_len,
5034 &nonemb_cmd.dma);
5035 if (nonemb_cmd.va == NULL) {
99bc5d55
JSJ		 5036 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_CONFIG,
5037 "BM_%d : Failed to allocate memory for "
5038 "beiscsi_bsg_request\n");
8359c79b 5039 return -ENOMEM;
ffce3e2e
JK		 5040 }
5041 tag = mgmt_vendor_specific_fw_cmd(&phba->ctrl, phba, job,
5042 &nonemb_cmd);
5043 if (!tag) {
99bc5d55 5044 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_CONFIG,
8359c79b 5045 "BM_%d : MBX Tag Allocation Failed\n");
99bc5d55 5046
ffce3e2e
JK		 5047 pci_free_consistent(phba->ctrl.pdev, nonemb_cmd.size,
5048 nonemb_cmd.va, nonemb_cmd.dma);
5049 return -EAGAIN;
e175defe
JSJ		 5050 }
5051
5052 rc = wait_event_interruptible_timeout(
5053 phba->ctrl.mcc_wait[tag],
5054 phba->ctrl.mcc_numtag[tag],
5055 msecs_to_jiffies(
5056 BEISCSI_HOST_MBX_TIMEOUT));
ffce3e2e
JK		 5057 extd_status = (phba->ctrl.mcc_numtag[tag] & 0x0000FF00) >> 8;
5058 status = phba->ctrl.mcc_numtag[tag] & 0x000000FF;
5059 free_mcc_tag(&phba->ctrl, tag);
5060 resp = (struct be_cmd_resp_hdr *)nonemb_cmd.va;
5061 sg_copy_from_buffer(job->reply_payload.sg_list,
5062 job->reply_payload.sg_cnt,
5063 nonemb_cmd.va, (resp->response_length
5064 + sizeof(*resp)));
5065 bsg_reply->reply_payload_rcv_len = resp->response_length;
5066 bsg_reply->result = status;
5067 bsg_job_done(job, bsg_reply->result,
5068 bsg_reply->reply_payload_rcv_len);
5069 pci_free_consistent(phba->ctrl.pdev, nonemb_cmd.size,
5070 nonemb_cmd.va, nonemb_cmd.dma);
5071 if (status || extd_status) {
99bc5d55 5072 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_CONFIG,
8359c79b 5073 "BM_%d : MBX Cmd Failed"
99bc5d55
JSJ		 5074 " status = %d extd_status = %d\n",
5075 status, extd_status);
5076
ffce3e2e 5077 return -EIO;
8359c79b
JSJ		 5078 } else {
5079 rc = 0;
ffce3e2e
JK		 5080 }
5081 break;
5082
5083 default:
99bc5d55
JSJ		 5084 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_CONFIG,
5085 "BM_%d : Unsupported bsg command: 0x%x\n",
5086 bsg_req->msgcode);
ffce3e2e
JK		 5087 break;
5088 }
5089
5090 return rc;
5091}
5092
99bc5d55
JSJ		 5093void beiscsi_hba_attrs_init(struct beiscsi_hba *phba)
5094{
5095 /* Set the logging parameter */
5096 beiscsi_log_enable_init(phba, beiscsi_log_enable);
5097}
5098
4d4d1ef8
JSJ		 5099/*
5100 * beiscsi_quiesce()- Cleanup Driver resources
5101 * @phba: Instance Priv structure
5102 *
5103 * Free the OS and HW resources held by the driver
5104 **/
25602c97 5105static void beiscsi_quiesce(struct beiscsi_hba *phba)
6733b39a 5106{
bfead3b2
JK		 5107 struct hwi_controller *phwi_ctrlr;
5108 struct hwi_context_memory *phwi_context;
5109 struct be_eq_obj *pbe_eq;
5110 unsigned int i, msix_vec;
6733b39a 5111
bfead3b2
JK		 5112 phwi_ctrlr = phba->phwi_ctrlr;
5113 phwi_context = phwi_ctrlr->phwi_ctxt;
6733b39a 5114 hwi_disable_intr(phba);
bfead3b2
JK		 5115 if (phba->msix_enabled) {
5116 for (i = 0; i <= phba->num_cpus; i++) {
5117 msix_vec = phba->msix_entries[i].vector;
5118 free_irq(msix_vec, &phwi_context->be_eq[i]);
8fcfb210 5119 kfree(phba->msi_name[i]);
bfead3b2
JK		 5120 }
5121 } else
5122 if (phba->pcidev->irq)
5123 free_irq(phba->pcidev->irq, phba);
5124 pci_disable_msix(phba->pcidev);
6733b39a
JK		 5125 destroy_workqueue(phba->wq);
5126 if (blk_iopoll_enabled)
bfead3b2
JK		 5127 for (i = 0; i < phba->num_cpus; i++) {
5128 pbe_eq = &phwi_context->be_eq[i];
5129 blk_iopoll_disable(&pbe_eq->iopoll);
5130 }
6733b39a
JK		 5131
5132 beiscsi_clean_port(phba);
5133 beiscsi_free_mem(phba);
e9b91193 5134
6733b39a
JK		 5135 beiscsi_unmap_pci_function(phba);
5136 pci_free_consistent(phba->pcidev,
5137 phba->ctrl.mbox_mem_alloced.size,
5138 phba->ctrl.mbox_mem_alloced.va,
5139 phba->ctrl.mbox_mem_alloced.dma);
7a158003
JSJ		 5140
5141 cancel_delayed_work_sync(&phba->beiscsi_hw_check_task);
25602c97
JK		 5142}
5143
5144static void beiscsi_remove(struct pci_dev *pcidev)
5145{
5146
5147 struct beiscsi_hba *phba = NULL;
5148
5149 phba = pci_get_drvdata(pcidev);
5150 if (!phba) {
5151 dev_err(&pcidev->dev, "beiscsi_remove called with no phba\n");
5152 return;
5153 }
5154
0e43895e 5155 beiscsi_destroy_def_ifaces(phba);
25602c97 5156 beiscsi_quiesce(phba);
9d045163 5157 iscsi_boot_destroy_kset(phba->boot_kset);
6733b39a
JK		 5158 iscsi_host_remove(phba->shost);
5159 pci_dev_put(phba->pcidev);
5160 iscsi_host_free(phba->shost);
8dce69ff 5161 pci_disable_device(pcidev);
6733b39a
JK		 5162}
5163
25602c97
JK		 5164static void beiscsi_shutdown(struct pci_dev *pcidev)
5165{
5166
5167 struct beiscsi_hba *phba = NULL;
5168
5169 phba = (struct beiscsi_hba *)pci_get_drvdata(pcidev);
5170 if (!phba) {
5171 dev_err(&pcidev->dev, "beiscsi_shutdown called with no phba\n");
5172 return;
5173 }
5174
5175 beiscsi_quiesce(phba);
8dce69ff 5176 pci_disable_device(pcidev);
25602c97
JK		 5177}
5178
bfead3b2
JK		 5179static void beiscsi_msix_enable(struct beiscsi_hba *phba)
5180{
5181 int i, status;
5182
5183 for (i = 0; i <= phba->num_cpus; i++)
5184 phba->msix_entries[i].entry = i;
5185
5186 status = pci_enable_msix(phba->pcidev, phba->msix_entries,
5187 (phba->num_cpus + 1));
5188 if (!status)
5189 phba->msix_enabled = true;
5190
5191 return;
5192}
5193
7a158003
JSJ		 5194/*
5195 * beiscsi_hw_health_check()- Check adapter health
5196 * @work: work item to check HW health
5197 *
5198 * Check if adapter in an unrecoverable state or not.
5199 **/
5200static void
5201beiscsi_hw_health_check(struct work_struct *work)
5202{
5203 struct beiscsi_hba *phba =
5204 container_of(work, struct beiscsi_hba,
5205 beiscsi_hw_check_task.work);
5206
5207 beiscsi_ue_detect(phba);
5208
5209 schedule_delayed_work(&phba->beiscsi_hw_check_task,
5210 msecs_to_jiffies(1000));
5211}
5212
6f039790
GKH		 5213static int beiscsi_dev_probe(struct pci_dev *pcidev,
5214 const struct pci_device_id *id)
6733b39a
JK		 5215{
5216 struct beiscsi_hba *phba = NULL;
bfead3b2
JK		 5217 struct hwi_controller *phwi_ctrlr;
5218 struct hwi_context_memory *phwi_context;
5219 struct be_eq_obj *pbe_eq;
107dfcba 5220 int ret, i;
6733b39a
JK		 5221
5222 ret = beiscsi_enable_pci(pcidev);
5223 if (ret < 0) {
99bc5d55
JSJ		 5224 dev_err(&pcidev->dev,
5225 "beiscsi_dev_probe - Failed to enable pci device\n");
6733b39a
JK		 5226 return ret;
5227 }
5228
5229 phba = beiscsi_hba_alloc(pcidev);
5230 if (!phba) {
99bc5d55
JSJ		 5231 dev_err(&pcidev->dev,
5232 "beiscsi_dev_probe - Failed in beiscsi_hba_alloc\n");
6733b39a
JK		 5233 goto disable_pci;
5234 }
5235
99bc5d55
JSJ		 5236 /* Initialize Driver configuration Paramters */
5237 beiscsi_hba_attrs_init(phba);
5238
e175defe 5239 phba->fw_timeout = false;
6c83185a 5240 phba->mac_addr_set = false;
e175defe
JSJ		 5241
5242
f98c96b0
JK		 5243 switch (pcidev->device) {
5244 case BE_DEVICE_ID1:
5245 case OC_DEVICE_ID1:
5246 case OC_DEVICE_ID2:
5247 phba->generation = BE_GEN2;
09a1093a 5248 phba->iotask_fn = beiscsi_iotask;
f98c96b0
JK		 5249 break;
5250 case BE_DEVICE_ID2:
5251 case OC_DEVICE_ID3:
5252 phba->generation = BE_GEN3;
09a1093a 5253 phba->iotask_fn = beiscsi_iotask;
f98c96b0 5254 break;
139a1b1e
JSJ		 5255 case OC_SKH_ID1:
5256 phba->generation = BE_GEN4;
09a1093a 5257 phba->iotask_fn = beiscsi_iotask_v2;
bf9131cb 5258 break;
f98c96b0
JK		 5259 default:
5260 phba->generation = 0;
5261 }
5262
bfead3b2 5263 if (enable_msix)
107dfcba 5264 find_num_cpus(phba);
bfead3b2 5265 else
107dfcba
JSJ		 5266 phba->num_cpus = 1;
5267
99bc5d55
JSJ		 5268 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
5269 "BM_%d : num_cpus = %d\n",
5270 phba->num_cpus);
bfead3b2 5271
b547f2d6 5272 if (enable_msix) {
bfead3b2 5273 beiscsi_msix_enable(phba);
b547f2d6
JK		 5274 if (!phba->msix_enabled)
5275 phba->num_cpus = 1;
5276 }
6733b39a
JK		 5277 ret = be_ctrl_init(phba, pcidev);
5278 if (ret) {
99bc5d55
JSJ		 5279 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5280 "BM_%d : beiscsi_dev_probe-"
5281 "Failed in be_ctrl_init\n");
6733b39a
JK		 5282 goto hba_free;
5283 }
5284
4d4d1ef8
JSJ		 5285 ret = beiscsi_cmd_reset_function(phba);
5286 if (ret) {
5287 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
92665a66 5288 "BM_%d : Reset Failed\n");
4d4d1ef8
JSJ		 5289 goto hba_free;
5290 }
5291 ret = be_chk_reset_complete(phba);
5292 if (ret) {
5293 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
92665a66 5294 "BM_%d : Failed to get out of reset.\n");
4d4d1ef8 5295 goto hba_free;
e9b91193
JK		 5296 }
5297
6733b39a
JK		 5298 spin_lock_init(&phba->io_sgl_lock);
5299 spin_lock_init(&phba->mgmt_sgl_lock);
5300 spin_lock_init(&phba->isr_lock);
8f09a3b9 5301 spin_lock_init(&phba->async_pdu_lock);
7da50879
JK		 5302 ret = mgmt_get_fw_config(&phba->ctrl, phba);
5303 if (ret != 0) {
99bc5d55
JSJ		 5304 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5305 "BM_%d : Error getting fw config\n");
7da50879
JK		 5306 goto free_port;
5307 }
843ae752 5308 phba->shost->max_id = phba->params.cxns_per_ctrl;
6733b39a 5309 beiscsi_get_params(phba);
aa874f07 5310 phba->shost->can_queue = phba->params.ios_per_ctrl;
6733b39a
JK		 5311 ret = beiscsi_init_port(phba);
5312 if (ret < 0) {
99bc5d55
JSJ		 5313 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5314 "BM_%d : beiscsi_dev_probe-"
5315 "Failed in beiscsi_init_port\n");
6733b39a
JK		 5316 goto free_port;
5317 }
5318
756d29c8
JK		 5319 for (i = 0; i < MAX_MCC_CMD ; i++) {
5320 init_waitqueue_head(&phba->ctrl.mcc_wait[i + 1]);
5321 phba->ctrl.mcc_tag[i] = i + 1;
5322 phba->ctrl.mcc_numtag[i + 1] = 0;
5323 phba->ctrl.mcc_tag_available++;
5324 }
5325
5326 phba->ctrl.mcc_alloc_index = phba->ctrl.mcc_free_index = 0;
5327
72fb46a9 5328 snprintf(phba->wq_name, sizeof(phba->wq_name), "beiscsi_%02x_wq",
6733b39a 5329 phba->shost->host_no);
d8537548 5330 phba->wq = alloc_workqueue("%s", WQ_MEM_RECLAIM, 1, phba->wq_name);
6733b39a 5331 if (!phba->wq) {
99bc5d55
JSJ		 5332 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5333 "BM_%d : beiscsi_dev_probe-"
5334 "Failed to allocate work queue\n");
6733b39a
JK		 5335 goto free_twq;
5336 }
5337
7a158003
JSJ		 5338 INIT_DELAYED_WORK(&phba->beiscsi_hw_check_task,
5339 beiscsi_hw_health_check);
6733b39a 5340
bfead3b2
JK		 5341 phwi_ctrlr = phba->phwi_ctrlr;
5342 phwi_context = phwi_ctrlr->phwi_ctxt;
72fb46a9 5343
6733b39a 5344 if (blk_iopoll_enabled) {
bfead3b2
JK		 5345 for (i = 0; i < phba->num_cpus; i++) {
5346 pbe_eq = &phwi_context->be_eq[i];
5347 blk_iopoll_init(&pbe_eq->iopoll, be_iopoll_budget,
5348 be_iopoll);
5349 blk_iopoll_enable(&pbe_eq->iopoll);
5350 }
72fb46a9
JSJ		 5351
5352 i = (phba->msix_enabled) ? i : 0;
5353 /* Work item for MCC handling */
5354 pbe_eq = &phwi_context->be_eq[i];
5355 INIT_WORK(&pbe_eq->work_cqs, beiscsi_process_all_cqs);
5356 } else {
5357 if (phba->msix_enabled) {
5358 for (i = 0; i <= phba->num_cpus; i++) {
5359 pbe_eq = &phwi_context->be_eq[i];
5360 INIT_WORK(&pbe_eq->work_cqs,
5361 beiscsi_process_all_cqs);
5362 }
5363 } else {
5364 pbe_eq = &phwi_context->be_eq[0];
5365 INIT_WORK(&pbe_eq->work_cqs,
5366 beiscsi_process_all_cqs);
5367 }
6733b39a 5368 }
72fb46a9 5369
6733b39a
JK		 5370 ret = beiscsi_init_irqs(phba);
5371 if (ret < 0) {
99bc5d55
JSJ		 5372 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5373 "BM_%d : beiscsi_dev_probe-"
5374 "Failed to beiscsi_init_irqs\n");
6733b39a
JK		 5375 goto free_blkenbld;
5376 }
238f6b72 5377 hwi_enable_intr(phba);
f457a46f
MC		 5378
5379 if (beiscsi_setup_boot_info(phba))
5380 /*
5381 * log error but continue, because we may not be using
5382 * iscsi boot.
5383 */
99bc5d55
JSJ		 5384 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5385 "BM_%d : Could not set up "
5386 "iSCSI boot info.\n");
f457a46f 5387
0e43895e 5388 beiscsi_create_def_ifaces(phba);
7a158003
JSJ		 5389 schedule_delayed_work(&phba->beiscsi_hw_check_task,
5390 msecs_to_jiffies(1000));
5391
99bc5d55
JSJ		 5392 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
5393 "\n\n\n BM_%d : SUCCESS - DRIVER LOADED\n\n\n");
6733b39a
JK		 5394 return 0;
5395
6733b39a
JK		 5396free_blkenbld:
5397 destroy_workqueue(phba->wq);
5398 if (blk_iopoll_enabled)
bfead3b2
JK		 5399 for (i = 0; i < phba->num_cpus; i++) {
5400 pbe_eq = &phwi_context->be_eq[i];
5401 blk_iopoll_disable(&pbe_eq->iopoll);
5402 }
6733b39a
JK		 5403free_twq:
5404 beiscsi_clean_port(phba);
5405 beiscsi_free_mem(phba);
5406free_port:
5407 pci_free_consistent(phba->pcidev,
5408 phba->ctrl.mbox_mem_alloced.size,
5409 phba->ctrl.mbox_mem_alloced.va,
5410 phba->ctrl.mbox_mem_alloced.dma);
5411 beiscsi_unmap_pci_function(phba);
5412hba_free:
238f6b72
JK		 5413 if (phba->msix_enabled)
5414 pci_disable_msix(phba->pcidev);
6733b39a
JK		 5415 iscsi_host_remove(phba->shost);
5416 pci_dev_put(phba->pcidev);
5417 iscsi_host_free(phba->shost);
5418disable_pci:
5419 pci_disable_device(pcidev);
5420 return ret;
5421}
5422
5423struct iscsi_transport beiscsi_iscsi_transport = {
5424 .owner = THIS_MODULE,
5425 .name = DRV_NAME,
9db0fb3a 5426 .caps = CAP_RECOVERY_L0 | CAP_HDRDGST | CAP_TEXT_NEGO |
6733b39a 5427 CAP_MULTI_R2T | CAP_DATADGST | CAP_DATA_PATH_OFFLOAD,
6733b39a
JK		 5428 .create_session = beiscsi_session_create,
5429 .destroy_session = beiscsi_session_destroy,
5430 .create_conn = beiscsi_conn_create,
5431 .bind_conn = beiscsi_conn_bind,
5432 .destroy_conn = iscsi_conn_teardown,
3128c6c7 5433 .attr_is_visible = be2iscsi_attr_is_visible,
0e43895e
MC		 5434 .set_iface_param = be2iscsi_iface_set_param,
5435 .get_iface_param = be2iscsi_iface_get_param,
6733b39a 5436 .set_param = beiscsi_set_param,
c7f7fd5b 5437 .get_conn_param = iscsi_conn_get_param,
6733b39a
JK		 5438 .get_session_param = iscsi_session_get_param,
5439 .get_host_param = beiscsi_get_host_param,
5440 .start_conn = beiscsi_conn_start,
fa95d206 5441 .stop_conn = iscsi_conn_stop,
6733b39a
JK		 5442 .send_pdu = iscsi_conn_send_pdu,
5443 .xmit_task = beiscsi_task_xmit,
5444 .cleanup_task = beiscsi_cleanup_task,
5445 .alloc_pdu = beiscsi_alloc_pdu,
5446 .parse_pdu_itt = beiscsi_parse_pdu,
5447 .get_stats = beiscsi_conn_get_stats,
c7f7fd5b 5448 .get_ep_param = beiscsi_ep_get_param,
6733b39a
JK		 5449 .ep_connect = beiscsi_ep_connect,
5450 .ep_poll = beiscsi_ep_poll,
5451 .ep_disconnect = beiscsi_ep_disconnect,
5452 .session_recovery_timedout = iscsi_session_recovery_timedout,
ffce3e2e 5453 .bsg_request = beiscsi_bsg_request,
6733b39a
JK		 5454};
5455
5456static struct pci_driver beiscsi_pci_driver = {
5457 .name = DRV_NAME,
5458 .probe = beiscsi_dev_probe,
5459 .remove = beiscsi_remove,
25602c97 5460 .shutdown = beiscsi_shutdown,
6733b39a
JK		 5461 .id_table = beiscsi_pci_id_table
5462};
5463
bfead3b2 5464
6733b39a
JK		 5465static int __init beiscsi_module_init(void)
5466{
5467 int ret;
5468
5469 beiscsi_scsi_transport =
5470 iscsi_register_transport(&beiscsi_iscsi_transport);
5471 if (!beiscsi_scsi_transport) {
99bc5d55
JSJ		 5472 printk(KERN_ERR
5473 "beiscsi_module_init - Unable to register beiscsi transport.\n");
f55a24f2 5474 return -ENOMEM;
6733b39a 5475 }
99bc5d55
JSJ		 5476 printk(KERN_INFO "In beiscsi_module_init, tt=%p\n",
5477 &beiscsi_iscsi_transport);
6733b39a
JK		 5478
5479 ret = pci_register_driver(&beiscsi_pci_driver);
5480 if (ret) {
99bc5d55
JSJ		 5481 printk(KERN_ERR
5482 "beiscsi_module_init - Unable to register beiscsi pci driver.\n");
6733b39a
JK		 5483 goto unregister_iscsi_transport;
5484 }
5485 return 0;
5486
5487unregister_iscsi_transport:
5488 iscsi_unregister_transport(&beiscsi_iscsi_transport);
5489 return ret;
5490}
5491
5492static void __exit beiscsi_module_exit(void)
5493{
5494 pci_unregister_driver(&beiscsi_pci_driver);
5495 iscsi_unregister_transport(&beiscsi_iscsi_transport);
5496}
5497
5498module_init(beiscsi_module_init);
5499module_exit(beiscsi_module_exit);
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