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281e00a3 WD |
1 | /* |
2 | * (C) Copyright 2002 | |
792a09eb | 3 | * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de> |
281e00a3 WD |
4 | * |
5 | * This program is free software; you can redistribute it and/or modify | |
6 | * it under the terms of the GNU General Public License as published by | |
7 | * the Free Software Foundation; either version 2 of the License, or | |
8 | * (at your option) any later version. | |
9 | * | |
10 | * This program is distributed in the hope that it will be useful, | |
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
13 | * GNU General Public License for more details. | |
14 | * | |
15 | * You should have received a copy of the GNU General Public License | |
c609719b WD |
16 | * along with this program; if not, write to the Free Software |
17 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
18 | * | |
19 | */ | |
20 | ||
21 | #include <common.h> | |
ac67804f | 22 | #include <asm/arch/s3c24x0_cpu.h> |
c609719b | 23 | |
d87080b7 WD |
24 | DECLARE_GLOBAL_DATA_PTR; |
25 | ||
48b42616 WD |
26 | #ifdef CONFIG_SERIAL1 |
27 | #define UART_NR S3C24X0_UART0 | |
28 | ||
42dfe7a1 | 29 | #elif defined(CONFIG_SERIAL2) |
48b42616 WD |
30 | #define UART_NR S3C24X0_UART1 |
31 | ||
42dfe7a1 | 32 | #elif defined(CONFIG_SERIAL3) |
48b42616 WD |
33 | #define UART_NR S3C24X0_UART2 |
34 | ||
35 | #else | |
36 | #error "Bad: you didn't configure serial ..." | |
37 | #endif | |
c609719b | 38 | |
eb0ae7f5 | 39 | #include <asm/io.h> |
40 | ||
a7c185ed HW |
41 | #if defined(CONFIG_SERIAL_MULTI) |
42 | #include <serial.h> | |
43 | ||
44 | /* Multi serial device functions */ | |
45 | #define DECLARE_S3C_SERIAL_FUNCTIONS(port) \ | |
eb0ae7f5 | 46 | int s3serial##port##_init(void) \ |
47 | { \ | |
48 | return serial_init_dev(port); \ | |
49 | } \ | |
50 | void s3serial##port##_setbrg(void) \ | |
51 | { \ | |
52 | serial_setbrg_dev(port); \ | |
53 | } \ | |
54 | int s3serial##port##_getc(void) \ | |
55 | { \ | |
56 | return serial_getc_dev(port); \ | |
57 | } \ | |
58 | int s3serial##port##_tstc(void) \ | |
59 | { \ | |
60 | return serial_tstc_dev(port); \ | |
61 | } \ | |
62 | void s3serial##port##_putc(const char c) \ | |
63 | { \ | |
64 | serial_putc_dev(port, c); \ | |
65 | } \ | |
66 | void s3serial##port##_puts(const char *s) \ | |
67 | { \ | |
68 | serial_puts_dev(port, s); \ | |
69 | } | |
70 | ||
71 | #define INIT_S3C_SERIAL_STRUCTURE(port, name, bus) { \ | |
72 | name, \ | |
73 | bus, \ | |
74 | s3serial##port##_init, \ | |
fbb0030e | 75 | NULL,\ |
eb0ae7f5 | 76 | s3serial##port##_setbrg, \ |
77 | s3serial##port##_getc, \ | |
78 | s3serial##port##_tstc, \ | |
79 | s3serial##port##_putc, \ | |
80 | s3serial##port##_puts, \ | |
81 | } | |
a7c185ed HW |
82 | |
83 | #endif /* CONFIG_SERIAL_MULTI */ | |
84 | ||
eb0ae7f5 | 85 | #ifdef CONFIG_HWFLOW |
86 | static int hwflow; | |
87 | #endif | |
88 | ||
a7c185ed | 89 | void _serial_setbrg(const int dev_index) |
c609719b | 90 | { |
eb0ae7f5 | 91 | struct s3c24x0_uart *uart = s3c24x0_get_base_uart(dev_index); |
c609719b | 92 | unsigned int reg = 0; |
a7c185ed | 93 | int i; |
c609719b WD |
94 | |
95 | /* value is calculated so : (int)(PCLK/16./baudrate) -1 */ | |
96 | reg = get_PCLK() / (16 * gd->baudrate) - 1; | |
97 | ||
d9abba82 | 98 | writel(reg, &uart->ubrdiv); |
eb0ae7f5 | 99 | for (i = 0; i < 100; i++) |
100 | /* Delay */ ; | |
a7c185ed | 101 | } |
eb0ae7f5 | 102 | |
a7c185ed | 103 | #if defined(CONFIG_SERIAL_MULTI) |
eb0ae7f5 | 104 | static inline void serial_setbrg_dev(unsigned int dev_index) |
a7c185ed HW |
105 | { |
106 | _serial_setbrg(dev_index); | |
107 | } | |
108 | #else | |
109 | void serial_setbrg(void) | |
110 | { | |
111 | _serial_setbrg(UART_NR); | |
112 | } | |
113 | #endif | |
114 | ||
115 | ||
116 | /* Initialise the serial port. The settings are always 8 data bits, no parity, | |
117 | * 1 stop bit, no start bits. | |
118 | */ | |
119 | static int serial_init_dev(const int dev_index) | |
120 | { | |
eb0ae7f5 | 121 | struct s3c24x0_uart *uart = s3c24x0_get_base_uart(dev_index); |
122 | ||
123 | #ifdef CONFIG_HWFLOW | |
124 | hwflow = 0; /* turned off by default */ | |
125 | #endif | |
a7c185ed | 126 | |
c609719b | 127 | /* FIFO enable, Tx/Rx FIFO clear */ |
d9abba82 N |
128 | writel(0x07, &uart->ufcon); |
129 | writel(0x0, &uart->umcon); | |
a7c185ed | 130 | |
c609719b | 131 | /* Normal,No parity,1 stop,8 bit */ |
d9abba82 | 132 | writel(0x3, &uart->ulcon); |
c609719b WD |
133 | /* |
134 | * tx=level,rx=edge,disable timeout int.,enable rx error int., | |
135 | * normal,interrupt or polling | |
136 | */ | |
d9abba82 | 137 | writel(0x245, &uart->ucon); |
c609719b WD |
138 | |
139 | #ifdef CONFIG_HWFLOW | |
d9abba82 | 140 | writel(0x1, &uart->umcon); /* rts up */ |
c609719b | 141 | #endif |
a7c185ed HW |
142 | |
143 | /* FIXME: This is sooooooooooooooooooo ugly */ | |
144 | #if defined(CONFIG_ARCH_GTA02_v1) || defined(CONFIG_ARCH_GTA02_v2) | |
145 | /* we need auto hw flow control on the gsm and gps port */ | |
146 | if (dev_index == 0 || dev_index == 1) | |
d9abba82 | 147 | writel(0x10, &uart->umcon); |
a7c185ed HW |
148 | #endif |
149 | _serial_setbrg(dev_index); | |
150 | ||
151 | return (0); | |
c609719b WD |
152 | } |
153 | ||
a7c185ed HW |
154 | #if !defined(CONFIG_SERIAL_MULTI) |
155 | /* Initialise the serial port. The settings are always 8 data bits, no parity, | |
156 | * 1 stop bit, no start bits. | |
c609719b | 157 | */ |
eb0ae7f5 | 158 | int serial_init(void) |
c609719b | 159 | { |
a7c185ed | 160 | return serial_init_dev(UART_NR); |
c609719b | 161 | } |
a7c185ed | 162 | #endif |
c609719b WD |
163 | |
164 | /* | |
165 | * Read a single byte from the serial port. Returns 1 on success, 0 | |
166 | * otherwise. When the function is succesfull, the character read is | |
167 | * written into its argument c. | |
168 | */ | |
eb0ae7f5 | 169 | int _serial_getc(const int dev_index) |
c609719b | 170 | { |
eb0ae7f5 | 171 | struct s3c24x0_uart *uart = s3c24x0_get_base_uart(dev_index); |
8bde7f77 | 172 | |
d9abba82 | 173 | while (!(readl(&uart->utrstat) & 0x1)) |
eb0ae7f5 | 174 | /* wait for character to arrive */ ; |
c609719b | 175 | |
d9abba82 | 176 | return readb(&uart->urxh) & 0xff; |
c609719b | 177 | } |
eb0ae7f5 | 178 | |
a7c185ed HW |
179 | #if defined(CONFIG_SERIAL_MULTI) |
180 | static inline int serial_getc_dev(unsigned int dev_index) | |
181 | { | |
182 | return _serial_getc(dev_index); | |
183 | } | |
184 | #else | |
eb0ae7f5 | 185 | int serial_getc(void) |
a7c185ed HW |
186 | { |
187 | return _serial_getc(UART_NR); | |
188 | } | |
189 | #endif | |
c609719b WD |
190 | |
191 | #ifdef CONFIG_HWFLOW | |
c609719b WD |
192 | int hwflow_onoff(int on) |
193 | { | |
eb0ae7f5 | 194 | switch (on) { |
c609719b WD |
195 | case 0: |
196 | default: | |
eb0ae7f5 | 197 | break; /* return current */ |
c609719b | 198 | case 1: |
eb0ae7f5 | 199 | hwflow = 1; /* turn on */ |
c609719b WD |
200 | break; |
201 | case -1: | |
eb0ae7f5 | 202 | hwflow = 0; /* turn off */ |
c609719b WD |
203 | break; |
204 | } | |
205 | return hwflow; | |
206 | } | |
207 | #endif | |
208 | ||
209 | #ifdef CONFIG_MODEM_SUPPORT | |
210 | static int be_quiet = 0; | |
211 | void disable_putc(void) | |
212 | { | |
213 | be_quiet = 1; | |
214 | } | |
215 | ||
216 | void enable_putc(void) | |
217 | { | |
218 | be_quiet = 0; | |
219 | } | |
220 | #endif | |
221 | ||
222 | ||
223 | /* | |
224 | * Output a single byte to the serial port. | |
225 | */ | |
eb0ae7f5 | 226 | void _serial_putc(const char c, const int dev_index) |
c609719b | 227 | { |
eb0ae7f5 | 228 | struct s3c24x0_uart *uart = s3c24x0_get_base_uart(dev_index); |
c609719b WD |
229 | #ifdef CONFIG_MODEM_SUPPORT |
230 | if (be_quiet) | |
231 | return; | |
232 | #endif | |
233 | ||
d9abba82 | 234 | while (!(readl(&uart->utrstat) & 0x2)) |
eb0ae7f5 | 235 | /* wait for room in the tx FIFO */ ; |
c609719b WD |
236 | |
237 | #ifdef CONFIG_HWFLOW | |
d9abba82 | 238 | while (hwflow && !(readl(&uart->umstat) & 0x1)) |
eb0ae7f5 | 239 | /* Wait for CTS up */ ; |
c609719b WD |
240 | #endif |
241 | ||
d9abba82 | 242 | writeb(c, &uart->utxh); |
c609719b WD |
243 | |
244 | /* If \n, also do \r */ | |
245 | if (c == '\n') | |
eb0ae7f5 | 246 | serial_putc('\r'); |
c609719b | 247 | } |
eb0ae7f5 | 248 | |
a7c185ed HW |
249 | #if defined(CONFIG_SERIAL_MULTI) |
250 | static inline void serial_putc_dev(unsigned int dev_index, const char c) | |
251 | { | |
252 | _serial_putc(c, dev_index); | |
253 | } | |
254 | #else | |
255 | void serial_putc(const char c) | |
256 | { | |
257 | _serial_putc(c, UART_NR); | |
258 | } | |
259 | #endif | |
260 | ||
c609719b WD |
261 | |
262 | /* | |
263 | * Test whether a character is in the RX buffer | |
264 | */ | |
a7c185ed | 265 | int _serial_tstc(const int dev_index) |
c609719b | 266 | { |
eb0ae7f5 | 267 | struct s3c24x0_uart *uart = s3c24x0_get_base_uart(dev_index); |
48b42616 | 268 | |
d9abba82 | 269 | return readl(&uart->utrstat) & 0x1; |
c609719b | 270 | } |
eb0ae7f5 | 271 | |
a7c185ed | 272 | #if defined(CONFIG_SERIAL_MULTI) |
eb0ae7f5 | 273 | static inline int serial_tstc_dev(unsigned int dev_index) |
a7c185ed HW |
274 | { |
275 | return _serial_tstc(dev_index); | |
276 | } | |
277 | #else | |
278 | int serial_tstc(void) | |
279 | { | |
280 | return _serial_tstc(UART_NR); | |
281 | } | |
282 | #endif | |
c609719b | 283 | |
a7c185ed | 284 | void _serial_puts(const char *s, const int dev_index) |
c609719b WD |
285 | { |
286 | while (*s) { | |
eb0ae7f5 | 287 | _serial_putc(*s++, dev_index); |
c609719b WD |
288 | } |
289 | } | |
eb0ae7f5 | 290 | |
a7c185ed | 291 | #if defined(CONFIG_SERIAL_MULTI) |
eb0ae7f5 | 292 | static inline void serial_puts_dev(int dev_index, const char *s) |
a7c185ed HW |
293 | { |
294 | _serial_puts(s, dev_index); | |
295 | } | |
296 | #else | |
eb0ae7f5 | 297 | void serial_puts(const char *s) |
a7c185ed HW |
298 | { |
299 | _serial_puts(s, UART_NR); | |
300 | } | |
301 | #endif | |
302 | ||
303 | #if defined(CONFIG_SERIAL_MULTI) | |
304 | DECLARE_S3C_SERIAL_FUNCTIONS(0); | |
305 | struct serial_device s3c24xx_serial0_device = | |
eb0ae7f5 | 306 | INIT_S3C_SERIAL_STRUCTURE(0, "s3ser0", "S3UART1"); |
a7c185ed HW |
307 | DECLARE_S3C_SERIAL_FUNCTIONS(1); |
308 | struct serial_device s3c24xx_serial1_device = | |
eb0ae7f5 | 309 | INIT_S3C_SERIAL_STRUCTURE(1, "s3ser1", "S3UART2"); |
a7c185ed HW |
310 | DECLARE_S3C_SERIAL_FUNCTIONS(2); |
311 | struct serial_device s3c24xx_serial2_device = | |
eb0ae7f5 | 312 | INIT_S3C_SERIAL_STRUCTURE(2, "s3ser2", "S3UART3"); |
a7c185ed | 313 | #endif /* CONFIG_SERIAL_MULTI */ |