]>
Commit | Line | Data |
---|---|---|
c8a7ba9e TC |
1 | /* |
2 | * Copyright (C) 2015 Thomas Chou <thomas@wytron.com.tw> | |
3 | * | |
4 | * SPDX-License-Identifier: GPL-2.0+ | |
5 | */ | |
6 | ||
7 | #include <common.h> | |
8 | #include <dm.h> | |
c8336975 M |
9 | #include <dm/lists.h> |
10 | #include <dm/device-internal.h> | |
b61e8b0c | 11 | #include <dm/root.h> |
a5acafb2 | 12 | #include <clk.h> |
c8a7ba9e TC |
13 | #include <errno.h> |
14 | #include <timer.h> | |
15 | ||
579eb5a0 BM |
16 | DECLARE_GLOBAL_DATA_PTR; |
17 | ||
c8a7ba9e | 18 | /* |
435ae76e | 19 | * Implement a timer uclass to work with lib/time.c. The timer is usually |
9ca07ebb | 20 | * a 32/64 bits free-running up counter. The get_rate() method is used to get |
c8a7ba9e | 21 | * the input clock frequency of the timer. The get_count() method is used |
9ca07ebb | 22 | * to get the current 64 bits count value. If the hardware is counting down, |
c8a7ba9e TC |
23 | * the value should be inversed inside the method. There may be no real |
24 | * tick, and no timer interrupt. | |
25 | */ | |
26 | ||
4f051824 | 27 | int notrace timer_get_count(struct udevice *dev, u64 *count) |
c8a7ba9e TC |
28 | { |
29 | const struct timer_ops *ops = device_get_ops(dev); | |
30 | ||
31 | if (!ops->get_count) | |
32 | return -ENOSYS; | |
33 | ||
34 | return ops->get_count(dev, count); | |
35 | } | |
36 | ||
4f051824 | 37 | unsigned long notrace timer_get_rate(struct udevice *dev) |
c8a7ba9e | 38 | { |
4f051824 | 39 | struct timer_dev_priv *uc_priv = dev->uclass_priv; |
c8a7ba9e TC |
40 | |
41 | return uc_priv->clock_rate; | |
42 | } | |
43 | ||
579eb5a0 BM |
44 | static int timer_pre_probe(struct udevice *dev) |
45 | { | |
b1a16002 | 46 | #if !CONFIG_IS_ENABLED(OF_PLATDATA) |
579eb5a0 | 47 | struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev); |
a5acafb2 ZV |
48 | struct clk timer_clk; |
49 | int err; | |
50 | ulong ret; | |
579eb5a0 | 51 | |
a5acafb2 ZV |
52 | err = clk_get_by_index(dev, 0, &timer_clk); |
53 | if (!err) { | |
54 | ret = clk_get_rate(&timer_clk); | |
55 | if (IS_ERR_VALUE(ret)) | |
56 | return ret; | |
57 | uc_priv->clock_rate = ret; | |
b61e8b0c PT |
58 | } else { |
59 | uc_priv->clock_rate = | |
60 | dev_read_u32_default(dev, "clock-frequency", 0); | |
61 | } | |
b1a16002 | 62 | #endif |
579eb5a0 BM |
63 | |
64 | return 0; | |
65 | } | |
66 | ||
0a7edce0 SW |
67 | static int timer_post_probe(struct udevice *dev) |
68 | { | |
69 | struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev); | |
70 | ||
71 | if (!uc_priv->clock_rate) | |
72 | return -EINVAL; | |
73 | ||
74 | return 0; | |
75 | } | |
76 | ||
9ca07ebb BM |
77 | u64 timer_conv_64(u32 count) |
78 | { | |
79 | /* increment tbh if tbl has rolled over */ | |
80 | if (count < gd->timebase_l) | |
81 | gd->timebase_h++; | |
82 | gd->timebase_l = count; | |
83 | return ((u64)gd->timebase_h << 32) | gd->timebase_l; | |
84 | } | |
85 | ||
c8336975 M |
86 | int notrace dm_timer_init(void) |
87 | { | |
c8336975 | 88 | struct udevice *dev = NULL; |
b61e8b0c | 89 | __maybe_unused ofnode node; |
c8336975 M |
90 | int ret; |
91 | ||
92 | if (gd->timer) | |
93 | return 0; | |
94 | ||
af823151 PT |
95 | /* |
96 | * Directly access gd->dm_root to suppress error messages, if the | |
97 | * virtual root driver does not yet exist. | |
98 | */ | |
99 | if (gd->dm_root == NULL) | |
100 | return -EAGAIN; | |
101 | ||
b1a16002 | 102 | #if !CONFIG_IS_ENABLED(OF_PLATDATA) |
c8336975 | 103 | /* Check for a chosen timer to be used for tick */ |
b61e8b0c PT |
104 | node = ofnode_get_chosen_node("tick-timer"); |
105 | ||
106 | if (ofnode_valid(node) && | |
107 | uclass_get_device_by_ofnode(UCLASS_TIMER, node, &dev)) { | |
108 | /* | |
109 | * If the timer is not marked to be bound before | |
110 | * relocation, bind it anyway. | |
111 | */ | |
112 | if (!lists_bind_fdt(dm_root(), node, &dev)) { | |
113 | ret = device_probe(dev); | |
114 | if (ret) | |
115 | return ret; | |
116 | } | |
117 | } | |
b1a16002 | 118 | #endif |
b61e8b0c PT |
119 | |
120 | if (!dev) { | |
121 | /* Fall back to the first available timer */ | |
3f603cbb | 122 | ret = uclass_first_device_err(UCLASS_TIMER, &dev); |
c8336975 M |
123 | if (ret) |
124 | return ret; | |
c8336975 M |
125 | } |
126 | ||
127 | if (dev) { | |
128 | gd->timer = dev; | |
129 | return 0; | |
130 | } | |
131 | ||
132 | return -ENODEV; | |
133 | } | |
134 | ||
c8a7ba9e TC |
135 | UCLASS_DRIVER(timer) = { |
136 | .id = UCLASS_TIMER, | |
137 | .name = "timer", | |
579eb5a0 | 138 | .pre_probe = timer_pre_probe, |
a5d80113 | 139 | .flags = DM_UC_FLAG_SEQ_ALIAS, |
0a7edce0 | 140 | .post_probe = timer_post_probe, |
c8a7ba9e TC |
141 | .per_device_auto_alloc_size = sizeof(struct timer_dev_priv), |
142 | }; |