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[thirdparty/u-boot.git] / drivers / timer / timer-uclass.c
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83d290c5 1// SPDX-License-Identifier: GPL-2.0+
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2/*
3 * Copyright (C) 2015 Thomas Chou <thomas@wytron.com.tw>
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4 */
5
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6#define LOG_CATEGORY UCLASS_TIMER
7
d678a59d 8#include <common.h>
a5d4f861 9#include <clk.h>
35761216 10#include <cpu.h>
c8a7ba9e 11#include <dm.h>
401d1c4f 12#include <asm/global_data.h>
c8336975 13#include <dm/lists.h>
a5d4f861 14#include <dm/device_compat.h>
c8336975 15#include <dm/device-internal.h>
b61e8b0c 16#include <dm/root.h>
c8a7ba9e 17#include <errno.h>
a5d4f861 18#include <init.h>
c8a7ba9e 19#include <timer.h>
61b29b82 20#include <linux/err.h>
8272d4cb 21#include <relocate.h>
c8a7ba9e 22
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23DECLARE_GLOBAL_DATA_PTR;
24
c8a7ba9e 25/*
435ae76e 26 * Implement a timer uclass to work with lib/time.c. The timer is usually
9ca07ebb 27 * a 32/64 bits free-running up counter. The get_rate() method is used to get
c8a7ba9e 28 * the input clock frequency of the timer. The get_count() method is used
9ca07ebb 29 * to get the current 64 bits count value. If the hardware is counting down,
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30 * the value should be inversed inside the method. There may be no real
31 * tick, and no timer interrupt.
32 */
33
4f051824 34int notrace timer_get_count(struct udevice *dev, u64 *count)
c8a7ba9e 35{
1e766a04 36 struct timer_ops *ops = timer_get_ops(dev);
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37
38 if (!ops->get_count)
39 return -ENOSYS;
40
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41 *count = ops->get_count(dev);
42 return 0;
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43}
44
4f051824 45unsigned long notrace timer_get_rate(struct udevice *dev)
c8a7ba9e 46{
0fd3d911 47 struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev);
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48
49 return uc_priv->clock_rate;
50}
51
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52static int timer_pre_probe(struct udevice *dev)
53{
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54 if (CONFIG_IS_ENABLED(OF_REAL)) {
55 struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev);
56 struct clk timer_clk;
57 int err;
58 ulong ret;
579eb5a0 59
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60 /*
61 * It is possible that a timer device has a null ofnode
62 */
63 if (!dev_has_ofnode(dev))
64 return 0;
7efb4a6e 65
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66 err = clk_get_by_index(dev, 0, &timer_clk);
67 if (!err) {
68 ret = clk_get_rate(&timer_clk);
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69 if (!IS_ERR_VALUE(ret)) {
70 uc_priv->clock_rate = ret;
71 return 0;
72 }
dcfc42b1 73 }
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74
75 uc_priv->clock_rate = dev_read_u32_default(dev, "clock-frequency", 0);
b61e8b0c 76 }
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77
78 return 0;
79}
80
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81static int timer_post_probe(struct udevice *dev)
82{
83 struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev);
84
85 if (!uc_priv->clock_rate)
86 return -EINVAL;
87
88 return 0;
89}
90
529d5f96 91#if CONFIG_IS_ENABLED(CPU)
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92int timer_timebase_fallback(struct udevice *dev)
93{
94 struct udevice *cpu;
8a8d24bd 95 struct cpu_plat *cpu_plat;
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96 struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev);
97
98 /* Did we get our clock rate from the device tree? */
99 if (uc_priv->clock_rate)
100 return 0;
101
102 /* Fall back to timebase-frequency */
103 dev_dbg(dev, "missing clocks or clock-frequency property; falling back on timebase-frequency\n");
104 cpu = cpu_get_current_dev();
105 if (!cpu)
106 return -ENODEV;
107
caa4daa2 108 cpu_plat = dev_get_parent_plat(cpu);
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109 if (!cpu_plat)
110 return -ENODEV;
111
112 uc_priv->clock_rate = cpu_plat->timebase_freq;
113 return 0;
114}
115#endif
116
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117u64 timer_conv_64(u32 count)
118{
119 /* increment tbh if tbl has rolled over */
120 if (count < gd->timebase_l)
121 gd->timebase_h++;
122 gd->timebase_l = count;
123 return ((u64)gd->timebase_h << 32) | gd->timebase_l;
124}
125
4aa5053d 126int dm_timer_init(void)
c8336975 127{
c8336975 128 struct udevice *dev = NULL;
b61e8b0c 129 __maybe_unused ofnode node;
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130 int ret;
131
132 if (gd->timer)
133 return 0;
134
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135 /*
136 * Directly access gd->dm_root to suppress error messages, if the
137 * virtual root driver does not yet exist.
138 */
139 if (gd->dm_root == NULL)
140 return -EAGAIN;
141
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142 if (CONFIG_IS_ENABLED(OF_REAL)) {
143 /* Check for a chosen timer to be used for tick */
144 node = ofnode_get_chosen_node("tick-timer");
145
146 if (ofnode_valid(node) &&
147 uclass_get_device_by_ofnode(UCLASS_TIMER, node, &dev)) {
148 /*
149 * If the timer is not marked to be bound before
150 * relocation, bind it anyway.
151 */
776bf6a5 152 if (!lists_bind_fdt(dm_root(), node, &dev, NULL, false)) {
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153 ret = device_probe(dev);
154 if (ret)
155 return ret;
156 }
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157 }
158 }
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159
160 if (!dev) {
161 /* Fall back to the first available timer */
3f603cbb 162 ret = uclass_first_device_err(UCLASS_TIMER, &dev);
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163 if (ret)
164 return ret;
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165 }
166
167 if (dev) {
168 gd->timer = dev;
169 return 0;
170 }
171
172 return -ENODEV;
173}
174
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175UCLASS_DRIVER(timer) = {
176 .id = UCLASS_TIMER,
177 .name = "timer",
579eb5a0 178 .pre_probe = timer_pre_probe,
a5d80113 179 .flags = DM_UC_FLAG_SEQ_ALIAS,
0a7edce0 180 .post_probe = timer_post_probe,
41575d8e 181 .per_device_auto = sizeof(struct timer_dev_priv),
c8a7ba9e 182};