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Remove the obsolete terse version of do_mii()
[people/ms/u-boot.git] / drivers / usb / usbdcore_mpc8xx.c
CommitLineData
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1/*
2 * Copyright (C) 2006 by Bryan O'Donoghue, CodeHermit
386eda02 3 * bodonoghue@CodeHermit.ie
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4 *
5 * References
6 * DasUBoot/drivers/usbdcore_omap1510.c, for design and implementation ideas.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
386eda02 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the
20 * Free Software Foundation, Inc.,
21 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
22 *
23 */
24
25/*
26 * Notes :
386eda02 27 * 1. #define __SIMULATE_ERROR__ to inject a CRC error into every 2nd TX
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28 * packet to force the USB re-transmit protocol.
29 *
30 * 2. #define __DEBUG_UDC__ to switch on debug tracing to serial console
386eda02
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31 * be careful that tracing doesn't create Hiesen-bugs with respect to
32 * response timeouts to control requests.
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33 *
34 * 3. This driver should be able to support any higher level driver that
35 * that wants to do either of the two standard UDC implementations
36 * Control-Bulk-Interrupt or Bulk-IN/Bulk-Out standards. Hence
37 * gserial and cdc_acm should work with this code.
38 *
39 * 4. NAK events never actually get raised at all, the documentation
40 * is just wrong !
41 *
42 * 5. For some reason, cbd_datlen is *always* +2 the value it should be.
43 * this means that having an RX cbd of 16 bytes is not possible, since
386eda02 44 * the same size is reported for 14 bytes received as 16 bytes received
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45 * until we can find out why this happens, RX cbds must be limited to 8
46 * bytes. TODO: check errata for this behaviour.
47 *
48 * 6. Right now this code doesn't support properly powering up with the USB
386eda02
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49 * cable attached to the USB host my development board the Adder87x doesn't
50 * have a pull-up fitted to allow this, so it is necessary to power the
51 * board and *then* attached the USB cable to the host. However somebody
52 * with a different design in their board may be able to keep the cable
53 * constantly connected and simply enable/disable a pull-up re
54 * figure 31.1 in MPC885RM.pdf instead of having to power up the board and
55 * then attach the cable !
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56 *
57 */
58#include <common.h>
59#include <config.h>
60
61#if defined(CONFIG_MPC885_FAMILY) && defined(CONFIG_USB_DEVICE)
62#include <commproc.h>
386eda02 63#include "usbdcore.h"
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64#include "usbdcore_mpc8xx.h"
65#include "usbdcore_ep0.h"
66
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67DECLARE_GLOBAL_DATA_PTR;
68
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69#define ERR(fmt, args...)\
70 serial_printf("ERROR : [%s] %s:%d: "fmt,\
71 __FILE__,__FUNCTION__,__LINE__, ##args)
72#ifdef __DEBUG_UDC__
386eda02 73#define DBG(fmt,args...)\
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74 serial_printf("[%s] %s:%d: "fmt,\
75 __FILE__,__FUNCTION__,__LINE__, ##args)
76#else
386eda02 77#define DBG(fmt,args...)
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78#endif
79
80/* Static Data */
81#ifdef __SIMULATE_ERROR__
386eda02 82static char err_poison_test = 0;
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83#endif
84static struct mpc8xx_ep ep_ref[MAX_ENDPOINTS];
85static u32 address_base = STATE_NOT_READY;
86static mpc8xx_udc_state_t udc_state = 0;
87static struct usb_device_instance *udc_device = 0;
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88static volatile usb_epb_t *endpoints[MAX_ENDPOINTS];
89static volatile cbd_t *tx_cbd[TX_RING_SIZE];
90static volatile cbd_t *rx_cbd[RX_RING_SIZE];
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91static volatile immap_t *immr = 0;
92static volatile cpm8xx_t *cp = 0;
93static volatile usb_pram_t *usb_paramp = 0;
94static volatile usb_t *usbp = 0;
95static int rx_ct = 0;
96static int tx_ct = 0;
97
98/* Static Function Declarations */
99static void mpc8xx_udc_state_transition_up (usb_device_state_t initial,
386eda02 100 usb_device_state_t final);
16c8d5e7 101static void mpc8xx_udc_state_transition_down (usb_device_state_t initial,
386eda02 102 usb_device_state_t final);
16c8d5e7 103static void mpc8xx_udc_stall (unsigned int ep);
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104static void mpc8xx_udc_flush_tx_fifo (int epid);
105static void mpc8xx_udc_flush_rx_fifo (void);
16c8d5e7 106static void mpc8xx_udc_clear_rxbd (volatile cbd_t * rx_cbdp);
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107static void mpc8xx_udc_init_tx (struct usb_endpoint_instance *epi,
108 struct urb *tx_urb);
109static void mpc8xx_udc_dump_request (struct usb_device_request *request);
110static void mpc8xx_udc_clock_init (volatile immap_t * immr,
111 volatile cpm8xx_t * cp);
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112static int mpc8xx_udc_ep_tx (struct usb_endpoint_instance *epi);
113static int mpc8xx_udc_epn_rx (unsigned int epid, volatile cbd_t * rx_cbdp);
386eda02 114static void mpc8xx_udc_ep0_rx (volatile cbd_t * rx_cbdp);
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115static void mpc8xx_udc_cbd_init (void);
116static void mpc8xx_udc_endpoint_init (void);
117static void mpc8xx_udc_cbd_attach (int ep, uchar tx_size, uchar rx_size);
118static u32 mpc8xx_udc_alloc (u32 data_size, u32 alignment);
119static int mpc8xx_udc_ep0_rx_setup (volatile cbd_t * rx_cbdp);
120static void mpc8xx_udc_set_nak (unsigned int ep);
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121static short mpc8xx_udc_handle_txerr (void);
122static void mpc8xx_udc_advance_rx (volatile cbd_t ** rx_cbdp, int epid);
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123
124/******************************************************************************
386eda02 125 Global Linkage
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126 *****************************************************************************/
127
128/* udc_init
129 *
130 * Do initial bus gluing
131 */
386eda02 132int udc_init (void)
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133{
134 /* Init various pointers */
135 immr = (immap_t *) CFG_IMMR;
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136 cp = (cpm8xx_t *) & (immr->im_cpm);
137 usb_paramp = (usb_pram_t *) & (cp->cp_dparam[PROFF_USB]);
138 usbp = (usb_t *) & (cp->cp_scc[0]);
139
140 memset (ep_ref, 0x00, (sizeof (struct mpc8xx_ep) * MAX_ENDPOINTS));
16c8d5e7 141
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142 udc_device = 0;
143 udc_state = STATE_NOT_READY;
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144
145 usbp->usmod = 0x00;
146 usbp->uscom = 0;
147
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148 /* Set USB Frame #0, Respond at Address & Get a clock source */
149 usbp->usaddr = 0x00;
150 mpc8xx_udc_clock_init (immr, cp);
386eda02 151
16c8d5e7 152 /* PA15, PA14 as perhiperal USBRXD and USBOE */
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153 immr->im_ioport.iop_padir &= ~0x0003;
154 immr->im_ioport.iop_papar |= 0x0003;
155
16c8d5e7 156 /* PC11/PC10 as peripheral USBRXP USBRXN */
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157 immr->im_ioport.iop_pcso |= 0x0030;
158
16c8d5e7 159 /* PC7/PC6 as perhiperal USBTXP and USBTXN */
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160 immr->im_ioport.iop_pcdir |= 0x0300;
161 immr->im_ioport.iop_pcpar |= 0x0300;
162
16c8d5e7 163 /* Set the base address */
386eda02 164 address_base = (u32) (cp->cp_dpmem + CPM_USB_BASE);
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165
166 /* Initialise endpoints and circular buffers */
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167 mpc8xx_udc_endpoint_init ();
168 mpc8xx_udc_cbd_init ();
169
16c8d5e7 170 /* Assign allocated Dual Port Endpoint descriptors */
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171 usb_paramp->ep0ptr = (u32) endpoints[0];
172 usb_paramp->ep1ptr = (u32) endpoints[1];
173 usb_paramp->ep2ptr = (u32) endpoints[2];
174 usb_paramp->ep3ptr = (u32) endpoints[3];
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175 usb_paramp->frame_n = 0;
176
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177 DBG ("ep0ptr=0x%08x ep1ptr=0x%08x ep2ptr=0x%08x ep3ptr=0x%08x\n",
178 usb_paramp->ep0ptr, usb_paramp->ep1ptr, usb_paramp->ep2ptr,
179 usb_paramp->ep3ptr);
180
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181 return 0;
182}
183
184/* udc_irq
185 *
186 * Poll for whatever events may have occured
187 */
386eda02 188void udc_irq (void)
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189{
190 int epid = 0;
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191 volatile cbd_t *rx_cbdp = 0;
192 volatile cbd_t *rx_cbdp_base = 0;
16c8d5e7 193
386eda02 194 if (udc_state != STATE_READY) {
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195 return;
196 }
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197
198 if (usbp->usber & USB_E_BSY) {
16c8d5e7 199 /* This shouldn't happen. If it does then it's a bug ! */
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200 usbp->usber |= USB_E_BSY;
201 mpc8xx_udc_flush_rx_fifo ();
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202 }
203
16c8d5e7 204 /* Scan all RX/Bidirectional Endpoints for RX data. */
386eda02
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205 for (epid = 0; epid < MAX_ENDPOINTS; epid++) {
206 if (!ep_ref[epid].prx) {
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207 continue;
208 }
16c8d5e7 209 rx_cbdp = rx_cbdp_base = ep_ref[epid].prx;
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210
211 do {
212 if (!(rx_cbdp->cbd_sc & RX_BD_E)) {
213
214 if (rx_cbdp->cbd_sc & 0x1F) {
16c8d5e7 215 /* Corrupt data discard it.
386eda02 216 * Controller has NAK'd this packet.
16c8d5e7 217 */
386eda02 218 mpc8xx_udc_clear_rxbd (rx_cbdp);
16c8d5e7 219
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220 } else {
221 if (!epid) {
222 mpc8xx_udc_ep0_rx (rx_cbdp);
16c8d5e7 223
386eda02 224 } else {
16c8d5e7 225 /* Process data */
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226 mpc8xx_udc_set_nak (epid);
227 mpc8xx_udc_epn_rx (epid, rx_cbdp);
228 mpc8xx_udc_clear_rxbd (rx_cbdp);
229 }
16c8d5e7 230 }
386eda02 231
16c8d5e7 232 /* Advance RX CBD pointer */
386eda02 233 mpc8xx_udc_advance_rx (&rx_cbdp, epid);
16c8d5e7 234 ep_ref[epid].prx = rx_cbdp;
386eda02 235 } else {
16c8d5e7 236 /* Advance RX CBD pointer */
386eda02 237 mpc8xx_udc_advance_rx (&rx_cbdp, epid);
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238 }
239
386eda02 240 } while (rx_cbdp != rx_cbdp_base);
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241 }
242
243 /* Handle TX events as appropiate, the correct place to do this is
244 * in a tx routine. Perhaps TX on epn was pre-empted by ep0
245 */
246
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247 if (usbp->usber & USB_E_TXB) {
248 usbp->usber |= USB_E_TXB;
16c8d5e7 249 }
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250
251 if (usbp->usber & (USB_TX_ERRMASK)) {
252 mpc8xx_udc_handle_txerr ();
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253 }
254
255 /* Switch to the default state, respond at the default address */
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256 if (usbp->usber & USB_E_RESET) {
257 usbp->usber |= USB_E_RESET;
258 usbp->usaddr = 0x00;
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259 udc_device->device_state = STATE_DEFAULT;
260 }
261
386eda02
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262 /* if(usbp->usber&USB_E_IDLE){
263 We could suspend here !
264 usbp->usber|=USB_E_IDLE;
265 DBG("idle state change\n");
266 }
267 if(usbp->usbs){
268 We could resume here when IDLE is deasserted !
269 Not worth doing, so long as we are self powered though.
270 }
271 */
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272
273 return;
274}
275
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276/* udc_endpoint_write
277 *
278 * Write some data to an endpoint
279 */
386eda02 280int udc_endpoint_write (struct usb_endpoint_instance *epi)
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281{
282 int ep = 0;
283 short epid = 1, unnak = 0, ret = 0;
284
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285 if (udc_state != STATE_READY) {
286 ERR ("invalid udc_state != STATE_READY!\n");
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287 return -1;
288 }
289
386eda02 290 if (!udc_device || !epi) {
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291 return -1;
292 }
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293
294 if (udc_device->device_state != STATE_CONFIGURED) {
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295 return -1;
296 }
297
298 ep = epi->endpoint_address & 0x03;
386eda02 299 if (ep >= MAX_ENDPOINTS) {
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300 return -1;
301 }
386eda02 302
16c8d5e7 303 /* Set NAK for all RX endpoints during TX */
386eda02 304 for (epid = 1; epid < MAX_ENDPOINTS; epid++) {
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305
306 /* Don't set NAK on DATA IN/CONTROL endpoints */
386eda02 307 if (ep_ref[epid].sc & USB_DIR_IN) {
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308 continue;
309 }
310
386eda02
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311 if (!(usbp->usep[epid] & (USEP_THS_NAK | USEP_RHS_NAK))) {
312 unnak |= 1 << epid;
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313 }
314
386eda02 315 mpc8xx_udc_set_nak (epid);
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316 }
317
386eda02
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318 mpc8xx_udc_init_tx (&udc_device->bus->endpoint_array[ep],
319 epi->tx_urb);
320 ret = mpc8xx_udc_ep_tx (&udc_device->bus->endpoint_array[ep]);
321
16c8d5e7 322 /* Remove temporary NAK */
386eda02
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323 for (epid = 1; epid < MAX_ENDPOINTS; epid++) {
324 if (unnak & (1 << epid)) {
325 udc_unset_nak (epid);
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326 }
327 }
386eda02 328
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329 return ret;
330}
331
332/* mpc8xx_udc_assign_urb
333 *
334 * Associate a given urb to an endpoint TX or RX transmit/receive buffers
335 */
386eda02 336static int mpc8xx_udc_assign_urb (int ep, char direction)
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337{
338 struct usb_endpoint_instance *epi = 0;
386eda02
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339
340 if (ep >= MAX_ENDPOINTS) {
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341 goto err;
342 }
343 epi = &udc_device->bus->endpoint_array[ep];
386eda02 344 if (!epi) {
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345 goto err;
346 }
347
386eda02
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348 if (!ep_ref[ep].urb) {
349 ep_ref[ep].urb = usbd_alloc_urb (udc_device, udc_device->bus->endpoint_array);
350 if (!ep_ref[ep].urb) {
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351 goto err;
352 }
386eda02 353 } else {
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354 ep_ref[ep].urb->actual_length = 0;
355 }
356
386eda02
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357 switch (direction) {
358 case USB_DIR_IN:
359 epi->tx_urb = ep_ref[ep].urb;
360 break;
361 case USB_DIR_OUT:
362 epi->rcv_urb = ep_ref[ep].urb;
363 break;
364 default:
365 goto err;
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366 }
367 return 0;
368
386eda02 369 err:
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370 udc_state = STATE_ERROR;
371 return -1;
372}
373
374/* udc_setup_ep
375 *
376 * Associate U-Boot software endpoints to mpc8xx endpoint parameter ram
377 * Isochronous endpoints aren't yet supported!
378 */
386eda02
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379void udc_setup_ep (struct usb_device_instance *device, unsigned int ep,
380 struct usb_endpoint_instance *epi)
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381{
382 uchar direction = 0;
383 int ep_attrib = 0;
384
386eda02 385 if (epi && (ep < MAX_ENDPOINTS)) {
16c8d5e7 386
386eda02
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387 if (ep == 0) {
388 if (epi->rcv_attributes != USB_ENDPOINT_XFER_CONTROL
389 || epi->tx_attributes !=
390 USB_ENDPOINT_XFER_CONTROL) {
391
392 /* ep0 must be a control endpoint */
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393 udc_state = STATE_ERROR;
394 return;
395
396 }
386eda02
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397 if (!(ep_ref[ep].sc & EP_ATTACHED)) {
398 mpc8xx_udc_cbd_attach (ep, epi->tx_packetSize,
399 epi->rcv_packetSize);
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400 }
401 usbp->usep[ep] = 0x0000;
402 return;
403 }
386eda02
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404
405 if ((epi->endpoint_address & USB_ENDPOINT_DIR_MASK)
406 == USB_DIR_IN) {
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407
408 direction = 1;
409 ep_attrib = epi->tx_attributes;
410 epi->rcv_packetSize = 0;
386eda02 411 ep_ref[ep].sc |= USB_DIR_IN;
16c8d5e7 412 } else {
386eda02 413
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414 direction = 0;
415 ep_attrib = epi->rcv_attributes;
386eda02 416 epi->tx_packetSize = 0;
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417 ep_ref[ep].sc &= ~USB_DIR_IN;
418 }
419
386eda02
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420 if (mpc8xx_udc_assign_urb (ep, epi->endpoint_address
421 & USB_ENDPOINT_DIR_MASK)) {
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422 return;
423 }
424
386eda02
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425 switch (ep_attrib) {
426 case USB_ENDPOINT_XFER_CONTROL:
427 if (!(ep_ref[ep].sc & EP_ATTACHED)) {
428 mpc8xx_udc_cbd_attach (ep,
429 epi->tx_packetSize,
430 epi->rcv_packetSize);
431 }
432 usbp->usep[ep] = ep << 12;
433 epi->rcv_urb = epi->tx_urb = ep_ref[ep].urb;
434
435 break;
436 case USB_ENDPOINT_XFER_BULK:
437 case USB_ENDPOINT_XFER_INT:
438 if (!(ep_ref[ep].sc & EP_ATTACHED)) {
439 if (direction) {
16c8d5e7 440 mpc8xx_udc_cbd_attach (ep,
386eda02
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441 epi->tx_packetSize,
442 0);
443 } else {
444 mpc8xx_udc_cbd_attach (ep,
445 0,
446 epi->rcv_packetSize);
16c8d5e7 447 }
386eda02
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448 }
449 usbp->usep[ep] = (ep << 12) | ((ep_attrib) << 8);
16c8d5e7 450
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451 break;
452 case USB_ENDPOINT_XFER_ISOC:
453 default:
454 serial_printf ("Error endpoint attrib %d>3\n", ep_attrib);
455 udc_state = STATE_ERROR;
456 break;
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457 }
458 }
459
460}
461
462/* udc_connect
463 *
464 * Move state, switch on the USB
465 */
386eda02 466void udc_connect (void)
16c8d5e7 467{
386eda02 468 /* Enable pull-up resistor on D+
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469 * TODO: fit a pull-up resistor to drive SE0 for > 2.5us
470 */
386eda02
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471
472 if (udc_state != STATE_ERROR) {
16c8d5e7 473 udc_state = STATE_READY;
386eda02 474 usbp->usmod |= USMOD_EN;
16c8d5e7 475 }
386eda02 476}
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477
478/* udc_disconnect
479 *
480 * Disconnect is not used but, is included for completeness
481 */
386eda02 482void udc_disconnect (void)
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483{
484 /* Disable pull-up resistor on D-
485 * TODO: fix a pullup resistor to control this
486 */
487
386eda02 488 if (udc_state != STATE_ERROR) {
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489 udc_state = STATE_NOT_READY;
490 }
386eda02 491 usbp->usmod &= ~USMOD_EN;
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492}
493
494/* udc_enable
386eda02 495 *
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496 * Grab an EP0 URB, register interest in a subset of USB events
497 */
386eda02 498void udc_enable (struct usb_device_instance *device)
16c8d5e7 499{
386eda02 500 if (udc_state == STATE_ERROR) {
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501 return;
502 }
503
504 udc_device = device;
386eda02
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505
506 if (!ep_ref[0].urb) {
507 ep_ref[0].urb = usbd_alloc_urb (device, device->bus->endpoint_array);
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508 }
509
510 /* Register interest in all events except SOF, enable transceiver */
386eda02
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511 usbp->usber = 0x03FF;
512 usbp->usbmr = 0x02F7;
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513
514 return;
515}
516
517/* udc_disable
518 *
519 * disable the currently hooked device
520 */
386eda02 521void udc_disable (void)
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522{
523 int i = 0;
524
386eda02
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525 if (udc_state == STATE_ERROR) {
526 DBG ("Won't disable UDC. udc_state==STATE_ERROR !\n");
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527 return;
528 }
529
530 udc_device = 0;
531
386eda02
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532 for (; i < MAX_ENDPOINTS; i++) {
533 if (ep_ref[i].urb) {
534 usbd_dealloc_urb (ep_ref[i].urb);
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535 ep_ref[i].urb = 0;
536 }
537 }
386eda02
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538
539 usbp->usbmr = 0x00;
540 usbp->usmod = ~USMOD_EN;
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541 udc_state = STATE_NOT_READY;
542}
543
544/* udc_startup_events
545 *
546 * Enable the specified device
547 */
386eda02 548void udc_startup_events (struct usb_device_instance *device)
16c8d5e7 549{
386eda02
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550 udc_enable (device);
551 if (udc_state == STATE_READY) {
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552 usbd_device_event_irq (device, DEVICE_CREATE, 0);
553 }
554}
555
556/* udc_set_nak
386eda02 557 *
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558 * Allow upper layers to signal lower layers should not accept more RX data
559 *
560 */
386eda02 561void udc_set_nak (int epid)
16c8d5e7 562{
386eda02
WD
563 if (epid) {
564 mpc8xx_udc_set_nak (epid);
16c8d5e7
WD
565 }
566}
567
386eda02
WD
568/* udc_unset_nak
569 *
16c8d5e7
WD
570 * Suspend sending of NAK tokens for DATA OUT tokens on a given endpoint.
571 * Switch off NAKing on this endpoint to accept more data output from host.
572 *
573 */
574void udc_unset_nak (int epid)
575{
386eda02 576 if (epid > MAX_ENDPOINTS) {
16c8d5e7
WD
577 return;
578 }
579
386eda02
WD
580 if (usbp->usep[epid] & (USEP_THS_NAK | USEP_RHS_NAK)) {
581 usbp->usep[epid] &= ~(USEP_THS_NAK | USEP_RHS_NAK);
16c8d5e7
WD
582 __asm__ ("eieio");
583 }
584}
585
586/******************************************************************************
386eda02 587 Static Linkage
16c8d5e7
WD
588******************************************************************************/
589
590/* udc_state_transition_up
591 * udc_state_transition_down
592 *
593 * Helper functions to implement device state changes. The device states and
594 * the events that transition between them are:
595 *
596 * STATE_ATTACHED
597 * || /\
598 * \/ ||
599 * DEVICE_HUB_CONFIGURED DEVICE_HUB_RESET
600 * || /\
601 * \/ ||
602 * STATE_POWERED
603 * || /\
604 * \/ ||
605 * DEVICE_RESET DEVICE_POWER_INTERRUPTION
606 * || /\
607 * \/ ||
608 * STATE_DEFAULT
609 * || /\
610 * \/ ||
611 * DEVICE_ADDRESS_ASSIGNED DEVICE_RESET
612 * || /\
613 * \/ ||
614 * STATE_ADDRESSED
615 * || /\
616 * \/ ||
617 * DEVICE_CONFIGURED DEVICE_DE_CONFIGURED
618 * || /\
619 * \/ ||
620 * STATE_CONFIGURED
621 *
622 * udc_state_transition_up transitions up (in the direction from STATE_ATTACHED
623 * to STATE_CONFIGURED) from the specified initial state to the specified final
624 * state, passing through each intermediate state on the way. If the initial
625 * state is at or above (i.e. nearer to STATE_CONFIGURED) the final state, then
626 * no state transitions will take place.
627 *
628 * udc_state_transition_down transitions down (in the direction from
629 * STATE_CONFIGURED to STATE_ATTACHED) from the specified initial state to the
630 * specified final state, passing through each intermediate state on the way.
631 * If the initial state is at or below (i.e. nearer to STATE_ATTACHED) the final
632 * state, then no state transitions will take place.
633 *
634 */
386eda02 635
16c8d5e7 636static void mpc8xx_udc_state_transition_up (usb_device_state_t initial,
386eda02
WD
637 usb_device_state_t final)
638{
16c8d5e7
WD
639 if (initial < final) {
640 switch (initial) {
641 case STATE_ATTACHED:
642 usbd_device_event_irq (udc_device,
643 DEVICE_HUB_CONFIGURED, 0);
644 if (final == STATE_POWERED)
645 break;
646 case STATE_POWERED:
647 usbd_device_event_irq (udc_device, DEVICE_RESET, 0);
648 if (final == STATE_DEFAULT)
649 break;
650 case STATE_DEFAULT:
651 usbd_device_event_irq (udc_device,
652 DEVICE_ADDRESS_ASSIGNED, 0);
653 if (final == STATE_ADDRESSED)
654 break;
655 case STATE_ADDRESSED:
656 usbd_device_event_irq (udc_device, DEVICE_CONFIGURED,
657 0);
658 case STATE_CONFIGURED:
659 break;
660 default:
661 break;
662 }
663 }
664}
665
666static void mpc8xx_udc_state_transition_down (usb_device_state_t initial,
386eda02 667 usb_device_state_t final)
16c8d5e7
WD
668{
669 if (initial > final) {
670 switch (initial) {
671 case STATE_CONFIGURED:
386eda02
WD
672 usbd_device_event_irq (udc_device,
673 DEVICE_DE_CONFIGURED, 0);
16c8d5e7
WD
674 if (final == STATE_ADDRESSED)
675 break;
676 case STATE_ADDRESSED:
677 usbd_device_event_irq (udc_device, DEVICE_RESET, 0);
678 if (final == STATE_DEFAULT)
679 break;
680 case STATE_DEFAULT:
386eda02
WD
681 usbd_device_event_irq (udc_device,
682 DEVICE_POWER_INTERRUPTION, 0);
16c8d5e7
WD
683 if (final == STATE_POWERED)
684 break;
685 case STATE_POWERED:
686 usbd_device_event_irq (udc_device, DEVICE_HUB_RESET,
386eda02 687 0);
16c8d5e7
WD
688 case STATE_ATTACHED:
689 break;
690 default:
691 break;
692 }
693 }
694}
695
696/* mpc8xx_udc_stall
697 *
698 * Force returning of STALL tokens on the given endpoint. Protocol or function
699 * STALL conditions are permissable here
700 */
701static void mpc8xx_udc_stall (unsigned int ep)
702{
703 usbp->usep[ep] |= STALL_BITMASK;
704}
705
706/* mpc8xx_udc_set_nak
707 *
708 * Force returning of NAK responses for the given endpoint as a kind of very
709 * simple flow control
386eda02 710 */
16c8d5e7
WD
711static void mpc8xx_udc_set_nak (unsigned int ep)
712{
713 usbp->usep[ep] |= NAK_BITMASK;
714 __asm__ ("eieio");
715}
716
717/* mpc8xx_udc_handle_txerr
718 *
719 * Handle errors relevant to TX. Return a status code to allow calling
720 * indicative of what if anything happened
721 */
386eda02 722static short mpc8xx_udc_handle_txerr ()
16c8d5e7
WD
723{
724 short ep = 0, ret = 0;
386eda02
WD
725
726 for (; ep < TX_RING_SIZE; ep++) {
727 if (usbp->usber & (0x10 << ep)) {
728
16c8d5e7 729 /* Timeout or underrun */
386eda02 730 if (tx_cbd[ep]->cbd_sc & 0x06) {
16c8d5e7 731 ret = 1;
386eda02 732 mpc8xx_udc_flush_tx_fifo (ep);
16c8d5e7 733
386eda02
WD
734 } else {
735 if (usbp->usep[ep] & STALL_BITMASK) {
736 if (!ep) {
737 usbp->usep[ep] &= ~STALL_BITMASK;
16c8d5e7 738 }
386eda02 739 } /* else NAK */
16c8d5e7 740 }
386eda02 741 usbp->usber |= (0x10 << ep);
16c8d5e7
WD
742 }
743 }
744 return ret;
745}
746
747/* mpc8xx_udc_advance_rx
748 *
749 * Advance cbd rx
750 */
386eda02 751static void mpc8xx_udc_advance_rx (volatile cbd_t ** rx_cbdp, int epid)
16c8d5e7 752{
386eda02
WD
753 if ((*rx_cbdp)->cbd_sc & RX_BD_W) {
754 *rx_cbdp = (volatile cbd_t *) (endpoints[epid]->rbase + CFG_IMMR);
755
756 } else {
16c8d5e7
WD
757 (*rx_cbdp)++;
758 }
759}
760
761
762/* mpc8xx_udc_flush_tx_fifo
763 *
764 * Flush a given TX fifo. Assumes one tx cbd per endpoint
765 */
386eda02
WD
766static void mpc8xx_udc_flush_tx_fifo (int epid)
767{
768 volatile cbd_t *tx_cbdp = 0;
16c8d5e7 769
386eda02 770 if (epid > MAX_ENDPOINTS) {
16c8d5e7
WD
771 return;
772 }
773
774 /* TX stop */
386eda02 775 immr->im_cpm.cp_cpcr = ((epid << 2) | 0x1D01);
16c8d5e7 776 __asm__ ("eieio");
386eda02
WD
777 while (immr->im_cpm.cp_cpcr & 0x01);
778
16c8d5e7 779 usbp->uscom = 0x40 | 0;
386eda02 780
16c8d5e7 781 /* reset ring */
386eda02 782 tx_cbdp = (cbd_t *) (endpoints[epid]->tbptr + CFG_IMMR);
16c8d5e7
WD
783 tx_cbdp->cbd_sc = (TX_BD_I | TX_BD_W);
784
386eda02 785
16c8d5e7 786 endpoints[epid]->tptr = endpoints[epid]->tbase;
386eda02
WD
787 endpoints[epid]->tstate = 0x00;
788 endpoints[epid]->tbcnt = 0x00;
16c8d5e7
WD
789
790 /* TX start */
386eda02 791 immr->im_cpm.cp_cpcr = ((epid << 2) | 0x2D01);
16c8d5e7 792 __asm__ ("eieio");
386eda02 793 while (immr->im_cpm.cp_cpcr & 0x01);
16c8d5e7
WD
794
795 return;
796}
797
798/* mpc8xx_udc_flush_rx_fifo
799 *
800 * For the sake of completeness of the namespace, it seems like
801 * a good-design-decision (tm) to include mpc8xx_udc_flush_rx_fifo();
802 * If RX_BD_E is true => a driver bug either here or in an upper layer
803 * not polling frequently enough. If RX_BD_E is true we have told the host
804 * we have accepted data but, the CPM found it had no-where to put that data
805 * which needless to say would be a bad thing.
806 */
386eda02 807static void mpc8xx_udc_flush_rx_fifo ()
16c8d5e7
WD
808{
809 int i = 0;
386eda02
WD
810
811 for (i = 0; i < RX_RING_SIZE; i++) {
812 if (!(rx_cbd[i]->cbd_sc & RX_BD_E)) {
813 ERR ("buf %p used rx data len = 0x%x sc=0x%x!\n",
814 rx_cbd[i], rx_cbd[i]->cbd_datlen,
815 rx_cbd[i]->cbd_sc);
16c8d5e7
WD
816
817 }
818 }
386eda02 819 ERR ("BUG : Input over-run\n");
16c8d5e7
WD
820}
821
822/* mpc8xx_udc_clear_rxbd
386eda02 823 *
16c8d5e7
WD
824 * Release control of RX CBD to CP.
825 */
386eda02 826static void mpc8xx_udc_clear_rxbd (volatile cbd_t * rx_cbdp)
16c8d5e7
WD
827{
828 rx_cbdp->cbd_datlen = 0x0000;
386eda02 829 rx_cbdp->cbd_sc = ((rx_cbdp->cbd_sc & RX_BD_W) | (RX_BD_E | RX_BD_I));
16c8d5e7
WD
830 __asm__ ("eieio");
831}
832
833/* mpc8xx_udc_tx_irq
834 *
835 * Parse for tx timeout, control RX or USB reset/busy conditions
836 * Return -1 on timeout, -2 on fatal error, else return zero
837 */
386eda02 838static int mpc8xx_udc_tx_irq (int ep)
16c8d5e7
WD
839{
840 int i = 0;
841
386eda02
WD
842 if (usbp->usber & (USB_TX_ERRMASK)) {
843 if (mpc8xx_udc_handle_txerr ()) {
16c8d5e7
WD
844 /* Timeout, controlling function must retry send */
845 return -1;
846 }
847 }
848
386eda02 849 if (usbp->usber & (USB_E_RESET | USB_E_BSY)) {
16c8d5e7
WD
850 /* Fatal, abandon TX transaction */
851 return -2;
852 }
386eda02
WD
853
854 if (usbp->usber & USB_E_RXB) {
855 for (i = 0; i < RX_RING_SIZE; i++) {
856 if (!(rx_cbd[i]->cbd_sc & RX_BD_E)) {
857 if ((rx_cbd[i] == ep_ref[0].prx) || ep) {
858 return -2;
16c8d5e7
WD
859 }
860 }
861 }
862 }
863
864 return 0;
865}
866
867/* mpc8xx_udc_ep_tx
868 *
869 * Transmit in a re-entrant fashion outbound USB packets.
870 * Implement retry/timeout mechanism described in USB specification
871 * Toggle DATA0/DATA1 pids as necessary
872 * Introduces non-standard tx_retry. The USB standard has no scope for slave
873 * devices to give up TX, however tx_retry stops us getting stuck in an endless
874 * TX loop.
875 */
386eda02 876static int mpc8xx_udc_ep_tx (struct usb_endpoint_instance *epi)
16c8d5e7
WD
877{
878 struct urb *urb = epi->tx_urb;
386eda02 879 volatile cbd_t *tx_cbdp = 0;
16c8d5e7
WD
880 unsigned int ep = 0, pkt_len = 0, x = 0, tx_retry = 0;
881 int ret = 0;
386eda02
WD
882
883 if (!epi || (epi->endpoint_address & 0x03) >= MAX_ENDPOINTS || !urb) {
16c8d5e7
WD
884 return -1;
885 }
886
887 ep = epi->endpoint_address & 0x03;
386eda02
WD
888 tx_cbdp = (cbd_t *) (endpoints[ep]->tbptr + CFG_IMMR);
889
890 if (tx_cbdp->cbd_sc & TX_BD_R || usbp->usber & USB_E_TXB) {
891 mpc8xx_udc_flush_tx_fifo (ep);
16c8d5e7
WD
892 usbp->usber |= USB_E_TXB;
893 };
894
386eda02
WD
895 while (tx_retry++ < 100) {
896 ret = mpc8xx_udc_tx_irq (ep);
897 if (ret == -1) {
16c8d5e7 898 /* ignore timeout here */
386eda02 899 } else if (ret == -2) {
16c8d5e7 900 /* Abandon TX */
386eda02 901 mpc8xx_udc_flush_tx_fifo (ep);
16c8d5e7 902 return -1;
386eda02
WD
903 }
904
905 tx_cbdp = (cbd_t *) (endpoints[ep]->tbptr + CFG_IMMR);
906 while (tx_cbdp->cbd_sc & TX_BD_R) {
907 };
908 tx_cbdp->cbd_sc = (tx_cbdp->cbd_sc & TX_BD_W);
16c8d5e7 909
16c8d5e7
WD
910 pkt_len = urb->actual_length - epi->sent;
911
386eda02
WD
912 if (pkt_len > epi->tx_packetSize || pkt_len > EP_MAX_PKT) {
913 pkt_len = MIN (epi->tx_packetSize, EP_MAX_PKT);
16c8d5e7
WD
914 }
915
386eda02
WD
916 for (x = 0; x < pkt_len; x++) {
917 *((unsigned char *) (tx_cbdp->cbd_bufaddr + x)) =
16c8d5e7
WD
918 urb->buffer[epi->sent + x];
919 }
920 tx_cbdp->cbd_datlen = pkt_len;
386eda02 921 tx_cbdp->cbd_sc |= (CBD_TX_BITMASK | ep_ref[ep].pid);
16c8d5e7
WD
922 __asm__ ("eieio");
923
386eda02
WD
924#ifdef __SIMULATE_ERROR__
925 if (++err_poison_test == 2) {
926 err_poison_test = 0;
927 tx_cbdp->cbd_sc &= ~TX_BD_TC;
928 }
929#endif
16c8d5e7 930
386eda02 931 usbp->uscom = (USCOM_STR | ep);
16c8d5e7 932
386eda02
WD
933 while (!(usbp->usber & USB_E_TXB)) {
934 ret = mpc8xx_udc_tx_irq (ep);
935 if (ret == -1) {
16c8d5e7
WD
936 /* TX timeout */
937 break;
386eda02
WD
938 } else if (ret == -2) {
939 if (usbp->usber & USB_E_TXB) {
940 usbp->usber |= USB_E_TXB;
16c8d5e7 941 }
386eda02 942 mpc8xx_udc_flush_tx_fifo (ep);
16c8d5e7
WD
943 return -1;
944 }
945 };
946
386eda02
WD
947 if (usbp->usber & USB_E_TXB) {
948 usbp->usber |= USB_E_TXB;
16c8d5e7
WD
949 }
950
951 /* ACK must be present <= 18bit times from TX */
386eda02 952 if (ret == -1) {
16c8d5e7
WD
953 continue;
954 }
386eda02 955
16c8d5e7
WD
956 /* TX ACK : USB 2.0 8.7.2, Toggle PID, Advance TX */
957 epi->sent += pkt_len;
386eda02
WD
958 epi->last = MIN (urb->actual_length - epi->sent, epi->tx_packetSize);
959 TOGGLE_TX_PID (ep_ref[ep].pid);
960
961 if (epi->sent >= epi->tx_urb->actual_length) {
16c8d5e7 962
16c8d5e7
WD
963 epi->tx_urb->actual_length = 0;
964 epi->sent = 0;
386eda02
WD
965
966 if (ep_ref[ep].sc & EP_SEND_ZLP) {
16c8d5e7 967 ep_ref[ep].sc &= ~EP_SEND_ZLP;
386eda02 968 } else {
16c8d5e7
WD
969 return 0;
970 }
971 }
972 }
386eda02
WD
973
974 ERR ("TX fail, endpoint 0x%x tx bytes 0x%x/0x%x\n", ep, epi->sent,
975 epi->tx_urb->actual_length);
16c8d5e7
WD
976
977 return -1;
978}
979
980/* mpc8xx_udc_dump_request
981 *
982 * Dump a control request to console
983 */
386eda02 984static void mpc8xx_udc_dump_request (struct usb_device_request *request)
16c8d5e7 985{
386eda02
WD
986 DBG ("bmRequestType:%02x bRequest:%02x wValue:%04x "
987 "wIndex:%04x wLength:%04x ?\n",
988 request->bmRequestType,
989 request->bRequest,
990 request->wValue, request->wIndex, request->wLength);
16c8d5e7
WD
991
992 return;
993}
994
386eda02
WD
995/* mpc8xx_udc_ep0_rx_setup
996 *
16c8d5e7
WD
997 * Decode received ep0 SETUP packet. return non-zero on error
998 */
999static int mpc8xx_udc_ep0_rx_setup (volatile cbd_t * rx_cbdp)
1000{
1001 unsigned int x = 0;
386eda02
WD
1002 struct urb *purb = ep_ref[0].urb;
1003 struct usb_endpoint_instance *epi =
16c8d5e7
WD
1004 &udc_device->bus->endpoint_array[0];
1005
386eda02
WD
1006 for (; x < rx_cbdp->cbd_datlen; x++) {
1007 *(((unsigned char *) &ep_ref[0].urb->device_request) + x) =
1008 *((unsigned char *) (rx_cbdp->cbd_bufaddr + x));
16c8d5e7 1009 }
16c8d5e7 1010
386eda02
WD
1011 mpc8xx_udc_clear_rxbd (rx_cbdp);
1012
1013 if (ep0_recv_setup (purb)) {
1014 mpc8xx_udc_dump_request (&purb->device_request);
16c8d5e7
WD
1015 return -1;
1016 }
1017
386eda02 1018 if ((purb->device_request.bmRequestType & USB_REQ_DIRECTION_MASK)
16c8d5e7
WD
1019 == USB_REQ_HOST2DEVICE) {
1020
386eda02
WD
1021 switch (purb->device_request.bRequest) {
1022 case USB_REQ_SET_ADDRESS:
1023 /* Send the Status OUT ZLP */
1024 ep_ref[0].pid = TX_BD_PID_DATA1;
1025 purb->actual_length = 0;
1026 mpc8xx_udc_init_tx (epi, purb);
1027 mpc8xx_udc_ep_tx (epi);
1028
1029 /* Move to the addressed state */
1030 usbp->usaddr = udc_device->address;
1031 mpc8xx_udc_state_transition_up (udc_device->device_state,
1032 STATE_ADDRESSED);
1033 return 0;
1034
1035 case USB_REQ_SET_CONFIGURATION:
1036 if (!purb->device_request.wValue) {
1037 /* Respond at default address */
1038 usbp->usaddr = 0x00;
1039 mpc8xx_udc_state_transition_down (udc_device->device_state,
1040 STATE_ADDRESSED);
1041 } else {
1042 /* TODO: Support multiple configurations */
1043 mpc8xx_udc_state_transition_up (udc_device->device_state,
1044 STATE_CONFIGURED);
1045 for (x = 1; x < MAX_ENDPOINTS; x++) {
1046 if ((udc_device->bus->endpoint_array[x].endpoint_address & USB_ENDPOINT_DIR_MASK)
1047 == USB_DIR_IN) {
1048 ep_ref[x].pid = TX_BD_PID_DATA0;
1049 } else {
1050 ep_ref[x].pid = RX_BD_PID_DATA0;
16c8d5e7 1051 }
386eda02
WD
1052 /* Set configuration must unstall endpoints */
1053 usbp->usep[x] &= ~STALL_BITMASK;
16c8d5e7 1054 }
386eda02
WD
1055 }
1056 break;
1057 default:
1058 /* CDC/Vendor specific */
1059 break;
16c8d5e7
WD
1060 }
1061
1062 /* Send ZLP as ACK in Status OUT phase */
1063 ep_ref[0].pid = TX_BD_PID_DATA1;
1064 purb->actual_length = 0;
386eda02
WD
1065 mpc8xx_udc_init_tx (epi, purb);
1066 mpc8xx_udc_ep_tx (epi);
16c8d5e7 1067
386eda02
WD
1068 } else {
1069
1070 if (purb->actual_length) {
16c8d5e7 1071 ep_ref[0].pid = TX_BD_PID_DATA1;
386eda02 1072 mpc8xx_udc_init_tx (epi, purb);
16c8d5e7 1073
386eda02 1074 if (!(purb->actual_length % EP0_MAX_PACKET_SIZE)) {
16c8d5e7
WD
1075 ep_ref[0].sc |= EP_SEND_ZLP;
1076 }
1077
386eda02
WD
1078 if (purb->device_request.wValue ==
1079 USB_DESCRIPTOR_TYPE_DEVICE) {
1080 if (le16_to_cpu (purb->device_request.wLength)
1081 > purb->actual_length) {
16c8d5e7
WD
1082 /* Send EP0_MAX_PACKET_SIZE bytes
1083 * unless correct size requested.
1084 */
386eda02
WD
1085 if (purb->actual_length > epi->tx_packetSize) {
1086 purb->actual_length = epi->tx_packetSize;
16c8d5e7 1087 }
16c8d5e7
WD
1088 }
1089 }
386eda02 1090 mpc8xx_udc_ep_tx (epi);
16c8d5e7 1091
386eda02 1092 } else {
16c8d5e7 1093 /* Corrupt SETUP packet? */
386eda02 1094 ERR ("Zero length data or SETUP with DATA-IN phase ?\n");
16c8d5e7
WD
1095 return 1;
1096 }
1097 }
1098 return 0;
1099}
1100
1101/* mpc8xx_udc_init_tx
1102 *
1103 * Setup some basic parameters for a TX transaction
1104 */
386eda02
WD
1105static void mpc8xx_udc_init_tx (struct usb_endpoint_instance *epi,
1106 struct urb *tx_urb)
16c8d5e7
WD
1107{
1108 epi->sent = 0;
1109 epi->last = 0;
1110 epi->tx_urb = tx_urb;
1111}
1112
1113/* mpc8xx_udc_ep0_rx
1114 *
1115 * Receive ep0/control USB data. Parse and possibly send a response.
1116 */
386eda02 1117static void mpc8xx_udc_ep0_rx (volatile cbd_t * rx_cbdp)
16c8d5e7 1118{
386eda02
WD
1119 if (rx_cbdp->cbd_sc & RX_BD_PID_SETUP) {
1120
16c8d5e7 1121 /* Unconditionally accept SETUP packets */
386eda02
WD
1122 if (mpc8xx_udc_ep0_rx_setup (rx_cbdp)) {
1123 mpc8xx_udc_stall (0);
16c8d5e7 1124 }
386eda02 1125
16c8d5e7 1126 } else {
386eda02
WD
1127
1128 mpc8xx_udc_clear_rxbd (rx_cbdp);
1129
1130 if ((rx_cbdp->cbd_datlen - 2)) {
16c8d5e7 1131 /* SETUP with a DATA phase
386eda02
WD
1132 * outside of SETUP packet.
1133 * Reply with STALL.
1134 */
16c8d5e7
WD
1135 mpc8xx_udc_stall (0);
1136 }
1137 }
1138}
1139
1140/* mpc8xx_udc_epn_rx
1141 *
1142 * Receive some data from cbd into USB system urb data abstraction
386eda02 1143 * Upper layers should NAK if there is insufficient RX data space
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1144 */
1145static int mpc8xx_udc_epn_rx (unsigned int epid, volatile cbd_t * rx_cbdp)
1146{
1147 struct usb_endpoint_instance *epi = 0;
1148 struct urb *urb = 0;
1149 unsigned int x = 0;
1150
386eda02 1151 if (epid >= MAX_ENDPOINTS || !rx_cbdp->cbd_datlen) {
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1152 return 0;
1153 }
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1154
1155 /* USB 2.0 PDF section 8.6.4
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1156 * Discard data with invalid PID it is a resend.
1157 */
386eda02 1158 if (ep_ref[epid].pid != (rx_cbdp->cbd_sc & 0xC0)) {
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1159 return 1;
1160 }
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1161 TOGGLE_RX_PID (ep_ref[epid].pid);
1162
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1163 epi = &udc_device->bus->endpoint_array[epid];
1164 urb = epi->rcv_urb;
1165
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1166 for (; x < (rx_cbdp->cbd_datlen - 2); x++) {
1167 *((unsigned char *) (urb->buffer + urb->actual_length + x)) =
1168 *((unsigned char *) (rx_cbdp->cbd_bufaddr + x));
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1169 }
1170
386eda02 1171 if (x) {
16c8d5e7 1172 usbd_rcv_complete (epi, x, 0);
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1173 if (ep_ref[epid].urb->status == RECV_ERROR) {
1174 DBG ("RX error unset NAK\n");
1175 udc_unset_nak (epid);
16c8d5e7 1176 }
386eda02 1177 }
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1178 return x;
1179}
1180
1181/* mpc8xx_udc_clock_init
1182 *
386eda02 1183 * Obtain a clock reference for Full Speed Signaling
16c8d5e7 1184 */
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1185static void mpc8xx_udc_clock_init (volatile immap_t * immr,
1186 volatile cpm8xx_t * cp)
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1187{
1188
1189#if defined(CFG_USB_EXTC_CLK)
1190
1191 /* This has been tested with a 48MHz crystal on CLK6 */
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1192 switch (CFG_USB_EXTC_CLK) {
1193 case 1:
1194 immr->im_ioport.iop_papar |= 0x0100;
1195 immr->im_ioport.iop_padir &= ~0x0100;
1196 cp->cp_sicr |= 0x24;
1197 break;
1198 case 2:
1199 immr->im_ioport.iop_papar |= 0x0200;
1200 immr->im_ioport.iop_padir &= ~0x0200;
1201 cp->cp_sicr |= 0x2D;
1202 break;
1203 case 3:
1204 immr->im_ioport.iop_papar |= 0x0400;
1205 immr->im_ioport.iop_padir &= ~0x0400;
1206 cp->cp_sicr |= 0x36;
1207 break;
1208 case 4:
1209 immr->im_ioport.iop_papar |= 0x0800;
1210 immr->im_ioport.iop_padir &= ~0x0800;
1211 cp->cp_sicr |= 0x3F;
1212 break;
1213 default:
1214 udc_state = STATE_ERROR;
1215 break;
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1216 }
1217
1218#elif defined(CFG_USB_BRGCLK)
1219
386eda02 1220 /* This has been tested with brgclk == 50MHz */
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1221 int divisor = 0;
1222
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1223 if (gd->cpu_clk < 48000000L) {
1224 ERR ("brgclk is too slow for full-speed USB!\n");
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1225 udc_state = STATE_ERROR;
1226 return;
1227 }
1228
1229 /* Assume the brgclk is 'good enough', we want !(gd->cpu_clk%48Mhz)
1230 * but, can /probably/ live with close-ish alternative rates.
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1231 */
1232 divisor = (gd->cpu_clk / 48000000L) - 1;
16c8d5e7 1233 cp->cp_sicr &= ~0x0000003F;
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1234
1235 switch (CFG_USB_BRGCLK) {
1236 case 1:
1237 cp->cp_brgc1 |= (divisor | CPM_BRG_EN);
1238 cp->cp_sicr &= ~0x2F;
1239 break;
1240 case 2:
1241 cp->cp_brgc2 |= (divisor | CPM_BRG_EN);
1242 cp->cp_sicr |= 0x00000009;
1243 break;
1244 case 3:
1245 cp->cp_brgc3 |= (divisor | CPM_BRG_EN);
1246 cp->cp_sicr |= 0x00000012;
1247 break;
1248 case 4:
1249 cp->cp_brgc4 = (divisor | CPM_BRG_EN);
1250 cp->cp_sicr |= 0x0000001B;
1251 break;
1252 default:
1253 udc_state = STATE_ERROR;
1254 break;
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1255 }
1256
1257#else
386eda02 1258#error "CFG_USB_EXTC_CLK or CFG_USB_BRGCLK must be defined"
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1259#endif
1260
1261}
1262
1263/* mpc8xx_udc_cbd_attach
1264 *
1265 * attach a cbd to and endpoint
1266 */
1267static void mpc8xx_udc_cbd_attach (int ep, uchar tx_size, uchar rx_size)
1268{
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1269
1270 if (!tx_cbd[ep] || !rx_cbd[ep] || ep >= MAX_ENDPOINTS) {
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1271 udc_state = STATE_ERROR;
1272 return;
1273 }
1274
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1275 if (tx_size > USB_MAX_PKT || rx_size > USB_MAX_PKT ||
1276 (!tx_size && !rx_size)) {
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1277 udc_state = STATE_ERROR;
1278 return;
1279 }
1280
1281 /* Attach CBD to appropiate Parameter RAM Endpoint data structure */
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1282 if (rx_size) {
1283 endpoints[ep]->rbase = (u32) rx_cbd[rx_ct];
1284 endpoints[ep]->rbptr = (u32) rx_cbd[rx_ct];
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1285 rx_ct++;
1286
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1287 if (!ep) {
1288
1289 endpoints[ep]->rbptr = (u32) rx_cbd[rx_ct];
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1290 rx_cbd[rx_ct]->cbd_sc |= RX_BD_W;
1291 rx_ct++;
1292
386eda02 1293 } else {
16c8d5e7 1294 rx_ct += 2;
386eda02 1295 endpoints[ep]->rbptr = (u32) rx_cbd[rx_ct];
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1296 rx_cbd[rx_ct]->cbd_sc |= RX_BD_W;
1297 rx_ct++;
1298 }
1299
1300 /* Where we expect to RX data on this endpoint */
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1301 ep_ref[ep].prx = rx_cbd[rx_ct - 1];
1302 } else {
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1303
1304 ep_ref[ep].prx = 0;
1305 endpoints[ep]->rbase = 0;
1306 endpoints[ep]->rbptr = 0;
1307 }
1308
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1309 if (tx_size) {
1310 endpoints[ep]->tbase = (u32) tx_cbd[tx_ct];
1311 endpoints[ep]->tbptr = (u32) tx_cbd[tx_ct];
16c8d5e7 1312 tx_ct++;
386eda02 1313 } else {
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1314 endpoints[ep]->tbase = 0;
1315 endpoints[ep]->tbptr = 0;
1316 }
1317
1318 endpoints[ep]->tstate = 0;
1319 endpoints[ep]->tbcnt = 0;
1320 endpoints[ep]->mrblr = EP_MAX_PKT;
386eda02 1321 endpoints[ep]->rfcr = 0x18;
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1322 endpoints[ep]->tfcr = 0x18;
1323 ep_ref[ep].sc |= EP_ATTACHED;
1324
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1325 DBG ("ep %d rbase 0x%08x rbptr 0x%08x tbase 0x%08x tbptr 0x%08x prx = %p\n",
1326 ep, endpoints[ep]->rbase, endpoints[ep]->rbptr,
1327 endpoints[ep]->tbase, endpoints[ep]->tbptr,
1328 ep_ref[ep].prx);
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1329
1330 return;
1331}
1332
1333/* mpc8xx_udc_cbd_init
1334 *
1335 * Allocate space for a cbd and allocate TX/RX data space
1336 */
1337static void mpc8xx_udc_cbd_init (void)
1338{
1339 int i = 0;
1340
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1341 for (; i < TX_RING_SIZE; i++) {
1342 tx_cbd[i] = (cbd_t *)
1343 mpc8xx_udc_alloc (sizeof (cbd_t), sizeof (int));
1344 }
1345
1346 for (i = 0; i < RX_RING_SIZE; i++) {
1347 rx_cbd[i] = (cbd_t *)
1348 mpc8xx_udc_alloc (sizeof (cbd_t), sizeof (int));
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1349 }
1350
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1351 for (i = 0; i < TX_RING_SIZE; i++) {
1352 tx_cbd[i]->cbd_bufaddr =
1353 mpc8xx_udc_alloc (EP_MAX_PKT, sizeof (int));
16c8d5e7 1354
386eda02 1355 tx_cbd[i]->cbd_sc = (TX_BD_I | TX_BD_W);
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1356 tx_cbd[i]->cbd_datlen = 0x0000;
1357 }
1358
1359
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1360 for (i = 0; i < RX_RING_SIZE; i++) {
1361 rx_cbd[i]->cbd_bufaddr =
1362 mpc8xx_udc_alloc (EP_MAX_PKT, sizeof (int));
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1363 rx_cbd[i]->cbd_sc = (RX_BD_I | RX_BD_E);
1364 rx_cbd[i]->cbd_datlen = 0x0000;
1365
1366 }
1367
1368 return;
1369}
1370
1371/* mpc8xx_udc_endpoint_init
1372 *
1373 * Attach an endpoint to some dpram
1374 */
1375static void mpc8xx_udc_endpoint_init (void)
1376{
1377 int i = 0;
1378
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1379 for (; i < MAX_ENDPOINTS; i++) {
1380 endpoints[i] = (usb_epb_t *)
1381 mpc8xx_udc_alloc (sizeof (usb_epb_t), 32);
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1382 }
1383}
1384
1385/* mpc8xx_udc_alloc
1386 *
386eda02 1387 * Grab the address of some dpram
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1388 */
1389static u32 mpc8xx_udc_alloc (u32 data_size, u32 alignment)
1390{
1391 u32 retaddr = address_base;
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1392
1393 while (retaddr % alignment) {
16c8d5e7 1394 retaddr++;
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1395 }
1396 address_base += data_size;
1397
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1398 return retaddr;
1399}
1400
1401#endif /* CONFIG_MPC885_FAMILY && CONFIG_USB_DEVICE) */