[thirdparty/u-boot.git] / drivers / video / vesa.c

// SPDX-License-Identifier: GPL-2.0+
/*
 * Copyright (C) 2016, Bin Meng <bmeng.cn@gmail.com>
 */

#include <common.h>
#include <dm.h>
#include <log.h>
#include <pci.h>
#include <vesa.h>
#include <video.h>
#include <asm/mtrr.h>

static int vesa_video_probe(struct udevice *dev)
{
	struct video_uc_plat *plat = dev_get_uclass_plat(dev);
	ulong fbbase;
	int ret;

	ret = vesa_setup_video(dev, NULL);
	if (ret)
		return log_ret(ret);

	/* Use write-combining for the graphics memory, 256MB */
	fbbase = IS_ENABLED(CONFIG_VIDEO_COPY) ? plat->copy_base : plat->base;
	mtrr_set_next_var(MTRR_TYPE_WRCOMB, fbbase, 256 << 20);

	return 0;
}

static int vesa_video_bind(struct udevice *dev)
{
	struct video_uc_plat *uc_plat = dev_get_uclass_plat(dev);

	/* Set the maximum supported resolution */
	uc_plat->size = 2560 * 1600 * 4;
	log_debug("%s: Frame buffer size %x\n", __func__, uc_plat->size);

	return 0;
}

static const struct udevice_id vesa_video_ids[] = {
	{ .compatible = "vesa-fb" },
	{ }
};

U_BOOT_DRIVER(vesa_video) = {
	.name	= "vesa_video",
	.id	= UCLASS_VIDEO,
	.of_match = vesa_video_ids,
	.bind	= vesa_video_bind,
	.probe	= vesa_video_probe,
};

static struct pci_device_id vesa_video_supported[] = {
	{ PCI_DEVICE_CLASS(PCI_CLASS_DISPLAY_VGA << 8, ~0) },
	{ },
};

U_BOOT_PCI_DEVICE(vesa_video, vesa_video_supported);
Commit	Line	Data
83d290c5	1	// SPDX-License-Identifier: GPL-2.0+
02c57abd BM	2	/*
02c57abd BM	3	* Copyright (C) 2016, Bin Meng <bmeng.cn@gmail.com>
02c57abd BM	4	*/
02c57abd BM	5
d678a59d	6	#include <common.h>
02c57abd	7	#include <dm.h>
6c74ee30	8	#include <log.h>
02c57abd	9	#include <pci.h>
cafe8712	10	#include <vesa.h>
6c74ee30 SG	11	#include <video.h>
6c74ee30 SG	12	#include <asm/mtrr.h>
02c57abd BM	13
	14	static int vesa_video_probe(struct udevice *dev)
	15	{
8a8d24bd	16	struct video_uc_plat *plat = dev_get_uclass_plat(dev);
6c74ee30 SG	17	ulong fbbase;
	18	int ret;
	19
da62e1e8	20	ret = vesa_setup_video(dev, NULL);
6c74ee30 SG	21	if (ret)
	22	return log_ret(ret);
	23
	24	/* Use write-combining for the graphics memory, 256MB */
	25	fbbase = IS_ENABLED(CONFIG_VIDEO_COPY) ? plat->copy_base : plat->base;
bff002d4	26	mtrr_set_next_var(MTRR_TYPE_WRCOMB, fbbase, 256 << 20);
6c74ee30 SG	27
	28	return 0;
	29	}
	30
	31	static int vesa_video_bind(struct udevice *dev)
	32	{
8a8d24bd	33	struct video_uc_plat *uc_plat = dev_get_uclass_plat(dev);
6c74ee30 SG	34
	35	/* Set the maximum supported resolution */
	36	uc_plat->size = 2560 * 1600 * 4;
	37	log_debug("%s: Frame buffer size %x\n", __func__, uc_plat->size);
	38
	39	return 0;
02c57abd BM	40	}
	41
	42	static const struct udevice_id vesa_video_ids[] = {
	43	{ .compatible = "vesa-fb" },
	44	{ }
	45	};
	46
	47	U_BOOT_DRIVER(vesa_video) = {
	48	.name = "vesa_video",
	49	.id = UCLASS_VIDEO,
	50	.of_match = vesa_video_ids,
6c74ee30	51	.bind = vesa_video_bind,
02c57abd BM	52	.probe = vesa_video_probe,
	53	};
	54
	55	static struct pci_device_id vesa_video_supported[] = {
	56	{ PCI_DEVICE_CLASS(PCI_CLASS_DISPLAY_VGA << 8, ~0) },
	57	{ },
	58	};
	59
	60	U_BOOT_PCI_DEVICE(vesa_video, vesa_video_supported);