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New Cell SPU port.
[thirdparty/binutils-gdb.git] / gas / ChangeLog
CommitLineData
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AM
12006-10-25 Trevor Smigiel <Trevor_Smigiel@playstation.sony.com>
2 Yukishige Shibata <shibata@rd.scei.sony.co.jp>
3 Nobuhisa Fujinami <fnami@rd.scei.sony.co.jp>
4 Takeaki Fukuoka <fukuoka@rd.scei.sony.co.jp>
5 Alan Modra <amodra@bigpond.net.au>
6
7 * config/tc-spu.c: New file.
8 * config/tc-spu.h: New file.
9 * configure.tgt: Add SPU support.
10 * Makefile.am: Likewise. Run "make dep-am".
11 * Makefile.in: Regenerate.
12 * po/POTFILES.in: Regenerate.
13
7b383517
BE
142006-10-25 Ben Elliston <bje@au.ibm.com>
15
16 * expr.c (expr): Replace O_add case in switch (op_left) explaining
17 why it can never occur.
18
ede602d7
AM
192006-10-24 Andrew Pinski <andrew_pinski@playstation.sony.com>
20
21 * doc/c-ppc.texi (-mcell): Document.
22 * config/tc-ppc.c (parse_cpu): Parse -mcell.
23 (md_show_usage): Document -mcell.
24
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MM
252006-10-23 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
26
27 * doc/c-i386.texi : Document amdfam10,.sse4a and .abm in cpu_type.
28
878bcc43
AM
292006-10-23 Alan Modra <amodra@bigpond.net.au>
30
31 * config/tc-m68hc11.c (md_assemble): Quiet warning.
32
8620418b
MF
332006-10-19 Mike Frysinger <vapier@gentoo.org>
34
35 * config/tc-i386.c (md_parse_option): Use CONST_STRNEQ.
36 (x86_64_section_letter): Likewise.
37
b3549761
NC
382006-10-19 Mei Ligang <ligang@sunnorth.com.cn>
39
40 * config/tc-score.c (build_relax_frag): Compute correct
41 tc_frag_data.fixp.
42
71a75f6f
MF
432006-10-18 Roy Marples <uberlord@gentoo.org>
44
45 * config/tc-sparc.c (md_parse_option): Treat any target starting with
a70ae331
AM
46 elf32-sparc as a viable target for the -32 switch and any target
47 starting with elf64-sparc as a viable target for the -64 switch.
48 (sparc_target_format): For 64-bit ELF flavoured output use
49 ELF_TARGET_FORMAT64 while for 32-bit ELF flavoured output use
50 ELF_TARGET_FORMAT.
71a75f6f
MF
51 * config/tc-sparc.h (ELF_TARGET_FORMAT, ELF_TARGET_FORMAT64): Define.
52
e1b5fdd4
L
532006-10-17 H.J. Lu <hongjiu.lu@intel.com>
54
55 * configure: Regenerated.
56
f8ef9cd7
BS
572006-10-16 Bernd Schmidt <bernd.schmidt@analog.com>
58
59 * input-scrub.c (input_scrub_next_buffer): Use TC_EOL_IN_INSN
60 in addition to testing for '\n'.
61 (TC_EOL_IN_INSN): Provide a default definition if necessary.
62
eb1fe072
NC
632006-10-13 Sterling Augstine <sterling@tensilica.com>
64
65 * dwarf2dbg.c (out_debug_info): Use TC_DWARF2_EMIT_OFFSET to emit
66 a disjoint DW_AT range.
67
ec6e49f4
NC
682006-10-13 Mei Ligang <ligang@sunnorth.com.cn>
69
70 * config/tc-score.c (md_show_usage): Print -KPIC option usage.
71
036dc3f7
PB
722006-10-08 Paul Brook <paul@codesourcery.com>
73
74 * config/tc-arm.c (parse_big_immediate): 64-bit host fix.
75 (parse_operands): Use parse_big_immediate for OP_NILO.
76 (neon_cmode_for_logic_imm): Try smaller element sizes.
77 (neon_cmode_for_move_imm): Ditto.
78 (do_neon_logic): Handle .i64 pseudo-op.
79
3bb0c887
AM
802006-09-29 Alan Modra <amodra@bigpond.net.au>
81
82 * po/POTFILES.in: Regenerate.
83
ef05d495
L
842006-09-28 H.J. Lu <hongjiu.lu@intel.com>
85
86 * config/tc-i386.h (CpuMNI): Renamed to ...
87 (CpuSSSE3): This.
88 (CpuUnknownFlags): Updated.
89 (processor_type): Replace PROCESSOR_YONAH with PROCESSOR_CORE
90 and PROCESSOR_MEROM with PROCESSOR_CORE2.
91 * config/tc-i386.c: Updated.
92 * doc/c-i386.texi: Likewise.
a70ae331 93
ef05d495
L
94 * config/tc-i386.c (cpu_arch): Add ".ssse3", "core" and "core2".
95
d8ad03e9
NC
962006-09-28 Bridge Wu <mingqiao.wu@gmail.com>
97
98 * config/tc-arm.c (md_apply_fix): Do not clear write_back bit.
99
df3ca5a3
NC
1002006-09-27 Nick Clifton <nickc@redhat.com>
101
102 * output-file.c (output_file_close): Prevent an infinite loop
103 reporting that stdoutput could not be closed.
104
2d447fca
JM
1052006-09-26 Mark Shinwell <shinwell@codesourcery.com>
106 Joseph Myers <joseph@codesourcery.com>
107 Ian Lance Taylor <ian@wasabisystems.com>
108 Ben Elliston <bje@wasabisystems.com>
109
110 * config/tc-arm.c (arm_cext_iwmmxt2): New.
111 (enum operand_parse_code): New code OP_RIWR_I32z.
112 (parse_operands): Handle OP_RIWR_I32z.
113 (do_iwmmxt_wmerge): New function.
114 (do_iwmmxt_wldstd): Handle iwmmxt2 case where second operand is
115 a register.
116 (do_iwmmxt_wrwrwr_or_imm5): New function.
117 (insns): Mark instructions as RIWR_I32z as appropriate.
118 Also add torvsc<b,h,w>, wabs<b,h,w>, wabsdiff<b,h,w>,
119 waddbhus<l,m>, waddhc, waddwc, waddsubhx, wavg4{r}, wmaddu{x,n},
120 wmadds{x,n}, wmerge, wmiaxy{n}, wmiawxy{n}, wmul<sm,um>{r},
121 wmulw<um,sm,l>{r}, wqmiaxy{n}, wqmulm{r}, wqmulwm{r}, wsubaddhx.
122 (md_begin): Handle IWMMXT2.
123 (arm_cpus): Add iwmmxt2.
124 (arm_extensions): Likewise.
125 (arm_archs): Likewise.
126
ba83aca1
BW
1272006-09-25 Bob Wilson <bob.wilson@acm.org>
128
129 * doc/as.texinfo (Overview): Revise description of --keep-locals.
130 Add xref to "Symbol Names".
131 (L): Refer to "local symbols" instead of "local labels". Move
132 definition to "Symbol Names" section; add xref to that section.
133 (Symbol Names): Use "Local Symbol Names" section to define local
134 symbols. Add "Local Labels" heading for description of temporary
135 forward/backward labels, and refer to those as "local labels".
136
539e75ad
L
1372006-09-23 H.J. Lu <hongjiu.lu@intel.com>
138
139 PR binutils/3235
140 * config/tc-i386.c (match_template): Check address size prefix
141 to turn Disp64/Disp32/Disp16 operand into Disp32/Disp16/Disp32
142 operand.
143
5e02f92e
AM
1442006-09-22 Alan Modra <amodra@bigpond.net.au>
145
146 * config/tc-ppc.c (ppc_symbol_chars): Remove '+' and '-'.
147
885afe7b
AM
1482006-09-22 Alan Modra <amodra@bigpond.net.au>
149
150 * as.h (as_perror): Delete declaration.
151 * gdbinit.in (as_perror): Delete breakpoint.
152 * messages.c (as_perror): Delete function.
153 * doc/internals.texi: Remove as_perror description.
154 * listing.c (listing_print: Don't use as_perror.
155 * output-file.c (output_file_create, output_file_close): Likewise.
156 * symbols.c (symbol_create, symbol_clone): Likewise.
157 * write.c (write_contents): Likewise.
158 * config/obj-som.c (obj_som_version, obj_som_copyright): Likewise.
159 * config/tc-tic54x.c (tic54x_mlib): Likewise.
160
3aeeedbb
AM
1612006-09-22 Alan Modra <amodra@bigpond.net.au>
162
163 * config/tc-ppc.c (md_section_align): Don't round up address for ELF.
164 (ppc_handle_align): New function.
165 * config/tc-ppc.h (HANDLE_ALIGN): Use ppc_handle_align.
166 (SUB_SEGMENT_ALIGN): Define as zero.
167
96e9638b
BW
1682006-09-20 Bob Wilson <bob.wilson@acm.org>
169
170 * doc/as.texinfo: Fix cross reference usage, typos and grammar.
171 (Overview): Skip cross reference in man page.
172
99ad8390
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1732006-09-20 Kai Tietz <Kai.Tietz@onevision.com>
174
175 * configure.in: Add new target x86_64-pc-mingw64.
176 * configure: Regenerate.
177 * configure.tgt: Add new target x86_64-pc-mingw64.
a70ae331
AM
178 * config/obj-coff.h: Add handling for TE_PEP target specific code
179 and definitions.
99ad8390
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180 * config/tc-i386.c: Add new targets.
181 (md_parse_option): Add targets to OPTION_64.
a70ae331
AM
182 (x86_64_target_format): Add new method for setup proper default
183 target cpu mode.
99ad8390
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184 * config/te-pep.h: Add new target definition header.
185 (TE_PEP): New macro: Identifies new target architecture.
186 (COFF_WITH_pex64): Set proper includes in bfd.
187 * NEWS: Mention new target.
188
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BS
1892006-09-18 Bernd Schmidt <bernd.schmidt@analog.com>
190
191 * config/bfin-parse.y (binary): Change sub of const to add of negated
192 const.
193
1c0d3aa6
NC
1942006-09-17 Mei Ligang <ligang@sunnorth.com.cn>
195
196 * config/tc-score.c: New file.
197 * config/tc-score.h: Newf file.
198 * configure.tgt: Add Score target.
199 * Makefile.am: Add Score files.
200 * Makefile.in: Regenerate.
201 * NEWS: Mention new target support.
202
4fa3602b
PB
2032006-09-16 Paul Brook <paul@codesourcery.com>
204
205 * config/tc-arm.c (s_arm_unwind_movsp): Add offset argument.
206 * doc/c-arm.texi (movsp): Document offset argument.
207
16dd5e42
PB
2082006-09-16 Paul Brook <paul@codesourcery.com>
209
210 * config/tc-arm.c (thumb32_negate_data_op): Consistently use
211 unsigned int to avoid 64-bit host problems.
212
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2132006-09-15 Bernd Schmidt <bernd.schmidt@analog.com>
214
215 * config/bfin-parse.y (binary): Do some more constant folding for
216 additions.
217
e5d4a5a6
JB
2182006-09-13 Jan Beulich <jbeulich@novell.com>
219
220 * input-file.c (input_file_give_next_buffer): Demote as_bad to
221 as_warn.
222
1a1219cb
AM
2232006-09-13 Alan Modra <amodra@bigpond.net.au>
224
225 PR gas/3165
226 * config/tc-sh (DWARF2_CIE_DATA_ALIGNMENT): Wrap negative number
227 in parens.
228
f79d9c1d
AM
2292006-09-13 Alan Modra <amodra@bigpond.net.au>
230
231 * input-file.c (input_file_open): Replace as_perror with as_bad
232 so that gas exits with error on file errors. Correct error
233 message.
234 (input_file_get, input_file_give_next_buffer): Likewise.
e336c79f 235 * input-file.h: Update comment.
f79d9c1d 236
f512f76f
NC
2372006-09-11 Tomas Frydrych <dr.tomas@yahoo.co.uk>
238
239 PR gas/3172
240 * config/tc-arm.c (parse_typed_reg_or_scalar): Accept wCg class
241 registers as a sub-class of wC registers.
242
8d79fd44
AM
2432006-09-11 Alan Modra <amodra@bigpond.net.au>
244
245 PR gas/3165
246 * config/tc-mips.h (enum dwarf2_format): Forward declare.
247 (DWARF2_CIE_DATA_ALIGNMENT): Wrap negative number in parens.
248 * config/tc-alpha.h (DWARF2_CIE_DATA_ALIGNMENT): Likewise.
249 * config/tc-arm.h (DWARF2_CIE_DATA_ALIGNMENT): Likewise.
250
6258339f
NC
2512006-09-08 Nick Clifton <nickc@redhat.com>
252
253 PR gas/3129
254 * doc/as.texinfo (Macro): Improve documentation about separating
255 macro arguments from following text.
256
f91e006c
PB
2572006-09-08 Paul Brook <paul@codesourcery.com>
258
259 * config/tc-arm.c (insns): Allow ARM IT pseudo-insn on all cores.
260
466bbf93
PB
2612006-09-07 Paul Brook <paul@codesourcery.com>
262
263 * config/tc-arm.c (parse_operands): Mark operand as present.
264
428e3f1f
PB
2652006-09-04 Paul Brook <paul@codesourcery.com>
266
267 * config/tc-arm.c (do_neon_dyadic_if_i): Remove.
268 (do_neon_dyadic_if_i_d): Avoid setting U bit.
269 (do_neon_mac_maybe_scalar): Ditto.
270 (do_neon_dyadic_narrow): Force operand type to NT_integer.
271 (insns): Remove out of date comments.
272
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NC
2732006-08-29 Nick Clifton <nickc@redhat.com>
274
275 * read.c (s_align): Initialize the 'stopc' variable to prevent
276 compiler complaints about it being used without being
277 initialized.
278 (s_comm_internal, s_mri_common, s_fail, s_globl, s_space,
279 s_float_space, s_struct, cons_worker, equals): Likewise.
280
5091343a
AM
2812006-08-29 Malcolm Parsons <malcolm.parsons@gmail.com>
282
283 * ecoff.c (ecoff_directive_val): Fix message typo.
284 * config/tc-ns32k.c (convert_iif): Likewise.
285 * config/tc-sh64.c (shmedia_check_limits): Likewise.
286
1f2a7e38
BW
2872006-08-25 Sterling Augustine <sterling@tensilica.com>
288 Bob Wilson <bob.wilson@acm.org>
289
290 * config/tc-xtensa.c (xtensa_mark_literal_pool_location): Do not check
291 the state of the absolute_literals directive. Remove align frag at
292 the start of the literal pool position.
293
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BW
2942006-08-25 Bob Wilson <bob.wilson@acm.org>
295
296 * doc/c-xtensa.texi: Add @group commands in examples.
297
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BW
2982006-08-24 Bob Wilson <bob.wilson@acm.org>
299
300 * config/tc-xtensa.c (FINI_LITERAL_SECTION_NAME): Delete.
301 (INIT_LITERAL_SECTION_NAME): Delete.
302 (lit_state struct): Remove segment names, init_lit_seg, and
303 fini_lit_seg. Add lit_prefix and current_text_seg.
304 (init_literal_head_h, init_literal_head): Delete.
305 (fini_literal_head_h, fini_literal_head): Delete.
306 (xtensa_begin_directive): Move argument parsing to
307 xtensa_literal_prefix function.
308 (xtensa_end_directive): Deallocate lit_prefix field of lit_state.
309 (xtensa_literal_prefix): Parse the directive argument here and
310 record it in the lit_prefix field. Remove code to derive literal
311 section names.
312 (linkonce_len): New.
313 (get_is_linkonce_section): Use linkonce_len. Check for any
314 ".gnu.linkonce.*" section, not just text sections.
315 (md_begin): Remove initialization of deleted lit_state fields.
316 (xtensa_reorder_segments, xtensa_post_relax_hook): Remove references
317 to init_literal_head and fini_literal_head.
318 (xtensa_move_literals): Likewise. Skip literals for .init and .fini
319 when traversing literal_head list.
320 (match_section_group): New.
321 (cache_literal_section): Rewrite to determine the literal section
322 name on the fly, create the section and return it.
323 (xtensa_switch_to_literal_fragment): Adjust for cache_literal_section.
324 (xtensa_switch_to_non_abs_literal_fragment): Likewise.
325 (xtensa_create_property_segments, xtensa_create_xproperty_segments):
326 Use xtensa_get_property_section from bfd.
327 (retrieve_xtensa_section): Delete.
328 * doc/c-xtensa.texi (Xtensa Options): Fix --text-section-literals
329 description to refer to plural literal sections and add xref to
330 the Literal Directive section.
331 (Literal Directive): Describe new rules for deriving literal section
332 names. Add footnote for special case of .init/.fini with
333 --text-section-literals.
334 (Literal Prefix Directive): Replace old naming rules with xref to the
335 Literal Directive section.
336
87a1fd79
JM
3372006-08-21 Joseph Myers <joseph@codesourcery.com>
338
339 * config/tc-arm.c (s_arm_unwind_save_mmxwr): Correct condition for
340 merging with previous long opcode.
341
7148cc28
NC
3422006-08-22 Pedro Alves <pedro_alves@portugalmail.pt>
343
344 * Makefile.am (TARG_ENV_HFILES): Add te-wince-pe.h.
345 * Makefile.in: Regenerate.
346 * config/tc-arm.h [TARGET_FORMAT]: ARM wince bfd names were
347 renamed. Adjust.
348
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JB
3492006-08-16 Julian Brown <julian@codesourcery.com>
350
351 * config/tc-arm.c (md_assemble): Improve diagnostic when attempting
352 to use ARM instructions on non-ARM-supporting cores.
353 (autoselect_thumb_from_cpu_variant): New function. Switch on Thumb
354 mode automatically based on cpu variant.
355 (md_begin): Call above function.
356
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JB
3572006-08-16 Julian Brown <julian@codesourcery.com>
358
359 * config/tc-arm.c (opcode_lookup): Allow Neon type suffixes to be
360 recognized in non-unified syntax mode.
361
4be041b2
TS
3622006-08-15 Thiemo Seufer <ths@mips.com>
363 Nigel Stephens <nigel@mips.com>
364 David Ung <davidu@mips.com>
365
366 * configure.tgt: Handle mips*-sde-elf*.
367
3a93f742
TS
3682006-08-12 Thiemo Seufer <ths@networkno.de>
369
370 * config/tc-mips.c (mips16_ip): Fix argument register handling
371 for restore instruction.
372
1737851b
BW
3732006-08-08 Bob Wilson <bob.wilson@acm.org>
374
375 * dwarf2dbg.c (DWARF2_USE_FIXED_ADVANCE_PC): New.
376 (out_sleb128): New.
377 (out_fixed_inc_line_addr): New.
378 (process_entries): Use out_fixed_inc_line_addr when
379 DWARF2_USE_FIXED_ADVANCE_PC is set.
380 * config/tc-xtensa.h (DWARF2_USE_FIXED_ADVANCE_PC): Define.
381
e14e52f8
DD
3822006-08-08 DJ Delorie <dj@redhat.com>
383
384 * config/tc-sh.c (sh_frob_section): Canonicalize pointers to local
385 vs full symbols so that we never have more than one pointer value
386 for any given symbol in our symbol table.
387
802f5d9e
NC
3882006-08-08 Sterling Augustine <sterling@tensilica.com>
389
390 * dwarf2dbg.c (out_debug_info): Add new parameter ranges_seg
391 and emit DW_AT_ranges when code in compilation unit is not
392 contiguous.
393 (out_debug_abbrev): Emit DW_AT_ranges abbreviation if code in
394 is not contiguous.
395 (dwarf2_finish): Create and pass ranges_seg to out_debug_info.
396 (out_debug_ranges): New function to emit .debug_ranges section
397 when code is not contiguous.
398
720abc60
NC
3992006-08-08 Nick Clifton <nickc@redhat.com>
400
401 * config/tc-arm.c (WARN_DEPRECATED): Enable.
402
f0927246
NC
4032006-08-05 Pedro Alves <pedro_alves@portugalmail.pt>
404
405 * config/tc-arm.c: Move "dwarf2dbg.h" inclusion out of OBJ_ELF
406 only block.
407 (pe_directive_secrel) [TE_PE]: New function.
408 (md_pseudo_table) [!OBJ_ELF]: Handle 2byte, 4byte, 8byte, file,
409 loc, loc_mark_labels.
410 [TE_PE]: Handle secrel32.
411 (output_relax_insn): Remove OBJ_ELF around dwarf2_emit_insn
412 call.
413 (output_inst): Remove OBJ_ELF around dwarf2_emit_insn call.
414 (arm_frob_label): Remove OBJ_ELF around dwarf2_emit_label call.
415 (md_section_align): Only round section sizes here for AOUT
416 targets.
417 (tc_arm_regname_to_dw2regnum): Move out for OBJ_ELF only block.
418 (tc_pe_dwarf2_emit_offset): New function.
419 (md_apply_fix) [TE_PE]: Handle BFD_RELOC_32_SECREL.
420 (cons_fix_new_arm): Handle O_secrel.
421 * config/tc-arm.h : Move DWARF2_LINE_MIN_INSN_LENGTH,
422 DWARF2_DEFAULT_RETURN_COLUMN and DWARF2_CIE_DATA_ALIGNMENT out
423 of OBJ_ELF only block.
424 [TE_PE]: Define O_secrel, TC_DWARF2_EMIT_OFFSET, and declare
425 tc_pe_dwarf2_emit_offset.
426
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RS
4272006-08-04 Richard Sandiford <richard@codesourcery.com>
428
429 * config/tc-sh.c (apply_full_field_fix): New function.
430 (md_apply_fix): Use it instead of md_number_to_chars. Do not fill
431 in fx_addnumber for BFD_RELOC_32_PLT_PCREL.
432 (tc_gen_reloc): Use fx_addnumber rather than 0 as the default case.
433 * config/tc-sh.h (TARGET_FORMAT): Override for TE_VXWORKS.
434
9cd19b17
NC
4352006-08-03 Nick Clifton <nickc@redhat.com>
436
437 PR gas/2991
438 * config.in: Regenerate.
439
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JM
4402006-08-03 Joseph Myers <joseph@codesourcery.com>
441
442 * config/tc-arm.c (parse_operands): Handle invalid register name
a70ae331 443 for OP_RIWR_RIWC.
97f87066 444
41adaa5c
JM
4452006-08-03 Joseph Myers <joseph@codesourcery.com>
446
447 * config/tc-arm.c (enum operand_parse_code): Add OP_RIWC_RIWG.
448 (parse_operands): Handle it.
449 (insns): Use it for tmcr and tmrc.
450
9d7cbccd
NC
4512006-08-02 Petr Salinger <Petr.Salinger@seznam.cz>
452
453 PR binutils/2983
454 * config/tc-i386.c (md_parse_option): Treat any target starting
455 with elf64_x86_64 as a viable target for the -64 switch.
456 (i386_target_format): For 64-bit ELF flavoured output use
457 ELF_TARGET_FORMAT64.
458 * config/tc-i386.h (ELF_TARGET_FORMAT64): Define.
459
c973bc5c
NC
4602006-08-02 Nick Clifton <nickc@redhat.com>
461
462 PR gas/2991
463 * acinclude.m4 (BFD_BINARY_FOPEN): Import this function from
464 bfd/aclocal.m4.
465 * configure.in: Run BFD_BINARY_FOPEN.
466 * configure: Regenerate.
467 * as.h: Look at USE_BINARY_FOPEN to decide which fopen-*.h header
468 file to include.
469
cfde7f70
L
4702006-08-01 H.J. Lu <hongjiu.lu@intel.com>
471
472 * config/tc-i386.c (md_assemble): Don't update
473 cpu_arch_isa_flags.
474
b4c71f56
TS
4752006-08-01 Thiemo Seufer <ths@mips.com>
476
477 * config/tc-mips.c (md_section_align): Check ELF-ness at runtime.
478
54f4ddb3
TS
4792006-08-01 Thiemo Seufer <ths@mips.com>
480
481 * config/tc-mips.c (macro_build_lui): Fix comment formatting.
482 (md_apply_fix): Likewise. Unify handling of BFD_RELOC_RVA,
483 BFD_RELOC_32 and BFD_RELOC_16.
484 (s_align, s_cpload, s_cplocal, s_cprestore, s_mips_stab,
485 md_convert_frag, md_obj_end): Fix comment formatting.
486
d103cf61
TS
4872006-07-31 Thiemo Seufer <ths@mips.com>
488
489 * config/tc-mips.c (md_apply_fix, tc_gen_reloc): Remove special
490 handling for BFD_RELOC_MIPS16_JMP.
491
601e61cd
NC
4922006-07-24 Andreas Schwab <schwab@suse.de>
493
494 PR/2756
495 * read.c (read_a_source_file): Ignore unknown text after line
496 comment character. Fix misleading comment.
497
b45619c0
NC
4982006-07-24 Ralk Wildenhues <Ralf.Wildenhues@gmx.de>
499
500 * doc/all.texi, doc/as.texinfo, doc/c-arc.texi, doc/c-arm.texi,
501 doc/c-avr.texi, doc/c-bfin.texi, doc/c-i386.texi,
502 doc/c-i960.texi, doc/c-m32r.texi, doc/c-m68k.texi,
503 doc/c-mmix.texi, doc/c-pdp11.texi, doc/c-ppc.texi,
504 doc/c-tic54x.texi, doc/c-v850.texi, doc/c-xtensa.texi,
505 doc/c-z80.texi, doc/internals.texi: Fix some typos.
506
784906c5
NC
5072006-07-21 Nick Clifton <nickc@redhat.com>
508
509 * config/tc-sh.c (md_longopts): Add -EL and -EB for use by the
510 linker testsuite.
511
d5f010e9
TS
5122006-07-20 Thiemo Seufer <ths@mips.com>
513 Nigel Stephens <nigel@mips.com>
514
515 * config/tc-mips.c (md_parse_option): Don't infer optimisation
516 options from debug options.
517
35d3d567
TS
5182006-07-20 Thiemo Seufer <ths@mips.com>
519
520 * config/tc-mips.c (mips_fix_adjustable): Handle BFD_RELOC_MIPS16_JMP.
521 (tc_gen_reloc): Handle mips16 jumps to section symbol offsets.
522
401a54cf
PB
5232006-07-19 Paul Brook <paul@codesourcery.com>
524
525 * config/tc-arm.c (insns): Fix rbit Arm opcode.
526
16805f35
PB
5272006-07-18 Paul Brook <paul@codesourcery.com>
528
529 * tc-arm.c (do_t_add_sub): Use addw/subw when source is PC.
530 (md_convert_frag): Use correct reloc for add_pc. Use
531 BFD_RELOC_ARM_T32_ADD_IMM for normal add/sum.
532 (md_apply_fix): Handle BFD_RELOC_ARM_T32_ADD_IMM.
533 (arm_force_relocation): Handle BFD_RELOC_ARM_T32_ADD_IMM.
534
d9e05e4e
AM
5352006-07-17 Mat Hostetter <mat@lcs.mit.edu>
536
537 * symbols.c (report_op_error): Fix pasto. Don't use as_bad_where
538 when file and line unknown.
539
f43abd2b
TS
5402006-07-17 Thiemo Seufer <ths@mips.com>
541
542 * read.c (s_struct): Use IS_ELF.
543 * config/tc-mips.c (md_begin, mips16_mark_labels, mips_ip,
544 md_parse_option, s_change_sec, pic_need_relax, mips_fix_adjustable,
545 tc_gen_reloc, mips_frob_file_after_relocs, s_mips_end, s_mips_frame,
546 s_mips_mask): Likewise.
547
a2902af6
TS
5482006-07-16 Thiemo Seufer <ths@mips.com>
549 David Ung <davidu@mips.com>
550
551 * read.c (s_struct): Handle ELF section changing.
552 * config/tc-mips.c (s_align): Leave enabling auto-align to the
553 generic code.
554 (s_change_sec): Try section changing only if we output ELF.
555
d32cad65
L
5562006-07-15 H.J. Lu <hongjiu.lu@intel.com>
557
558 * config/tc-i386.c (cpu_arch): Remove Cpu086, CpuAthlon and
559 CpuAmdFam10.
560 (smallest_imm_type): Remove Cpu086.
561 (i386_target_format): Likewise.
562
563 * config/tc-i386.h: Remove Cpu086, CpuAthlon and CpuAmdFam10.
564 Update CpuXXX.
565
050dfa73
MM
5662006-07-13 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
567 Michael Meissner <michael.meissner@amd.com>
568
569 * config/tc-i386.h (PROCESSOR_AMDFAM10): New processor_type.
570 (CpuSSE4a, CpuABM, CpuAmdFam10): New Cpu directives.
571 * config/tc-i386.c (cpu_arch): Add support for AmdFam10
572 architecture.
573 (i386_align_code): Ditto.
574 (md_assemble_code): Add support for insertq/extrq instructions,
575 swapping as needed for intel syntax.
576 (swap_imm_operands): New function to swap immediate operands.
577 (swap_operands): Deal with 4 operand instructions.
578 (build_modrm_byte): Add support for insertq instruction.
579
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5802006-07-13 H.J. Lu <hongjiu.lu@intel.com>
581
582 * config/tc-i386.h (Size64): Fix a typo in comment.
583
01eaea5a
NC
5842006-07-12 Nick Clifton <nickc@redhat.com>
585
586 * config/tc-sh.c (md_apply_fix): Do not allow the generic code in
7cfe9437 587 fixup_segment() to repeat a range check on a value that has
01eaea5a
NC
588 already been checked here.
589
1e85aad8
JW
5902006-07-07 James E Wilson <wilson@specifix.com>
591
592 * config/tc-mips.c (mips_cpu_info_table): Add sb1a.
593
1370e33d
NC
5942006-07-06 Mohammed Adnène Trojette <adn@diwi.org>
595 Nick Clifton <nickc@redhat.com>
596
597 PR binutils/2877
598 * doc/as.texi: Fix spelling typo: branchs => branches.
599 * doc/c-m68hc11.texi: Likewise.
600 * config/tc-m68hc11.c: Likewise.
601 Support old spelling of command line switch for backwards
602 compatibility.
603
5f0fe04b
TS
6042006-07-04 Thiemo Seufer <ths@mips.com>
605 David Ung <davidu@mips.com>
606
607 * config/tc-mips.c (s_is_linkonce): New function.
608 (mips16_mark_labels): Don't adjust mips16 symbol addresses for
609 weak, external, and linkonce symbols.
610 (pic_need_relax): Use s_is_linkonce.
611
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6122006-06-24 H.J. Lu <hongjiu.lu@intel.com>
613
614 * doc/as.texinfo (Org): Remove space.
615 (P2align): Add "@var{abs-expr},".
616
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L
6172006-06-23 H.J. Lu <hongjiu.lu@intel.com>
618
619 * config/tc-i386.c (cpu_arch_tune_set): New.
620 (cpu_arch_isa): Likewise.
621 (i386_align_code): Use xchg %ax,%ax for 2 byte nop. Optimize
622 nops with short or long nop sequences based on -march=/.arch
623 and -mtune=.
624 (set_cpu_arch): Set cpu_arch_isa. If cpu_arch_tune_set is 0,
625 set cpu_arch_tune and cpu_arch_tune_flags.
626 (md_parse_option): For -march=, set cpu_arch_isa and set
627 cpu_arch_tune and cpu_arch_tune_flags if cpu_arch_tune_set is
628 0. Set cpu_arch_tune_set to 1 for -mtune=.
629 (i386_target_format): Don't set cpu_arch_tune.
630
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TS
6312006-06-23 Nigel Stephens <nigel@mips.com>
632
633 * config/tc-mips.c (nopic_need_relax): Handle -fdata-sections
634 generated .sbss.* and .gnu.linkonce.sb.*.
635
a8dbcb85
TS
6362006-06-23 Thiemo Seufer <ths@mips.com>
637 David Ung <davidu@mips.com>
638
639 * config/tc-mips.h (TC_SEGMENT_INFO_TYPE): Declare per-segment
640 label_list.
641 * config/tc-mips.c (label_list): Define per-segment label_list.
642 (mips_clear_insn_labels, mips_move_labels, mips16_mark_labels,
643 append_insn, s_align, s_cons, s_float_cons, s_gpword, s_gpdword,
644 mips_from_file_after_relocs, mips_define_label): Use per-segment
645 label_list.
646
3994f87e
TS
6472006-06-22 Thiemo Seufer <ths@mips.com>
648
649 * config/tc-mips.c (ISA_SUPPORTS_MIPS16E): New macro.
650 (append_insn): Use it.
651 (md_apply_fix): Whitespace formatting.
652 (md_begin, append_insn, macro, macro2, mips16_immed, mips_align,
653 mips16_extended_frag): Remove register specifier.
654 (md_convert_frag): Likewise. Use TRUE ans FALSE instead of numeric
655 constants.
656
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MS
6572006-06-21 Mark Shinwell <shinwell@codesourcery.com>
658
659 * config/tc-arm.c (s_arm_unwind_save_vfp_armv6): New. Parse
660 a directive saving VFP registers for ARMv6 or later.
661 (s_arm_unwind_save): Add parameter arch_v6 and call
662 s_arm_unwind_save_vfp or s_arm_unwind_save_vfp_armv6 as
663 appropriate.
664 (md_pseudo_table): Add entry for new "vsave" directive.
665 * doc/c-arm.texi: Correct error in example for "save"
666 directive (fstmdf -> fstmdx). Also document "vsave" directive.
667
8e77b565 6682006-06-18 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
026dcbd7
DC
669 Anatoly Sokolov <aesok@post.ru>
670
a70ae331
AM
671 * config/tc-avr.c (mcu_types): Add support for atmega165p, atmega169p
672 and atmega644p devices. Rename atmega164/atmega324 devices to
026dcbd7
DC
673 atmega164p/atmega324p.
674 * doc/c-avr.texi: Document new mcu and arch options.
675
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NC
6762006-06-17 Nick Clifton <nickc@redhat.com>
677
678 * config/tc-arm.c (enum parse_operand_result): Move outside of
679 #ifdef OBJ_ELF so that non-ELF targeted ARM ports can build.
680
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L
6812006-06-16 H.J. Lu <hongjiu.lu@intel.com>
682
683 * config/tc-i386.h (processor_type): New.
684 (arch_entry): Add type.
685
686 * config/tc-i386.c (cpu_arch_tune): New.
687 (cpu_arch_tune_flags): Likewise.
688 (cpu_arch_isa_flags): Likewise.
689 (cpu_arch): Updated.
690 (set_cpu_arch): Also update cpu_arch_isa_flags.
691 (md_assemble): Update cpu_arch_isa_flags.
692 (OPTION_MARCH): New.
693 (OPTION_MTUNE): Likewise.
694 (md_longopts): Add -march= and -mtune=.
695 (md_parse_option): Support -march= and -mtune=.
696 (md_show_usage): Add -march=CPU/-mtune=CPU.
697 (i386_target_format): Also update cpu_arch_isa_flags,
698 cpu_arch_tune and cpu_arch_tune_flags.
699
700 * doc/as.texinfo: Add -march=CPU/-mtune=CPU.
701
702 * doc/c-i386.texi: Document -march=CPU/-mtune=CPU.
703
4962c51a
MS
7042006-06-15 Mark Shinwell <shinwell@codesourcery.com>
705
706 * config/tc-arm.c (enum parse_operand_result): New.
707 (struct group_reloc_table_entry): New.
708 (enum group_reloc_type): New.
709 (group_reloc_table): New array.
710 (find_group_reloc_table_entry): New function.
711 (parse_shifter_operand_group_reloc): New function.
712 (parse_address_main): New function, incorporating code
713 from the old parse_address function. To be used via...
714 (parse_address): wrapper for parse_address_main; and
715 (parse_address_group_reloc): new function, likewise.
716 (enum operand_parse_code): New codes OP_SHG, OP_ADDRGLDR,
717 OP_ADDRGLDRS, OP_ADDRGLDC.
718 (parse_operands): Support for these new operand codes.
719 New macro po_misc_or_fail_no_backtrack.
720 (encode_arm_cp_address): Preserve group relocations.
721 (insns): Modify to use the above operand codes where group
722 relocations are permitted.
723 (md_apply_fix): Handle the group relocations
724 ALU_PC_G0_NC through LDC_SB_G2.
725 (tc_gen_reloc): Likewise.
726 (arm_force_relocation): Leave group relocations for the linker.
727 (arm_fix_adjustable): Likewise.
728
cd2f129f
JB
7292006-06-15 Julian Brown <julian@codesourcery.com>
730
731 * config/tc-arm.c (do_vfp_nsyn_ldr_str): Remove, fold into...
732 (do_neon_ldr_str): Always defer to VFP encoding routines, which handle
733 relocs properly.
734
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L
7352006-06-12 H.J. Lu <hongjiu.lu@intel.com>
736
737 * config/tc-i386.c (process_suffix): Don't add rex64 for
738 "xchg %rax,%rax".
739
1787fe5b
TS
7402006-06-09 Thiemo Seufer <ths@mips.com>
741
742 * config/tc-mips.c (mips_ip): Maintain argument count.
743
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7442006-06-09 Alan Modra <amodra@bigpond.net.au>
745
746 * config/tc-iq2000.c: Include sb.h.
747
7c752c2a
TS
7482006-06-08 Nigel Stephens <nigel@mips.com>
749
750 * config/tc-mips.c (mips_pseudo_table): Add "origin" and "repeat"
751 aliases for better compatibility with SGI tools.
752
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AM
7532006-06-08 Alan Modra <amodra@bigpond.net.au>
754
755 * configure.in (BFDLIB, BFDVER_H, ALL_OBJ_DEPS): Delete.
756 * Makefile.am (GASLIBS): Expand @BFDLIB@.
757 (BFDVER_H): Delete.
758 (OBJS): Expand @ALL_OBJ_DEPS@. Depend on all fopen-*.h variants.
759 (obj-aout.o): Depend on $(DEP_@target_get_type@_aout)
760 (obj-coff.o, obj-ecoff.o, obj-elf.o): Similarly.
761 Run "make dep-am".
762 * dep-in.sed: Don't substitute bfdver.h. Do remove symcat.h.
763 * Makefile.in: Regenerate.
764 * doc/Makefile.in: Regenerate.
765 * configure: Regenerate.
766
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JM
7672006-06-07 Joseph S. Myers <joseph@codesourcery.com>
768
769 * po/Make-in (pdf, ps): New dummy targets.
770
037e8744
JB
7712006-06-07 Julian Brown <julian@codesourcery.com>
772
773 * config/tc-arm.c (stdarg.h): include.
774 (arm_it): Add uncond_value field. Add isvec and issingle to operand
775 array.
776 (arm_reg_type): Add REG_TYPE_VFSD (single or double VFP reg) and
777 REG_TYPE_NSDQ (single, double or quad vector reg).
778 (reg_expected_msgs): Update.
779 (BAD_FPU): Add macro for unsupported FPU instruction error.
780 (parse_neon_type): Support 'd' as an alias for .f64.
781 (parse_typed_reg_or_scalar): Support REG_TYPE_VFSD, REG_TYPE_NSDQ
782 sets of registers.
783 (parse_vfp_reg_list): Don't update first arg on error.
784 (parse_neon_mov): Support extra syntax for VFP moves.
785 (operand_parse_code): Add OP_RVSD, OP_RNSDQ, OP_VRSDLST, OP_RVSD_IO,
786 OP_RNSDQ_RNSC, OP_RVC_PSR, OP_APSR_RR, OP_oRNSDQ.
787 (parse_operands): Support isvec, issingle operands fields, new parse
788 codes above.
789 (do_vfp_nsyn_mrs, do_vfp_nsyn_msr): New functions. Support VFP mrs,
790 msr variants.
791 (do_mrs, do_msr, do_t_mrs, do_t_msr): Add support for above.
792 (NEON_ENC_TAB): Add vnmul, vnmla, vnmls, vcmp, vcmpz, vcmpe, vcmpez.
793 (NEON_ENC_SINGLE, NEON_ENC_DOUBLE): Define macros.
794 (NEON_SHAPE_DEF): New macro. Define table of possible instruction
795 shapes.
796 (neon_shape): Redefine in terms of above.
797 (neon_shape_class): New enumeration, table of shape classes.
798 (neon_shape_el): New enumeration. One element of a shape.
799 (neon_shape_el_size): Register widths of above, where appropriate.
800 (neon_shape_info): New struct. Info for shape table.
801 (neon_shape_tab): New array.
802 (neon_type_mask): Add N_F64, N_VFP. Update N_MAX_NONSPECIAL.
803 (neon_check_shape): Rewrite as...
804 (neon_select_shape): New function to classify instruction shapes,
805 driven by new table neon_shape_tab array.
806 (neon_quad): New function. Return 1 if shape should set Q flag in
807 instructions (or equivalent), 0 otherwise.
808 (type_chk_of_el_type): Support F64.
809 (el_type_of_type_chk): Likewise.
810 (neon_check_type): Add support for VFP type checking (VFP data
811 elements fill their containing registers).
812 (do_vfp_cond_or_thumb): Fill in condition field in ARM mode, or 0xE
813 in thumb mode for VFP instructions.
814 (do_vfp_nsyn_opcode): New function. Look up the opcode in argument,
815 and encode the current instruction as if it were that opcode.
816 (try_vfp_nsyn): New. If this looks like a VFP instruction with ARGS
817 arguments, call function in PFN.
818 (do_vfp_nsyn_add_sub, do_vfp_nsyn_mla_mls, do_vfp_nsyn_mul)
819 (do_vfp_nsyn_abs_neg, do_vfp_nsyn_ldm_stm, do_vfp_nsyn_ldr_str)
820 (do_vfp_nsyn_sqrt, do_vfp_nsyn_div, do_vfp_nsyn_nmul)
821 (do_vfp_nsyn_cmp, nsyn_insert_sp, do_vfp_nsyn_push)
822 (do_vfp_nsyn_pop, do_vfp_nsyn_cvt, do_vfp_nsyn_cvtz): New functions.
823 Redirect Neon-syntax VFP instructions to VFP instruction handlers.
824 (do_neon_dyadic_i_su, do_neon_dyadic_i64_su, do_neon_shl_imm)
825 (do_neon_qshl_imm, do_neon_logic, do_neon_bitfield)
826 (neon_dyadic_misc, neon_compare, do_neon_tst, do_neon_qdmulh)
827 (do_neon_fcmp_absolute, do_neon_step, do_neon_sli, do_neon_sri)
828 (do_neon_qshlu_imm, neon_move_immediate, do_neon_mvn, do_neon_ext)
829 (do_neon_rev, do_neon_dup, do_neon_rshift_round_imm, do_neon_trn)
830 (do_neon_zip_uzp, do_neon_sat_abs_neg, do_neon_pair_long)
831 (do_neon_recip_est, do_neon_cls, do_neon_clz, do_neon_cnt)
832 (do_neon_swp): Use neon_select_shape not neon_check_shape. Use
833 neon_quad.
834 (vfp_or_neon_is_neon): New function. Call if a mnemonic shared
835 between VFP and Neon turns out to belong to Neon. Perform
836 architecture check and fill in condition field if appropriate.
837 (do_neon_addsub_if_i, do_neon_mac_maybe_scalar, do_neon_abs_neg)
838 (do_neon_cvt): Add support for VFP variants of instructions.
839 (neon_cvt_flavour): Extend to cover VFP conversions.
840 (do_neon_mov): Rewrite to use neon_select_shape. Add support for VFP
841 vmov variants.
842 (do_neon_ldr_str): Handle single-precision VFP load/store.
843 (do_neon_ld_st_interleave, do_neon_ld_st_lane, do_neon_ld_dup): Use
844 NS_NULL not NS_IGNORE.
845 (opcode_tag): Add OT_csuffixF for operands which either take a
846 conditional suffix, or have 0xF in the condition field.
847 (md_assemble): Add support for OT_csuffixF.
848 (NCE): Replace macro with...
849 (NCE_tag, NCE, NCEF): New macros.
850 (nCE): Replace macro with...
851 (nCE_tag, nCE, nCEF): New macros.
852 (insns): Add support for VFP insns or VFP versions of insns msr,
853 mrs, vsqrt, vdiv, vnmul, vnmla, vnmls, vcmp, vcmpe, vpush, vpop,
854 vcvtz, vmul, vmla, vmls, vadd, vsub, vabs, vneg, vldm, vldmia,
855 vldbdb, vstm, vstmia, vstmdb, vldr, vstr, vcvt, vmov. Group shared
856 VFP/Neon insns together.
857
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8582006-06-07 Alan Modra <amodra@bigpond.net.au>
859 Ladislav Michl <ladis@linux-mips.org>
860
861 * app.c: Don't include headers already included by as.h.
862 * as.c: Likewise.
863 * atof-generic.c: Likewise.
864 * cgen.c: Likewise.
865 * dwarf2dbg.c: Likewise.
866 * expr.c: Likewise.
867 * input-file.c: Likewise.
868 * input-scrub.c: Likewise.
869 * macro.c: Likewise.
870 * output-file.c: Likewise.
871 * read.c: Likewise.
872 * sb.c: Likewise.
873 * config/bfin-lex.l: Likewise.
874 * config/obj-coff.h: Likewise.
875 * config/obj-elf.h: Likewise.
876 * config/obj-som.h: Likewise.
877 * config/tc-arc.c: Likewise.
878 * config/tc-arm.c: Likewise.
879 * config/tc-avr.c: Likewise.
880 * config/tc-bfin.c: Likewise.
881 * config/tc-cris.c: Likewise.
882 * config/tc-d10v.c: Likewise.
883 * config/tc-d30v.c: Likewise.
884 * config/tc-dlx.h: Likewise.
885 * config/tc-fr30.c: Likewise.
886 * config/tc-frv.c: Likewise.
887 * config/tc-h8300.c: Likewise.
888 * config/tc-hppa.c: Likewise.
889 * config/tc-i370.c: Likewise.
890 * config/tc-i860.c: Likewise.
891 * config/tc-i960.c: Likewise.
892 * config/tc-ip2k.c: Likewise.
893 * config/tc-iq2000.c: Likewise.
894 * config/tc-m32c.c: Likewise.
895 * config/tc-m32r.c: Likewise.
896 * config/tc-maxq.c: Likewise.
897 * config/tc-mcore.c: Likewise.
898 * config/tc-mips.c: Likewise.
899 * config/tc-mmix.c: Likewise.
900 * config/tc-mn10200.c: Likewise.
901 * config/tc-mn10300.c: Likewise.
902 * config/tc-msp430.c: Likewise.
903 * config/tc-mt.c: Likewise.
904 * config/tc-ns32k.c: Likewise.
905 * config/tc-openrisc.c: Likewise.
906 * config/tc-ppc.c: Likewise.
907 * config/tc-s390.c: Likewise.
908 * config/tc-sh.c: Likewise.
909 * config/tc-sh64.c: Likewise.
910 * config/tc-sparc.c: Likewise.
911 * config/tc-tic30.c: Likewise.
912 * config/tc-tic4x.c: Likewise.
913 * config/tc-tic54x.c: Likewise.
914 * config/tc-v850.c: Likewise.
915 * config/tc-vax.c: Likewise.
916 * config/tc-xc16x.c: Likewise.
917 * config/tc-xstormy16.c: Likewise.
918 * config/tc-xtensa.c: Likewise.
919 * config/tc-z80.c: Likewise.
920 * config/tc-z8k.c: Likewise.
921 * macro.h: Don't include sb.h or ansidecl.h.
922 * sb.h: Don't include stdio.h or ansidecl.h.
923 * cond.c: Include sb.h.
924 * itbl-lex.l: Include as.h instead of other system headers.
925 * itbl-parse.y: Likewise.
926 * itbl-ops.c: Similarly.
927 * itbl-ops.h: Don't include as.h or ansidecl.h.
928 * config/bfin-defs.h: Don't include bfd.h or as.h.
929 * config/bfin-parse.y: Include as.h instead of other system headers.
930
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9312006-06-06 Ben Elliston <bje@au.ibm.com>
932 Anton Blanchard <anton@samba.org>
933
934 * config/tc-ppc.c (parse_cpu): Handle "-mpower6".
935 (md_show_usage): Document it.
936 (ppc_setup_opcodes): Test power6 opcode flag bits.
937 * doc/c-ppc.texi (PowerPC-Opts): Document "-mpower6".
938
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9392006-06-06 Thiemo Seufer <ths@mips.com>
940 Chao-ying Fu <fu@mips.com>
941
942 * config/tc-mips.c (ISA_SUPPORTS_DSP64): New macro.
943 (CPU_HAS_MIPS3D, CPU_HAS_MDMX, CPU_HAS_DSP, CPU_HAS_MT): Delete.
944 (macro_build): Update comment.
945 (mips_ip): Allow DSP64 instructions for MIPS64R2.
946 (mips_after_parse_args): Remove uses of CPU_HAS_MIPS3D and
947 CPU_HAS_MDMX.
948 (mips_cpu_info): Fix formatting. Add MIPS_CPU_ASE_MIPS3D and
949 MIPS_CPU_ASE_MDMX flags for sb1.
950
a9e24354
TS
9512006-06-05 Thiemo Seufer <ths@mips.com>
952
953 * config/tc-mips.c (macro_build): Use INSERT_OPERAND wherew
954 appropriate.
955 (mips16_macro_build): Use MIPS16_INSERT_OPERAND where appropriate.
956 (mips_ip): Make overflowed/underflowed constant arguments in DSP
957 and MT instructions a fatal error. Use INSERT_OPERAND where
958 appropriate. Improve warnings for break and wait code overflows.
959 Use symbolic constant of OP_MASK_COPZ.
960 (mips16_ip): Use MIPS16_INSERT_OPERAND where appropriate.
961
4cfe2c59
DJ
9622006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
963
964 * po/Make-in (top_builddir): Define.
965
e10fad12
JM
9662006-06-02 Joseph S. Myers <joseph@codesourcery.com>
967
968 * doc/Makefile.am (TEXI2DVI): Define.
969 * doc/Makefile.in: Regenerate.
970 * doc/c-arc.texi: Fix typo.
971
12e64c2c
AM
9722006-06-01 Alan Modra <amodra@bigpond.net.au>
973
974 * config/obj-ieee.c: Delete.
975 * config/obj-ieee.h: Delete.
976 * Makefile.am (OBJ_FORMATS): Remove ieee.
977 (OBJ_FORMAT_CFILES, OBJ_FORMAT_HFILES): Similarly.
978 (obj-ieee.o): Remove rule.
979 * Makefile.in: Regenerate.
980 * configure.in (atof): Remove tahoe.
981 (OBJ_MAYBE_IEEE): Don't define.
982 * configure: Regenerate.
983 * config.in: Regenerate.
984 * doc/Makefile.in: Regenerate.
985 * po/POTFILES.in: Regenerate.
986
20e95c23
DJ
9872006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
988
989 * Makefile.am: Replace INTLLIBS and INTLDEPS with LIBINTL
990 and LIBINTL_DEP everywhere.
991 (INTLLIBS): Remove.
992 (INCLUDES, DEP_INCLUDES): Use @INCINTL@.
993 * acinclude.m4: Include new gettext macros.
994 * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
995 Remove local code for po/Makefile.
996 * Makefile.in, configure, doc/Makefile.in: Regenerated.
997
eebf07fb
NC
9982006-05-30 Nick Clifton <nickc@redhat.com>
999
1000 * po/es.po: Updated Spanish translation.
1001
b6aee19e
DC
10022006-05-06 Denis Chertykov <denisc@overta.ru>
1003
1004 * doc/c-avr.texi: New file.
1005 * doc/Makefile.am (CPU_DOCS): Add c-avr.texi
1006 * doc/all.texi: Set AVR
1007 * doc/as.texinfo: Include c-avr.texi
1008
f8fdc850 10092006-05-28 Jie Zhang <jie.zhang@analog.com>
a70ae331 1010
f8fdc850
JZ
1011 * config/bfin-parse.y (check_macfunc): Loose the condition of
1012 calling check_multiply_halfregs ().
1013
a3205465
JZ
10142006-05-25 Jie Zhang <jie.zhang@analog.com>
1015
1016 * config/bfin-parse.y (asm_1): Better check and deal with
1017 vector and scalar Multiply 16-Bit Operands instructions.
1018
9b52905e
NC
10192006-05-24 Nick Clifton <nickc@redhat.com>
1020
1021 * config/tc-hppa.c: Convert to ISO C90 format.
1022 * config/tc-hppa.h: Likewise.
1023
10242006-05-24 Carlos O'Donell <carlos@systemhalted.org>
1025 Randolph Chung <randolph@tausq.org>
a70ae331 1026
9b52905e
NC
1027 * config/tc-hppa.c (is_tls_gdidx, is_tls_ldidx, is_tls_dtpoff,
1028 is_tls_ieoff, is_tls_leoff): Define.
1029 (fix_new_hppa): Handle TLS.
1030 (cons_fix_new_hppa): Likewise.
1031 (pa_ip): Likewise.
1032 (md_apply_fix): Handle TLS relocs.
1033 * config/tc-hppa.h (hppa_fix_adjustable): Handle TLS.
1034
a70ae331 10352006-05-24 Bjoern Haase <bjoern.m.haase@web.de>
28c9d252
NC
1036
1037 * config/tc-avr.c: Add new cpu targets avr6, avr2560 and avr2561.
1038
ad3fea08
TS
10392006-05-23 Thiemo Seufer <ths@mips.com>
1040 David Ung <davidu@mips.com>
1041 Nigel Stephens <nigel@mips.com>
1042
1043 [ gas/ChangeLog ]
1044 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS): Rename.
1045 (ISA_SUPPORTS_DSP_ASE, ISA_SUPPORTS_MT_ASE, ISA_HAS_64BIT_FPRS,
1046 ISA_HAS_MXHC1): New macros.
1047 (HAVE_32BIT_FPRS): Use ISA_HAS_64BIT_FPRS instead of
1048 ISA_HAS_64BIT_REGS. Formatting fixes. Improved comments.
1049 (mips_cpu_info): Change to use combined ASE/IS_ISA flag.
1050 (MIPS_CPU_IS_ISA, MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP,
1051 MIPS_CPU_ASE_MT, MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX): New defines.
1052 (mips_after_parse_args): Change default handling of float register
1053 size to account for 32bit code with 64bit FP. Better sanity checking
1054 of ISA/ASE/ABI option combinations.
1055 (s_mipsset): Support switching of GPR and FPR sizes via
1056 .set {g,f}p={32,64,default}. Better sanity checking for .set ASE
1057 options.
1058 (mips_elf_final_processing): We should record the use of 64bit FP
1059 registers in 32bit code but we don't, because ELF header flags are
1060 a scarce ressource.
1061 (mips_cpu_info_table): Add ASE flags for CPUs with mandatory ASE
1062 extensions. Add 4ksc, 4kec, 4kem, 4kep, 4ksd, m4kp, 24kec, 24kef,
1063 24kex, 34kc, 34kf, 34kx, 25kf CPU definitions.
1064 (mips_cpu_info_from_isa): Use MIPS_CPU_IS_ISA.
1065 * doc/c-mips.texi: Document .set {g,f}p={32,64,default}. Document
1066 missing -march options. Document .set arch=CPU. Move .set smartmips
1067 to ASE page. Use @code for .set FOO examples.
1068
8b64503a
JZ
10692006-05-23 Jie Zhang <jie.zhang@analog.com>
1070
1071 * config/tc-bfin.c (bfin_start_line_hook): Bump line counters
1072 if needed.
1073
403022e0
JZ
10742006-05-23 Jie Zhang <jie.zhang@analog.com>
1075
1076 * config/bfin-defs.h (bfin_equals): Remove declaration.
1077 * config/bfin-parse.y (asm_1): Remove "expr ASSIGN expr".
1078 * config/tc-bfin.c (bfin_name_is_register): Remove.
1079 (bfin_equals): Remove.
1080 * config/tc-bfin.h (TC_EQUAL_IN_INSN): Redefine as 1.
1081 (bfin_name_is_register): Remove declaration.
1082
7455baf8
TS
10832006-05-19 Thiemo Seufer <ths@mips.com>
1084 Nigel Stephens <nigel@mips.com>
1085
1086 * config/tc-mipc.c (ISA_HAS_ODD_SINGLE_FPR): New define.
1087 (mips_oddfpreg_ok): New function.
1088 (mips_ip): Use it.
1089
707bfff6
TS
10902006-05-19 Thiemo Seufer <ths@mips.com>
1091 David Ung <davidu@mips.com>
1092
1093 * config/tc-mips.h (tc_mips_regname_to_dw2regnum): Declare.
1094 * config/tc-mipc.c (ABI_NEEDS_64BIT_REGS, ISA_HAS_64BIT_REGS,
1095 ISA_HAS_DROR, ISA_HAS_ROR): Reformat.
1096 (regname, RTYPE_MASK, RTYPE_NUM, RTYPE_FPU, RTYPE_FCC, RTYPE_VEC,
1097 RTYPE_GP, RTYPE_CP0, RTYPE_PC, RTYPE_ACC, RTYPE_CCC, RNUM_MASK,
1098 RWARN, GENERIC_REGISTER_NUMBERS, FPU_REGISTER_NAMES,
1099 FPU_CONDITION_CODE_NAMES, COPROC_CONDITION_CODE_NAMES,
1100 N32N64_SYMBOLIC_REGISTER_NAMES, O32_SYMBOLIC_REGISTER_NAMES,
1101 SYMBOLIC_REGISTER_NAMES, MIPS16_SPECIAL_REGISTER_NAMES,
1102 MDMX_VECTOR_REGISTER_NAMES, MIPS_DSP_ACCUMULATOR_NAMES, reg_names,
1103 reg_names_o32, reg_names_n32n64): Define register classes.
1104 (reg_lookup): New function, use register classes.
1105 (md_begin): Reserve register names in the symbol table. Simplify
1106 OBJ_ELF defines.
1107 (mips_ip): Fix comment formatting. Handle symbolic COP0 registers.
1108 Use reg_lookup.
1109 (mips16_ip): Use reg_lookup.
1110 (tc_get_register): Likewise.
1111 (tc_mips_regname_to_dw2regnum): New function.
1112
1df69f4f
TS
11132006-05-19 Thiemo Seufer <ths@mips.com>
1114
1115 * config/tc-arm.c, config/tc-arm.h (tc_arm_regname_to_dw2regnum):
1116 Un-constify string argument.
1117 * config/tc-i386.c, config/tc-i386.h (tc_x86_regname_to_dw2regnum):
1118 Likewise.
1119 * config/tc-m68k.c, config/tc-m68k.h (tc_m68k_regname_to_dw2regnum):
1120 Likewise.
1121 * config/tc-ppc.c, config/tc-ppc.h (tc_ppc_regname_to_dw2regnum):
1122 Likewise.
1123 * config/tc-s390.c, config/tc-s390.h (tc_s390_regname_to_dw2regnum):
1124 Likewise.
1125 * config/tc-sh.c, config/tc-sh.h (sh_regname_to_dw2regnum):
1126 Likewise.
1127 * config/tc-sparc.c, config/tc-sparc.h (sparc_regname_to_dw2regnum):
1128 Likewise.
1129
377260ba
NS
11302006-05-19 Nathan Sidwell <nathan@codesourcery.com>
1131
1132 * gas/config/tc-m68k.c (m68k_init_arch): Move checking of
1133 cfloat/m68881 to correct architecture before using it.
1134
cce7653b
NC
11352006-05-16 Bjoern Haase <bjoern.m.haase@web.de>
1136
a70ae331 1137 * config/tc-avr.h (TC_VALIDATE_FIX): Allow fixups for immediate
cce7653b
NC
1138 constant values.
1139
b0796911
PB
11402006-05-15 Paul Brook <paul@codesourcery.com>
1141
1142 * config/tc-arm.c (arm_adjust_symtab): Use
1143 bfd_is_arm_special_symbol_name.
1144
64b607e6
BW
11452006-05-15 Bob Wilson <bob.wilson@acm.org>
1146
1147 * config/tc-xtensa.c (is_direct_call_opcode, is_branch_jmp_to_next,
1148 xg_assemble_vliw_tokens, xtensa_mark_narrow_branches,
1149 xtensa_fix_short_loop_frags, is_local_forward_loop, relax_frag_immed):
1150 Handle errors from calls to xtensa_opcode_is_* functions.
1151
9b3f89ee
TS
11522006-05-14 Thiemo Seufer <ths@mips.com>
1153
1154 * config/tc-mips.c (macro_build): Test for currently active
1155 mips16 option.
1156 (mips16_ip): Reject invalid opcodes.
1157
370b66a1
CD
11582006-05-11 Carlos O'Donell <carlos@codesourcery.com>
1159
1160 * doc/as.texinfo: Rename "Index" to "AS Index",
1161 and "ABORT" to "ABORT (COFF)".
1162
b6895b4f
PB
11632006-05-11 Paul Brook <paul@codesourcery.com>
1164
1165 * config/tc-arm.c (parse_half): New function.
1166 (operand_parse_code): Remove OP_Iffff. Add OP_HALF.
1167 (parse_operands): Ditto.
1168 (do_mov16): Reject invalid relocations.
1169 (do_t_mov16): Ditto. Use Thumb reloc numbers.
1170 (insns): Replace Iffff with HALF.
1171 (md_apply_fix): Add MOVW and MOVT relocs.
1172 (tc_gen_reloc): Ditto.
1173 * doc/c-arm.texi: Document relocation operators
1174
e28387c3
PB
11752006-05-11 Paul Brook <paul@codesourcery.com>
1176
1177 * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
1178
89ee2ebe
TS
11792006-05-11 Thiemo Seufer <ths@mips.com>
1180
1181 * config/tc-mips.c (append_insn): Don't check the range of j or
1182 jal addresses.
1183
53baae48
NC
11842006-05-11 Pedro Alves <pedro_alves@portugalmail.pt>
1185
1186 * config/tc-arm.c (md_pcrel_from_section): Force a bias for
a70ae331 1187 relocs against external symbols for WinCE targets.
53baae48
NC
1188 (md_apply_fix): Likewise.
1189
4e2a74a8
TS
11902006-05-09 David Ung <davidu@mips.com>
1191
1192 * config/tc-mips.c (append_insn): Only warn about an out-of-range
1193 j or jal address.
1194
337ff0a5
NC
11952006-05-09 Nick Clifton <nickc@redhat.com>
1196
1197 * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
1198 against symbols which are not going to be placed into the symbol
1199 table.
1200
8c9f705e
BE
12012006-05-09 Ben Elliston <bje@au.ibm.com>
1202
1203 * expr.c (operand): Remove `if (0 && ..)' statement and
1204 subsequently unused target_op label. Collapse `if (1 || ..)'
1205 statement.
1206 * app.c (do_scrub_chars): Remove unused case 0, as it is handled
1207 separately above the switch.
1208
2fd0d2ac
NC
12092006-05-08 Nick Clifton <nickc@redhat.com>
1210
1211 PR gas/2623
1212 * config/tc-msp430.c (line_separator_character): Define as |.
1213
e16bfa71
TS
12142006-05-08 Thiemo Seufer <ths@mips.com>
1215 Nigel Stephens <nigel@mips.com>
1216 David Ung <davidu@mips.com>
1217
1218 * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
1219 (mips_opts): Likewise.
1220 (file_ase_smartmips): New variable.
1221 (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
1222 (macro_build): Handle SmartMIPS instructions.
1223 (mips_ip): Likewise.
1224 (md_longopts): Add argument handling for smartmips.
1225 (md_parse_options, mips_after_parse_args): Likewise.
1226 (s_mipsset): Add .set smartmips support.
1227 (md_show_usage): Document -msmartmips/-mno-smartmips.
1228 * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
1229 .set smartmips.
1230 * doc/c-mips.texi: Likewise.
1231
32638454
AM
12322006-05-08 Alan Modra <amodra@bigpond.net.au>
1233
1234 * write.c (relax_segment): Add pass count arg. Don't error on
1235 negative org/space on first two passes.
1236 (relax_seg_info): New struct.
1237 (relax_seg, write_object_file): Adjust.
1238 * write.h (relax_segment): Update prototype.
1239
b7fc2769
JB
12402006-05-05 Julian Brown <julian@codesourcery.com>
1241
1242 * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
1243 checking.
1244 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
1245 architecture version checks.
1246 (insns): Allow overlapping instructions to be used in VFP mode.
1247
7f841127
L
12482006-05-05 H.J. Lu <hongjiu.lu@intel.com>
1249
1250 PR gas/2598
1251 * config/obj-elf.c (obj_elf_change_section): Allow user
1252 specified SHF_ALPHA_GPREL.
1253
73160847
NC
12542006-05-05 Bjoern Haase <bjoern.m.haase@web.de>
1255
1256 * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups
1257 for PMEM related expressions.
1258
56487c55
NC
12592006-05-05 Nick Clifton <nickc@redhat.com>
1260
1261 PR gas/2582
1262 * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the
1263 insertion of a directory separator character into a string at a
1264 given offset. Uses heuristics to decide when to use a backslash
1265 character rather than a forward-slash character.
1266 (dwarf2_directive_loc): Use the macro.
1267 (out_debug_info): Likewise.
1268
d43b4baf
TS
12692006-05-05 Thiemo Seufer <ths@mips.com>
1270 David Ung <davidu@mips.com>
1271
1272 * config/tc-mips.c (macro_build): Add case 'k' to handle cache
1273 instruction.
1274 (macro): Add new case M_CACHE_AB.
1275
088fa78e
KH
12762006-05-04 Kazu Hirata <kazu@codesourcery.com>
1277
1278 * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
1279 (opcode_lookup): Issue a warning for opcode with
1280 OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated
1281 identical to OT_cinfix3.
1282 (TxC3w, TC3w, tC3w): New.
1283 (insns): Use tC3w and TC3w for comparison instructions with
1284 's' suffix.
1285
c9049d30
AM
12862006-05-04 Alan Modra <amodra@bigpond.net.au>
1287
1288 * subsegs.h (struct frchain): Delete frch_seg.
1289 (frchain_root): Delete.
1290 (seg_info): Define as macro.
1291 * subsegs.c (frchain_root): Delete.
1292 (abs_seg_info, und_seg_info, absolute_frchain): Delete.
1293 (subsegs_begin, subseg_change): Adjust for above.
1294 (subseg_set_rest): Likewise. Add new frchain structs to seginfo
1295 rather than to one big list.
1296 (subseg_get): Don't special case abs, und sections.
1297 (subseg_new, subseg_force_new): Don't set frchainP here.
1298 (seg_info): Delete.
1299 (subsegs_print_statistics): Adjust frag chain control list traversal.
1300 * debug.c (dmp_frags): Likewise.
1301 * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
1302 at frchain_root. Make use of known frchain ordering.
1303 (last_frag_for_seg): Likewise.
1304 (get_frag_fix): Likewise. Add seg param.
1305 (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
1306 * write.c (chain_frchains_together_1): Adjust for struct frchain.
1307 (SUB_SEGMENT_ALIGN): Likewise.
1308 (subsegs_finish): Adjust frchain list traversal.
1309 * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
1310 (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
1311 (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
1312 (xtensa_fix_b_j_loop_end_frags): Likewise.
1313 (xtensa_fix_close_loop_end_frags): Likewise.
1314 (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
1315 (retrieve_segment_info): Delete frch_seg initialisation.
1316
f592407e
AM
13172006-05-03 Alan Modra <amodra@bigpond.net.au>
1318
1319 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
1320 * config/obj-elf.h (obj_sec_set_private_data): Delete.
1321 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
1322 * config/tc-mn10300.c (tc_gen_reloc): Likewise.
1323
df7849c5
JM
13242006-05-02 Joseph Myers <joseph@codesourcery.com>
1325
1326 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
1327 here.
1328 (md_apply_fix3): Multiply offset by 4 here for
1329 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
1330
2d545b82
L
13312006-05-02 H.J. Lu <hongjiu.lu@intel.com>
1332 Jan Beulich <jbeulich@novell.com>
1333
1334 * config/tc-i386.c (output_invalid_buf): Change size for
1335 unsigned char.
1336 * config/tc-tic30.c (output_invalid_buf): Likewise.
1337
1338 * config/tc-i386.c (output_invalid): Cast none-ascii char to
1339 unsigned char.
1340 * config/tc-tic30.c (output_invalid): Likewise.
1341
38fc1cb1
DJ
13422006-05-02 Daniel Jacobowitz <dan@codesourcery.com>
1343
1344 * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
1345 (TEXI2POD): Use AM_MAKEINFOFLAGS.
1346 (asconfig.texi): Don't set top_srcdir.
1347 * doc/as.texinfo: Don't use top_srcdir.
1348 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
1349
2d545b82
L
13502006-05-02 H.J. Lu <hongjiu.lu@intel.com>
1351
1352 * config/tc-i386.c (output_invalid_buf): Change size to 16.
1353 * config/tc-tic30.c (output_invalid_buf): Likewise.
1354
1355 * config/tc-i386.c (output_invalid): Use snprintf instead of
1356 sprintf.
1357 * config/tc-ia64.c (declare_register_set): Likewise.
1358 (emit_one_bundle): Likewise.
1359 (check_dependencies): Likewise.
1360 * config/tc-tic30.c (output_invalid): Likewise.
1361
a8bc6c78
PB
13622006-05-02 Paul Brook <paul@codesourcery.com>
1363
1364 * config/tc-arm.c (arm_optimize_expr): New function.
1365 * config/tc-arm.h (md_optimize_expr): Define
1366 (arm_optimize_expr): Add prototype.
1367 (TC_FORCE_RELOCATION_SUB_SAME): Define.
1368
58633d9a
BE
13692006-05-02 Ben Elliston <bje@au.ibm.com>
1370
22772e33
BE
1371 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
1372 field unsigned.
1373
58633d9a
BE
1374 * sb.h (sb_list_vector): Move to sb.c.
1375 * sb.c (free_list): Use type of sb_list_vector directly.
1376 (sb_build): Fix off-by-one error in assertion about `size'.
1377
89cdfe57
BE
13782006-05-01 Ben Elliston <bje@au.ibm.com>
1379
1380 * listing.c (listing_listing): Remove useless loop.
1381 * macro.c (macro_expand): Remove is_positional local variable.
1382 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
1383 and simplify surrounding expressions, where possible.
1384 (assign_symbol): Likewise.
1385 (s_weakref): Likewise.
1386 * symbols.c (colon): Likewise.
1387
c35da140
AM
13882006-05-01 James Lemke <jwlemke@wasabisystems.com>
1389
1390 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
1391
9bcd4f99
TS
13922006-04-30 Thiemo Seufer <ths@mips.com>
1393 David Ung <davidu@mips.com>
1394
1395 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
1396 (mips_immed): New table that records various handling of udi
1397 instruction patterns.
1398 (mips_ip): Adds udi handling.
1399
001ae1a4
AM
14002006-04-28 Alan Modra <amodra@bigpond.net.au>
1401
1402 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
1403 of list rather than beginning.
1404
136da414
JB
14052006-04-26 Julian Brown <julian@codesourcery.com>
1406
1407 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
1408 (is_quarter_float): Rename from above. Simplify slightly.
1409 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
1410 number.
1411 (parse_neon_mov): Parse floating-point constants.
1412 (neon_qfloat_bits): Fix encoding.
1413 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
1414 preference to integer encoding when using the F32 type.
1415
dcbf9037
JB
14162006-04-26 Julian Brown <julian@codesourcery.com>
1417
1418 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
1419 zero-initialising structures containing it will lead to invalid types).
1420 (arm_it): Add vectype to each operand.
1421 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
1422 defined field.
1423 (neon_typed_alias): New structure. Extra information for typed
1424 register aliases.
1425 (reg_entry): Add neon type info field.
1426 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
1427 Break out alternative syntax for coprocessor registers, etc. into...
1428 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
1429 out from arm_reg_parse.
1430 (parse_neon_type): Move. Return SUCCESS/FAIL.
1431 (first_error): New function. Call to ensure first error which occurs is
1432 reported.
1433 (parse_neon_operand_type): Parse exactly one type.
1434 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
1435 (parse_typed_reg_or_scalar): New function. Handle core of both
1436 arm_typed_reg_parse and parse_scalar.
1437 (arm_typed_reg_parse): Parse a register with an optional type.
1438 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
1439 result.
1440 (parse_scalar): Parse a Neon scalar with optional type.
1441 (parse_reg_list): Use first_error.
1442 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
1443 (neon_alias_types_same): New function. Return true if two (alias) types
1444 are the same.
1445 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
1446 of elements.
1447 (insert_reg_alias): Return new reg_entry not void.
1448 (insert_neon_reg_alias): New function. Insert type/index information as
1449 well as register for alias.
1450 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
1451 make typed register aliases accordingly.
1452 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
1453 of line.
1454 (s_unreq): Delete type information if present.
1455 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
1456 (s_arm_unwind_save_mmxwcg): Likewise.
1457 (s_arm_unwind_movsp): Likewise.
1458 (s_arm_unwind_setfp): Likewise.
1459 (parse_shift): Likewise.
1460 (parse_shifter_operand): Likewise.
1461 (parse_address): Likewise.
1462 (parse_tb): Likewise.
1463 (tc_arm_regname_to_dw2regnum): Likewise.
1464 (md_pseudo_table): Add dn, qn.
1465 (parse_neon_mov): Handle typed operands.
1466 (parse_operands): Likewise.
1467 (neon_type_mask): Add N_SIZ.
1468 (N_ALLMODS): New macro.
1469 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
1470 (el_type_of_type_chk): Add some safeguards.
1471 (modify_types_allowed): Fix logic bug.
1472 (neon_check_type): Handle operands with types.
1473 (neon_three_same): Remove redundant optional arg handling.
1474 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
1475 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
1476 (do_neon_step): Adjust accordingly.
1477 (neon_cmode_for_logic_imm): Use first_error.
1478 (do_neon_bitfield): Call neon_check_type.
1479 (neon_dyadic): Rename to...
1480 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
1481 to allow modification of type of the destination.
1482 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1483 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
1484 (do_neon_compare): Make destination be an untyped bitfield.
1485 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
1486 (neon_mul_mac): Return early in case of errors.
1487 (neon_move_immediate): Use first_error.
1488 (neon_mac_reg_scalar_long): Fix type to include scalar.
1489 (do_neon_dup): Likewise.
1490 (do_neon_mov): Likewise (in several places).
1491 (do_neon_tbl_tbx): Fix type.
1492 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
1493 (do_neon_ld_dup): Exit early in case of errors and/or use
1494 first_error.
1495 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
1496 Handle .dn/.qn directives.
1497 (REGDEF): Add zero for reg_entry neon field.
1498
5287ad62
JB
14992006-04-26 Julian Brown <julian@codesourcery.com>
1500
1501 * config/tc-arm.c (limits.h): Include.
1502 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
1503 (fpu_vfp_v3_or_neon_ext): Declare constants.
1504 (neon_el_type): New enumeration of types for Neon vector elements.
1505 (neon_type_el): New struct. Define type and size of a vector element.
1506 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
1507 instruction.
1508 (neon_type): Define struct. The type of an instruction.
1509 (arm_it): Add 'vectype' for the current instruction.
1510 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
1511 (vfp_sp_reg_pos): Rename to...
1512 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
1513 tags.
1514 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
1515 (Neon D or Q register).
1516 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
1517 register.
1518 (GE_OPT_PREFIX_BIG): Define constant, for use in...
1519 (my_get_expression): Allow above constant as argument to accept
1520 64-bit constants with optional prefix.
1521 (arm_reg_parse): Add extra argument to return the specific type of
1522 register in when either a D or Q register (REG_TYPE_NDQ) is
1523 requested. Can be NULL.
1524 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
1525 (parse_reg_list): Update for new arm_reg_parse args.
1526 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
1527 (parse_neon_el_struct_list): New function. Parse element/structure
1528 register lists for VLD<n>/VST<n> instructions.
1529 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
1530 (s_arm_unwind_save_mmxwr): Likewise.
1531 (s_arm_unwind_save_mmxwcg): Likewise.
1532 (s_arm_unwind_movsp): Likewise.
1533 (s_arm_unwind_setfp): Likewise.
1534 (parse_big_immediate): New function. Parse an immediate, which may be
1535 64 bits wide. Put results in inst.operands[i].
1536 (parse_shift): Update for new arm_reg_parse args.
1537 (parse_address): Likewise. Add parsing of alignment specifiers.
1538 (parse_neon_mov): Parse the operands of a VMOV instruction.
1539 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
1540 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
1541 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
1542 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
1543 (parse_operands): Handle new codes above.
1544 (encode_arm_vfp_sp_reg): Rename to...
1545 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
1546 selected VFP version only supports D0-D15.
1547 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
1548 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
1549 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
1550 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
1551 encode_arm_vfp_reg name, and allow 32 D regs.
1552 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
1553 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
1554 regs.
1555 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
1556 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
1557 constant-load and conversion insns introduced with VFPv3.
1558 (neon_tab_entry): New struct.
1559 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
1560 those which are the targets of pseudo-instructions.
1561 (neon_opc): Enumerate opcodes, use as indices into...
1562 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
1563 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
1564 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
1565 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
1566 neon_enc_tab.
1567 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
1568 Neon instructions.
1569 (neon_type_mask): New. Compact type representation for type checking.
1570 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
1571 permitted type combinations.
1572 (N_IGNORE_TYPE): New macro.
1573 (neon_check_shape): New function. Check an instruction shape for
1574 multiple alternatives. Return the specific shape for the current
1575 instruction.
1576 (neon_modify_type_size): New function. Modify a vector type and size,
1577 depending on the bit mask in argument 1.
1578 (neon_type_promote): New function. Convert a given "key" type (of an
1579 operand) into the correct type for a different operand, based on a bit
1580 mask.
1581 (type_chk_of_el_type): New function. Convert a type and size into the
1582 compact representation used for type checking.
1583 (el_type_of_type_ckh): New function. Reverse of above (only when a
1584 single bit is set in the bit mask).
1585 (modify_types_allowed): New function. Alter a mask of allowed types
1586 based on a bit mask of modifications.
1587 (neon_check_type): New function. Check the type of the current
1588 instruction against the variable argument list. The "key" type of the
1589 instruction is returned.
1590 (neon_dp_fixup): New function. Fill in and modify instruction bits for
1591 a Neon data-processing instruction depending on whether we're in ARM
1592 mode or Thumb-2 mode.
1593 (neon_logbits): New function.
1594 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
1595 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
1596 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
1597 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
1598 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
1599 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
1600 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1601 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
1602 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
1603 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
1604 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
1605 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
1606 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
1607 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
1608 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
1609 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
1610 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
1611 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
1612 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
1613 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
1614 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
1615 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
1616 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
1617 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
1618 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
1619 helpers.
1620 (parse_neon_type): New function. Parse Neon type specifier.
1621 (opcode_lookup): Allow parsing of Neon type specifiers.
1622 (REGNUM2, REGSETH, REGSET2): New macros.
1623 (reg_names): Add new VFPv3 and Neon registers.
1624 (NUF, nUF, NCE, nCE): New macros for opcode table.
1625 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
1626 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
1627 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
1628 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
1629 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
1630 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
1631 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
1632 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
1633 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
1634 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
1635 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
1636 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
1637 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
1638 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
1639 fto[us][lh][sd].
1640 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
1641 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
1642 (arm_option_cpu_value): Add vfp3 and neon.
1643 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
1644 VFPv1 attribute.
1645
1946c96e
BW
16462006-04-25 Bob Wilson <bob.wilson@acm.org>
1647
1648 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
1649 syntax instead of hardcoded opcodes with ".w18" suffixes.
1650 (wide_branch_opcode): New.
1651 (build_transition): Use it to check for wide branch opcodes with
1652 either ".w18" or ".w15" suffixes.
1653
5033a645
BW
16542006-04-25 Bob Wilson <bob.wilson@acm.org>
1655
1656 * config/tc-xtensa.c (xtensa_create_literal_symbol,
1657 xg_assemble_literal, xg_assemble_literal_space): Do not set the
1658 frag's is_literal flag.
1659
395fa56f
BW
16602006-04-25 Bob Wilson <bob.wilson@acm.org>
1661
1662 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
1663
708587a4
KH
16642006-04-23 Kazu Hirata <kazu@codesourcery.com>
1665
1666 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
1667 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
1668 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
1669 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
1670 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
1671
8463be01
PB
16722005-04-20 Paul Brook <paul@codesourcery.com>
1673
1674 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
1675 all targets.
1676 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
1677
f26a5955
AM
16782006-04-19 Alan Modra <amodra@bigpond.net.au>
1679
1680 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
1681 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
1682 Make some cpus unsupported on ELF. Run "make dep-am".
1683 * Makefile.in: Regenerate.
1684
241a6c40
AM
16852006-04-19 Alan Modra <amodra@bigpond.net.au>
1686
1687 * configure.in (--enable-targets): Indent help message.
1688 * configure: Regenerate.
1689
bb8f5920
L
16902006-04-18 H.J. Lu <hongjiu.lu@intel.com>
1691
1692 PR gas/2533
1693 * config/tc-i386.c (i386_immediate): Check illegal immediate
1694 register operand.
1695
23d9d9de
AM
16962006-04-18 Alan Modra <amodra@bigpond.net.au>
1697
64e74474
AM
1698 * config/tc-i386.c: Formatting.
1699 (output_disp, output_imm): ISO C90 params.
1700
6cbe03fb
AM
1701 * frags.c (frag_offset_fixed_p): Constify args.
1702 * frags.h (frag_offset_fixed_p): Ditto.
1703
23d9d9de
AM
1704 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
1705 (COFF_MAGIC): Delete.
a37d486e
AM
1706
1707 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
1708
e7403566
DJ
17092006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
1710
1711 * po/POTFILES.in: Regenerated.
1712
58ab4f3d
MM
17132006-04-16 Mark Mitchell <mark@codesourcery.com>
1714
1715 * doc/as.texinfo: Mention that some .type syntaxes are not
1716 supported on all architectures.
1717
482fd9f9
BW
17182006-04-14 Sterling Augustine <sterling@tensilica.com>
1719
1720 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
1721 instructions when such transformations have been disabled.
1722
05d58145
BW
17232006-04-10 Sterling Augustine <sterling@tensilica.com>
1724
1725 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
1726 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
1727 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
1728 decoding the loop instructions. Remove current_offset variable.
1729 (xtensa_fix_short_loop_frags): Likewise.
1730 (min_bytes_to_other_loop_end): Remove current_offset argument.
1731
9e75b3fa
AM
17322006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl>
1733
a37d486e 1734 * config/tc-z80.c (z80_optimize_expr): Removed.
9e75b3fa
AM
1735 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
1736
d727e8c2
NC
17372006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
1738
1739 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
1740 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
1741 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
1742 atmega644, atmega329, atmega3290, atmega649, atmega6490,
1743 atmega406, atmega640, atmega1280, atmega1281, at90can32,
1744 at90can64, at90usb646, at90usb647, at90usb1286 and
1745 at90usb1287.
1746 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
1747
d252fdde
PB
17482006-04-07 Paul Brook <paul@codesourcery.com>
1749
1750 * config/tc-arm.c (parse_operands): Set default error message.
1751
ab1eb5fe
PB
17522006-04-07 Paul Brook <paul@codesourcery.com>
1753
1754 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
1755
7ae2971b
PB
17562006-04-07 Paul Brook <paul@codesourcery.com>
1757
1758 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
1759
53365c0d
PB
17602006-04-07 Paul Brook <paul@codesourcery.com>
1761
1762 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
1763 (move_or_literal_pool): Handle Thumb-2 instructions.
1764 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
1765
45aa61fe
AM
17662006-04-07 Alan Modra <amodra@bigpond.net.au>
1767
1768 PR 2512.
1769 * config/tc-i386.c (match_template): Move 64-bit operand tests
1770 inside loop.
1771
108a6f8e
CD
17722006-04-06 Carlos O'Donell <carlos@codesourcery.com>
1773
1774 * po/Make-in: Add install-html target.
1775 * Makefile.am: Add install-html and install-html-recursive targets.
1776 * Makefile.in: Regenerate.
1777 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
1778 * configure: Regenerate.
1779 * doc/Makefile.am: Add install-html and install-html-am targets.
1780 * doc/Makefile.in: Regenerate.
1781
ec651a3b
AM
17822006-04-06 Alan Modra <amodra@bigpond.net.au>
1783
1784 * frags.c (frag_offset_fixed_p): Reinitialise offset before
1785 second scan.
1786
910600e9
RS
17872006-04-05 Richard Sandiford <richard@codesourcery.com>
1788 Daniel Jacobowitz <dan@codesourcery.com>
1789
1790 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
1791 (GOTT_BASE, GOTT_INDEX): New.
1792 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
1793 GOTT_INDEX when generating VxWorks PIC.
1794 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
1795 use the generic *-*-vxworks* stanza instead.
1796
99630778
AM
17972006-04-04 Alan Modra <amodra@bigpond.net.au>
1798
1799 PR 997
1800 * frags.c (frag_offset_fixed_p): New function.
1801 * frags.h (frag_offset_fixed_p): Declare.
1802 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
1803 (resolve_expression): Likewise.
1804
a02728c8
BW
18052006-04-03 Sterling Augustine <sterling@tensilica.com>
1806
1807 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
1808 of the same length but different numbers of slots.
1809
9dfde49d
AS
18102006-03-30 Andreas Schwab <schwab@suse.de>
1811
1812 * configure.in: Fix help string for --enable-targets option.
1813 * configure: Regenerate.
1814
2da12c60
NS
18152006-03-28 Nathan Sidwell <nathan@codesourcery.com>
1816
6d89cc8f
NS
1817 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
1818 (m68k_ip): ... here. Use for all chips. Protect against buffer
1819 overrun and avoid excessive copying.
1820
2da12c60
NS
1821 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
1822 m68020_control_regs, m68040_control_regs, m68060_control_regs,
1823 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
1824 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
1825 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
1826 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
a70ae331 1827 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
2da12c60
NS
1828 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
1829 mcf5282_ctrl, mcfv4e_ctrl): ... these.
1830 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
1831 (struct m68k_cpu): Change chip field to control_regs.
1832 (current_chip): Remove.
1833 (control_regs): New.
1834 (m68k_archs, m68k_extensions): Adjust.
1835 (m68k_cpus): Reorder to be in cpu number order. Adjust.
1836 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
1837 (find_cf_chip): Reimplement for new organization of cpu table.
1838 (select_control_regs): Remove.
1839 (mri_chip): Adjust.
1840 (struct save_opts): Save control regs, not chip.
1841 (s_save, s_restore): Adjust.
1842 (m68k_lookup_cpu): Give deprecated warning when necessary.
1843 (m68k_init_arch): Adjust.
1844 (md_show_usage): Adjust for new cpu table organization.
1845
1ac4baed
BS
18462006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
1847
1848 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
1849 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
1850 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
1851 "elf/bfin.h".
1852 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
1853 (any_gotrel): New rule.
1854 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
1855 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
1856 "elf/bfin.h".
1857 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
1858 (bfin_pic_ptr): New function.
1859 (md_pseudo_table): Add it for ".picptr".
1860 (OPTION_FDPIC): New macro.
1861 (md_longopts): Add -mfdpic.
1862 (md_parse_option): Handle it.
1863 (md_begin): Set BFD flags.
1864 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
1865 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
1866 us for GOT relocs.
1867 * Makefile.am (bfin-parse.o): Update dependencies.
1868 (DEPTC_bfin_elf): Likewise.
1869 * Makefile.in: Regenerate.
1870
a9d34880
RS
18712006-03-25 Richard Sandiford <richard@codesourcery.com>
1872
1873 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
1874 mcfemac instead of mcfmac.
1875
9ca26584
AJ
18762006-03-23 Michael Matz <matz@suse.de>
1877
1878 * config/tc-i386.c (type_names): Correct placement of 'static'.
1879 (reloc): Map some more relocs to their 64 bit counterpart when
1880 size is 8.
1881 (output_insn): Work around breakage if DEBUG386 is defined.
1882 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
1883 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
1884 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
1885 different from i386.
1886 (output_imm): Ditto.
1887 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
1888 Imm64.
1889 (md_convert_frag): Jumps can now be larger than 2GB away, error
1890 out in that case.
1891 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
1892 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
1893
0a44bf69
RS
18942006-03-22 Richard Sandiford <richard@codesourcery.com>
1895 Daniel Jacobowitz <dan@codesourcery.com>
1896 Phil Edwards <phil@codesourcery.com>
1897 Zack Weinberg <zack@codesourcery.com>
1898 Mark Mitchell <mark@codesourcery.com>
1899 Nathan Sidwell <nathan@codesourcery.com>
1900
1901 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
1902 (md_begin): Complain about -G being used for PIC. Don't change
1903 the text, data and bss alignments on VxWorks.
1904 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
1905 generating VxWorks PIC.
1906 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
1907 (macro): Likewise, but do not treat la $25 specially for
1908 VxWorks PIC, and do not handle jal.
1909 (OPTION_MVXWORKS_PIC): New macro.
1910 (md_longopts): Add -mvxworks-pic.
1911 (md_parse_option): Don't complain about using PIC and -G together here.
1912 Handle OPTION_MVXWORKS_PIC.
1913 (md_estimate_size_before_relax): Always use the first relaxation
1914 sequence on VxWorks.
1915 * config/tc-mips.h (VXWORKS_PIC): New.
1916
080eb7fe
PB
19172006-03-21 Paul Brook <paul@codesourcery.com>
1918
1919 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
1920
03aaa593
BW
19212006-03-21 Sterling Augustine <sterling@tensilica.com>
1922
1923 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
1924 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
1925 (get_loop_align_size): New.
1926 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
1927 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
1928 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
1929 (get_noop_aligned_address): Use get_loop_align_size.
1930 (get_aligned_diff): Likewise.
1931
3e94bf1a
PB
19322006-03-21 Paul Brook <paul@codesourcery.com>
1933
1934 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
1935
dfa9f0d5
PB
19362006-03-20 Paul Brook <paul@codesourcery.com>
1937
1938 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
1939 (do_t_branch): Encode branches inside IT blocks as unconditional.
1940 (do_t_cps): New function.
1941 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
1942 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
1943 (opcode_lookup): Allow conditional suffixes on all instructions in
1944 Thumb mode.
1945 (md_assemble): Advance condexec state before checking for errors.
1946 (insns): Use do_t_cps.
1947
6e1cb1a6
PB
19482006-03-20 Paul Brook <paul@codesourcery.com>
1949
1950 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
1951 outputting the insn.
1952
0a966e2d
JBG
19532006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1954
1955 * config/tc-vax.c: Update copyright year.
1956 * config/tc-vax.h: Likewise.
1957
a49fcc17
JBG
19582006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1959
1960 * config/tc-vax.c (md_chars_to_number): Used only locally, so
1961 make it static.
1962 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
1963
f5208ef2
PB
19642006-03-17 Paul Brook <paul@codesourcery.com>
1965
1966 * config/tc-arm.c (insns): Add ldm and stm.
1967
cb4c78d6
BE
19682006-03-17 Ben Elliston <bje@au.ibm.com>
1969
1970 PR gas/2446
1971 * doc/as.texinfo (Ident): Document this directive more thoroughly.
1972
c16d2bf0
PB
19732006-03-16 Paul Brook <paul@codesourcery.com>
1974
1975 * config/tc-arm.c (insns): Add "svc".
1976
80ca4e2c
BW
19772006-03-13 Bob Wilson <bob.wilson@acm.org>
1978
1979 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
1980 flag and avoid double underscore prefixes.
1981
3a4a14e9
PB
19822006-03-10 Paul Brook <paul@codesourcery.com>
1983
1984 * config/tc-arm.c (md_begin): Handle EABIv5.
1985 (arm_eabis): Add EF_ARM_EABI_VER5.
1986 * doc/c-arm.texi: Document -meabi=5.
1987
518051dc
BE
19882006-03-10 Ben Elliston <bje@au.ibm.com>
1989
1990 * app.c (do_scrub_chars): Simplify string handling.
1991
00a97672
RS
19922006-03-07 Richard Sandiford <richard@codesourcery.com>
1993 Daniel Jacobowitz <dan@codesourcery.com>
1994 Zack Weinberg <zack@codesourcery.com>
1995 Nathan Sidwell <nathan@codesourcery.com>
1996 Paul Brook <paul@codesourcery.com>
1997 Ricardo Anguiano <anguiano@codesourcery.com>
1998 Phil Edwards <phil@codesourcery.com>
1999
2000 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
2001 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
2002 R_ARM_ABS12 reloc.
2003 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
2004 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
2005 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
2006
b29757dc
BW
20072006-03-06 Bob Wilson <bob.wilson@acm.org>
2008
2009 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
2010 even when using the text-section-literals option.
2011
0b2e31dc
NS
20122006-03-06 Nathan Sidwell <nathan@codesourcery.com>
2013
2014 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
2015 and cf.
2016 (m68k_ip): <case 'J'> Check we have some control regs.
2017 (md_parse_option): Allow raw arch switch.
2018 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
2019 whether 68881 or cfloat was meant by -mfloat.
2020 (md_show_usage): Adjust extension display.
2021 (m68k_elf_final_processing): Adjust.
2022
df406460
NC
20232006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
2024
2025 * config/tc-avr.c (avr_mod_hash_value): New function.
2026 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
a70ae331 2027 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
df406460
NC
2028 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
2029 instead of int avr_ldi_expression: use avr_mod_hash_value instead
2030 of (int).
2031 (tc_gen_reloc): Handle substractions of symbols, if possible do
a70ae331 2032 fixups, abort otherwise.
df406460
NC
2033 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
2034 tc_fix_adjustable): Define.
a70ae331 2035
53022e4a
JW
20362006-03-02 James E Wilson <wilson@specifix.com>
2037
2038 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
2039 change the template, then clear md.slot[curr].end_of_insn_group.
2040
9f6f925e
JB
20412006-02-28 Jan Beulich <jbeulich@novell.com>
2042
2043 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
2044
0e31b3e1
JB
20452006-02-28 Jan Beulich <jbeulich@novell.com>
2046
2047 PR/1070
2048 * macro.c (getstring): Don't treat parentheses special anymore.
2049 (get_any_string): Don't consider '(' and ')' as quoting anymore.
2050 Special-case '(', ')', '[', and ']' when dealing with non-quoting
2051 characters.
2052
10cd14b4
AM
20532006-02-28 Mat <mat@csail.mit.edu>
2054
2055 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
2056
63752a75
JJ
20572006-02-27 Jakub Jelinek <jakub@redhat.com>
2058
2059 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
2060 field.
2061 (CFI_signal_frame): Define.
2062 (cfi_pseudo_table): Add .cfi_signal_frame.
2063 (dot_cfi): Handle CFI_signal_frame.
2064 (output_cie): Handle cie->signal_frame.
2065 (select_cie_for_fde): Don't share CIE if signal_frame flag is
2066 different. Copy signal_frame from FDE to newly created CIE.
2067 * doc/as.texinfo: Document .cfi_signal_frame.
2068
f7d9e5c3
CD
20692006-02-27 Carlos O'Donell <carlos@codesourcery.com>
2070
2071 * doc/Makefile.am: Add html target.
2072 * doc/Makefile.in: Regenerate.
2073 * po/Make-in: Add html target.
2074
331d2d0d
L
20752006-02-27 H.J. Lu <hongjiu.lu@intel.com>
2076
8502d882 2077 * config/tc-i386.c (output_insn): Support Intel Merom New
331d2d0d
L
2078 Instructions.
2079
8502d882 2080 * config/tc-i386.h (CpuMNI): New.
331d2d0d
L
2081 (CpuUnknownFlags): Add CpuMNI.
2082
10156f83
DM
20832006-02-24 David S. Miller <davem@sunset.davemloft.net>
2084
2085 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
2086 (hpriv_reg_table): New table for hyperprivileged registers.
2087 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
2088 register encoding.
2089
6772dd07
DD
20902006-02-24 DJ Delorie <dj@redhat.com>
2091
2092 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
2093 (tc_gen_reloc): Don't define.
2094 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
2095 (OPTION_LINKRELAX): New.
2096 (md_longopts): Add it.
2097 (m32c_relax): New.
2098 (md_parse_options): Set it.
2099 (md_assemble): Emit relaxation relocs as needed.
2100 (md_convert_frag): Emit relaxation relocs as needed.
2101 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
2102 (m32c_apply_fix): New.
2103 (tc_gen_reloc): New.
2104 (m32c_force_relocation): Force out jump relocs when relaxing.
2105 (m32c_fix_adjustable): Return false if relaxing.
2106
62b3e311
PB
21072006-02-24 Paul Brook <paul@codesourcery.com>
2108
2109 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
2110 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
2111 (struct asm_barrier_opt): Define.
2112 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
2113 (parse_psr): Accept V7M psr names.
2114 (parse_barrier): New function.
2115 (enum operand_parse_code): Add OP_oBARRIER.
2116 (parse_operands): Implement OP_oBARRIER.
2117 (do_barrier): New function.
2118 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
2119 (do_t_cpsi): Add V7M restrictions.
2120 (do_t_mrs, do_t_msr): Validate V7M variants.
2121 (md_assemble): Check for NULL variants.
2122 (v7m_psrs, barrier_opt_names): New tables.
2123 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
2124 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
2125 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
2126 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
2127 (struct cpu_arch_ver_table): Define.
2128 (cpu_arch_ver): New.
2129 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
2130 Tag_CPU_arch_profile.
2131 * doc/c-arm.texi: Document new cpu and arch options.
2132
59cf82fe
L
21332006-02-23 H.J. Lu <hongjiu.lu@intel.com>
2134
2135 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
2136
19a7219f
L
21372006-02-23 H.J. Lu <hongjiu.lu@intel.com>
2138
2139 * config/tc-ia64.c: Update copyright years.
2140
7f3dfb9c
L
21412006-02-22 H.J. Lu <hongjiu.lu@intel.com>
2142
2143 * config/tc-ia64.c (specify_resource): Add the rule 17 from
2144 SDM 2.2.
2145
f40d1643
PB
21462005-02-22 Paul Brook <paul@codesourcery.com>
2147
2148 * config/tc-arm.c (do_pld): Remove incorrect write to
2149 inst.instruction.
2150 (encode_thumb32_addr_mode): Use correct operand.
2151
216d22bc
PB
21522006-02-21 Paul Brook <paul@codesourcery.com>
2153
2154 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
2155
d70c5fc7
NC
21562006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
2157 Anil Paranjape <anilp1@kpitcummins.com>
2158 Shilin Shakti <shilins@kpitcummins.com>
2159
2160 * Makefile.am: Add xc16x related entry.
2161 * Makefile.in: Regenerate.
2162 * configure.in: Added xc16x related entry.
2163 * configure: Regenerate.
2164 * config/tc-xc16x.h: New file
2165 * config/tc-xc16x.c: New file
2166 * doc/c-xc16x.texi: New file for xc16x
2167 * doc/all.texi: Entry for xc16x
a70ae331 2168 * doc/Makefile.texi: Added c-xc16x.texi
d70c5fc7
NC
2169 * NEWS: Announce the support for the new target.
2170
aaa2ab3d
NH
21712006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
2172
2173 * configure.tgt: set emulation for mips-*-netbsd*
2174
82de001f
JJ
21752006-02-14 Jakub Jelinek <jakub@redhat.com>
2176
2177 * config.in: Rebuilt.
2178
431ad2d0
BW
21792006-02-13 Bob Wilson <bob.wilson@acm.org>
2180
2181 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
2182 from 1, not 0, in error messages.
2183 (md_assemble): Simplify special-case check for ENTRY instructions.
2184 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
2185 operand in error message.
2186
94089a50
JM
21872006-02-13 Joseph S. Myers <joseph@codesourcery.com>
2188
2189 * configure.tgt (arm-*-linux-gnueabi*): Change to
2190 arm-*-linux-*eabi*.
2191
52de4c06
NC
21922006-02-10 Nick Clifton <nickc@redhat.com>
2193
70e45ad9
NC
2194 * config/tc-crx.c (check_range): Ensure that the sign bit of a
2195 32-bit value is propagated into the upper bits of a 64-bit long.
2196
52de4c06
NC
2197 * config/tc-arc.c (init_opcode_tables): Fix cast.
2198 (arc_extoper, md_operand): Likewise.
2199
21af2bbd
BW
22002006-02-09 David Heine <dlheine@tensilica.com>
2201
2202 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
2203 each relaxation step.
2204
75a706fc 22052006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
a70ae331 2206
75a706fc
L
2207 * configure.in (CHECK_DECLS): Add vsnprintf.
2208 * configure: Regenerate.
2209 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
2210 include/declare here, but...
2211 * as.h: Move code detecting VARARGS idiom to the top.
2212 (errno.h, stdarg.h, varargs.h, va_list): ...here.
2213 (vsnprintf): Declare if not already declared.
2214
0d474464
L
22152006-02-08 H.J. Lu <hongjiu.lu@intel.com>
2216
2217 * as.c (close_output_file): New.
2218 (main): Register close_output_file with xatexit before
2219 dump_statistics. Don't call output_file_close.
2220
266abb8f
NS
22212006-02-07 Nathan Sidwell <nathan@codesourcery.com>
2222
2223 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
2224 mcf5329_control_regs): New.
2225 (not_current_architecture, selected_arch, selected_cpu): New.
2226 (m68k_archs, m68k_extensions): New.
2227 (archs): Renamed to ...
2228 (m68k_cpus): ... here. Adjust.
2229 (n_arches): Remove.
2230 (md_pseudo_table): Add arch and cpu directives.
2231 (find_cf_chip, m68k_ip): Adjust table scanning.
2232 (no_68851, no_68881): Remove.
2233 (md_assemble): Lazily initialize.
2234 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
2235 (md_init_after_args): Move functionality to m68k_init_arch.
2236 (mri_chip): Adjust table scanning.
2237 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
2238 options with saner parsing.
2239 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
2240 m68k_init_arch): New.
2241 (s_m68k_cpu, s_m68k_arch): New.
2242 (md_show_usage): Adjust.
2243 (m68k_elf_final_processing): Set CF EF flags.
2244 * config/tc-m68k.h (m68k_init_after_args): Remove.
2245 (tc_init_after_args): Remove.
2246 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
2247 (M68k-Directives): Document .arch and .cpu directives.
2248
134dcee5
AM
22492006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
2250
a70ae331
AM
2251 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
2252 synonyms for equ and defl.
134dcee5
AM
2253 (z80_cons_fix_new): New function.
2254 (emit_byte): Disallow relative jumps to absolute locations.
a70ae331 2255 (emit_data): Only handle defb, prototype changed, because defb is
134dcee5
AM
2256 now handled as pseudo-op rather than an instruction.
2257 (instab): Entries for defb,defw,db,dw moved from here...
a70ae331 2258 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
134dcee5
AM
2259 Add entries for def24,def32,d24,d32.
2260 (md_assemble): Improved error handling.
2261 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
2262 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
2263 (z80_cons_fix_new): Declare.
a70ae331 2264 * doc/c-z80.texi (defb, db): Mention warning on overflow.
134dcee5 2265 (def24,d24,def32,d32): New pseudo-ops.
a70ae331 2266
a9931606
PB
22672006-02-02 Paul Brook <paul@codesourcery.com>
2268
2269 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
2270
ef8d22e6
PB
22712005-02-02 Paul Brook <paul@codesourcery.com>
2272
2273 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
2274 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
2275 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
2276 T2_OPCODE_RSB): Define.
2277 (thumb32_negate_data_op): New function.
2278 (md_apply_fix): Use it.
2279
e7da6241
BW
22802006-01-31 Bob Wilson <bob.wilson@acm.org>
2281
2282 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
2283 fields.
2284 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
2285 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
2286 subtracted symbols.
2287 (relaxation_requirements): Add pfinish_frag argument and use it to
2288 replace setting tinsn->record_fix fields.
2289 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
2290 and vinsn_to_insnbuf. Remove references to record_fix and
2291 slot_sub_symbols fields.
2292 (xtensa_mark_narrow_branches): Delete unused code.
2293 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
2294 a symbol.
2295 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
2296 record_fix fields.
2297 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
2298 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
2299 of the record_fix field. Simplify error messages for unexpected
2300 symbolic operands.
2301 (set_expr_symbol_offset_diff): Delete.
2302
79134647
PB
23032006-01-31 Paul Brook <paul@codesourcery.com>
2304
2305 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
2306
e74cfd16
PB
23072006-01-31 Paul Brook <paul@codesourcery.com>
2308 Richard Earnshaw <rearnsha@arm.com>
2309
2310 * config/tc-arm.c: Use arm_feature_set.
2311 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
2312 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
2313 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
2314 New variables.
2315 (insns): Use them.
2316 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
2317 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
2318 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
2319 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
2320 feature flags.
2321 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
2322 (arm_opts): Move old cpu/arch options from here...
2323 (arm_legacy_opts): ... to here.
2324 (md_parse_option): Search arm_legacy_opts.
2325 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
2326 (arm_float_abis, arm_eabis): Make const.
2327
d47d412e
BW
23282006-01-25 Bob Wilson <bob.wilson@acm.org>
2329
2330 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
2331
b14273fe
JZ
23322006-01-21 Jie Zhang <jie.zhang@analog.com>
2333
2334 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
2335 in load immediate intruction.
2336
39cd1c76
JZ
23372006-01-21 Jie Zhang <jie.zhang@analog.com>
2338
2339 * config/bfin-parse.y (value_match): Use correct conversion
2340 specifications in template string for __FILE__ and __LINE__.
2341 (binary): Ditto.
2342 (unary): Ditto.
2343
67a4f2b7
AO
23442006-01-18 Alexandre Oliva <aoliva@redhat.com>
2345
2346 Introduce TLS descriptors for i386 and x86_64.
2347 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
2348 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
2349 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
2350 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
2351 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
2352 displacement bits.
2353 (build_modrm_byte): Set up zero modrm for TLS desc calls.
2354 (lex_got): Handle @tlsdesc and @tlscall.
2355 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
2356
8ad7c533
NC
23572006-01-11 Nick Clifton <nickc@redhat.com>
2358
2359 Fixes for building on 64-bit hosts:
2360 * config/tc-avr.c (mod_index): New union to allow conversion
2361 between pointers and integers.
2362 (md_begin, avr_ldi_expression): Use it.
2363 * config/tc-i370.c (md_assemble): Add cast for argument to print
2364 statement.
2365 * config/tc-tic54x.c (subsym_substitute): Likewise.
2366 * config/tc-mn10200.c (md_assemble): Use a union to convert the
2367 opindex field of fr_cgen structure into a pointer so that it can
2368 be stored in a frag.
2369 * config/tc-mn10300.c (md_assemble): Likewise.
2370 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
2371 types.
2372 * config/tc-v850.c: Replace uses of (int) casts with correct
2373 types.
2374
4dcb3903
L
23752006-01-09 H.J. Lu <hongjiu.lu@intel.com>
2376
2377 PR gas/2117
2378 * symbols.c (snapshot_symbol): Don't change a defined symbol.
2379
e0f6ea40
HPN
23802006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
2381
2382 PR gas/2101
2383 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
2384 a local-label reference.
2385
e88d958a 2386For older changes see ChangeLog-2005
08d56133
NC
2387\f
2388Local Variables:
2389mode: change-log
2390left-margin: 8
2391fill-column: 74
2392version-control: never
2393End: