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05ac0ffb
JB		 12013-04-09 Jan Beulich <jbeulich@suse.com>
2
3 * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
4 if there was none specified for moves between scalar and core
5 register.
6
2d51fb74
JB		 72013-04-09 Jan Beulich <jbeulich@suse.com>
8
9 * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the
10 NEON_ALL_LANES case.
11
94dcf8bf
JB		 122013-04-08 Jan Beulich <jbeulich@suse.com>
13
14 * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for
15 PC-relative VSTR.
16
1472d06f
JB		 172013-04-08 Jan Beulich <jbeulich@suse.com>
18
19 * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq
20 entry to sp_fiq.
21
0c76cae8
AM		 222013-04-03 Alan Modra <amodra@gmail.com>
23
24 * doc/as.texinfo: Add support to generate man options for h8300.
25 * doc/c-h8300.texi: Likewise.
26
92eb40d9
RR		 272013-03-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
28
29 * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and
30 Cortex-A57.
31
51dcdd4d
NC		 322013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com>
33
34 PR binutils/15068
35 * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array.
36
c5d685bf
NC		 372013-03-26 Nick Clifton <nickc@redhat.com>
38
9b978282
NC		 39 PR gas/15295
40 * listing.c (rebuffer_line): Rewrite to avoid seeking back to the
41 start of the file each time.
42
c5d685bf
NC		 43 PR gas/15178
44 * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for
45 FreeBSD targets.
46
9699c833
TG		 472013-03-26 Douglas B Rupp <rupp@gnat.com>
48
49 * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment
50 after fixup.
51
4755303e
WN		 522013-03-21 Will Newton <will.newton@linaro.org>
53
54 * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all
55 pc-relative str instructions in Thumb mode.
56
81f5558e
NC		 572013-03-21 Michael Schewe <michael.schewe@gmx.net>
58
59 * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
60 @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
61 R_H8_DISP32A16.
62 * config/tc-h8300.h: Remove duplicated defines.
63
71863e73
NC		 642013-03-21 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
65
66 PR gas/15282
67 * tc-avr.c (mcu_has_3_byte_pc): New function.
68 (tc_cfi_frame_initial_instructions): Call it to find return
69 address size.
70
795b8e6b
NC		 712013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com>
72
73 PR gas/15095
74 * config/tc-tic6x.c (tic6x_try_encode): Handle
75 tic6x_coding_dreg_(msb|lsb) field coding types and use it to
76 encode register pair numbers when required.
77
ba86b375
WN		 782013-03-15 Will Newton <will.newton@linaro.org>
79
80 * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register
81 in vstr in Thumb mode for pre-ARMv7 cores.
82
9e6f3811
AS		 832013-03-14 Andreas Schwab <schwab@suse.de>
84
85 * doc/c-arc.texi (ARC Directives): Revert last change and use
86 @itemize instead of @table.
87 * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
88
b10bf8c5
NC		 892013-03-14 Nick Clifton <nickc@redhat.com>
90
91 PR gas/15273
92 * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a
93 NULL message, instead just check ARM_CPU_IS_ANY directly.
94
ba724cfc
NC		 952013-03-14 Nick Clifton <nickc@redhat.com>
96
97 PR gas/15212
9e6f3811 98 * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet
ba724cfc
NC		 99 for table format.
100 * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
101 to the @item directives.
102 (ARM-Neon-Alignment): Move to correct place in the document.
103 * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
104 formatting.
105 * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
106 @smallexample.
107
531a94fd
SL		 1082013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
109
110 * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'
111 case. Add default BAD_CASE to switch.
112
dad60f8e
SL		 1132013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
114
115 * config/tc-nios2.c (nios2_assemble_args_ds): New function.
116 (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
117
dd5181d5
KT		 1182013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
119
120 * config/tc-arm.c (crc_ext_armv8): New feature set.
121 (UNPRED_REG): New macro.
122 (do_crc32_1): New function.
123 (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
124 do_crc32ch, do_crc32cw): Likewise.
125 (TUEc): New macro.
126 (insns): Add entries for crc32 mnemonics.
127 (arm_extensions): Add entry for crc.
128
8e723a10
CLT		 1292013-03-08 Chung-Lin Tang <cltang@codesourcery.com>
130
131 * write.h (struct fix): Add fx_dot_frag field.
132 (dot_frag): Declare.
133 * write.c (dot_frag): New variable.
134 (fix_new_internal): Set fx_dot_frag field with dot_frag.
135 (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
136 * expr.c (expr): Save value of frag_now in dot_frag when setting
137 dot_value.
138 * read.c (emit_expr): Likewise. Delete comments.
139
be05d201
L		 1402013-03-07 H.J. Lu <hongjiu.lu@intel.com>
141
142 * config/tc-i386.c (flag_code_names): Removed.
143 (i386_index_check): Rewrote.
144
62b0d0d5
YZ		 1452013-03-05 Yufeng Zhang <yufeng.zhang@arm.com>
146
147 * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
148 add comment.
149 (aarch64_double_precision_fmovable): New function.
150 (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
151 function; handle hexadecimal representation of IEEE754 encoding.
152 (parse_operands): Update the call to parse_aarch64_imm_float.
153
165de32a
L		 1542013-02-28 H.J. Lu <hongjiu.lu@intel.com>
155
156 * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
157 (check_hle): Updated.
158 (md_assemble): Likewise.
159 (parse_insn): Likewise.
160
d5de92cf
L		 1612013-02-28 H.J. Lu <hongjiu.lu@intel.com>
162
163 * config/tc-i386.c (_i386_insn): Add rep_prefix.
9e6f3811 164 (md_assemble): Check if REP prefix is OK.
d5de92cf
L		 165 (parse_insn): Remove expecting_string_instruction. Set
166 i.rep_prefix.
167
e60bb1dd
YZ		 1682013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
169
170 * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
171
aeebdd9b
YZ		 1722013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
173
174 * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
175 for system registers.
176
4107ae22
DD		 1772013-02-27 DJ Delorie <dj@redhat.com>
178
179 * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
180 (rl78_op): Handle %code().
181 (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
182 (tc_gen_reloc): Likwise; convert to a computed reloc.
183 (md_apply_fix): Likewise.
184
151fa98f
NC		 1852013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
186
187 * config/rl78-parse.y: Fix encoding of DIVWU insn.
188
70a8bc5b 1892013-02-25 Terry Guo <terry.guo@arm.com>
190
191 * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
192 * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
193 list of accepted CPUs.
194
5c111e37
L		 1952013-02-19 H.J. Lu <hongjiu.lu@intel.com>
196
197 PR gas/15159
198 * config/tc-i386.c (cpu_arch): Add ".smap".
199
200 * doc/c-i386.texi: Document smap.
201
8a75745d
MR		 2022013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
203
204 * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
205 mips_assembling_insn appropriately.
206 (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
207
79850f26
MR		 2082013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
209
cf29fc61 210 * config/tc-mips.c (append_insn): Correct indentation, remove
79850f26
MR		 211 extraneous braces.
212
4c261dff
NC		 2132013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
214
5c111e37 215 * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
4c261dff 216
ea33f281
NC		 2172013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
218
219 * configure.tgt: Add nios2-*-rtems*.
220
a1ccaec9
YZ		 2212013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
222
223 * config/tc-aarch64.c (md_begin): Change to check if 'name' is
224 NULL.
225
0aa27725
RS		 2262013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
227
228 * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
229 (macro): Use it. Assert that trunc.w.s is not used for r5900.
230
da4339ed
NC		 2312013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com>
232
233 * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
234 core.
235
36591ba1 2362013-02-06 Sandra Loosemore <sandra@codesourcery.com>
5c111e37 237 Andrew Jenner <andrew@codesourcery.com>
36591ba1
SL		 238
239 Based on patches from Altera Corporation.
240
241 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
242 (TARGET_CPU_HFILES): Add config/tc-nios2.h.
243 * Makefile.in: Regenerated.
244 * configure.tgt: Add case for nios2*-linux*.
245 * config/obj-elf.c: Conditionally include elf/nios2.h.
246 * config/tc-nios2.c: New file.
247 * config/tc-nios2.h: New file.
248 * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
249 * doc/Makefile.in: Regenerated.
250 * doc/all.texi: Set NIOSII.
251 * doc/as.texinfo (Overview): Add Nios II options.
252 (Machine Dependencies): Include c-nios2.texi.
253 * doc/c-nios2.texi: New file.
254 * NEWS: Note Altera Nios II support.
255
94d4433a
AM		 2562013-02-06 Alan Modra <amodra@gmail.com>
257
258 PR gas/14255
259 * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
260 Don't skip fixups with fx_subsy non-NULL.
261 * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
262 with fx_subsy non-NULL.
263
ace9af6f
L		 2642013-02-04 H.J. Lu <hongjiu.lu@intel.com>
265
266 * doc/c-metag.texi: Add "@c man" markers.
267
89d67ed9
AM		 2682013-02-04 Alan Modra <amodra@gmail.com>
269
270 * write.c (fixup_segment): Return void. Delete seg_reloc_count
271 related code.
272 (TC_ADJUST_RELOC_COUNT): Delete.
273 * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
274
89072bd6
AM		 2752013-02-04 Alan Modra <amodra@gmail.com>
276
277 * po/POTFILES.in: Regenerate.
278
f9b2d544
NC		 2792013-01-30 Markos Chandras <markos.chandras@imgtec.com>
280
281 * config/tc-metag.c: Make SWAP instruction less permissive with
282 its operands.
283
392ca752
DD		 2842013-01-29 DJ Delorie <dj@redhat.com>
285
286 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
287 relocs in .word/.etc statements.
288
427d0db6
RM		 2892013-01-29 Roland McGrath <mcgrathr@google.com>
290
291 * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
292 immediate value for 8-bit offset" error so it shows line info.
293
4faf939a
JM		 2942013-01-24 Joseph Myers <joseph@codesourcery.com>
295
296 * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
297 for 64-bit output.
298
78c8d46c
NC		 2992013-01-24 Nick Clifton <nickc@redhat.com>
300
301 * config/tc-v850.c: Add support for e3v5 architecture.
302 * doc/c-v850.texi: Mention new support.
303
fb5b7503
NC		 3042013-01-23 Nick Clifton <nickc@redhat.com>
305
306 PR gas/15039
307 * config/tc-avr.c: Include dwarf2dbg.h.
308
8ce3d284
L		 3092013-01-18 H.J. Lu <hongjiu.lu@intel.com>
310
311 * config/tc-i386.c (reloc): Support size relocation only for ELF.
312 (tc_i386_fix_adjustable): Likewise.
313 (lex_got): Likewise.
314 (tc_gen_reloc): Likewise.
315
f5555712
YZ		 3162013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
317
318 * config/tc-aarch64.c (output_operand_error_record): Change to output
319 the out-of-range error message as value-expected message if there is
320 only one single value in the expected range.
321 (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
322 LSL #0 as a programmer-friendly feature.
323
8fd4256d
L		 3242013-01-16 H.J. Lu <hongjiu.lu@intel.com>
325
326 * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
327 (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
328 BFD_RELOC_64_SIZE relocations.
329 (lex_got): Support "symbol@SIZE" and don't create GOT symbol
330 for it.
331 (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
332 relocations against local symbols.
333
a5840dce
AM		 3342013-01-16 Alan Modra <amodra@gmail.com>
335
336 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
337 finding some sort of toc syntax error, and break to avoid
338 compiler uninit warning.
339
af89796a
L		 3402013-01-15 H.J. Lu <hongjiu.lu@intel.com>
341
342 PR gas/15019
343 * config/tc-i386.c (lex_got): Increment length by 1 if the
344 relocation token is removed.
345
dd42f060
NC		 3462013-01-15 Nick Clifton <nickc@redhat.com>
347
348 * config/tc-v850.c (md_assemble): Allow signed values for
349 V850E_IMMEDIATE.
350
464e3686
SK		 3512013-01-11 Sean Keys <skeys@ipdatasys.com>
352
353 * config/tc-xgate.c (md_begin): Fix mistake made when going from
af89796a 354 git to cvs.
464e3686 355
5817ffd1
PB		 3562013-01-10 Peter Bergner <bergner@vnet.ibm.com>
357
358 * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
359 * doc/c-ppc.texi (PowerPC-Opts): Likewise.
360 * config/tc-ppc.c (md_show_usage): Likewise.
361 (ppc_handle_align): Handle power8's group ending nop.
362
f4b1f6a9
SK		 3632013-01-10 Sean Keys <skeys@ipdatasys.com>
364
365 * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
af89796a 366 that the assember exits after the opcodes have been printed.
f4b1f6a9 367
34bca508
L		 3682013-01-10 H.J. Lu <hongjiu.lu@intel.com>
369
370 * app.c: Remove trailing white spaces.
371 * as.c: Likewise.
372 * as.h: Likewise.
373 * cond.c: Likewise.
374 * dw2gencfi.c: Likewise.
375 * dwarf2dbg.h: Likewise.
376 * ecoff.c: Likewise.
377 * input-file.c: Likewise.
378 * itbl-lex.h: Likewise.
379 * output-file.c: Likewise.
380 * read.c: Likewise.
381 * sb.c: Likewise.
382 * subsegs.c: Likewise.
383 * symbols.c: Likewise.
384 * write.c: Likewise.
385 * config/tc-i386.c: Likewise.
386 * doc/Makefile.am: Likewise.
387 * doc/Makefile.in: Likewise.
388 * doc/c-aarch64.texi: Likewise.
389 * doc/c-alpha.texi: Likewise.
390 * doc/c-arc.texi: Likewise.
391 * doc/c-arm.texi: Likewise.
392 * doc/c-avr.texi: Likewise.
393 * doc/c-bfin.texi: Likewise.
394 * doc/c-cr16.texi: Likewise.
395 * doc/c-d10v.texi: Likewise.
396 * doc/c-d30v.texi: Likewise.
397 * doc/c-h8300.texi: Likewise.
398 * doc/c-hppa.texi: Likewise.
399 * doc/c-i370.texi: Likewise.
400 * doc/c-i386.texi: Likewise.
401 * doc/c-i860.texi: Likewise.
402 * doc/c-m32c.texi: Likewise.
403 * doc/c-m32r.texi: Likewise.
404 * doc/c-m68hc11.texi: Likewise.
405 * doc/c-m68k.texi: Likewise.
406 * doc/c-microblaze.texi: Likewise.
407 * doc/c-mips.texi: Likewise.
408 * doc/c-msp430.texi: Likewise.
409 * doc/c-mt.texi: Likewise.
410 * doc/c-s390.texi: Likewise.
411 * doc/c-score.texi: Likewise.
412 * doc/c-sh.texi: Likewise.
413 * doc/c-sh64.texi: Likewise.
414 * doc/c-tic54x.texi: Likewise.
415 * doc/c-tic6x.texi: Likewise.
416 * doc/c-v850.texi: Likewise.
417 * doc/c-xc16x.texi: Likewise.
418 * doc/c-xgate.texi: Likewise.
419 * doc/c-xtensa.texi: Likewise.
420 * doc/c-z80.texi: Likewise.
421 * doc/internals.texi: Likewise.
422
4c665b71
RM		 4232013-01-10 Roland McGrath <mcgrathr@google.com>
424
425 * hash.c (hash_new_sized): Make it global.
426 * hash.h: Declare it.
427 * macro.c (define_macro): Use hash_new_sized instead of hash_new,
428 pass a small size.
429
a3c62988
NC		 4302013-01-10 Will Newton <will.newton@imgtec.com>
431
432 * Makefile.am: Add Meta.
433 * Makefile.in: Regenerate.
434 * config/tc-metag.c: New file.
435 * config/tc-metag.h: New file.
436 * configure.tgt: Add Meta.
437 * doc/Makefile.am: Add Meta.
438 * doc/Makefile.in: Regenerate.
439 * doc/all.texi: Add Meta.
440 * doc/as.texiinfo: Document Meta options.
441 * doc/c-metag.texi: New file.
442
b37df7c4
SE		 4432013-01-09 Steve Ellcey <sellcey@mips.com>
444
445 * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
446 calls.
447 * config/tc-mips.c (internalError): Remove, replace with abort.
448
a3251895
YZ		 4492013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
450
451 * config/tc-aarch64.c (parse_operands): Change to compare the result
452 of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
453
8ab8155f
NC		 4542013-01-07 Nick Clifton <nickc@redhat.com>
455
456 PR gas/14887
457 * config/tc-arm.c (skip_past_char): Skip whitespace before the
458 anticipated character.
459 * config/tc-arm.c (parse_address_main): Delete skip of whitespace
460 here as it is no longer needed.
461
a4ac1c42
AS		 4622013-01-06 Andreas Schwab <schwab@linux-m68k.org>
463
464 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
465 * doc/c-score.texi (SCORE-Opts): Likewise.
466 * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
467
e407c74b
NC		 4682013-01-04 Juergen Urban <JuergenUrban@gmx.de>
469
470 * config/tc-mips.c: Add support for MIPS r5900.
471 Add M_LQ_AB and M_SQ_AB to support large values for instructions
472 lq and sq.
473 (can_swap_branch_p, get_append_method): Detect some conditional
474 short loops to fix a bug on the r5900 by NOP in the branch delay
475 slot.
476 (M_MUL): Support 3 operands in multu on r5900.
477 (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
478 (s_mipsset): Force 32 bit floating point on r5900.
479 (mips_ip): Check parameter range of instructions mfps and mtps on
480 r5900.
481 * configure.in: Detect CPU type when target string contains r5900
482 (e.g. mips64r5900el-linux-gnu).
483
62658407
L		 4842013-01-02 H.J. Lu <hongjiu.lu@intel.com>
485
486 * as.c (parse_args): Update copyright year to 2013.
487
95830fd1
YZ		 4882013-01-02 Yufeng Zhang <yufeng.zhang@arm.com>
489
490 * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
491 and "cortex57".
492
517bb291 4932013-01-02 Nick Clifton <nickc@redhat.com>
d709e4e6 494
517bb291
NC		 495 PR gas/14987
496 * config/tc-arm.c (parse_address_main): Skip whitespace before a
497 closing bracket.
d709e4e6 498
517bb291 499For older changes see ChangeLog-2012
08d56133 500\f
517bb291 501Copyright (C) 2013 Free Software Foundation, Inc.
752937aa
NC		 502
503Copying and distribution of this file, with or without modification,
504are permitted in any medium without royalty provided the copyright
505notice and this notice are preserved.
506
08d56133
NC		 507Local Variables:
508mode: change-log
509left-margin: 8
510fill-column: 74
511version-control: never
512End:
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