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faf786e6
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12013-07-18 Jim Thomas <thomas@cfht.hawaii.edu>
2
3 * config/tc-i386-intel.c (i386_intel_operand): Fixed signed vs
4 unsigned comparison.
5
f0c00282
NC
62013-07-18 Sandeep Kumar Singh <Sandeep.Singh2@kpitcummins.com>
7
8 * config/rx-defs.h: Add macros for RX100, RX200, RX600, and
9 RX610.
10 * config/rx-parse.y: (rx_check_float_support): Add function to
11 check floating point operation support for target RX100 and
12 RX200.
13 * config/tc-rx.c: Add CPU options RX100, RX200, RX600, and RX610.
14 * doc/c-rx.texi: Add -mcpu option to recognize macros for RX100,
15 RX200, RX600, and RX610
16
8c997c27
NC
172013-07-18 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
18
19 * config/tc-avr.c (md_show_usage): Add avrxmega2 to help text
20
8be59acb
NC
212013-07-18 Vishnu K.S <vishnu.k_s@atmel.com>
22
23 * config/tc-avr.c: Make ata6289's ISA to AVR_ISA_AVR4.
24 * doc/c-avr.texi: Likewise.
25
4a06e5a2
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262013-07-15 Richard Sandiford <rdsandiford@googlemail.com>
27
28 * config/tc-mips.c (match_save_restore_list_operand): Avoid -Wformat
29 error with older GCCs.
30 (mips16_macro_build): Dereference args.
31
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322013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
33
34 * config/tc-mips.c (mips_prefer_vec_regno, mips_parse_register):
35 New functions, split out from...
36 (reg_lookup): ...here. Remove itbl support.
37 (reglist_lookup): Delete.
38 (mips_operand_token_type): New enum.
39 (mips_operand_token): New structure.
40 (mips_operand_tokens): New variable.
41 (mips_add_token, mips_parse_base_start, mips_parse_argument_token)
42 (mips_parse_arguments): New functions.
43 (md_begin): Initialize mips_operand_tokens.
44 (mips_arg_info): Add a token field. Remove optional_reg field.
45 (match_char, match_expression): New functions.
46 (match_const_int): Use match_expression. Remove "s" argument
47 and return a boolean result. Remove O_register handling.
48 (match_regno, match_reg, match_reg_range): New functions.
49 (match_int_operand, match_mapped_int_operand, match_msb_operand)
50 (match_reg_operand, match_reg_pair_operand, match_perf_reg_operand)
51 (match_addiusp_operand, match_clo_clz_dest_operand)
52 (match_lwm_swm_list_operand, match_entry_exit_operand)
53 (match_save_restore_list_operand, match_mdmx_imm_reg_operand)
54 (match_tied_reg_operand): Remove "s" argument and return a boolean
55 result. Match tokens rather than text. Update calls to
56 match_const_int. Rely on match_regno to call check_regno.
57 (match_pcrel_operand, match_pc_operand): Replace "s" argument with
58 "arg" argument. Return a boolean result.
59 (parse_float_constant): Replace with...
60 (match_float_constant): ...this new function.
61 (match_operand): Remove "s" argument and return a boolean result.
62 Update calls to subfunctions.
63 (mips_ip, mips16_ip): Call mips_parse_arguments. Use match routines
64 rather than string-parsing routines. Update handling of optional
65 registers for token scheme.
66
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672013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
68
69 * config/tc-mips.c (parse_float_constant): Split out from...
70 (mips_ip): ...here.
71
3c14a432
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722013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
73
74 * config/tc-mips.c (INSERT_BITS, INSERT_OPERAND, MIPS16_INSERT_OPERAND):
75 Delete.
76
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772013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
78
79 * config/tc-mips.c (mips32_to_16_reg_map): Delete.
80 (match_entry_exit_operand): New function.
81 (match_save_restore_list_operand): Likewise.
82 (match_operand): Use them.
83 (check_absolute_expr): Delete.
84 (mips16_ip): Rewrite main parsing loop to use mips_operands.
85
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862013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
87
88 * config/tc-mips.c: Enable functions commented out in previous patch.
89 (SKIP_SPACE_TABS): Move further up file.
90 (mips32_to_micromips_reg_b_map, mips32_to_micromips_reg_c_map)
91 (mips32_to_micromips_reg_d_map, mips32_to_micromips_reg_e_map)
92 (ips32_to_micromips_reg_f_map, mips32_to_micromips_reg_g_map)
93 (mips32_to_micromips_reg_l_map, mips32_to_micromips_reg_m_map)
94 (mips32_to_micromips_reg_q_map, mips32_to_micromips_reg_n_map)
95 (micromips_imm_b_map, micromips_imm_c_map): Delete.
96 (mips_lookup_reg_pair): Delete.
97 (macro): Use report_bad_range and report_bad_field.
98 (mips_immed, expr_const_in_range): Delete.
99 (mips_ip): Rewrite main parsing loop to use new functions.
100
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1012013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
102
103 * config/tc-mips.c (mips_oddfpreg_ok): Move further up file.
104 Change return type to bfd_boolean.
105 (report_bad_range, report_bad_field): New functions.
106 (mips_arg_info): New structure.
107 (match_const_int, convert_reg_type, check_regno, match_int_operand)
108 (match_mapped_int_operand, match_msb_operand, match_reg_operand)
109 (match_reg_pair_operand, match_pcrel_operand, match_perf_reg_operand)
110 (match_addiusp_operand, match_clo_clz_dest_operand)
111 (match_lwm_swm_list_operand, match_mdmx_imm_reg_operand)
112 (match_pc_operand, match_tied_reg_operand, match_operand)
113 (check_completed_insn): New functions, commented out for now.
114
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1152013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
116
117 * config/tc-mips.c (insn_insert_operand): New function.
118 (macro_build, mips16_macro_build): Put null character check
119 in the for loop and convert continues to breaks. Use operand
120 structures to handle constant operands.
121
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1222013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
123
124 * config/tc-mips.c (validate_mips_insn): Move further up file.
125 Add insn_bits and decode_operand arguments. Use the mips_operand
126 fields to work out which bits an operand occupies. Detect double
127 definitions.
128 (validate_micromips_insn): Move further up file. Call into
129 validate_mips_insn.
130
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1312013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
132
133 * config/tc-mips.c (mips16_macro_build): Remove 'Y' case.
134
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1352013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
136
137 * config/tc-mips.c (macro_build): Take an int for "C", "k", "\\"
138 and "~".
139 (macro): Update accordingly.
140
77bd4346
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1412013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
142
143 * config/tc-mips.c (imm_expr, imm2_expr, offset_expr): Tweak commentary.
144 (imm_reloc): Delete.
145 (md_assemble): Remove imm_reloc handling.
146 (mips_ip): Update commentary. Use offset_expr and offset_reloc
147 rather than imm_expr and imm_reloc for 'i', 'j' and 'u'.
148 Use a temporary array rather than imm_reloc when parsing
149 constant expressions. Remove imm_reloc initialization.
150 (mips16_ip): Update commentary. Use offset_expr and offset_reloc
151 for the relaxable field. Use a relax_char variable to track the
152 type of this field. Remove imm_reloc initialization.
153
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1542013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
155
156 * config/tc-mips.c (mips16_ip): Handle "I".
157
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1582013-07-12 Maciej W. Rozycki <macro@codesourcery.com>
159
160 * config/tc-mips.c (mips_flag_nan2008): New variable.
161 (options): Add OPTION_NAN enum value.
162 (md_longopts): Handle it.
163 (md_parse_option): Likewise.
164 (s_nan): New function.
165 (mips_elf_final_processing): Handle EF_MIPS_NAN2008.
166 (md_show_usage): Add -mnan.
167
168 * doc/as.texinfo (Overview): Add -mnan.
169 * doc/c-mips.texi (MIPS Opts): Document -mnan.
170 (MIPS NaN Encodings): New node. Document .nan directive.
171 (MIPS-Dependent): List the new node.
172
c1094734
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1732013-07-09 Tristan Gingold <gingold@adacore.com>
174
175 * configure.com: Define HAVE_SYS_TYPES_H and HAVE_UNISTD_H
176
0cbbe1b8
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1772013-07-08 Richard Sandiford <rdsandiford@googlemail.com>
178
179 * config/tc-mips.c (mips_ip): Unconditionally parse an expression
180 for 'A' and assume that the constant has been elided if the result
181 is an O_register.
182
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1832013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
184
185 * config/tc-mips.c (gprel16_reloc_p): New function.
186 (macro_read_relocs): Assume BFD_RELOC_LO16 if all relocs are
187 BFD_RELOC_UNUSED.
188 (offset_high_part, small_offset_p): New functions.
189 (nacro): Use them. Remove *_OB and *_DOB cases. For single-
190 register load and store macros, handle the 16-bit offset case first.
191 If a 16-bit offset is not suitable for the instruction we're
192 generating, load it into the temporary register using
193 ADDRESS_ADDI_INSN. Make the M_LI_DD code fall through into the
194 M_L_DAB code once the address has been constructed. For double load
195 and store macros, again handle the 16-bit offset case first.
196 If the second register cannot be accessed from the same high
197 part as the first, load it into AT using ADDRESS_ADDI_INSN.
198 Fix the handling of LD in cases where the first register is the
199 same as the base. Also handle the case where the offset is
200 not 16 bits and the second register cannot be accessed from the
201 same high part as the first. For unaligned loads and stores,
202 fuse the offbits == 12 and old "ab" handling. Apply this handling
203 whenever the second offset needs a different high part from the first.
204 Construct the offset using ADDRESS_ADDI_INSN where possible,
205 for offbits == 16 as well as offbits == 12. Use offset_reloc
206 when constructing the individual loads and stores.
207 (mips_ip): Set up imm_expr, imm2_expr, offset_expr, imm_reloc
208 and offset_reloc before matching against a particular opcode.
209 Handle elided 'A' constants. Allow 'A' constants to use
210 relocation operators.
211
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2122013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
213
214 * config/tc-mips.c (validate_mips_insn): Remove "[" and "]" handling.
215 (mips_ip): Likewise. Do not set is_mdmx for INSN_5400 instructions.
216 Check constraints on the VR5400 RZU.OB, SLL.OB and SRL.OB instructions.
217
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2182013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
219
220 * config/tc-mips.c (mips_ip): Preserve the real bit number for "+p".
221 Require the msb to be <= 31 for "+s". Check that the size is <= 31
222 for both "+s" and "+S".
223
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2242013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
225
226 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn):
227 (mips_ip, mips16_ip): Handle "+i".
228
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2292013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
230
231 * config/tc-mips.c (mips32_to_micromips_reg_h_map): Delete.
232 (micromips_to_32_reg_h_map): Rename to...
233 (micromips_to_32_reg_h_map1): ...this.
234 (micromips_to_32_reg_i_map): Rename to...
235 (micromips_to_32_reg_h_map2): ...this.
236 (mips_lookup_reg_pair): New function.
237 (gpr_write_mask, macro): Adjust after above renaming.
238 (validate_micromips_insn): Remove "mi" handling.
239 (mips_ip): Likewise. Parse both registers in a pair for "mh".
240
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2412013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
242
243 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn)
244 (mips_ip): Remove "+D" and "+T" handling.
245
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2462013-07-05 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
247
248 * config/tc-s390.c (md_gather_operands, md_apply_fix): Support new
249 relocs.
250
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2512013-07-03 Marcus Shawcroft <marcus.shawcroft@arm.com>
252
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253 * config/tc-aarch64.c (reloc_table): Merge got_prel19 into got.
254
2552013-07-02 Marcus Shawcroft <marcus.shawcroft@arm.com>
256
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257 * config/tc-aarch64.c (md_apply_fix): Reorder case values.
258 (aarch64_force_relocation): Likewise.
259
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2602013-07-02 Alan Modra <amodra@gmail.com>
261
262 * config/tc-ppc.c (ppc_elf_adjust_symtab): Don't make .TOC. weak.
263
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2642013-06-26 Maciej W. Rozycki <macro@codesourcery.com>
265
266 * doc/as.texinfo (Overview): Remove @samp from MIPS ISA names.
267 * doc/c-mips.texi (MIPS Options): Remove @sc from MIPS ISA names.
268 Replace @sc{mips16} with literal `MIPS16'.
269 (MIPS ISA): Replace @sc{mips3} with literal `MIPS III'.
270
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2712013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
272
273 * config/tc-aarch64.c (reloc_table): Replace
274 BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with
275 BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to
276 BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and
277 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC.
278 (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC,
279 BFD_RELOC_AARCH64_LD32_GOT_LO12_NC,
280 BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC,
281 BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC,
282 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and
283 BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC.
284 (aarch64_force_relocation): Likewise.
285
cec5225b
YZ
2862013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
287
288 * config/tc-aarch64.c (ilp32_p): New static variable.
289 (elf64_aarch64_target_format): Return the target according to the
290 value of 'ilp32_p'.
291 (md_begin): Determine 'mach' according to the value of 'ilp32_p'.
292 (aarch64_opts): Add support for options '-milp32' and '-mlp64'.
293 (aarch64_dwarf2_addr_size): New function.
294 * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration.
295 (DWARF2_ADDR_SIZE): New define.
296
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2972013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
298
299 * doc/c-mips.texi: Use ISA instead of @sc{isa}.
300
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3012013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
302
303 * config/tc-mips.c (validate_mips_insn): Use STYPE rather than SHAMT.
304
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MR
3052013-06-25 Maciej W. Rozycki <macro@codesourcery.com>
306
307 * config/tc-mips.c (mips_set_options): Add insn32 member.
308 (mips_opts): Initialize it.
309 (NOP_INSN, NOP_INSN_SIZE): Handle insn32 mode.
310 (options): Add OPTION_INSN32 and OPTION_NO_INSN32 enum values.
311 (md_longopts): Add "minsn32" and "mno-insn32" options.
312 (is_size_valid): Handle insn32 mode.
313 (md_assemble): Pass instruction string down to macro.
314 (brk_fmt): Add second dimension and insn32 mode initializers.
315 (mfhl_fmt): Likewise.
316 (BRK_FMT, MFHL_FMT): Handle insn32 mode.
317 (macro_build) <'c'>: Handle microMIPS 32-bit BREAK encoding.
318 (macro_build_jalr, move_register): Handle insn32 mode.
319 (macro_build_branch_rs): Likewise.
320 (macro): Handle insn32 mode.
321 <M_JRADDIUSP>, <M_JRC>, <M_MOVEP>: New cases.
322 (mips_ip): Handle insn32 mode.
323 (md_parse_option): Handle OPTION_INSN32 and OPTION_NO_INSN32.
324 (s_mipsset): Handle "insn32" and "noinsn32" pseudo-ops.
325 (mips_handle_align): Handle insn32 mode.
326 (md_show_usage): Add -minsn32 and -mno-insn32.
327
328 * doc/as.texinfo (Target MIPS options): Add -minsn32 and
329 -mno-insn32 options.
330 (-minsn32, -mno-insn32): New options.
331 * doc/c-mips.texi (MIPS Opts): Add -minsn32 and -mno-insn32
332 options.
333 (MIPS assembly options): New node. Document .set insn32 and
334 .set noinsn32.
335 (MIPS-Dependent): List the new node.
336
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3372013-06-25 Nick Clifton <nickc@redhat.com>
338
339 * config/tc-msp430.c (msp430_srcoperand): Do not allow the use of
340 the PC in indirect addressing on 430xv2 parts.
341 (msp430_operands): Add version test to hardware bug encoding
342 restrictions.
343
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RM
3442013-06-24 Roland McGrath <mcgrathr@google.com>
345
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RM
346 * config/tc-arm.c (parse_reg_list): Use skip_past_char for '}',
347 so it skips whitespace before it.
348 (s_arm_unwind_save_mmxwr, s_arm_unwind_save_mmxwcg): Likewise.
349
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350 * config/tc-arm.c (arm_symbol_chars): Include '{' and '}'.
351 (arm_reg_parse_multi): Skip whitespace first.
352 (parse_reg_list): Likewise.
353 (parse_vfp_reg_list): Likewise.
354 (s_arm_unwind_save_mmxwcg): Likewise.
355
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NC
3562013-06-24 Nick Clifton <nickc@redhat.com>
357
358 PR gas/15623
359 * config/tc-arm.c (do_t_smc): Mark as ending an IT block.
360
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3612013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
362
363 * config/tc-mips.c (mips_ip): Fix swapped bit numbers in comments.
364
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3652013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
366
367 * config/tc-mips.c: Assert that offsetT and valueT are at least
368 8 bytes in size.
369 (GPR_SMIN, GPR_SMAX): New macros.
370 (macro, mips_ip): Remove code for 4-byte valueT and offsetT.
371
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3722013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
373
374 * config/tc-mips.c: Remove OBJ_ELF, OBJ_MAYBE_ELF and IS_ELF
375 conditions. Remove any code deselected by them.
376 (s_mips_frame, s_mips_mask): Handle ECOFF_DEBUGGING case first.
377
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3782013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
379
380 * NEWS: Note removal of ECOFF support.
381 * doc/as.texinfo (--emulation): Update for the removal of MIPS ECOFF.
382 * Makefile.am (TARG_ENV_HFILES): Remove config/te-lnews.h.
383 (MULTI_CFILES): Remove config/e-mipsecoff.c.
384 * Makefile.in: Regenerate.
385 * configure.in: Remove MIPS ECOFF references.
386 (mips-sony-bsd*, mips-*-bsd*, mips-*-lnews*-ecoff, mips-*-*-ecoff):
387 Delete cases.
388 (mips-*-irix5*-*, mips*-*-linux*-*, mips*-*-freebsd*)
389 (mips*-*-kfreebsd*-gnu, mips-*-*-elf): Fold into...
390 (mips-*-*): ...this single case.
391 (mipsbecoff, mipslecoff, mipsecoff): Remove emulations. Expect
392 MIPS emulations to be e-mipself*.
393 * configure: Regenerate.
394 * configure.tgt (mips-sony-bsd*, mips-*-ultrix*, mips-*-osf*)
395 (mips-*-ecoff*, mips-*-pe*, mips-*-irix*, ips-*-lnews*, mips-*-riscos*)
396 (mips-*-sysv*): Remove coff and ecoff cases.
397 * as.c (mipsbecoff, mipslecoff, mipsecoff): Remove.
398 * ecoff.c: Remove reference to MIPS ECOFF.
399 * config/e-mipsecoff.c, config/te-lnews.h: Delete files.
400 * config/tc-mips.c (ECOFF_LITTLE_FORMAT): Delete.
401 (RDATA_SECTION_NAME, mips_target_form): Remove COFF and ECOFF cases.
402 (mips_hi_fixup): Tweak comment.
403 (append_insn): Require a howto.
404 (mips_after_parse_args): Remove OBJ_MAYBE_ECOFF code.
405
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4062013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
407
408 * doc/as.texinfo: Use MIPS rather than @sc{mips} throughout.
409 Use "CPU" instead of "cpu".
410 * doc/c-mips.texi: Likewise.
411 (MIPS Opts): Rename to MIPS Options.
412 (MIPS option stack): Rename to MIPS Option Stack.
413 (MIPS ASE instruction generation overrides): Rename to
414 MIPS ASE Instruction Generation Overrides (for now).
415 (MIPS floating-point): Rename to MIPS Floating-Point.
416
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4172013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
418
419 * doc/c-mips.texi (MIPS Macros): New section.
420 (MIPS Object): Replace with...
421 (MIPS Small Data): ...this new section.
422
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4232013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
424
425 * doc/c-mips.texi (MIPS symbol sizes): Move section further up file.
426 Capitalize name. Use @kindex instead of @cindex for .set entries.
427
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4282013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
429
430 * doc/c-mips.texi (MIPS Stabs): Remove section.
431
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4322013-06-20 Richard Sandiford <rdsandiford@googlemail.com>
433
434 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS, ISA_SUPPORTS_DSP_ASE)
435 (ISA_SUPPORTS_DSP64_ASE, ISA_SUPPORTS_DSPR2_ASE, ISA_SUPPORTS_EVA_ASE)
436 (ISA_SUPPORTS_MT_ASE, ISA_SUPPORTS_MCU_ASE, ISA_SUPPORTS_VIRT_ASE)
437 (ISA_SUPPORTS_VIRT64_ASE): Delete.
438 (mips_ase): New structure.
439 (mips_ases): New table.
440 (FP64_ASES): New macro.
441 (mips_ase_groups): New array.
442 (mips_isa_rev, mips_ase_mask, mips_check_isa_supports_ase)
443 (mips_check_isa_supports_ases, mips_set_ase, mips_lookup_ase): New
444 functions.
445 (is_opcode_valid): Use mips_ases to get the 64-bit ASE flags.
446 (md_parse_option): Use mips_ases and mips_set_ase instead of
447 separate case statements for each ASE option.
448 (mips_after_parse_args): Use FP64_ASES. Use
449 mips_check_isa_supports_ases to check the ASEs against
450 other options.
451 (s_mipsset): Use mips_ases and mips_set_ase instead of
452 separate if statements for each ASE option. Use
453 mips_check_isa_supports_ases, even when a non-ASE option
454 is specified.
455
63a4bc21
KT
4562013-06-19 Greta Yorsh <Greta.Yorsh@arm.com>
457
458 * config/tc-arm.c (arm_cpus): Add support for Cortex-A12.
459
c31f3936
RS
4602013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
461
462 * config/tc-mips.c (md_shortopts, options, md_longopts)
463 (md_longopts_size): Move earlier in file.
464
846ef2d0
RS
4652013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
466
467 * config/tc-mips.c (mips_set_options): Replace separate "ase_*" fields
468 with a single "ase" bitmask.
469 (mips_opts): Update accordingly.
470 (file_ase, file_ase_explicit): New variables.
471 (file_ase_mips3d, file_ase_mdmx, file_ase_smartmips, file_ase_dsp)
472 (file_ase_dspr2, file_ase_eva, file_ase_mt, file_ase_virt): Delete.
473 (ISA_HAS_ROR): Adjust for mips_set_options change.
474 (is_opcode_valid): Take the base ase mask directly from mips_opts.
475 (mips_ip): Adjust for mips_set_options change.
476 (md_parse_option): Likewise. Update file_ase_explicit.
477 (mips_after_parse_args): Adjust for mips_set_options change.
478 Use bitmask operations to select the default ASEs. Set file_ase
479 rather than individual per-ASE variables.
480 (s_mipsset): Adjust for mips_set_options change.
481 (mips_elf_final_processing): Test file_ase rather than
482 file_ase_mdmx. Remove commented-out code.
483
d16afab6
RS
4842013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
485
486 * config/tc-mips.c (mips_cpu_info): Add an "ase" field.
487 (MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, MIPS_CPU_ASE_MT)
488 (MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX, MIPS_CPU_ASE_DSPR2)
489 (MIPS_CPU_ASE_MCU, MIPS_CPU_ASE_VIRT, MIPS_CPU_ASE_EVA): Delete.
490 (mips_after_parse_args): Use the new "ase" field to choose
491 the default ASEs.
492 (mips_cpu_info_table): Move ASEs from the "flags" field to the
493 "ase" field.
494
e83a675f
RE
4952013-06-18 Richard Earnshaw <rearnsha@arm.com>
496
497 * config/tc-arm.c (symbol_preemptible): New function.
498 (relax_branch): Use it.
499
7f3c4072
CM
5002013-06-17 Catherine Moore <clm@codesourcery.com>
501 Maciej W. Rozycki <macro@codesourcery.com>
502 Chao-Ying Fu <fu@mips.com>
503
504 * config/tc-mips.c (mips_set_options): Add ase_eva.
505 (mips_set_options mips_opts): Add ase_eva.
506 (file_ase_eva): Declare.
507 (ISA_SUPPORTS_EVA_ASE): Define.
508 (IS_SEXT_9BIT_NUM): Define.
509 (MIPS_CPU_ASE_EVA): Define.
510 (is_opcode_valid): Add support for ase_eva.
511 (macro_build): Likewise.
512 (macro): Likewise.
513 (validate_mips_insn): Likewise.
514 (validate_micromips_insn): Likewise.
515 (mips_ip): Likewise.
516 (options): Add OPTION_EVA and OPTION_NO_EVA.
517 (md_longopts): Add -meva and -mno-eva.
518 (md_parse_option): Process new options.
519 (mips_after_parse_args): Check for valid EVA combinations.
520 (s_mipsset): Likewise.
521
e410add4
RS
5222013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
523
524 * dwarf2dbg.h (dwarf2_move_insn): Declare.
525 * dwarf2dbg.c (line_subseg): Add pmove_tail.
526 (get_line_subseg): Add create_p argument. Initialize pmove_tail.
527 (dwarf2_gen_line_info_1): Update call accordingly.
528 (dwarf2_move_insn): New function.
529 * config/tc-mips.c (append_insn): Use dwarf2_move_insn.
530
6a50d470
RS
5312013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
532
533 Revert:
534
535 2011-09-05 Richard Sandiford <rdsandiford@googlemail.com>
536
537 PR gas/13024
538 * dwarf2dbg.c (pending_lines, pending_lines_tail): New variables.
539 (dwarf2_gen_line_info_1): Delete.
540 (dwarf2_push_line, dwarf2_flush_pending_lines): New functions.
541 (dwarf2_gen_line_info, dwarf2_emit_label): Use them.
542 (dwarf2_consume_line_info): Call dwarf2_flush_pending_lines.
543 (dwarf2_directive_loc): Push previous .locs instead of generating
544 them immediately.
545
f122319e
CF
5462013-06-13 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
547
548 * config/tc-mips.c (ISA_SUPPORTS_VIRT_ASE): Support micromips.
549 (ISA_SUPPORTS_VIRT64_ASE): Support 64-bit micromips.
550
909c7f9c
NC
5512013-06-13 Nick Clifton <nickc@redhat.com>
552
553 PR gas/15602
554 * config/tc-m68k.h (TC_CHECK_ADJUSTED_BROKEN_DOT_WORD): Define.
555 * config/tc-m68k.c (tc_m68k_check_adjusted_broken_word): New
556 function. Generates an error if the adjusted offset is out of a
557 16-bit range.
558
5d5755a7
SL
5592013-06-12 Sandra Loosemore <sandra@codesourcery.com>
560
561 * config/tc-nios2.c (md_apply_fix): Mask constant
562 BFD_RELOC_NIOS2_HIADJ16 value to 16 bits.
563
3bf0dbfb
MR
5642013-06-10 Maciej W. Rozycki <macro@codesourcery.com>
565
566 * config/tc-mips.c (append_insn): Don't do branch relaxation for
567 MIPS-3D instructions either.
568 (md_convert_frag): Update the COPx branch mask accordingly.
569
570 * config/tc-mips.c (md_show_usage): Document --[no-]relax-branch
571 option.
572 * doc/as.texinfo (Overview): Add --relax-branch and
573 --no-relax-branch.
574 * doc/c-mips.texi (MIPS Opts): Document --relax-branch and
575 --no-relax-branch.
576
9daf7bab
SL
5772013-06-09 Sandra Loosemore <sandra@codesourcery.com>
578
579 * config/tc-nios2.c (nios2_parse_args): Allow trap argument to
580 omitted.
581
d301a56b
RS
5822013-06-08 Catherine Moore <clm@codesourcery.com>
583
584 * config/tc-mips.c (is_opcode_valid): Build ASE mask.
585 (is_opcode_valid_16): Pass ase value to opcode_is_member.
586 (append_insn): Change INSN_xxxx to ASE_xxxx.
587
7bab7634
DC
5882013-06-01 George Thomas <george.thomas@atmel.com>
589
590 * gas/config/tc-avr.c: Change ISA for devices with USB support to
591 AVR_ISA_XMEGAU
592
f60cf82f
L
5932013-05-31 H.J. Lu <hongjiu.lu@intel.com>
594
595 * config/tc-i386.c (md_begin): Don't align text/data/bss sections
596 for ELF.
597
a3f278e2
CM
5982013-05-31 Paul Brook <paul@codesourcery.com>
599
600 gas/
601 * config/tc-mips.c (s_ehword): New.
602
067ec077
CM
6032013-05-30 Paul Brook <paul@codesourcery.com>
604
605 * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH.
606
d6101ac2
MR
6072013-05-29 Maciej W. Rozycki <macro@codesourcery.com>
608
609 * write.c (resolve_reloc_expr_symbols): On REL targets don't
610 convert relocs who have no relocatable field either. Rephrase
611 the conditional so that the PC-relative check is only applied
612 for REL targets.
613
f19ccbda
MR
6142013-05-28 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
615
616 * config/tc-mips.c (macro) <ld>: Don't use $zero for address
617 calculation.
618
418009c2
YZ
6192013-05-28 Yufeng Zhang <yufeng.zhang@arm.com>
620
621 * config/tc-aarch64.c (reloc_table): Update to use
477330fc 622 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of
418009c2
YZ
623 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE.
624 (md_apply_fix): Likewise.
625 (aarch64_force_relocation): Likewise.
626
0a8897c7
KT
6272013-05-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
628
629 * config/tc-arm.c (it_fsm_post_encode): Improve
630 warning messages about deprecated IT block formats.
631
89d2a2a3
MS
6322013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com>
633
634 * config/tc-aarch64.c (md_apply_fix): Move value range checking
635 inside fx_done condition.
636
c77c0862
RS
6372013-05-22 Jürgen Urban <JuergenUrban@gmx.de>
638
639 * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB.
640
c0637f3a
PB
6412013-05-20 Peter Bergner <bergner@vnet.ibm.com>
642
643 * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error
644 and clean up warning when using PRINT_OPCODE_TABLE.
645
5656a981
AM
6462013-05-20 Alan Modra <amodra@gmail.com>
647
648 * config/tc-ppc.c (md_apply_fix): Hoist code common to insn
649 and data fixups performing shift/high adjust/sign extension on
650 fieldval. Sink fx_pcrel handling and checks. Use fixP->fx_size
651 when writing data fixups rather than recalculating size.
652
997b26e8
JBG
6532013-05-16 Jan-Benedict Glaw <jbglaw@lug-owl.de>
654
655 * doc/c-msp430.texi: Fix typo.
656
9f6e76f4
TG
6572013-05-16 Tristan Gingold <gingold@adacore.com>
658
659 * config/tc-ppc.c (ppc_is_toc_sym): Symbols of class XMC_TC
660 are also TOC symbols.
661
638d3803
NC
6622013-05-16 Nick Clifton <nickc@redhat.com>
663
664 * config/tc-msp430.c: Make -mmcu recognise more part numbers.
665 Add -mcpu command to specify core type.
997b26e8 666 * doc/c-msp430.texi: Update documentation.
638d3803 667
b015e599
AP
6682013-05-09 Andrew Pinski <apinski@cavium.com>
669
670 * config/tc-mips.c (struct mips_set_options): New ase_virt field.
671 (mips_opts): Update for the new field.
672 (file_ase_virt): New variable.
673 (ISA_SUPPORTS_VIRT_ASE): New macro.
674 (ISA_SUPPORTS_VIRT64_ASE): New macro.
675 (MIPS_CPU_ASE_VIRT): New define.
676 (is_opcode_valid): Handle ase_virt.
677 (macro_build): Handle "+J".
678 (validate_mips_insn): Likewise.
679 (mips_ip): Likewise.
680 (enum options): Add OPTION_VIRT and OPTION_NO_VIRT.
681 (md_longopts): Add mvirt and mnovirt
682 (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT.
683 (mips_after_parse_args): Handle ase_virt field.
684 (s_mipsset): Handle "virt" and "novirt".
685 (mips_elf_final_processing): Add a comment about virt ASE might need
686 a new flag.
687 (md_show_usage): Print out the usage of -mvirt and mno-virt options.
688 * doc/c-mips.texi: Document -mvirt and -mno-virt.
689 Document ".set virt" and ".set novirt".
690
da8094d7
AM
6912013-05-09 Alan Modra <amodra@gmail.com>
692
693 * config/tc-ppc.c (md_apply_fix): Sign extend fieldval under
694 control of operand flag bits.
695
c5f8c205
AM
6962013-05-07 Alan Modra <amodra@gmail.com>
697
698 * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro.
699 (PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise.
700 (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise.
701 (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise.
702 (md_apply_fix): Set fx_no_overflow for assorted relocations.
703 Shift and sign-extend fieldval for use by some VLE reloc
704 operand->insert functions.
705
b47468a6
CM
7062013-05-06 Paul Brook <paul@codesourcery.com>
707 Catherine Moore <clm@codesourcery.com>
708
c5f8c205
AM
709 * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL.
710 (limited_pcrel_reloc_p): Likewise.
b47468a6
CM
711 (md_apply_fix): Likewise.
712 (tc_gen_reloc): Likewise.
713
2de39019
CM
7142013-05-06 Richard Sandiford <rdsandiford@googlemail.com>
715
716 * config/tc-mips.c (limited_pcrel_reloc_p): New function.
717 (mips_fix_adjustable): Adjust pc-relative check to use
718 limited_pc_reloc_p.
719
754e2bb9
RS
7202013-05-02 Richard Sandiford <rdsandiford@googlemail.com>
721
722 * config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries.
723 (s_mips_stab): Do not restrict to stabn only.
724
13761a11
NC
7252013-05-02 Nick Clifton <nickc@redhat.com>
726
727 * config/tc-msp430.c: Add support for the MSP430X architecture.
728 Add code to insert a NOP instruction after any instruction that
729 might change the interrupt state.
730 Add support for the LARGE memory model.
731 Add code to initialise the .MSP430.attributes section.
732 * config/tc-msp430.h: Add support for the MSP430X architecture.
733 * doc/c-msp430.texi: Document the new -mL and -mN command line
734 options.
735 * NEWS: Mention support for the MSP430X architecture.
736
df26367c
MR
7372013-05-01 Maciej W. Rozycki <macro@codesourcery.com>
738
739 * configure.tgt: Replace alpha*-*-linuxecoff* pattern with
740 alpha*-*-linux*ecoff*.
741
f02d8318
CF
7422013-04-30 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
743
744 * config/tc-mips.c (mips_ip): Add sizelo.
745 For "+C", "+G", and "+H", set sizelo and compare against it.
746
b40bf0a2
NC
7472013-04-29 Nick Clifton <nickc@redhat.com>
748
749 * as.c (Options): Add -gdwarf-sections.
750 (parse_args): Likewise.
751 * as.h (flag_dwarf_sections): Declare.
752 * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes.
753 (process_entries): When -gdwarf-sections is enabled generate
754 fragmentary .debug_line sections.
755 (out_debug_line): Set the section for the .debug_line section end
756 symbol.
757 * doc/as.texinfo: Document -gdwarf-sections.
758 * NEWS: Mention -gdwarf-sections.
759
8eeccb77 7602013-04-26 Christian Groessler <chris@groessler.org>
00a3147e
CG
761
762 * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdline
763 according to the target parameter. Don't call s_segm since s_segm
764 calls bfd_set_arch_mach using stdoutput, but stdoutput isn't
765 initialized yet.
766 (md_begin): Call s_segm according to target parameter from command
767 line.
768
49926cd0
AM
7692013-04-25 Alan Modra <amodra@gmail.com>
770
771 * configure.in: Allow little-endian linux.
772 * configure: Regenerate.
773
e3031850
SL
7742013-04-24 Sandra Loosemore <sandra@codesourcery.com>
775
776 * config/tc-nios2.c (nios2_control_register_arg_p): Rename
777 "fstatus" control register to "eccinj".
778
cb948fc0
KT
7792013-04-19 Kai Tietz <ktietz@redhat.com>
780
781 * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin.
782
4455e9ad
JB
7832013-04-15 Julian Brown <julian@codesourcery.com>
784
785 * expr.c (add_to_result, subtract_from_result): Make global.
786 * expr.h (add_to_result, subtract_from_result): Add prototypes.
787 * config/tc-sh.c (sh_optimize_expr): Use add_to_result,
788 subtract_from_result to handle extra bit of precision for .sleb128
789 directive operands.
790
956a6ba3
JB
7912013-04-10 Julian Brown <julian@codesourcery.com>
792
793 * read.c (convert_to_bignum): Add sign parameter. Use it
794 instead of X_unsigned to determine sign of resulting bignum.
795 (emit_expr): Pass extra argument to convert_to_bignum.
796 (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass
797 X_extrabit to convert_to_bignum.
798 (parse_bitfield_cons): Set X_extrabit.
799 * expr.c (make_expr_symbol, expr_build_uconstant, operand):
800 Initialise X_extrabit field as appropriate.
801 (add_to_result): New.
802 (subtract_from_result): New.
803 (expr): Use above.
804 * expr.h (expressionS): Add X_extrabit field.
805
eb9f3f00
JB
8062013-04-10 Jan Beulich <jbeulich@suse.com>
807
808 * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base
809 register being PC when is_t or writeback, and use distinct
810 diagnostic for the latter case.
811
ccb84d65
JB
8122013-04-10 Jan Beulich <jbeulich@suse.com>
813
814 * gas/config/tc-arm.c (parse_operands): Re-write
815 po_barrier_or_imm().
816 (do_barrier): Remove bogus constraint().
817 (do_t_barrier): Remove.
818
4d13caa0
NC
8192013-04-09 Joerg Wunsch <joerg.wunsch@atmel.com>
820
821 * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2,
822 ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2,
823 ATmega2564RFR2
824 * gas/doc/c-avr.texi (-mmcu documentation): Likewise.
825
16d02dc9
JB
8262013-04-09 Jan Beulich <jbeulich@suse.com>
827
828 * gas/config/tc-arm.c (do_vmrs): Accept all control registers.
829 Use local variable Rt in more places.
830 (do_vmsr): Accept all control registers.
831
05ac0ffb
JB
8322013-04-09 Jan Beulich <jbeulich@suse.com>
833
834 * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
835 if there was none specified for moves between scalar and core
836 register.
837
2d51fb74
JB
8382013-04-09 Jan Beulich <jbeulich@suse.com>
839
840 * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the
841 NEON_ALL_LANES case.
842
94dcf8bf
JB
8432013-04-08 Jan Beulich <jbeulich@suse.com>
844
845 * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for
846 PC-relative VSTR.
847
1472d06f
JB
8482013-04-08 Jan Beulich <jbeulich@suse.com>
849
850 * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq
851 entry to sp_fiq.
852
0c76cae8
AM
8532013-04-03 Alan Modra <amodra@gmail.com>
854
855 * doc/as.texinfo: Add support to generate man options for h8300.
856 * doc/c-h8300.texi: Likewise.
857
92eb40d9
RR
8582013-03-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
859
860 * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and
861 Cortex-A57.
862
51dcdd4d
NC
8632013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com>
864
865 PR binutils/15068
866 * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array.
867
c5d685bf
NC
8682013-03-26 Nick Clifton <nickc@redhat.com>
869
9b978282
NC
870 PR gas/15295
871 * listing.c (rebuffer_line): Rewrite to avoid seeking back to the
872 start of the file each time.
873
c5d685bf
NC
874 PR gas/15178
875 * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for
876 FreeBSD targets.
877
9699c833
TG
8782013-03-26 Douglas B Rupp <rupp@gnat.com>
879
880 * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment
881 after fixup.
882
4755303e
WN
8832013-03-21 Will Newton <will.newton@linaro.org>
884
885 * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all
886 pc-relative str instructions in Thumb mode.
887
81f5558e
NC
8882013-03-21 Michael Schewe <michael.schewe@gmx.net>
889
890 * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
891 @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
892 R_H8_DISP32A16.
893 * config/tc-h8300.h: Remove duplicated defines.
894
71863e73
NC
8952013-03-21 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
896
897 PR gas/15282
898 * tc-avr.c (mcu_has_3_byte_pc): New function.
899 (tc_cfi_frame_initial_instructions): Call it to find return
900 address size.
901
795b8e6b
NC
9022013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com>
903
904 PR gas/15095
905 * config/tc-tic6x.c (tic6x_try_encode): Handle
906 tic6x_coding_dreg_(msb|lsb) field coding types and use it to
907 encode register pair numbers when required.
908
ba86b375
WN
9092013-03-15 Will Newton <will.newton@linaro.org>
910
911 * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register
912 in vstr in Thumb mode for pre-ARMv7 cores.
913
9e6f3811
AS
9142013-03-14 Andreas Schwab <schwab@suse.de>
915
916 * doc/c-arc.texi (ARC Directives): Revert last change and use
917 @itemize instead of @table.
918 * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
919
b10bf8c5
NC
9202013-03-14 Nick Clifton <nickc@redhat.com>
921
922 PR gas/15273
923 * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a
924 NULL message, instead just check ARM_CPU_IS_ANY directly.
925
ba724cfc
NC
9262013-03-14 Nick Clifton <nickc@redhat.com>
927
928 PR gas/15212
9e6f3811 929 * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet
ba724cfc
NC
930 for table format.
931 * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
932 to the @item directives.
933 (ARM-Neon-Alignment): Move to correct place in the document.
934 * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
935 formatting.
936 * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
937 @smallexample.
938
531a94fd
SL
9392013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
940
941 * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'
942 case. Add default BAD_CASE to switch.
943
dad60f8e
SL
9442013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
945
946 * config/tc-nios2.c (nios2_assemble_args_ds): New function.
947 (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
948
dd5181d5
KT
9492013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
950
951 * config/tc-arm.c (crc_ext_armv8): New feature set.
952 (UNPRED_REG): New macro.
953 (do_crc32_1): New function.
954 (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
955 do_crc32ch, do_crc32cw): Likewise.
956 (TUEc): New macro.
957 (insns): Add entries for crc32 mnemonics.
958 (arm_extensions): Add entry for crc.
959
8e723a10
CLT
9602013-03-08 Chung-Lin Tang <cltang@codesourcery.com>
961
962 * write.h (struct fix): Add fx_dot_frag field.
963 (dot_frag): Declare.
964 * write.c (dot_frag): New variable.
965 (fix_new_internal): Set fx_dot_frag field with dot_frag.
966 (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
967 * expr.c (expr): Save value of frag_now in dot_frag when setting
968 dot_value.
969 * read.c (emit_expr): Likewise. Delete comments.
970
be05d201
L
9712013-03-07 H.J. Lu <hongjiu.lu@intel.com>
972
973 * config/tc-i386.c (flag_code_names): Removed.
974 (i386_index_check): Rewrote.
975
62b0d0d5
YZ
9762013-03-05 Yufeng Zhang <yufeng.zhang@arm.com>
977
978 * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
979 add comment.
980 (aarch64_double_precision_fmovable): New function.
981 (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
982 function; handle hexadecimal representation of IEEE754 encoding.
983 (parse_operands): Update the call to parse_aarch64_imm_float.
984
165de32a
L
9852013-02-28 H.J. Lu <hongjiu.lu@intel.com>
986
987 * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
988 (check_hle): Updated.
989 (md_assemble): Likewise.
990 (parse_insn): Likewise.
991
d5de92cf
L
9922013-02-28 H.J. Lu <hongjiu.lu@intel.com>
993
994 * config/tc-i386.c (_i386_insn): Add rep_prefix.
9e6f3811 995 (md_assemble): Check if REP prefix is OK.
d5de92cf
L
996 (parse_insn): Remove expecting_string_instruction. Set
997 i.rep_prefix.
998
e60bb1dd
YZ
9992013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1000
1001 * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
1002
aeebdd9b
YZ
10032013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1004
1005 * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
1006 for system registers.
1007
4107ae22
DD
10082013-02-27 DJ Delorie <dj@redhat.com>
1009
1010 * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
1011 (rl78_op): Handle %code().
1012 (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
1013 (tc_gen_reloc): Likwise; convert to a computed reloc.
1014 (md_apply_fix): Likewise.
1015
151fa98f
NC
10162013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
1017
1018 * config/rl78-parse.y: Fix encoding of DIVWU insn.
1019
70a8bc5b 10202013-02-25 Terry Guo <terry.guo@arm.com>
1021
1022 * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
1023 * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
1024 list of accepted CPUs.
1025
5c111e37
L
10262013-02-19 H.J. Lu <hongjiu.lu@intel.com>
1027
1028 PR gas/15159
1029 * config/tc-i386.c (cpu_arch): Add ".smap".
1030
1031 * doc/c-i386.texi: Document smap.
1032
8a75745d
MR
10332013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1034
1035 * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
1036 mips_assembling_insn appropriately.
1037 (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
1038
79850f26
MR
10392013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1040
cf29fc61 1041 * config/tc-mips.c (append_insn): Correct indentation, remove
79850f26
MR
1042 extraneous braces.
1043
4c261dff
NC
10442013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1045
5c111e37 1046 * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
4c261dff 1047
ea33f281
NC
10482013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
1049
1050 * configure.tgt: Add nios2-*-rtems*.
1051
a1ccaec9
YZ
10522013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
1053
1054 * config/tc-aarch64.c (md_begin): Change to check if 'name' is
1055 NULL.
1056
0aa27725
RS
10572013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
1058
1059 * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
1060 (macro): Use it. Assert that trunc.w.s is not used for r5900.
1061
da4339ed
NC
10622013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com>
1063
1064 * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
1065 core.
1066
36591ba1 10672013-02-06 Sandra Loosemore <sandra@codesourcery.com>
5c111e37 1068 Andrew Jenner <andrew@codesourcery.com>
36591ba1
SL
1069
1070 Based on patches from Altera Corporation.
1071
1072 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
1073 (TARGET_CPU_HFILES): Add config/tc-nios2.h.
1074 * Makefile.in: Regenerated.
1075 * configure.tgt: Add case for nios2*-linux*.
1076 * config/obj-elf.c: Conditionally include elf/nios2.h.
1077 * config/tc-nios2.c: New file.
1078 * config/tc-nios2.h: New file.
1079 * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
1080 * doc/Makefile.in: Regenerated.
1081 * doc/all.texi: Set NIOSII.
1082 * doc/as.texinfo (Overview): Add Nios II options.
1083 (Machine Dependencies): Include c-nios2.texi.
1084 * doc/c-nios2.texi: New file.
1085 * NEWS: Note Altera Nios II support.
1086
94d4433a
AM
10872013-02-06 Alan Modra <amodra@gmail.com>
1088
1089 PR gas/14255
1090 * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
1091 Don't skip fixups with fx_subsy non-NULL.
1092 * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
1093 with fx_subsy non-NULL.
1094
ace9af6f
L
10952013-02-04 H.J. Lu <hongjiu.lu@intel.com>
1096
1097 * doc/c-metag.texi: Add "@c man" markers.
1098
89d67ed9
AM
10992013-02-04 Alan Modra <amodra@gmail.com>
1100
1101 * write.c (fixup_segment): Return void. Delete seg_reloc_count
1102 related code.
1103 (TC_ADJUST_RELOC_COUNT): Delete.
1104 * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
1105
89072bd6
AM
11062013-02-04 Alan Modra <amodra@gmail.com>
1107
1108 * po/POTFILES.in: Regenerate.
1109
f9b2d544
NC
11102013-01-30 Markos Chandras <markos.chandras@imgtec.com>
1111
1112 * config/tc-metag.c: Make SWAP instruction less permissive with
1113 its operands.
1114
392ca752
DD
11152013-01-29 DJ Delorie <dj@redhat.com>
1116
1117 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
1118 relocs in .word/.etc statements.
1119
427d0db6
RM
11202013-01-29 Roland McGrath <mcgrathr@google.com>
1121
1122 * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
1123 immediate value for 8-bit offset" error so it shows line info.
1124
4faf939a
JM
11252013-01-24 Joseph Myers <joseph@codesourcery.com>
1126
1127 * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
1128 for 64-bit output.
1129
78c8d46c
NC
11302013-01-24 Nick Clifton <nickc@redhat.com>
1131
1132 * config/tc-v850.c: Add support for e3v5 architecture.
1133 * doc/c-v850.texi: Mention new support.
1134
fb5b7503
NC
11352013-01-23 Nick Clifton <nickc@redhat.com>
1136
1137 PR gas/15039
1138 * config/tc-avr.c: Include dwarf2dbg.h.
1139
8ce3d284
L
11402013-01-18 H.J. Lu <hongjiu.lu@intel.com>
1141
1142 * config/tc-i386.c (reloc): Support size relocation only for ELF.
1143 (tc_i386_fix_adjustable): Likewise.
1144 (lex_got): Likewise.
1145 (tc_gen_reloc): Likewise.
1146
f5555712
YZ
11472013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
1148
1149 * config/tc-aarch64.c (output_operand_error_record): Change to output
1150 the out-of-range error message as value-expected message if there is
1151 only one single value in the expected range.
1152 (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
1153 LSL #0 as a programmer-friendly feature.
1154
8fd4256d
L
11552013-01-16 H.J. Lu <hongjiu.lu@intel.com>
1156
1157 * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
1158 (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
1159 BFD_RELOC_64_SIZE relocations.
1160 (lex_got): Support "symbol@SIZE" and don't create GOT symbol
1161 for it.
1162 (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
1163 relocations against local symbols.
1164
a5840dce
AM
11652013-01-16 Alan Modra <amodra@gmail.com>
1166
1167 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
1168 finding some sort of toc syntax error, and break to avoid
1169 compiler uninit warning.
1170
af89796a
L
11712013-01-15 H.J. Lu <hongjiu.lu@intel.com>
1172
1173 PR gas/15019
1174 * config/tc-i386.c (lex_got): Increment length by 1 if the
1175 relocation token is removed.
1176
dd42f060
NC
11772013-01-15 Nick Clifton <nickc@redhat.com>
1178
1179 * config/tc-v850.c (md_assemble): Allow signed values for
1180 V850E_IMMEDIATE.
1181
464e3686
SK
11822013-01-11 Sean Keys <skeys@ipdatasys.com>
1183
1184 * config/tc-xgate.c (md_begin): Fix mistake made when going from
af89796a 1185 git to cvs.
464e3686 1186
5817ffd1
PB
11872013-01-10 Peter Bergner <bergner@vnet.ibm.com>
1188
1189 * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
1190 * doc/c-ppc.texi (PowerPC-Opts): Likewise.
1191 * config/tc-ppc.c (md_show_usage): Likewise.
1192 (ppc_handle_align): Handle power8's group ending nop.
1193
f4b1f6a9
SK
11942013-01-10 Sean Keys <skeys@ipdatasys.com>
1195
1196 * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
af89796a 1197 that the assember exits after the opcodes have been printed.
f4b1f6a9 1198
34bca508
L
11992013-01-10 H.J. Lu <hongjiu.lu@intel.com>
1200
1201 * app.c: Remove trailing white spaces.
1202 * as.c: Likewise.
1203 * as.h: Likewise.
1204 * cond.c: Likewise.
1205 * dw2gencfi.c: Likewise.
1206 * dwarf2dbg.h: Likewise.
1207 * ecoff.c: Likewise.
1208 * input-file.c: Likewise.
1209 * itbl-lex.h: Likewise.
1210 * output-file.c: Likewise.
1211 * read.c: Likewise.
1212 * sb.c: Likewise.
1213 * subsegs.c: Likewise.
1214 * symbols.c: Likewise.
1215 * write.c: Likewise.
1216 * config/tc-i386.c: Likewise.
1217 * doc/Makefile.am: Likewise.
1218 * doc/Makefile.in: Likewise.
1219 * doc/c-aarch64.texi: Likewise.
1220 * doc/c-alpha.texi: Likewise.
1221 * doc/c-arc.texi: Likewise.
1222 * doc/c-arm.texi: Likewise.
1223 * doc/c-avr.texi: Likewise.
1224 * doc/c-bfin.texi: Likewise.
1225 * doc/c-cr16.texi: Likewise.
1226 * doc/c-d10v.texi: Likewise.
1227 * doc/c-d30v.texi: Likewise.
1228 * doc/c-h8300.texi: Likewise.
1229 * doc/c-hppa.texi: Likewise.
1230 * doc/c-i370.texi: Likewise.
1231 * doc/c-i386.texi: Likewise.
1232 * doc/c-i860.texi: Likewise.
1233 * doc/c-m32c.texi: Likewise.
1234 * doc/c-m32r.texi: Likewise.
1235 * doc/c-m68hc11.texi: Likewise.
1236 * doc/c-m68k.texi: Likewise.
1237 * doc/c-microblaze.texi: Likewise.
1238 * doc/c-mips.texi: Likewise.
1239 * doc/c-msp430.texi: Likewise.
1240 * doc/c-mt.texi: Likewise.
1241 * doc/c-s390.texi: Likewise.
1242 * doc/c-score.texi: Likewise.
1243 * doc/c-sh.texi: Likewise.
1244 * doc/c-sh64.texi: Likewise.
1245 * doc/c-tic54x.texi: Likewise.
1246 * doc/c-tic6x.texi: Likewise.
1247 * doc/c-v850.texi: Likewise.
1248 * doc/c-xc16x.texi: Likewise.
1249 * doc/c-xgate.texi: Likewise.
1250 * doc/c-xtensa.texi: Likewise.
1251 * doc/c-z80.texi: Likewise.
1252 * doc/internals.texi: Likewise.
1253
4c665b71
RM
12542013-01-10 Roland McGrath <mcgrathr@google.com>
1255
1256 * hash.c (hash_new_sized): Make it global.
1257 * hash.h: Declare it.
1258 * macro.c (define_macro): Use hash_new_sized instead of hash_new,
1259 pass a small size.
1260
a3c62988
NC
12612013-01-10 Will Newton <will.newton@imgtec.com>
1262
1263 * Makefile.am: Add Meta.
1264 * Makefile.in: Regenerate.
1265 * config/tc-metag.c: New file.
1266 * config/tc-metag.h: New file.
1267 * configure.tgt: Add Meta.
1268 * doc/Makefile.am: Add Meta.
1269 * doc/Makefile.in: Regenerate.
1270 * doc/all.texi: Add Meta.
1271 * doc/as.texiinfo: Document Meta options.
1272 * doc/c-metag.texi: New file.
1273
b37df7c4
SE
12742013-01-09 Steve Ellcey <sellcey@mips.com>
1275
1276 * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
1277 calls.
1278 * config/tc-mips.c (internalError): Remove, replace with abort.
1279
a3251895
YZ
12802013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
1281
1282 * config/tc-aarch64.c (parse_operands): Change to compare the result
1283 of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
1284
8ab8155f
NC
12852013-01-07 Nick Clifton <nickc@redhat.com>
1286
1287 PR gas/14887
1288 * config/tc-arm.c (skip_past_char): Skip whitespace before the
1289 anticipated character.
1290 * config/tc-arm.c (parse_address_main): Delete skip of whitespace
1291 here as it is no longer needed.
1292
a4ac1c42
AS
12932013-01-06 Andreas Schwab <schwab@linux-m68k.org>
1294
1295 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
1296 * doc/c-score.texi (SCORE-Opts): Likewise.
1297 * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
1298
e407c74b
NC
12992013-01-04 Juergen Urban <JuergenUrban@gmx.de>
1300
1301 * config/tc-mips.c: Add support for MIPS r5900.
1302 Add M_LQ_AB and M_SQ_AB to support large values for instructions
1303 lq and sq.
1304 (can_swap_branch_p, get_append_method): Detect some conditional
1305 short loops to fix a bug on the r5900 by NOP in the branch delay
1306 slot.
1307 (M_MUL): Support 3 operands in multu on r5900.
1308 (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
1309 (s_mipsset): Force 32 bit floating point on r5900.
1310 (mips_ip): Check parameter range of instructions mfps and mtps on
1311 r5900.
1312 * configure.in: Detect CPU type when target string contains r5900
1313 (e.g. mips64r5900el-linux-gnu).
1314
62658407
L
13152013-01-02 H.J. Lu <hongjiu.lu@intel.com>
1316
1317 * as.c (parse_args): Update copyright year to 2013.
1318
95830fd1
YZ
13192013-01-02 Yufeng Zhang <yufeng.zhang@arm.com>
1320
1321 * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
1322 and "cortex57".
1323
517bb291 13242013-01-02 Nick Clifton <nickc@redhat.com>
d709e4e6 1325
517bb291
NC
1326 PR gas/14987
1327 * config/tc-arm.c (parse_address_main): Skip whitespace before a
1328 closing bracket.
d709e4e6 1329
517bb291 1330For older changes see ChangeLog-2012
08d56133 1331\f
517bb291 1332Copyright (C) 2013 Free Software Foundation, Inc.
752937aa
NC
1333
1334Copying and distribution of this file, with or without modification,
1335are permitted in any medium without royalty provided the copyright
1336notice and this notice are preserved.
1337
08d56133
NC
1338Local Variables:
1339mode: change-log
1340left-margin: 8
1341fill-column: 74
1342version-control: never
1343End: