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12013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
2
3 * config/tc-mips.c (mips16_macro): Don't use move_register.
4 (mips16_ip): Allow macros to use 'p'.
5
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62013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
7
8 * config/tc-mips.c (MAX_OPERANDS): New macro.
9 (mips_operand_array): New structure.
10 (mips_operands, mips16_operands, micromips_operands): New arrays.
11 (micromips_to_32_reg_b_map, micromips_to_32_reg_c_map)
12 (micromips_to_32_reg_e_map, micromips_to_32_reg_f_map)
13 (micromips_to_32_reg_g_map, micromips_to_32_reg_l_map)
14 (micromips_to_32_reg_q_map): Delete.
15 (insn_operands, insn_opno, insn_extract_operand): New functions.
16 (validate_mips_insn): Take a mips_operand_array as argument and
17 use it to build up a list of operands. Extend to handle INSN_MACRO
18 and MIPS16.
19 (validate_mips16_insn): New function.
20 (validate_micromips_insn): Take a mips_operand_array as argument.
21 Handle INSN_MACRO.
22 (md_begin): Initialize mips_operands, mips16_operands and
23 micromips_operands. Call validate_mips_insn and
24 validate_micromips_insn for macro instructions too.
25 Call validate_mips16_insn for MIPS16 instructions.
26 (insn_read_mask, insn_write_mask, operand_reg_mask, insn_reg_mask):
27 New functions.
28 (gpr_read_mask, gpr_write_mask, fpr_read_mask, fpr_write_mask): Use
29 them. Handle INSN_UDI.
30 (get_append_method): Use gpr_read_mask.
31
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322013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
33
34 * config/tc-mips.c (compact_branch_p, uncond_branch_p): Use the same
35 flags for MIPS16 and non-MIPS16 instructions.
36 (gpr_mod_mask): Move the INSN2_MOD_SP case outside the micromips block.
37 (gpr_read_mask): Use INSN2_READ_GPR_31 for MIPS16 instructions too.
38 (gpr_write_mask): Remove MIPS16_INSN_WRITE_SP handling.
39 (can_swap_branch_p, get_append_method): Use the same flags for MIPS16
40 and non-MIPS16 instructions. Fix formatting.
41
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422013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
43
44 * config/tc-mips.c (reg_needs_delay): Move later in file.
45 Use gpr_write_mask.
46 (insns_between): Use gpr_read_mask instead of EXTRACT_OPERAND.
47
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482013-07-26 Sergey Guriev <sergey.s.guriev@intel.com>
49 Alexander Ivchenko <alexander.ivchenko@intel.com>
50 Maxim Kuznetsov <maxim.kuznetsov@intel.com>
51 Sergey Lega <sergey.s.lega@intel.com>
52 Anna Tikhonova <anna.tikhonova@intel.com>
53 Ilya Tocar <ilya.tocar@intel.com>
54 Andrey Turetskiy <andrey.turetskiy@intel.com>
55 Ilya Verbin <ilya.verbin@intel.com>
56 Kirill Yukhin <kirill.yukhin@intel.com>
57 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
58
59 * config/tc-i386-intel.c (O_zmmword_ptr): New.
60 (i386_types): Add zmmword.
61 (i386_intel_simplify_register): Allow regzmm.
62 (i386_intel_simplify): Handle zmmwords.
63 (i386_intel_operand): Handle RC/SAE, vector operations and
64 zmmwords.
65 * config/tc-i386.c (ZMMWORD_MNEM_SUFFIX): New.
66 (struct RC_Operation): New.
67 (struct Mask_Operation): New.
68 (struct Broadcast_Operation): New.
69 (vex_prefix): Size of bytes increased to 4 to support EVEX
70 encoding.
71 (enum i386_error): Add new error codes: unsupported_broadcast,
72 broadcast_not_on_src_operand, broadcast_needed,
73 unsupported_masking, mask_not_on_destination, no_default_mask,
74 unsupported_rc_sae, rc_sae_operand_not_last_imm,
75 invalid_register_operand, try_vector_disp8.
76 (struct _i386_insn): Add new fields vrex, need_vrex, mask,
77 rounding, broadcast, memshift.
78 (struct RC_name): New.
79 (RC_NamesTable): New.
80 (evexlig): New.
81 (evexwig): New.
82 (extra_symbol_chars): Add '{'.
83 (cpu_arch): Add AVX512F, AVX512CD, AVX512ER and AVX512PF.
84 (i386_operand_type): Add regzmm, regmask and vec_disp8.
85 (match_mem_size): Handle zmmwords.
86 (operand_type_match): Handle zmm-registers.
87 (mode_from_disp_size): Handle vec_disp8.
88 (fits_in_vec_disp8): New.
89 (md_begin): Handle {} properly.
90 (type_names): Add "rZMM", "Mask reg" and "Vector d8".
91 (build_vex_prefix): Handle vrex.
92 (build_evex_prefix): New.
93 (process_immext): Adjust to properly handle EVEX.
94 (md_assemble): Add EVEX encoding support.
95 (swap_2_operands): Correctly handle operands with masking,
96 broadcasting or RC/SAE.
97 (check_VecOperands): Support EVEX features.
98 (VEX_check_operands): Properly handle 16 upper [xyz]mm registers.
99 (match_template): Support regzmm and handle new error codes.
100 (process_suffix): Handle zmmwords and zmm-registers.
101 (check_byte_reg): Extend to zmm-registers.
102 (process_operands): Extend to zmm-registers.
103 (build_modrm_byte): Handle EVEX.
104 (output_insn): Adjust to properly handle EVEX case.
105 (disp_size): Handle vec_disp8.
106 (output_disp): Support compressed disp8*N evex feature.
107 (output_imm): Handle RC/SAE immediates properly.
108 (check_VecOperations): New.
109 (i386_immediate): Handle EVEX features.
110 (i386_index_check): Handle zmmwords and zmm-registers.
111 (RC_SAE_immediate): New.
112 (i386_att_operand): Handle EVEX features.
113 (parse_real_register): Add a check for ZMM/Mask registers.
114 (OPTION_MEVEXLIG): New.
115 (OPTION_MEVEXWIG): New.
116 (md_longopts): Add mevexlig and mevexwig.
117 (md_parse_option): Handle mevexlig and mevexwig options.
118 (md_show_usage): Add description for mevexlig and mevexwig.
119 * doc/c-i386.texi: Document avx512f/.avx512f, avx512cd/.avx512cd,
120 avx512er/.avx512er, avx512pf/.avx512pf, mevexlig and mevexwig.
121
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1222013-07-25 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
123
124 * config/tc-i386.c (cpu_arch): Add .sha.
125 * doc/c-i386.texi: Document sha/.sha.
126
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1272013-07-24 Anna Tikhonova <anna.tikhonova@intel.com>
128 Kirill Yukhin <kirill.yukhin@intel.com>
129 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
130
131 * config/tc-i386.c (BND_PREFIX): New.
132 (struct _i386_insn): Add new field bnd_prefix.
133 (add_bnd_prefix): New.
134 (cpu_arch): Add MPX.
135 (i386_operand_type): Add regbnd.
136 (md_assemble): Handle BND prefixes.
137 (parse_insn): Likewise.
138 (output_branch): Likewise.
139 (output_jump): Likewise.
140 (build_modrm_byte): Handle regbnd.
141 (OPTION_MADD_BND_PREFIX): New.
142 (md_longopts): Add entry for 'madd-bnd-prefix'.
143 (md_parse_option): Handle madd-bnd-prefix option.
144 (md_show_usage): Add description for madd-bnd-prefix
145 option.
146 * doc/c-i386.texi: Document mpx/.mpx and -madd-bnd-prefix.
147
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1482013-07-24 Tristan Gingold <gingold@adacore.com>
149
150 * config/tc-ppc.c (md_apply_fix): Adjust BFD_RELOC_PPC_B16 on
151 xcoff targets.
152
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1532013-07-24 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
154
155 * config/tc-s390.c (s390_machine): Don't force the .machine
156 argument to lower case.
157
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1582013-07-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
159
160 * config/tc-arm.c (s_arm_arch_extension): Improve error message
161 for invalid extension.
162
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1632013-07-19 Yufeng Zhang <yufeng.zhang@arm.com>
164
165 * config/tc-aarch64.c (enum aarch64_abi_type): New enumeration tag.
166 (AARCH64_ABI_LP64, AARCH64_ABI_ILP32): New enumerators.
167 (aarch64_abi): New variable.
168 (ilp32_p): Change to be a macro.
169 (aarch64_opts): Remove the support for option -milp32 and -mlp64.
170 (struct aarch64_option_abi_value_table): New struct.
171 (aarch64_abis): New table.
172 (aarch64_parse_abi): New function.
173 (aarch64_long_opts): Add entry for -mabi=.
174 * doc/as.texinfo (Target AArch64 options): Document -mabi.
175 * doc/c-aarch64.texi: Likewise.
176
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1772013-07-18 Jim Thomas <thomas@cfht.hawaii.edu>
178
179 * config/tc-i386-intel.c (i386_intel_operand): Fixed signed vs
180 unsigned comparison.
181
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1822013-07-18 Sandeep Kumar Singh <Sandeep.Singh2@kpitcummins.com>
183
184 * config/rx-defs.h: Add macros for RX100, RX200, RX600, and
185 RX610.
186 * config/rx-parse.y: (rx_check_float_support): Add function to
187 check floating point operation support for target RX100 and
188 RX200.
189 * config/tc-rx.c: Add CPU options RX100, RX200, RX600, and RX610.
190 * doc/c-rx.texi: Add -mcpu option to recognize macros for RX100,
191 RX200, RX600, and RX610
192
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1932013-07-18 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
194
195 * config/tc-avr.c (md_show_usage): Add avrxmega2 to help text
196
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1972013-07-18 Vishnu K.S <vishnu.k_s@atmel.com>
198
199 * config/tc-avr.c: Make ata6289's ISA to AVR_ISA_AVR4.
200 * doc/c-avr.texi: Likewise.
201
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2022013-07-15 Richard Sandiford <rdsandiford@googlemail.com>
203
204 * config/tc-mips.c (match_save_restore_list_operand): Avoid -Wformat
205 error with older GCCs.
206 (mips16_macro_build): Dereference args.
207
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2082013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
209
210 * config/tc-mips.c (mips_prefer_vec_regno, mips_parse_register):
211 New functions, split out from...
212 (reg_lookup): ...here. Remove itbl support.
213 (reglist_lookup): Delete.
214 (mips_operand_token_type): New enum.
215 (mips_operand_token): New structure.
216 (mips_operand_tokens): New variable.
217 (mips_add_token, mips_parse_base_start, mips_parse_argument_token)
218 (mips_parse_arguments): New functions.
219 (md_begin): Initialize mips_operand_tokens.
220 (mips_arg_info): Add a token field. Remove optional_reg field.
221 (match_char, match_expression): New functions.
222 (match_const_int): Use match_expression. Remove "s" argument
223 and return a boolean result. Remove O_register handling.
224 (match_regno, match_reg, match_reg_range): New functions.
225 (match_int_operand, match_mapped_int_operand, match_msb_operand)
226 (match_reg_operand, match_reg_pair_operand, match_perf_reg_operand)
227 (match_addiusp_operand, match_clo_clz_dest_operand)
228 (match_lwm_swm_list_operand, match_entry_exit_operand)
229 (match_save_restore_list_operand, match_mdmx_imm_reg_operand)
230 (match_tied_reg_operand): Remove "s" argument and return a boolean
231 result. Match tokens rather than text. Update calls to
232 match_const_int. Rely on match_regno to call check_regno.
233 (match_pcrel_operand, match_pc_operand): Replace "s" argument with
234 "arg" argument. Return a boolean result.
235 (parse_float_constant): Replace with...
236 (match_float_constant): ...this new function.
237 (match_operand): Remove "s" argument and return a boolean result.
238 Update calls to subfunctions.
239 (mips_ip, mips16_ip): Call mips_parse_arguments. Use match routines
240 rather than string-parsing routines. Update handling of optional
241 registers for token scheme.
242
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2432013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
244
245 * config/tc-mips.c (parse_float_constant): Split out from...
246 (mips_ip): ...here.
247
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2482013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
249
250 * config/tc-mips.c (INSERT_BITS, INSERT_OPERAND, MIPS16_INSERT_OPERAND):
251 Delete.
252
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2532013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
254
255 * config/tc-mips.c (mips32_to_16_reg_map): Delete.
256 (match_entry_exit_operand): New function.
257 (match_save_restore_list_operand): Likewise.
258 (match_operand): Use them.
259 (check_absolute_expr): Delete.
260 (mips16_ip): Rewrite main parsing loop to use mips_operands.
261
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2622013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
263
264 * config/tc-mips.c: Enable functions commented out in previous patch.
265 (SKIP_SPACE_TABS): Move further up file.
266 (mips32_to_micromips_reg_b_map, mips32_to_micromips_reg_c_map)
267 (mips32_to_micromips_reg_d_map, mips32_to_micromips_reg_e_map)
268 (ips32_to_micromips_reg_f_map, mips32_to_micromips_reg_g_map)
269 (mips32_to_micromips_reg_l_map, mips32_to_micromips_reg_m_map)
270 (mips32_to_micromips_reg_q_map, mips32_to_micromips_reg_n_map)
271 (micromips_imm_b_map, micromips_imm_c_map): Delete.
272 (mips_lookup_reg_pair): Delete.
273 (macro): Use report_bad_range and report_bad_field.
274 (mips_immed, expr_const_in_range): Delete.
275 (mips_ip): Rewrite main parsing loop to use new functions.
276
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2772013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
278
279 * config/tc-mips.c (mips_oddfpreg_ok): Move further up file.
280 Change return type to bfd_boolean.
281 (report_bad_range, report_bad_field): New functions.
282 (mips_arg_info): New structure.
283 (match_const_int, convert_reg_type, check_regno, match_int_operand)
284 (match_mapped_int_operand, match_msb_operand, match_reg_operand)
285 (match_reg_pair_operand, match_pcrel_operand, match_perf_reg_operand)
286 (match_addiusp_operand, match_clo_clz_dest_operand)
287 (match_lwm_swm_list_operand, match_mdmx_imm_reg_operand)
288 (match_pc_operand, match_tied_reg_operand, match_operand)
289 (check_completed_insn): New functions, commented out for now.
290
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2912013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
292
293 * config/tc-mips.c (insn_insert_operand): New function.
294 (macro_build, mips16_macro_build): Put null character check
295 in the for loop and convert continues to breaks. Use operand
296 structures to handle constant operands.
297
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2982013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
299
300 * config/tc-mips.c (validate_mips_insn): Move further up file.
301 Add insn_bits and decode_operand arguments. Use the mips_operand
302 fields to work out which bits an operand occupies. Detect double
303 definitions.
304 (validate_micromips_insn): Move further up file. Call into
305 validate_mips_insn.
306
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3072013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
308
309 * config/tc-mips.c (mips16_macro_build): Remove 'Y' case.
310
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3112013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
312
313 * config/tc-mips.c (macro_build): Take an int for "C", "k", "\\"
314 and "~".
315 (macro): Update accordingly.
316
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3172013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
318
319 * config/tc-mips.c (imm_expr, imm2_expr, offset_expr): Tweak commentary.
320 (imm_reloc): Delete.
321 (md_assemble): Remove imm_reloc handling.
322 (mips_ip): Update commentary. Use offset_expr and offset_reloc
323 rather than imm_expr and imm_reloc for 'i', 'j' and 'u'.
324 Use a temporary array rather than imm_reloc when parsing
325 constant expressions. Remove imm_reloc initialization.
326 (mips16_ip): Update commentary. Use offset_expr and offset_reloc
327 for the relaxable field. Use a relax_char variable to track the
328 type of this field. Remove imm_reloc initialization.
329
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3302013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
331
332 * config/tc-mips.c (mips16_ip): Handle "I".
333
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3342013-07-12 Maciej W. Rozycki <macro@codesourcery.com>
335
336 * config/tc-mips.c (mips_flag_nan2008): New variable.
337 (options): Add OPTION_NAN enum value.
338 (md_longopts): Handle it.
339 (md_parse_option): Likewise.
340 (s_nan): New function.
341 (mips_elf_final_processing): Handle EF_MIPS_NAN2008.
342 (md_show_usage): Add -mnan.
343
344 * doc/as.texinfo (Overview): Add -mnan.
345 * doc/c-mips.texi (MIPS Opts): Document -mnan.
346 (MIPS NaN Encodings): New node. Document .nan directive.
347 (MIPS-Dependent): List the new node.
348
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3492013-07-09 Tristan Gingold <gingold@adacore.com>
350
351 * configure.com: Define HAVE_SYS_TYPES_H and HAVE_UNISTD_H
352
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3532013-07-08 Richard Sandiford <rdsandiford@googlemail.com>
354
355 * config/tc-mips.c (mips_ip): Unconditionally parse an expression
356 for 'A' and assume that the constant has been elided if the result
357 is an O_register.
358
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3592013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
360
361 * config/tc-mips.c (gprel16_reloc_p): New function.
362 (macro_read_relocs): Assume BFD_RELOC_LO16 if all relocs are
363 BFD_RELOC_UNUSED.
364 (offset_high_part, small_offset_p): New functions.
365 (nacro): Use them. Remove *_OB and *_DOB cases. For single-
366 register load and store macros, handle the 16-bit offset case first.
367 If a 16-bit offset is not suitable for the instruction we're
368 generating, load it into the temporary register using
369 ADDRESS_ADDI_INSN. Make the M_LI_DD code fall through into the
370 M_L_DAB code once the address has been constructed. For double load
371 and store macros, again handle the 16-bit offset case first.
372 If the second register cannot be accessed from the same high
373 part as the first, load it into AT using ADDRESS_ADDI_INSN.
374 Fix the handling of LD in cases where the first register is the
375 same as the base. Also handle the case where the offset is
376 not 16 bits and the second register cannot be accessed from the
377 same high part as the first. For unaligned loads and stores,
378 fuse the offbits == 12 and old "ab" handling. Apply this handling
379 whenever the second offset needs a different high part from the first.
380 Construct the offset using ADDRESS_ADDI_INSN where possible,
381 for offbits == 16 as well as offbits == 12. Use offset_reloc
382 when constructing the individual loads and stores.
383 (mips_ip): Set up imm_expr, imm2_expr, offset_expr, imm_reloc
384 and offset_reloc before matching against a particular opcode.
385 Handle elided 'A' constants. Allow 'A' constants to use
386 relocation operators.
387
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3882013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
389
390 * config/tc-mips.c (validate_mips_insn): Remove "[" and "]" handling.
391 (mips_ip): Likewise. Do not set is_mdmx for INSN_5400 instructions.
392 Check constraints on the VR5400 RZU.OB, SLL.OB and SRL.OB instructions.
393
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3942013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
395
396 * config/tc-mips.c (mips_ip): Preserve the real bit number for "+p".
397 Require the msb to be <= 31 for "+s". Check that the size is <= 31
398 for both "+s" and "+S".
399
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4002013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
401
402 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn):
403 (mips_ip, mips16_ip): Handle "+i".
404
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4052013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
406
407 * config/tc-mips.c (mips32_to_micromips_reg_h_map): Delete.
408 (micromips_to_32_reg_h_map): Rename to...
409 (micromips_to_32_reg_h_map1): ...this.
410 (micromips_to_32_reg_i_map): Rename to...
411 (micromips_to_32_reg_h_map2): ...this.
412 (mips_lookup_reg_pair): New function.
413 (gpr_write_mask, macro): Adjust after above renaming.
414 (validate_micromips_insn): Remove "mi" handling.
415 (mips_ip): Likewise. Parse both registers in a pair for "mh".
416
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4172013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
418
419 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn)
420 (mips_ip): Remove "+D" and "+T" handling.
421
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4222013-07-05 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
423
424 * config/tc-s390.c (md_gather_operands, md_apply_fix): Support new
425 relocs.
426
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4272013-07-03 Marcus Shawcroft <marcus.shawcroft@arm.com>
428
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429 * config/tc-aarch64.c (reloc_table): Merge got_prel19 into got.
430
4312013-07-02 Marcus Shawcroft <marcus.shawcroft@arm.com>
432
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433 * config/tc-aarch64.c (md_apply_fix): Reorder case values.
434 (aarch64_force_relocation): Likewise.
435
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4362013-07-02 Alan Modra <amodra@gmail.com>
437
438 * config/tc-ppc.c (ppc_elf_adjust_symtab): Don't make .TOC. weak.
439
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4402013-06-26 Maciej W. Rozycki <macro@codesourcery.com>
441
442 * doc/as.texinfo (Overview): Remove @samp from MIPS ISA names.
443 * doc/c-mips.texi (MIPS Options): Remove @sc from MIPS ISA names.
444 Replace @sc{mips16} with literal `MIPS16'.
445 (MIPS ISA): Replace @sc{mips3} with literal `MIPS III'.
446
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4472013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
448
449 * config/tc-aarch64.c (reloc_table): Replace
450 BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with
451 BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to
452 BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and
453 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC.
454 (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC,
455 BFD_RELOC_AARCH64_LD32_GOT_LO12_NC,
456 BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC,
457 BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC,
458 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and
459 BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC.
460 (aarch64_force_relocation): Likewise.
461
cec5225b
YZ
4622013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
463
464 * config/tc-aarch64.c (ilp32_p): New static variable.
465 (elf64_aarch64_target_format): Return the target according to the
466 value of 'ilp32_p'.
467 (md_begin): Determine 'mach' according to the value of 'ilp32_p'.
468 (aarch64_opts): Add support for options '-milp32' and '-mlp64'.
469 (aarch64_dwarf2_addr_size): New function.
470 * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration.
471 (DWARF2_ADDR_SIZE): New define.
472
e335d9cb
RS
4732013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
474
475 * doc/c-mips.texi: Use ISA instead of @sc{isa}.
476
18870af7
RS
4772013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
478
479 * config/tc-mips.c (validate_mips_insn): Use STYPE rather than SHAMT.
480
833794fc
MR
4812013-06-25 Maciej W. Rozycki <macro@codesourcery.com>
482
483 * config/tc-mips.c (mips_set_options): Add insn32 member.
484 (mips_opts): Initialize it.
485 (NOP_INSN, NOP_INSN_SIZE): Handle insn32 mode.
486 (options): Add OPTION_INSN32 and OPTION_NO_INSN32 enum values.
487 (md_longopts): Add "minsn32" and "mno-insn32" options.
488 (is_size_valid): Handle insn32 mode.
489 (md_assemble): Pass instruction string down to macro.
490 (brk_fmt): Add second dimension and insn32 mode initializers.
491 (mfhl_fmt): Likewise.
492 (BRK_FMT, MFHL_FMT): Handle insn32 mode.
493 (macro_build) <'c'>: Handle microMIPS 32-bit BREAK encoding.
494 (macro_build_jalr, move_register): Handle insn32 mode.
495 (macro_build_branch_rs): Likewise.
496 (macro): Handle insn32 mode.
497 <M_JRADDIUSP>, <M_JRC>, <M_MOVEP>: New cases.
498 (mips_ip): Handle insn32 mode.
499 (md_parse_option): Handle OPTION_INSN32 and OPTION_NO_INSN32.
500 (s_mipsset): Handle "insn32" and "noinsn32" pseudo-ops.
501 (mips_handle_align): Handle insn32 mode.
502 (md_show_usage): Add -minsn32 and -mno-insn32.
503
504 * doc/as.texinfo (Target MIPS options): Add -minsn32 and
505 -mno-insn32 options.
506 (-minsn32, -mno-insn32): New options.
507 * doc/c-mips.texi (MIPS Opts): Add -minsn32 and -mno-insn32
508 options.
509 (MIPS assembly options): New node. Document .set insn32 and
510 .set noinsn32.
511 (MIPS-Dependent): List the new node.
512
d1706f38
NC
5132013-06-25 Nick Clifton <nickc@redhat.com>
514
515 * config/tc-msp430.c (msp430_srcoperand): Do not allow the use of
516 the PC in indirect addressing on 430xv2 parts.
517 (msp430_operands): Add version test to hardware bug encoding
518 restrictions.
519
477330fc
RM
5202013-06-24 Roland McGrath <mcgrathr@google.com>
521
d996d970
RM
522 * config/tc-arm.c (parse_reg_list): Use skip_past_char for '}',
523 so it skips whitespace before it.
524 (s_arm_unwind_save_mmxwr, s_arm_unwind_save_mmxwcg): Likewise.
525
477330fc
RM
526 * config/tc-arm.c (arm_symbol_chars): Include '{' and '}'.
527 (arm_reg_parse_multi): Skip whitespace first.
528 (parse_reg_list): Likewise.
529 (parse_vfp_reg_list): Likewise.
530 (s_arm_unwind_save_mmxwcg): Likewise.
531
24382199
NC
5322013-06-24 Nick Clifton <nickc@redhat.com>
533
534 PR gas/15623
535 * config/tc-arm.c (do_t_smc): Mark as ending an IT block.
536
c3678916
RS
5372013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
538
539 * config/tc-mips.c (mips_ip): Fix swapped bit numbers in comments.
540
42429eac
RS
5412013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
542
543 * config/tc-mips.c: Assert that offsetT and valueT are at least
544 8 bytes in size.
545 (GPR_SMIN, GPR_SMAX): New macros.
546 (macro, mips_ip): Remove code for 4-byte valueT and offsetT.
547
f3ded42a
RS
5482013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
549
550 * config/tc-mips.c: Remove OBJ_ELF, OBJ_MAYBE_ELF and IS_ELF
551 conditions. Remove any code deselected by them.
552 (s_mips_frame, s_mips_mask): Handle ECOFF_DEBUGGING case first.
553
e8044f35
RS
5542013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
555
556 * NEWS: Note removal of ECOFF support.
557 * doc/as.texinfo (--emulation): Update for the removal of MIPS ECOFF.
558 * Makefile.am (TARG_ENV_HFILES): Remove config/te-lnews.h.
559 (MULTI_CFILES): Remove config/e-mipsecoff.c.
560 * Makefile.in: Regenerate.
561 * configure.in: Remove MIPS ECOFF references.
562 (mips-sony-bsd*, mips-*-bsd*, mips-*-lnews*-ecoff, mips-*-*-ecoff):
563 Delete cases.
564 (mips-*-irix5*-*, mips*-*-linux*-*, mips*-*-freebsd*)
565 (mips*-*-kfreebsd*-gnu, mips-*-*-elf): Fold into...
566 (mips-*-*): ...this single case.
567 (mipsbecoff, mipslecoff, mipsecoff): Remove emulations. Expect
568 MIPS emulations to be e-mipself*.
569 * configure: Regenerate.
570 * configure.tgt (mips-sony-bsd*, mips-*-ultrix*, mips-*-osf*)
571 (mips-*-ecoff*, mips-*-pe*, mips-*-irix*, ips-*-lnews*, mips-*-riscos*)
572 (mips-*-sysv*): Remove coff and ecoff cases.
573 * as.c (mipsbecoff, mipslecoff, mipsecoff): Remove.
574 * ecoff.c: Remove reference to MIPS ECOFF.
575 * config/e-mipsecoff.c, config/te-lnews.h: Delete files.
576 * config/tc-mips.c (ECOFF_LITTLE_FORMAT): Delete.
577 (RDATA_SECTION_NAME, mips_target_form): Remove COFF and ECOFF cases.
578 (mips_hi_fixup): Tweak comment.
579 (append_insn): Require a howto.
580 (mips_after_parse_args): Remove OBJ_MAYBE_ECOFF code.
581
98508b2a
RS
5822013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
583
584 * doc/as.texinfo: Use MIPS rather than @sc{mips} throughout.
585 Use "CPU" instead of "cpu".
586 * doc/c-mips.texi: Likewise.
587 (MIPS Opts): Rename to MIPS Options.
588 (MIPS option stack): Rename to MIPS Option Stack.
589 (MIPS ASE instruction generation overrides): Rename to
590 MIPS ASE Instruction Generation Overrides (for now).
591 (MIPS floating-point): Rename to MIPS Floating-Point.
592
fc16f8cc
RS
5932013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
594
595 * doc/c-mips.texi (MIPS Macros): New section.
596 (MIPS Object): Replace with...
597 (MIPS Small Data): ...this new section.
598
5a7560b5
RS
5992013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
600
601 * doc/c-mips.texi (MIPS symbol sizes): Move section further up file.
602 Capitalize name. Use @kindex instead of @cindex for .set entries.
603
a1b86ab7
RS
6042013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
605
606 * doc/c-mips.texi (MIPS Stabs): Remove section.
607
c6278170
RS
6082013-06-20 Richard Sandiford <rdsandiford@googlemail.com>
609
610 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS, ISA_SUPPORTS_DSP_ASE)
611 (ISA_SUPPORTS_DSP64_ASE, ISA_SUPPORTS_DSPR2_ASE, ISA_SUPPORTS_EVA_ASE)
612 (ISA_SUPPORTS_MT_ASE, ISA_SUPPORTS_MCU_ASE, ISA_SUPPORTS_VIRT_ASE)
613 (ISA_SUPPORTS_VIRT64_ASE): Delete.
614 (mips_ase): New structure.
615 (mips_ases): New table.
616 (FP64_ASES): New macro.
617 (mips_ase_groups): New array.
618 (mips_isa_rev, mips_ase_mask, mips_check_isa_supports_ase)
619 (mips_check_isa_supports_ases, mips_set_ase, mips_lookup_ase): New
620 functions.
621 (is_opcode_valid): Use mips_ases to get the 64-bit ASE flags.
622 (md_parse_option): Use mips_ases and mips_set_ase instead of
623 separate case statements for each ASE option.
624 (mips_after_parse_args): Use FP64_ASES. Use
625 mips_check_isa_supports_ases to check the ASEs against
626 other options.
627 (s_mipsset): Use mips_ases and mips_set_ase instead of
628 separate if statements for each ASE option. Use
629 mips_check_isa_supports_ases, even when a non-ASE option
630 is specified.
631
63a4bc21
KT
6322013-06-19 Greta Yorsh <Greta.Yorsh@arm.com>
633
634 * config/tc-arm.c (arm_cpus): Add support for Cortex-A12.
635
c31f3936
RS
6362013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
637
638 * config/tc-mips.c (md_shortopts, options, md_longopts)
639 (md_longopts_size): Move earlier in file.
640
846ef2d0
RS
6412013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
642
643 * config/tc-mips.c (mips_set_options): Replace separate "ase_*" fields
644 with a single "ase" bitmask.
645 (mips_opts): Update accordingly.
646 (file_ase, file_ase_explicit): New variables.
647 (file_ase_mips3d, file_ase_mdmx, file_ase_smartmips, file_ase_dsp)
648 (file_ase_dspr2, file_ase_eva, file_ase_mt, file_ase_virt): Delete.
649 (ISA_HAS_ROR): Adjust for mips_set_options change.
650 (is_opcode_valid): Take the base ase mask directly from mips_opts.
651 (mips_ip): Adjust for mips_set_options change.
652 (md_parse_option): Likewise. Update file_ase_explicit.
653 (mips_after_parse_args): Adjust for mips_set_options change.
654 Use bitmask operations to select the default ASEs. Set file_ase
655 rather than individual per-ASE variables.
656 (s_mipsset): Adjust for mips_set_options change.
657 (mips_elf_final_processing): Test file_ase rather than
658 file_ase_mdmx. Remove commented-out code.
659
d16afab6
RS
6602013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
661
662 * config/tc-mips.c (mips_cpu_info): Add an "ase" field.
663 (MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, MIPS_CPU_ASE_MT)
664 (MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX, MIPS_CPU_ASE_DSPR2)
665 (MIPS_CPU_ASE_MCU, MIPS_CPU_ASE_VIRT, MIPS_CPU_ASE_EVA): Delete.
666 (mips_after_parse_args): Use the new "ase" field to choose
667 the default ASEs.
668 (mips_cpu_info_table): Move ASEs from the "flags" field to the
669 "ase" field.
670
e83a675f
RE
6712013-06-18 Richard Earnshaw <rearnsha@arm.com>
672
673 * config/tc-arm.c (symbol_preemptible): New function.
674 (relax_branch): Use it.
675
7f3c4072
CM
6762013-06-17 Catherine Moore <clm@codesourcery.com>
677 Maciej W. Rozycki <macro@codesourcery.com>
678 Chao-Ying Fu <fu@mips.com>
679
680 * config/tc-mips.c (mips_set_options): Add ase_eva.
681 (mips_set_options mips_opts): Add ase_eva.
682 (file_ase_eva): Declare.
683 (ISA_SUPPORTS_EVA_ASE): Define.
684 (IS_SEXT_9BIT_NUM): Define.
685 (MIPS_CPU_ASE_EVA): Define.
686 (is_opcode_valid): Add support for ase_eva.
687 (macro_build): Likewise.
688 (macro): Likewise.
689 (validate_mips_insn): Likewise.
690 (validate_micromips_insn): Likewise.
691 (mips_ip): Likewise.
692 (options): Add OPTION_EVA and OPTION_NO_EVA.
693 (md_longopts): Add -meva and -mno-eva.
694 (md_parse_option): Process new options.
695 (mips_after_parse_args): Check for valid EVA combinations.
696 (s_mipsset): Likewise.
697
e410add4
RS
6982013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
699
700 * dwarf2dbg.h (dwarf2_move_insn): Declare.
701 * dwarf2dbg.c (line_subseg): Add pmove_tail.
702 (get_line_subseg): Add create_p argument. Initialize pmove_tail.
703 (dwarf2_gen_line_info_1): Update call accordingly.
704 (dwarf2_move_insn): New function.
705 * config/tc-mips.c (append_insn): Use dwarf2_move_insn.
706
6a50d470
RS
7072013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
708
709 Revert:
710
711 2011-09-05 Richard Sandiford <rdsandiford@googlemail.com>
712
713 PR gas/13024
714 * dwarf2dbg.c (pending_lines, pending_lines_tail): New variables.
715 (dwarf2_gen_line_info_1): Delete.
716 (dwarf2_push_line, dwarf2_flush_pending_lines): New functions.
717 (dwarf2_gen_line_info, dwarf2_emit_label): Use them.
718 (dwarf2_consume_line_info): Call dwarf2_flush_pending_lines.
719 (dwarf2_directive_loc): Push previous .locs instead of generating
720 them immediately.
721
f122319e
CF
7222013-06-13 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
723
724 * config/tc-mips.c (ISA_SUPPORTS_VIRT_ASE): Support micromips.
725 (ISA_SUPPORTS_VIRT64_ASE): Support 64-bit micromips.
726
909c7f9c
NC
7272013-06-13 Nick Clifton <nickc@redhat.com>
728
729 PR gas/15602
730 * config/tc-m68k.h (TC_CHECK_ADJUSTED_BROKEN_DOT_WORD): Define.
731 * config/tc-m68k.c (tc_m68k_check_adjusted_broken_word): New
732 function. Generates an error if the adjusted offset is out of a
733 16-bit range.
734
5d5755a7
SL
7352013-06-12 Sandra Loosemore <sandra@codesourcery.com>
736
737 * config/tc-nios2.c (md_apply_fix): Mask constant
738 BFD_RELOC_NIOS2_HIADJ16 value to 16 bits.
739
3bf0dbfb
MR
7402013-06-10 Maciej W. Rozycki <macro@codesourcery.com>
741
742 * config/tc-mips.c (append_insn): Don't do branch relaxation for
743 MIPS-3D instructions either.
744 (md_convert_frag): Update the COPx branch mask accordingly.
745
746 * config/tc-mips.c (md_show_usage): Document --[no-]relax-branch
747 option.
748 * doc/as.texinfo (Overview): Add --relax-branch and
749 --no-relax-branch.
750 * doc/c-mips.texi (MIPS Opts): Document --relax-branch and
751 --no-relax-branch.
752
9daf7bab
SL
7532013-06-09 Sandra Loosemore <sandra@codesourcery.com>
754
755 * config/tc-nios2.c (nios2_parse_args): Allow trap argument to
756 omitted.
757
d301a56b
RS
7582013-06-08 Catherine Moore <clm@codesourcery.com>
759
760 * config/tc-mips.c (is_opcode_valid): Build ASE mask.
761 (is_opcode_valid_16): Pass ase value to opcode_is_member.
762 (append_insn): Change INSN_xxxx to ASE_xxxx.
763
7bab7634
DC
7642013-06-01 George Thomas <george.thomas@atmel.com>
765
766 * gas/config/tc-avr.c: Change ISA for devices with USB support to
767 AVR_ISA_XMEGAU
768
f60cf82f
L
7692013-05-31 H.J. Lu <hongjiu.lu@intel.com>
770
771 * config/tc-i386.c (md_begin): Don't align text/data/bss sections
772 for ELF.
773
a3f278e2
CM
7742013-05-31 Paul Brook <paul@codesourcery.com>
775
776 gas/
777 * config/tc-mips.c (s_ehword): New.
778
067ec077
CM
7792013-05-30 Paul Brook <paul@codesourcery.com>
780
781 * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH.
782
d6101ac2
MR
7832013-05-29 Maciej W. Rozycki <macro@codesourcery.com>
784
785 * write.c (resolve_reloc_expr_symbols): On REL targets don't
786 convert relocs who have no relocatable field either. Rephrase
787 the conditional so that the PC-relative check is only applied
788 for REL targets.
789
f19ccbda
MR
7902013-05-28 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
791
792 * config/tc-mips.c (macro) <ld>: Don't use $zero for address
793 calculation.
794
418009c2
YZ
7952013-05-28 Yufeng Zhang <yufeng.zhang@arm.com>
796
797 * config/tc-aarch64.c (reloc_table): Update to use
477330fc 798 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of
418009c2
YZ
799 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE.
800 (md_apply_fix): Likewise.
801 (aarch64_force_relocation): Likewise.
802
0a8897c7
KT
8032013-05-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
804
805 * config/tc-arm.c (it_fsm_post_encode): Improve
806 warning messages about deprecated IT block formats.
807
89d2a2a3
MS
8082013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com>
809
810 * config/tc-aarch64.c (md_apply_fix): Move value range checking
811 inside fx_done condition.
812
c77c0862
RS
8132013-05-22 Jürgen Urban <JuergenUrban@gmx.de>
814
815 * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB.
816
c0637f3a
PB
8172013-05-20 Peter Bergner <bergner@vnet.ibm.com>
818
819 * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error
820 and clean up warning when using PRINT_OPCODE_TABLE.
821
5656a981
AM
8222013-05-20 Alan Modra <amodra@gmail.com>
823
824 * config/tc-ppc.c (md_apply_fix): Hoist code common to insn
825 and data fixups performing shift/high adjust/sign extension on
826 fieldval. Sink fx_pcrel handling and checks. Use fixP->fx_size
827 when writing data fixups rather than recalculating size.
828
997b26e8
JBG
8292013-05-16 Jan-Benedict Glaw <jbglaw@lug-owl.de>
830
831 * doc/c-msp430.texi: Fix typo.
832
9f6e76f4
TG
8332013-05-16 Tristan Gingold <gingold@adacore.com>
834
835 * config/tc-ppc.c (ppc_is_toc_sym): Symbols of class XMC_TC
836 are also TOC symbols.
837
638d3803
NC
8382013-05-16 Nick Clifton <nickc@redhat.com>
839
840 * config/tc-msp430.c: Make -mmcu recognise more part numbers.
841 Add -mcpu command to specify core type.
997b26e8 842 * doc/c-msp430.texi: Update documentation.
638d3803 843
b015e599
AP
8442013-05-09 Andrew Pinski <apinski@cavium.com>
845
846 * config/tc-mips.c (struct mips_set_options): New ase_virt field.
847 (mips_opts): Update for the new field.
848 (file_ase_virt): New variable.
849 (ISA_SUPPORTS_VIRT_ASE): New macro.
850 (ISA_SUPPORTS_VIRT64_ASE): New macro.
851 (MIPS_CPU_ASE_VIRT): New define.
852 (is_opcode_valid): Handle ase_virt.
853 (macro_build): Handle "+J".
854 (validate_mips_insn): Likewise.
855 (mips_ip): Likewise.
856 (enum options): Add OPTION_VIRT and OPTION_NO_VIRT.
857 (md_longopts): Add mvirt and mnovirt
858 (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT.
859 (mips_after_parse_args): Handle ase_virt field.
860 (s_mipsset): Handle "virt" and "novirt".
861 (mips_elf_final_processing): Add a comment about virt ASE might need
862 a new flag.
863 (md_show_usage): Print out the usage of -mvirt and mno-virt options.
864 * doc/c-mips.texi: Document -mvirt and -mno-virt.
865 Document ".set virt" and ".set novirt".
866
da8094d7
AM
8672013-05-09 Alan Modra <amodra@gmail.com>
868
869 * config/tc-ppc.c (md_apply_fix): Sign extend fieldval under
870 control of operand flag bits.
871
c5f8c205
AM
8722013-05-07 Alan Modra <amodra@gmail.com>
873
874 * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro.
875 (PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise.
876 (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise.
877 (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise.
878 (md_apply_fix): Set fx_no_overflow for assorted relocations.
879 Shift and sign-extend fieldval for use by some VLE reloc
880 operand->insert functions.
881
b47468a6
CM
8822013-05-06 Paul Brook <paul@codesourcery.com>
883 Catherine Moore <clm@codesourcery.com>
884
c5f8c205
AM
885 * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL.
886 (limited_pcrel_reloc_p): Likewise.
b47468a6
CM
887 (md_apply_fix): Likewise.
888 (tc_gen_reloc): Likewise.
889
2de39019
CM
8902013-05-06 Richard Sandiford <rdsandiford@googlemail.com>
891
892 * config/tc-mips.c (limited_pcrel_reloc_p): New function.
893 (mips_fix_adjustable): Adjust pc-relative check to use
894 limited_pc_reloc_p.
895
754e2bb9
RS
8962013-05-02 Richard Sandiford <rdsandiford@googlemail.com>
897
898 * config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries.
899 (s_mips_stab): Do not restrict to stabn only.
900
13761a11
NC
9012013-05-02 Nick Clifton <nickc@redhat.com>
902
903 * config/tc-msp430.c: Add support for the MSP430X architecture.
904 Add code to insert a NOP instruction after any instruction that
905 might change the interrupt state.
906 Add support for the LARGE memory model.
907 Add code to initialise the .MSP430.attributes section.
908 * config/tc-msp430.h: Add support for the MSP430X architecture.
909 * doc/c-msp430.texi: Document the new -mL and -mN command line
910 options.
911 * NEWS: Mention support for the MSP430X architecture.
912
df26367c
MR
9132013-05-01 Maciej W. Rozycki <macro@codesourcery.com>
914
915 * configure.tgt: Replace alpha*-*-linuxecoff* pattern with
916 alpha*-*-linux*ecoff*.
917
f02d8318
CF
9182013-04-30 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
919
920 * config/tc-mips.c (mips_ip): Add sizelo.
921 For "+C", "+G", and "+H", set sizelo and compare against it.
922
b40bf0a2
NC
9232013-04-29 Nick Clifton <nickc@redhat.com>
924
925 * as.c (Options): Add -gdwarf-sections.
926 (parse_args): Likewise.
927 * as.h (flag_dwarf_sections): Declare.
928 * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes.
929 (process_entries): When -gdwarf-sections is enabled generate
930 fragmentary .debug_line sections.
931 (out_debug_line): Set the section for the .debug_line section end
932 symbol.
933 * doc/as.texinfo: Document -gdwarf-sections.
934 * NEWS: Mention -gdwarf-sections.
935
8eeccb77 9362013-04-26 Christian Groessler <chris@groessler.org>
00a3147e
CG
937
938 * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdline
939 according to the target parameter. Don't call s_segm since s_segm
940 calls bfd_set_arch_mach using stdoutput, but stdoutput isn't
941 initialized yet.
942 (md_begin): Call s_segm according to target parameter from command
943 line.
944
49926cd0
AM
9452013-04-25 Alan Modra <amodra@gmail.com>
946
947 * configure.in: Allow little-endian linux.
948 * configure: Regenerate.
949
e3031850
SL
9502013-04-24 Sandra Loosemore <sandra@codesourcery.com>
951
952 * config/tc-nios2.c (nios2_control_register_arg_p): Rename
953 "fstatus" control register to "eccinj".
954
cb948fc0
KT
9552013-04-19 Kai Tietz <ktietz@redhat.com>
956
957 * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin.
958
4455e9ad
JB
9592013-04-15 Julian Brown <julian@codesourcery.com>
960
961 * expr.c (add_to_result, subtract_from_result): Make global.
962 * expr.h (add_to_result, subtract_from_result): Add prototypes.
963 * config/tc-sh.c (sh_optimize_expr): Use add_to_result,
964 subtract_from_result to handle extra bit of precision for .sleb128
965 directive operands.
966
956a6ba3
JB
9672013-04-10 Julian Brown <julian@codesourcery.com>
968
969 * read.c (convert_to_bignum): Add sign parameter. Use it
970 instead of X_unsigned to determine sign of resulting bignum.
971 (emit_expr): Pass extra argument to convert_to_bignum.
972 (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass
973 X_extrabit to convert_to_bignum.
974 (parse_bitfield_cons): Set X_extrabit.
975 * expr.c (make_expr_symbol, expr_build_uconstant, operand):
976 Initialise X_extrabit field as appropriate.
977 (add_to_result): New.
978 (subtract_from_result): New.
979 (expr): Use above.
980 * expr.h (expressionS): Add X_extrabit field.
981
eb9f3f00
JB
9822013-04-10 Jan Beulich <jbeulich@suse.com>
983
984 * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base
985 register being PC when is_t or writeback, and use distinct
986 diagnostic for the latter case.
987
ccb84d65
JB
9882013-04-10 Jan Beulich <jbeulich@suse.com>
989
990 * gas/config/tc-arm.c (parse_operands): Re-write
991 po_barrier_or_imm().
992 (do_barrier): Remove bogus constraint().
993 (do_t_barrier): Remove.
994
4d13caa0
NC
9952013-04-09 Joerg Wunsch <joerg.wunsch@atmel.com>
996
997 * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2,
998 ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2,
999 ATmega2564RFR2
1000 * gas/doc/c-avr.texi (-mmcu documentation): Likewise.
1001
16d02dc9
JB
10022013-04-09 Jan Beulich <jbeulich@suse.com>
1003
1004 * gas/config/tc-arm.c (do_vmrs): Accept all control registers.
1005 Use local variable Rt in more places.
1006 (do_vmsr): Accept all control registers.
1007
05ac0ffb
JB
10082013-04-09 Jan Beulich <jbeulich@suse.com>
1009
1010 * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
1011 if there was none specified for moves between scalar and core
1012 register.
1013
2d51fb74
JB
10142013-04-09 Jan Beulich <jbeulich@suse.com>
1015
1016 * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the
1017 NEON_ALL_LANES case.
1018
94dcf8bf
JB
10192013-04-08 Jan Beulich <jbeulich@suse.com>
1020
1021 * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for
1022 PC-relative VSTR.
1023
1472d06f
JB
10242013-04-08 Jan Beulich <jbeulich@suse.com>
1025
1026 * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq
1027 entry to sp_fiq.
1028
0c76cae8
AM
10292013-04-03 Alan Modra <amodra@gmail.com>
1030
1031 * doc/as.texinfo: Add support to generate man options for h8300.
1032 * doc/c-h8300.texi: Likewise.
1033
92eb40d9
RR
10342013-03-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
1035
1036 * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and
1037 Cortex-A57.
1038
51dcdd4d
NC
10392013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com>
1040
1041 PR binutils/15068
1042 * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array.
1043
c5d685bf
NC
10442013-03-26 Nick Clifton <nickc@redhat.com>
1045
9b978282
NC
1046 PR gas/15295
1047 * listing.c (rebuffer_line): Rewrite to avoid seeking back to the
1048 start of the file each time.
1049
c5d685bf
NC
1050 PR gas/15178
1051 * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for
1052 FreeBSD targets.
1053
9699c833
TG
10542013-03-26 Douglas B Rupp <rupp@gnat.com>
1055
1056 * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment
1057 after fixup.
1058
4755303e
WN
10592013-03-21 Will Newton <will.newton@linaro.org>
1060
1061 * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all
1062 pc-relative str instructions in Thumb mode.
1063
81f5558e
NC
10642013-03-21 Michael Schewe <michael.schewe@gmx.net>
1065
1066 * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
1067 @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
1068 R_H8_DISP32A16.
1069 * config/tc-h8300.h: Remove duplicated defines.
1070
71863e73
NC
10712013-03-21 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
1072
1073 PR gas/15282
1074 * tc-avr.c (mcu_has_3_byte_pc): New function.
1075 (tc_cfi_frame_initial_instructions): Call it to find return
1076 address size.
1077
795b8e6b
NC
10782013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com>
1079
1080 PR gas/15095
1081 * config/tc-tic6x.c (tic6x_try_encode): Handle
1082 tic6x_coding_dreg_(msb|lsb) field coding types and use it to
1083 encode register pair numbers when required.
1084
ba86b375
WN
10852013-03-15 Will Newton <will.newton@linaro.org>
1086
1087 * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register
1088 in vstr in Thumb mode for pre-ARMv7 cores.
1089
9e6f3811
AS
10902013-03-14 Andreas Schwab <schwab@suse.de>
1091
1092 * doc/c-arc.texi (ARC Directives): Revert last change and use
1093 @itemize instead of @table.
1094 * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
1095
b10bf8c5
NC
10962013-03-14 Nick Clifton <nickc@redhat.com>
1097
1098 PR gas/15273
1099 * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a
1100 NULL message, instead just check ARM_CPU_IS_ANY directly.
1101
ba724cfc
NC
11022013-03-14 Nick Clifton <nickc@redhat.com>
1103
1104 PR gas/15212
9e6f3811 1105 * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet
ba724cfc
NC
1106 for table format.
1107 * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
1108 to the @item directives.
1109 (ARM-Neon-Alignment): Move to correct place in the document.
1110 * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
1111 formatting.
1112 * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
1113 @smallexample.
1114
531a94fd
SL
11152013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
1116
1117 * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'
1118 case. Add default BAD_CASE to switch.
1119
dad60f8e
SL
11202013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
1121
1122 * config/tc-nios2.c (nios2_assemble_args_ds): New function.
1123 (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
1124
dd5181d5
KT
11252013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1126
1127 * config/tc-arm.c (crc_ext_armv8): New feature set.
1128 (UNPRED_REG): New macro.
1129 (do_crc32_1): New function.
1130 (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
1131 do_crc32ch, do_crc32cw): Likewise.
1132 (TUEc): New macro.
1133 (insns): Add entries for crc32 mnemonics.
1134 (arm_extensions): Add entry for crc.
1135
8e723a10
CLT
11362013-03-08 Chung-Lin Tang <cltang@codesourcery.com>
1137
1138 * write.h (struct fix): Add fx_dot_frag field.
1139 (dot_frag): Declare.
1140 * write.c (dot_frag): New variable.
1141 (fix_new_internal): Set fx_dot_frag field with dot_frag.
1142 (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
1143 * expr.c (expr): Save value of frag_now in dot_frag when setting
1144 dot_value.
1145 * read.c (emit_expr): Likewise. Delete comments.
1146
be05d201
L
11472013-03-07 H.J. Lu <hongjiu.lu@intel.com>
1148
1149 * config/tc-i386.c (flag_code_names): Removed.
1150 (i386_index_check): Rewrote.
1151
62b0d0d5
YZ
11522013-03-05 Yufeng Zhang <yufeng.zhang@arm.com>
1153
1154 * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
1155 add comment.
1156 (aarch64_double_precision_fmovable): New function.
1157 (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
1158 function; handle hexadecimal representation of IEEE754 encoding.
1159 (parse_operands): Update the call to parse_aarch64_imm_float.
1160
165de32a
L
11612013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1162
1163 * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
1164 (check_hle): Updated.
1165 (md_assemble): Likewise.
1166 (parse_insn): Likewise.
1167
d5de92cf
L
11682013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1169
1170 * config/tc-i386.c (_i386_insn): Add rep_prefix.
9e6f3811 1171 (md_assemble): Check if REP prefix is OK.
d5de92cf
L
1172 (parse_insn): Remove expecting_string_instruction. Set
1173 i.rep_prefix.
1174
e60bb1dd
YZ
11752013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1176
1177 * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
1178
aeebdd9b
YZ
11792013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1180
1181 * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
1182 for system registers.
1183
4107ae22
DD
11842013-02-27 DJ Delorie <dj@redhat.com>
1185
1186 * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
1187 (rl78_op): Handle %code().
1188 (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
1189 (tc_gen_reloc): Likwise; convert to a computed reloc.
1190 (md_apply_fix): Likewise.
1191
151fa98f
NC
11922013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
1193
1194 * config/rl78-parse.y: Fix encoding of DIVWU insn.
1195
70a8bc5b 11962013-02-25 Terry Guo <terry.guo@arm.com>
1197
1198 * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
1199 * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
1200 list of accepted CPUs.
1201
5c111e37
L
12022013-02-19 H.J. Lu <hongjiu.lu@intel.com>
1203
1204 PR gas/15159
1205 * config/tc-i386.c (cpu_arch): Add ".smap".
1206
1207 * doc/c-i386.texi: Document smap.
1208
8a75745d
MR
12092013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1210
1211 * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
1212 mips_assembling_insn appropriately.
1213 (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
1214
79850f26
MR
12152013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1216
cf29fc61 1217 * config/tc-mips.c (append_insn): Correct indentation, remove
79850f26
MR
1218 extraneous braces.
1219
4c261dff
NC
12202013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1221
5c111e37 1222 * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
4c261dff 1223
ea33f281
NC
12242013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
1225
1226 * configure.tgt: Add nios2-*-rtems*.
1227
a1ccaec9
YZ
12282013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
1229
1230 * config/tc-aarch64.c (md_begin): Change to check if 'name' is
1231 NULL.
1232
0aa27725
RS
12332013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
1234
1235 * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
1236 (macro): Use it. Assert that trunc.w.s is not used for r5900.
1237
da4339ed
NC
12382013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com>
1239
1240 * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
1241 core.
1242
36591ba1 12432013-02-06 Sandra Loosemore <sandra@codesourcery.com>
5c111e37 1244 Andrew Jenner <andrew@codesourcery.com>
36591ba1
SL
1245
1246 Based on patches from Altera Corporation.
1247
1248 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
1249 (TARGET_CPU_HFILES): Add config/tc-nios2.h.
1250 * Makefile.in: Regenerated.
1251 * configure.tgt: Add case for nios2*-linux*.
1252 * config/obj-elf.c: Conditionally include elf/nios2.h.
1253 * config/tc-nios2.c: New file.
1254 * config/tc-nios2.h: New file.
1255 * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
1256 * doc/Makefile.in: Regenerated.
1257 * doc/all.texi: Set NIOSII.
1258 * doc/as.texinfo (Overview): Add Nios II options.
1259 (Machine Dependencies): Include c-nios2.texi.
1260 * doc/c-nios2.texi: New file.
1261 * NEWS: Note Altera Nios II support.
1262
94d4433a
AM
12632013-02-06 Alan Modra <amodra@gmail.com>
1264
1265 PR gas/14255
1266 * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
1267 Don't skip fixups with fx_subsy non-NULL.
1268 * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
1269 with fx_subsy non-NULL.
1270
ace9af6f
L
12712013-02-04 H.J. Lu <hongjiu.lu@intel.com>
1272
1273 * doc/c-metag.texi: Add "@c man" markers.
1274
89d67ed9
AM
12752013-02-04 Alan Modra <amodra@gmail.com>
1276
1277 * write.c (fixup_segment): Return void. Delete seg_reloc_count
1278 related code.
1279 (TC_ADJUST_RELOC_COUNT): Delete.
1280 * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
1281
89072bd6
AM
12822013-02-04 Alan Modra <amodra@gmail.com>
1283
1284 * po/POTFILES.in: Regenerate.
1285
f9b2d544
NC
12862013-01-30 Markos Chandras <markos.chandras@imgtec.com>
1287
1288 * config/tc-metag.c: Make SWAP instruction less permissive with
1289 its operands.
1290
392ca752
DD
12912013-01-29 DJ Delorie <dj@redhat.com>
1292
1293 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
1294 relocs in .word/.etc statements.
1295
427d0db6
RM
12962013-01-29 Roland McGrath <mcgrathr@google.com>
1297
1298 * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
1299 immediate value for 8-bit offset" error so it shows line info.
1300
4faf939a
JM
13012013-01-24 Joseph Myers <joseph@codesourcery.com>
1302
1303 * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
1304 for 64-bit output.
1305
78c8d46c
NC
13062013-01-24 Nick Clifton <nickc@redhat.com>
1307
1308 * config/tc-v850.c: Add support for e3v5 architecture.
1309 * doc/c-v850.texi: Mention new support.
1310
fb5b7503
NC
13112013-01-23 Nick Clifton <nickc@redhat.com>
1312
1313 PR gas/15039
1314 * config/tc-avr.c: Include dwarf2dbg.h.
1315
8ce3d284
L
13162013-01-18 H.J. Lu <hongjiu.lu@intel.com>
1317
1318 * config/tc-i386.c (reloc): Support size relocation only for ELF.
1319 (tc_i386_fix_adjustable): Likewise.
1320 (lex_got): Likewise.
1321 (tc_gen_reloc): Likewise.
1322
f5555712
YZ
13232013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
1324
1325 * config/tc-aarch64.c (output_operand_error_record): Change to output
1326 the out-of-range error message as value-expected message if there is
1327 only one single value in the expected range.
1328 (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
1329 LSL #0 as a programmer-friendly feature.
1330
8fd4256d
L
13312013-01-16 H.J. Lu <hongjiu.lu@intel.com>
1332
1333 * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
1334 (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
1335 BFD_RELOC_64_SIZE relocations.
1336 (lex_got): Support "symbol@SIZE" and don't create GOT symbol
1337 for it.
1338 (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
1339 relocations against local symbols.
1340
a5840dce
AM
13412013-01-16 Alan Modra <amodra@gmail.com>
1342
1343 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
1344 finding some sort of toc syntax error, and break to avoid
1345 compiler uninit warning.
1346
af89796a
L
13472013-01-15 H.J. Lu <hongjiu.lu@intel.com>
1348
1349 PR gas/15019
1350 * config/tc-i386.c (lex_got): Increment length by 1 if the
1351 relocation token is removed.
1352
dd42f060
NC
13532013-01-15 Nick Clifton <nickc@redhat.com>
1354
1355 * config/tc-v850.c (md_assemble): Allow signed values for
1356 V850E_IMMEDIATE.
1357
464e3686
SK
13582013-01-11 Sean Keys <skeys@ipdatasys.com>
1359
1360 * config/tc-xgate.c (md_begin): Fix mistake made when going from
af89796a 1361 git to cvs.
464e3686 1362
5817ffd1
PB
13632013-01-10 Peter Bergner <bergner@vnet.ibm.com>
1364
1365 * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
1366 * doc/c-ppc.texi (PowerPC-Opts): Likewise.
1367 * config/tc-ppc.c (md_show_usage): Likewise.
1368 (ppc_handle_align): Handle power8's group ending nop.
1369
f4b1f6a9
SK
13702013-01-10 Sean Keys <skeys@ipdatasys.com>
1371
1372 * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
af89796a 1373 that the assember exits after the opcodes have been printed.
f4b1f6a9 1374
34bca508
L
13752013-01-10 H.J. Lu <hongjiu.lu@intel.com>
1376
1377 * app.c: Remove trailing white spaces.
1378 * as.c: Likewise.
1379 * as.h: Likewise.
1380 * cond.c: Likewise.
1381 * dw2gencfi.c: Likewise.
1382 * dwarf2dbg.h: Likewise.
1383 * ecoff.c: Likewise.
1384 * input-file.c: Likewise.
1385 * itbl-lex.h: Likewise.
1386 * output-file.c: Likewise.
1387 * read.c: Likewise.
1388 * sb.c: Likewise.
1389 * subsegs.c: Likewise.
1390 * symbols.c: Likewise.
1391 * write.c: Likewise.
1392 * config/tc-i386.c: Likewise.
1393 * doc/Makefile.am: Likewise.
1394 * doc/Makefile.in: Likewise.
1395 * doc/c-aarch64.texi: Likewise.
1396 * doc/c-alpha.texi: Likewise.
1397 * doc/c-arc.texi: Likewise.
1398 * doc/c-arm.texi: Likewise.
1399 * doc/c-avr.texi: Likewise.
1400 * doc/c-bfin.texi: Likewise.
1401 * doc/c-cr16.texi: Likewise.
1402 * doc/c-d10v.texi: Likewise.
1403 * doc/c-d30v.texi: Likewise.
1404 * doc/c-h8300.texi: Likewise.
1405 * doc/c-hppa.texi: Likewise.
1406 * doc/c-i370.texi: Likewise.
1407 * doc/c-i386.texi: Likewise.
1408 * doc/c-i860.texi: Likewise.
1409 * doc/c-m32c.texi: Likewise.
1410 * doc/c-m32r.texi: Likewise.
1411 * doc/c-m68hc11.texi: Likewise.
1412 * doc/c-m68k.texi: Likewise.
1413 * doc/c-microblaze.texi: Likewise.
1414 * doc/c-mips.texi: Likewise.
1415 * doc/c-msp430.texi: Likewise.
1416 * doc/c-mt.texi: Likewise.
1417 * doc/c-s390.texi: Likewise.
1418 * doc/c-score.texi: Likewise.
1419 * doc/c-sh.texi: Likewise.
1420 * doc/c-sh64.texi: Likewise.
1421 * doc/c-tic54x.texi: Likewise.
1422 * doc/c-tic6x.texi: Likewise.
1423 * doc/c-v850.texi: Likewise.
1424 * doc/c-xc16x.texi: Likewise.
1425 * doc/c-xgate.texi: Likewise.
1426 * doc/c-xtensa.texi: Likewise.
1427 * doc/c-z80.texi: Likewise.
1428 * doc/internals.texi: Likewise.
1429
4c665b71
RM
14302013-01-10 Roland McGrath <mcgrathr@google.com>
1431
1432 * hash.c (hash_new_sized): Make it global.
1433 * hash.h: Declare it.
1434 * macro.c (define_macro): Use hash_new_sized instead of hash_new,
1435 pass a small size.
1436
a3c62988
NC
14372013-01-10 Will Newton <will.newton@imgtec.com>
1438
1439 * Makefile.am: Add Meta.
1440 * Makefile.in: Regenerate.
1441 * config/tc-metag.c: New file.
1442 * config/tc-metag.h: New file.
1443 * configure.tgt: Add Meta.
1444 * doc/Makefile.am: Add Meta.
1445 * doc/Makefile.in: Regenerate.
1446 * doc/all.texi: Add Meta.
1447 * doc/as.texiinfo: Document Meta options.
1448 * doc/c-metag.texi: New file.
1449
b37df7c4
SE
14502013-01-09 Steve Ellcey <sellcey@mips.com>
1451
1452 * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
1453 calls.
1454 * config/tc-mips.c (internalError): Remove, replace with abort.
1455
a3251895
YZ
14562013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
1457
1458 * config/tc-aarch64.c (parse_operands): Change to compare the result
1459 of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
1460
8ab8155f
NC
14612013-01-07 Nick Clifton <nickc@redhat.com>
1462
1463 PR gas/14887
1464 * config/tc-arm.c (skip_past_char): Skip whitespace before the
1465 anticipated character.
1466 * config/tc-arm.c (parse_address_main): Delete skip of whitespace
1467 here as it is no longer needed.
1468
a4ac1c42
AS
14692013-01-06 Andreas Schwab <schwab@linux-m68k.org>
1470
1471 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
1472 * doc/c-score.texi (SCORE-Opts): Likewise.
1473 * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
1474
e407c74b
NC
14752013-01-04 Juergen Urban <JuergenUrban@gmx.de>
1476
1477 * config/tc-mips.c: Add support for MIPS r5900.
1478 Add M_LQ_AB and M_SQ_AB to support large values for instructions
1479 lq and sq.
1480 (can_swap_branch_p, get_append_method): Detect some conditional
1481 short loops to fix a bug on the r5900 by NOP in the branch delay
1482 slot.
1483 (M_MUL): Support 3 operands in multu on r5900.
1484 (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
1485 (s_mipsset): Force 32 bit floating point on r5900.
1486 (mips_ip): Check parameter range of instructions mfps and mtps on
1487 r5900.
1488 * configure.in: Detect CPU type when target string contains r5900
1489 (e.g. mips64r5900el-linux-gnu).
1490
62658407
L
14912013-01-02 H.J. Lu <hongjiu.lu@intel.com>
1492
1493 * as.c (parse_args): Update copyright year to 2013.
1494
95830fd1
YZ
14952013-01-02 Yufeng Zhang <yufeng.zhang@arm.com>
1496
1497 * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
1498 and "cortex57".
1499
517bb291 15002013-01-02 Nick Clifton <nickc@redhat.com>
d709e4e6 1501
517bb291
NC
1502 PR gas/14987
1503 * config/tc-arm.c (parse_address_main): Skip whitespace before a
1504 closing bracket.
d709e4e6 1505
517bb291 1506For older changes see ChangeLog-2012
08d56133 1507\f
517bb291 1508Copyright (C) 2013 Free Software Foundation, Inc.
752937aa
NC
1509
1510Copying and distribution of this file, with or without modification,
1511are permitted in any medium without royalty provided the copyright
1512notice and this notice are preserved.
1513
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1514Local Variables:
1515mode: change-log
1516left-margin: 8
1517fill-column: 74
1518version-control: never
1519End: