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9daf7bab
SL
12013-06-09 Sandra Loosemore <sandra@codesourcery.com>
2
3 * config/tc-nios2.c (nios2_parse_args): Allow trap argument to
4 omitted.
5
d301a56b
RS
62013-06-08 Catherine Moore <clm@codesourcery.com>
7
8 * config/tc-mips.c (is_opcode_valid): Build ASE mask.
9 (is_opcode_valid_16): Pass ase value to opcode_is_member.
10 (append_insn): Change INSN_xxxx to ASE_xxxx.
11
7bab7634
DC
122013-06-01 George Thomas <george.thomas@atmel.com>
13
14 * gas/config/tc-avr.c: Change ISA for devices with USB support to
15 AVR_ISA_XMEGAU
16
f60cf82f
L
172013-05-31 H.J. Lu <hongjiu.lu@intel.com>
18
19 * config/tc-i386.c (md_begin): Don't align text/data/bss sections
20 for ELF.
21
a3f278e2
CM
222013-05-31 Paul Brook <paul@codesourcery.com>
23
24 gas/
25 * config/tc-mips.c (s_ehword): New.
26
067ec077
CM
272013-05-30 Paul Brook <paul@codesourcery.com>
28
29 * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH.
30
d6101ac2
MR
312013-05-29 Maciej W. Rozycki <macro@codesourcery.com>
32
33 * write.c (resolve_reloc_expr_symbols): On REL targets don't
34 convert relocs who have no relocatable field either. Rephrase
35 the conditional so that the PC-relative check is only applied
36 for REL targets.
37
f19ccbda
MR
382013-05-28 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
39
40 * config/tc-mips.c (macro) <ld>: Don't use $zero for address
41 calculation.
42
418009c2
YZ
432013-05-28 Yufeng Zhang <yufeng.zhang@arm.com>
44
45 * config/tc-aarch64.c (reloc_table): Update to use
46 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of
47 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE.
48 (md_apply_fix): Likewise.
49 (aarch64_force_relocation): Likewise.
50
0a8897c7
KT
512013-05-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
52
53 * config/tc-arm.c (it_fsm_post_encode): Improve
54 warning messages about deprecated IT block formats.
55
89d2a2a3
MS
562013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com>
57
58 * config/tc-aarch64.c (md_apply_fix): Move value range checking
59 inside fx_done condition.
60
c77c0862
RS
612013-05-22 Jürgen Urban <JuergenUrban@gmx.de>
62
63 * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB.
64
c0637f3a
PB
652013-05-20 Peter Bergner <bergner@vnet.ibm.com>
66
67 * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error
68 and clean up warning when using PRINT_OPCODE_TABLE.
69
5656a981
AM
702013-05-20 Alan Modra <amodra@gmail.com>
71
72 * config/tc-ppc.c (md_apply_fix): Hoist code common to insn
73 and data fixups performing shift/high adjust/sign extension on
74 fieldval. Sink fx_pcrel handling and checks. Use fixP->fx_size
75 when writing data fixups rather than recalculating size.
76
997b26e8
JBG
772013-05-16 Jan-Benedict Glaw <jbglaw@lug-owl.de>
78
79 * doc/c-msp430.texi: Fix typo.
80
9f6e76f4
TG
812013-05-16 Tristan Gingold <gingold@adacore.com>
82
83 * config/tc-ppc.c (ppc_is_toc_sym): Symbols of class XMC_TC
84 are also TOC symbols.
85
638d3803
NC
862013-05-16 Nick Clifton <nickc@redhat.com>
87
88 * config/tc-msp430.c: Make -mmcu recognise more part numbers.
89 Add -mcpu command to specify core type.
997b26e8 90 * doc/c-msp430.texi: Update documentation.
638d3803 91
b015e599
AP
922013-05-09 Andrew Pinski <apinski@cavium.com>
93
94 * config/tc-mips.c (struct mips_set_options): New ase_virt field.
95 (mips_opts): Update for the new field.
96 (file_ase_virt): New variable.
97 (ISA_SUPPORTS_VIRT_ASE): New macro.
98 (ISA_SUPPORTS_VIRT64_ASE): New macro.
99 (MIPS_CPU_ASE_VIRT): New define.
100 (is_opcode_valid): Handle ase_virt.
101 (macro_build): Handle "+J".
102 (validate_mips_insn): Likewise.
103 (mips_ip): Likewise.
104 (enum options): Add OPTION_VIRT and OPTION_NO_VIRT.
105 (md_longopts): Add mvirt and mnovirt
106 (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT.
107 (mips_after_parse_args): Handle ase_virt field.
108 (s_mipsset): Handle "virt" and "novirt".
109 (mips_elf_final_processing): Add a comment about virt ASE might need
110 a new flag.
111 (md_show_usage): Print out the usage of -mvirt and mno-virt options.
112 * doc/c-mips.texi: Document -mvirt and -mno-virt.
113 Document ".set virt" and ".set novirt".
114
da8094d7
AM
1152013-05-09 Alan Modra <amodra@gmail.com>
116
117 * config/tc-ppc.c (md_apply_fix): Sign extend fieldval under
118 control of operand flag bits.
119
c5f8c205
AM
1202013-05-07 Alan Modra <amodra@gmail.com>
121
122 * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro.
123 (PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise.
124 (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise.
125 (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise.
126 (md_apply_fix): Set fx_no_overflow for assorted relocations.
127 Shift and sign-extend fieldval for use by some VLE reloc
128 operand->insert functions.
129
b47468a6
CM
1302013-05-06 Paul Brook <paul@codesourcery.com>
131 Catherine Moore <clm@codesourcery.com>
132
c5f8c205
AM
133 * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL.
134 (limited_pcrel_reloc_p): Likewise.
b47468a6
CM
135 (md_apply_fix): Likewise.
136 (tc_gen_reloc): Likewise.
137
2de39019
CM
1382013-05-06 Richard Sandiford <rdsandiford@googlemail.com>
139
140 * config/tc-mips.c (limited_pcrel_reloc_p): New function.
141 (mips_fix_adjustable): Adjust pc-relative check to use
142 limited_pc_reloc_p.
143
754e2bb9
RS
1442013-05-02 Richard Sandiford <rdsandiford@googlemail.com>
145
146 * config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries.
147 (s_mips_stab): Do not restrict to stabn only.
148
13761a11
NC
1492013-05-02 Nick Clifton <nickc@redhat.com>
150
151 * config/tc-msp430.c: Add support for the MSP430X architecture.
152 Add code to insert a NOP instruction after any instruction that
153 might change the interrupt state.
154 Add support for the LARGE memory model.
155 Add code to initialise the .MSP430.attributes section.
156 * config/tc-msp430.h: Add support for the MSP430X architecture.
157 * doc/c-msp430.texi: Document the new -mL and -mN command line
158 options.
159 * NEWS: Mention support for the MSP430X architecture.
160
df26367c
MR
1612013-05-01 Maciej W. Rozycki <macro@codesourcery.com>
162
163 * configure.tgt: Replace alpha*-*-linuxecoff* pattern with
164 alpha*-*-linux*ecoff*.
165
f02d8318
CF
1662013-04-30 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
167
168 * config/tc-mips.c (mips_ip): Add sizelo.
169 For "+C", "+G", and "+H", set sizelo and compare against it.
170
b40bf0a2
NC
1712013-04-29 Nick Clifton <nickc@redhat.com>
172
173 * as.c (Options): Add -gdwarf-sections.
174 (parse_args): Likewise.
175 * as.h (flag_dwarf_sections): Declare.
176 * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes.
177 (process_entries): When -gdwarf-sections is enabled generate
178 fragmentary .debug_line sections.
179 (out_debug_line): Set the section for the .debug_line section end
180 symbol.
181 * doc/as.texinfo: Document -gdwarf-sections.
182 * NEWS: Mention -gdwarf-sections.
183
8eeccb77 1842013-04-26 Christian Groessler <chris@groessler.org>
00a3147e
CG
185
186 * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdline
187 according to the target parameter. Don't call s_segm since s_segm
188 calls bfd_set_arch_mach using stdoutput, but stdoutput isn't
189 initialized yet.
190 (md_begin): Call s_segm according to target parameter from command
191 line.
192
49926cd0
AM
1932013-04-25 Alan Modra <amodra@gmail.com>
194
195 * configure.in: Allow little-endian linux.
196 * configure: Regenerate.
197
e3031850
SL
1982013-04-24 Sandra Loosemore <sandra@codesourcery.com>
199
200 * config/tc-nios2.c (nios2_control_register_arg_p): Rename
201 "fstatus" control register to "eccinj".
202
cb948fc0
KT
2032013-04-19 Kai Tietz <ktietz@redhat.com>
204
205 * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin.
206
4455e9ad
JB
2072013-04-15 Julian Brown <julian@codesourcery.com>
208
209 * expr.c (add_to_result, subtract_from_result): Make global.
210 * expr.h (add_to_result, subtract_from_result): Add prototypes.
211 * config/tc-sh.c (sh_optimize_expr): Use add_to_result,
212 subtract_from_result to handle extra bit of precision for .sleb128
213 directive operands.
214
956a6ba3
JB
2152013-04-10 Julian Brown <julian@codesourcery.com>
216
217 * read.c (convert_to_bignum): Add sign parameter. Use it
218 instead of X_unsigned to determine sign of resulting bignum.
219 (emit_expr): Pass extra argument to convert_to_bignum.
220 (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass
221 X_extrabit to convert_to_bignum.
222 (parse_bitfield_cons): Set X_extrabit.
223 * expr.c (make_expr_symbol, expr_build_uconstant, operand):
224 Initialise X_extrabit field as appropriate.
225 (add_to_result): New.
226 (subtract_from_result): New.
227 (expr): Use above.
228 * expr.h (expressionS): Add X_extrabit field.
229
eb9f3f00
JB
2302013-04-10 Jan Beulich <jbeulich@suse.com>
231
232 * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base
233 register being PC when is_t or writeback, and use distinct
234 diagnostic for the latter case.
235
ccb84d65
JB
2362013-04-10 Jan Beulich <jbeulich@suse.com>
237
238 * gas/config/tc-arm.c (parse_operands): Re-write
239 po_barrier_or_imm().
240 (do_barrier): Remove bogus constraint().
241 (do_t_barrier): Remove.
242
4d13caa0
NC
2432013-04-09 Joerg Wunsch <joerg.wunsch@atmel.com>
244
245 * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2,
246 ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2,
247 ATmega2564RFR2
248 * gas/doc/c-avr.texi (-mmcu documentation): Likewise.
249
16d02dc9
JB
2502013-04-09 Jan Beulich <jbeulich@suse.com>
251
252 * gas/config/tc-arm.c (do_vmrs): Accept all control registers.
253 Use local variable Rt in more places.
254 (do_vmsr): Accept all control registers.
255
05ac0ffb
JB
2562013-04-09 Jan Beulich <jbeulich@suse.com>
257
258 * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
259 if there was none specified for moves between scalar and core
260 register.
261
2d51fb74
JB
2622013-04-09 Jan Beulich <jbeulich@suse.com>
263
264 * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the
265 NEON_ALL_LANES case.
266
94dcf8bf
JB
2672013-04-08 Jan Beulich <jbeulich@suse.com>
268
269 * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for
270 PC-relative VSTR.
271
1472d06f
JB
2722013-04-08 Jan Beulich <jbeulich@suse.com>
273
274 * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq
275 entry to sp_fiq.
276
0c76cae8
AM
2772013-04-03 Alan Modra <amodra@gmail.com>
278
279 * doc/as.texinfo: Add support to generate man options for h8300.
280 * doc/c-h8300.texi: Likewise.
281
92eb40d9
RR
2822013-03-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
283
284 * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and
285 Cortex-A57.
286
51dcdd4d
NC
2872013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com>
288
289 PR binutils/15068
290 * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array.
291
c5d685bf
NC
2922013-03-26 Nick Clifton <nickc@redhat.com>
293
9b978282
NC
294 PR gas/15295
295 * listing.c (rebuffer_line): Rewrite to avoid seeking back to the
296 start of the file each time.
297
c5d685bf
NC
298 PR gas/15178
299 * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for
300 FreeBSD targets.
301
9699c833
TG
3022013-03-26 Douglas B Rupp <rupp@gnat.com>
303
304 * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment
305 after fixup.
306
4755303e
WN
3072013-03-21 Will Newton <will.newton@linaro.org>
308
309 * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all
310 pc-relative str instructions in Thumb mode.
311
81f5558e
NC
3122013-03-21 Michael Schewe <michael.schewe@gmx.net>
313
314 * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
315 @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
316 R_H8_DISP32A16.
317 * config/tc-h8300.h: Remove duplicated defines.
318
71863e73
NC
3192013-03-21 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
320
321 PR gas/15282
322 * tc-avr.c (mcu_has_3_byte_pc): New function.
323 (tc_cfi_frame_initial_instructions): Call it to find return
324 address size.
325
795b8e6b
NC
3262013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com>
327
328 PR gas/15095
329 * config/tc-tic6x.c (tic6x_try_encode): Handle
330 tic6x_coding_dreg_(msb|lsb) field coding types and use it to
331 encode register pair numbers when required.
332
ba86b375
WN
3332013-03-15 Will Newton <will.newton@linaro.org>
334
335 * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register
336 in vstr in Thumb mode for pre-ARMv7 cores.
337
9e6f3811
AS
3382013-03-14 Andreas Schwab <schwab@suse.de>
339
340 * doc/c-arc.texi (ARC Directives): Revert last change and use
341 @itemize instead of @table.
342 * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
343
b10bf8c5
NC
3442013-03-14 Nick Clifton <nickc@redhat.com>
345
346 PR gas/15273
347 * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a
348 NULL message, instead just check ARM_CPU_IS_ANY directly.
349
ba724cfc
NC
3502013-03-14 Nick Clifton <nickc@redhat.com>
351
352 PR gas/15212
9e6f3811 353 * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet
ba724cfc
NC
354 for table format.
355 * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
356 to the @item directives.
357 (ARM-Neon-Alignment): Move to correct place in the document.
358 * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
359 formatting.
360 * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
361 @smallexample.
362
531a94fd
SL
3632013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
364
365 * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'
366 case. Add default BAD_CASE to switch.
367
dad60f8e
SL
3682013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
369
370 * config/tc-nios2.c (nios2_assemble_args_ds): New function.
371 (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
372
dd5181d5
KT
3732013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
374
375 * config/tc-arm.c (crc_ext_armv8): New feature set.
376 (UNPRED_REG): New macro.
377 (do_crc32_1): New function.
378 (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
379 do_crc32ch, do_crc32cw): Likewise.
380 (TUEc): New macro.
381 (insns): Add entries for crc32 mnemonics.
382 (arm_extensions): Add entry for crc.
383
8e723a10
CLT
3842013-03-08 Chung-Lin Tang <cltang@codesourcery.com>
385
386 * write.h (struct fix): Add fx_dot_frag field.
387 (dot_frag): Declare.
388 * write.c (dot_frag): New variable.
389 (fix_new_internal): Set fx_dot_frag field with dot_frag.
390 (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
391 * expr.c (expr): Save value of frag_now in dot_frag when setting
392 dot_value.
393 * read.c (emit_expr): Likewise. Delete comments.
394
be05d201
L
3952013-03-07 H.J. Lu <hongjiu.lu@intel.com>
396
397 * config/tc-i386.c (flag_code_names): Removed.
398 (i386_index_check): Rewrote.
399
62b0d0d5
YZ
4002013-03-05 Yufeng Zhang <yufeng.zhang@arm.com>
401
402 * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
403 add comment.
404 (aarch64_double_precision_fmovable): New function.
405 (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
406 function; handle hexadecimal representation of IEEE754 encoding.
407 (parse_operands): Update the call to parse_aarch64_imm_float.
408
165de32a
L
4092013-02-28 H.J. Lu <hongjiu.lu@intel.com>
410
411 * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
412 (check_hle): Updated.
413 (md_assemble): Likewise.
414 (parse_insn): Likewise.
415
d5de92cf
L
4162013-02-28 H.J. Lu <hongjiu.lu@intel.com>
417
418 * config/tc-i386.c (_i386_insn): Add rep_prefix.
9e6f3811 419 (md_assemble): Check if REP prefix is OK.
d5de92cf
L
420 (parse_insn): Remove expecting_string_instruction. Set
421 i.rep_prefix.
422
e60bb1dd
YZ
4232013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
424
425 * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
426
aeebdd9b
YZ
4272013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
428
429 * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
430 for system registers.
431
4107ae22
DD
4322013-02-27 DJ Delorie <dj@redhat.com>
433
434 * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
435 (rl78_op): Handle %code().
436 (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
437 (tc_gen_reloc): Likwise; convert to a computed reloc.
438 (md_apply_fix): Likewise.
439
151fa98f
NC
4402013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
441
442 * config/rl78-parse.y: Fix encoding of DIVWU insn.
443
70a8bc5b 4442013-02-25 Terry Guo <terry.guo@arm.com>
445
446 * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
447 * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
448 list of accepted CPUs.
449
5c111e37
L
4502013-02-19 H.J. Lu <hongjiu.lu@intel.com>
451
452 PR gas/15159
453 * config/tc-i386.c (cpu_arch): Add ".smap".
454
455 * doc/c-i386.texi: Document smap.
456
8a75745d
MR
4572013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
458
459 * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
460 mips_assembling_insn appropriately.
461 (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
462
79850f26
MR
4632013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
464
cf29fc61 465 * config/tc-mips.c (append_insn): Correct indentation, remove
79850f26
MR
466 extraneous braces.
467
4c261dff
NC
4682013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
469
5c111e37 470 * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
4c261dff 471
ea33f281
NC
4722013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
473
474 * configure.tgt: Add nios2-*-rtems*.
475
a1ccaec9
YZ
4762013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
477
478 * config/tc-aarch64.c (md_begin): Change to check if 'name' is
479 NULL.
480
0aa27725
RS
4812013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
482
483 * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
484 (macro): Use it. Assert that trunc.w.s is not used for r5900.
485
da4339ed
NC
4862013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com>
487
488 * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
489 core.
490
36591ba1 4912013-02-06 Sandra Loosemore <sandra@codesourcery.com>
5c111e37 492 Andrew Jenner <andrew@codesourcery.com>
36591ba1
SL
493
494 Based on patches from Altera Corporation.
495
496 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
497 (TARGET_CPU_HFILES): Add config/tc-nios2.h.
498 * Makefile.in: Regenerated.
499 * configure.tgt: Add case for nios2*-linux*.
500 * config/obj-elf.c: Conditionally include elf/nios2.h.
501 * config/tc-nios2.c: New file.
502 * config/tc-nios2.h: New file.
503 * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
504 * doc/Makefile.in: Regenerated.
505 * doc/all.texi: Set NIOSII.
506 * doc/as.texinfo (Overview): Add Nios II options.
507 (Machine Dependencies): Include c-nios2.texi.
508 * doc/c-nios2.texi: New file.
509 * NEWS: Note Altera Nios II support.
510
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5112013-02-06 Alan Modra <amodra@gmail.com>
512
513 PR gas/14255
514 * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
515 Don't skip fixups with fx_subsy non-NULL.
516 * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
517 with fx_subsy non-NULL.
518
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5192013-02-04 H.J. Lu <hongjiu.lu@intel.com>
520
521 * doc/c-metag.texi: Add "@c man" markers.
522
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5232013-02-04 Alan Modra <amodra@gmail.com>
524
525 * write.c (fixup_segment): Return void. Delete seg_reloc_count
526 related code.
527 (TC_ADJUST_RELOC_COUNT): Delete.
528 * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
529
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5302013-02-04 Alan Modra <amodra@gmail.com>
531
532 * po/POTFILES.in: Regenerate.
533
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5342013-01-30 Markos Chandras <markos.chandras@imgtec.com>
535
536 * config/tc-metag.c: Make SWAP instruction less permissive with
537 its operands.
538
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DD
5392013-01-29 DJ Delorie <dj@redhat.com>
540
541 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
542 relocs in .word/.etc statements.
543
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5442013-01-29 Roland McGrath <mcgrathr@google.com>
545
546 * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
547 immediate value for 8-bit offset" error so it shows line info.
548
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5492013-01-24 Joseph Myers <joseph@codesourcery.com>
550
551 * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
552 for 64-bit output.
553
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5542013-01-24 Nick Clifton <nickc@redhat.com>
555
556 * config/tc-v850.c: Add support for e3v5 architecture.
557 * doc/c-v850.texi: Mention new support.
558
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5592013-01-23 Nick Clifton <nickc@redhat.com>
560
561 PR gas/15039
562 * config/tc-avr.c: Include dwarf2dbg.h.
563
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5642013-01-18 H.J. Lu <hongjiu.lu@intel.com>
565
566 * config/tc-i386.c (reloc): Support size relocation only for ELF.
567 (tc_i386_fix_adjustable): Likewise.
568 (lex_got): Likewise.
569 (tc_gen_reloc): Likewise.
570
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5712013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
572
573 * config/tc-aarch64.c (output_operand_error_record): Change to output
574 the out-of-range error message as value-expected message if there is
575 only one single value in the expected range.
576 (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
577 LSL #0 as a programmer-friendly feature.
578
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5792013-01-16 H.J. Lu <hongjiu.lu@intel.com>
580
581 * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
582 (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
583 BFD_RELOC_64_SIZE relocations.
584 (lex_got): Support "symbol@SIZE" and don't create GOT symbol
585 for it.
586 (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
587 relocations against local symbols.
588
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5892013-01-16 Alan Modra <amodra@gmail.com>
590
591 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
592 finding some sort of toc syntax error, and break to avoid
593 compiler uninit warning.
594
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5952013-01-15 H.J. Lu <hongjiu.lu@intel.com>
596
597 PR gas/15019
598 * config/tc-i386.c (lex_got): Increment length by 1 if the
599 relocation token is removed.
600
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6012013-01-15 Nick Clifton <nickc@redhat.com>
602
603 * config/tc-v850.c (md_assemble): Allow signed values for
604 V850E_IMMEDIATE.
605
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6062013-01-11 Sean Keys <skeys@ipdatasys.com>
607
608 * config/tc-xgate.c (md_begin): Fix mistake made when going from
af89796a 609 git to cvs.
464e3686 610
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6112013-01-10 Peter Bergner <bergner@vnet.ibm.com>
612
613 * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
614 * doc/c-ppc.texi (PowerPC-Opts): Likewise.
615 * config/tc-ppc.c (md_show_usage): Likewise.
616 (ppc_handle_align): Handle power8's group ending nop.
617
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6182013-01-10 Sean Keys <skeys@ipdatasys.com>
619
620 * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
af89796a 621 that the assember exits after the opcodes have been printed.
f4b1f6a9 622
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6232013-01-10 H.J. Lu <hongjiu.lu@intel.com>
624
625 * app.c: Remove trailing white spaces.
626 * as.c: Likewise.
627 * as.h: Likewise.
628 * cond.c: Likewise.
629 * dw2gencfi.c: Likewise.
630 * dwarf2dbg.h: Likewise.
631 * ecoff.c: Likewise.
632 * input-file.c: Likewise.
633 * itbl-lex.h: Likewise.
634 * output-file.c: Likewise.
635 * read.c: Likewise.
636 * sb.c: Likewise.
637 * subsegs.c: Likewise.
638 * symbols.c: Likewise.
639 * write.c: Likewise.
640 * config/tc-i386.c: Likewise.
641 * doc/Makefile.am: Likewise.
642 * doc/Makefile.in: Likewise.
643 * doc/c-aarch64.texi: Likewise.
644 * doc/c-alpha.texi: Likewise.
645 * doc/c-arc.texi: Likewise.
646 * doc/c-arm.texi: Likewise.
647 * doc/c-avr.texi: Likewise.
648 * doc/c-bfin.texi: Likewise.
649 * doc/c-cr16.texi: Likewise.
650 * doc/c-d10v.texi: Likewise.
651 * doc/c-d30v.texi: Likewise.
652 * doc/c-h8300.texi: Likewise.
653 * doc/c-hppa.texi: Likewise.
654 * doc/c-i370.texi: Likewise.
655 * doc/c-i386.texi: Likewise.
656 * doc/c-i860.texi: Likewise.
657 * doc/c-m32c.texi: Likewise.
658 * doc/c-m32r.texi: Likewise.
659 * doc/c-m68hc11.texi: Likewise.
660 * doc/c-m68k.texi: Likewise.
661 * doc/c-microblaze.texi: Likewise.
662 * doc/c-mips.texi: Likewise.
663 * doc/c-msp430.texi: Likewise.
664 * doc/c-mt.texi: Likewise.
665 * doc/c-s390.texi: Likewise.
666 * doc/c-score.texi: Likewise.
667 * doc/c-sh.texi: Likewise.
668 * doc/c-sh64.texi: Likewise.
669 * doc/c-tic54x.texi: Likewise.
670 * doc/c-tic6x.texi: Likewise.
671 * doc/c-v850.texi: Likewise.
672 * doc/c-xc16x.texi: Likewise.
673 * doc/c-xgate.texi: Likewise.
674 * doc/c-xtensa.texi: Likewise.
675 * doc/c-z80.texi: Likewise.
676 * doc/internals.texi: Likewise.
677
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6782013-01-10 Roland McGrath <mcgrathr@google.com>
679
680 * hash.c (hash_new_sized): Make it global.
681 * hash.h: Declare it.
682 * macro.c (define_macro): Use hash_new_sized instead of hash_new,
683 pass a small size.
684
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6852013-01-10 Will Newton <will.newton@imgtec.com>
686
687 * Makefile.am: Add Meta.
688 * Makefile.in: Regenerate.
689 * config/tc-metag.c: New file.
690 * config/tc-metag.h: New file.
691 * configure.tgt: Add Meta.
692 * doc/Makefile.am: Add Meta.
693 * doc/Makefile.in: Regenerate.
694 * doc/all.texi: Add Meta.
695 * doc/as.texiinfo: Document Meta options.
696 * doc/c-metag.texi: New file.
697
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6982013-01-09 Steve Ellcey <sellcey@mips.com>
699
700 * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
701 calls.
702 * config/tc-mips.c (internalError): Remove, replace with abort.
703
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7042013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
705
706 * config/tc-aarch64.c (parse_operands): Change to compare the result
707 of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
708
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7092013-01-07 Nick Clifton <nickc@redhat.com>
710
711 PR gas/14887
712 * config/tc-arm.c (skip_past_char): Skip whitespace before the
713 anticipated character.
714 * config/tc-arm.c (parse_address_main): Delete skip of whitespace
715 here as it is no longer needed.
716
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7172013-01-06 Andreas Schwab <schwab@linux-m68k.org>
718
719 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
720 * doc/c-score.texi (SCORE-Opts): Likewise.
721 * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
722
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7232013-01-04 Juergen Urban <JuergenUrban@gmx.de>
724
725 * config/tc-mips.c: Add support for MIPS r5900.
726 Add M_LQ_AB and M_SQ_AB to support large values for instructions
727 lq and sq.
728 (can_swap_branch_p, get_append_method): Detect some conditional
729 short loops to fix a bug on the r5900 by NOP in the branch delay
730 slot.
731 (M_MUL): Support 3 operands in multu on r5900.
732 (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
733 (s_mipsset): Force 32 bit floating point on r5900.
734 (mips_ip): Check parameter range of instructions mfps and mtps on
735 r5900.
736 * configure.in: Detect CPU type when target string contains r5900
737 (e.g. mips64r5900el-linux-gnu).
738
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7392013-01-02 H.J. Lu <hongjiu.lu@intel.com>
740
741 * as.c (parse_args): Update copyright year to 2013.
742
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7432013-01-02 Yufeng Zhang <yufeng.zhang@arm.com>
744
745 * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
746 and "cortex57".
747
517bb291 7482013-01-02 Nick Clifton <nickc@redhat.com>
d709e4e6 749
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750 PR gas/14987
751 * config/tc-arm.c (parse_address_main): Skip whitespace before a
752 closing bracket.
d709e4e6 753
517bb291 754For older changes see ChangeLog-2012
08d56133 755\f
517bb291 756Copyright (C) 2013 Free Software Foundation, Inc.
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757
758Copying and distribution of this file, with or without modification,
759are permitted in any medium without royalty provided the copyright
760notice and this notice are preserved.
761
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762Local Variables:
763mode: change-log
764left-margin: 8
765fill-column: 74
766version-control: never
767End: