]> git.ipfire.org Git - thirdparty/binutils-gdb.git/blame - gas/ChangeLog
* ld-cris/asneed1.d: New test.
[thirdparty/binutils-gdb.git] / gas / ChangeLog
CommitLineData
56d438b1
CF
12013-10-14 Richard Sandiford <rdsandiford@googlemail.com>
2 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
3
4 * config/tc-mips.c (options): Add OPTION_MSA and OPTION_NO_MSA.
5 (md_longopts): Add mmsa and mno-msa.
6 (mips_ases): Add msa.
7 (RTYPE_MASK): Update.
8 (RTYPE_MSA): New define.
9 (OT_REG_ELEMENT): Replace with...
10 (OT_INTEGER_INDEX, OT_REG_INDEX): ...these new operand types.
11 (mips_operand_token): Replace reg_element with index.
12 (mips_parse_argument_token): Treat vector indices as separate tokens.
13 Handle register indices.
14 (md_begin): Add MSA register names.
15 (operand_reg_mask): Handle cases for OP_IMM_INDEX and OP_REG_INDEX.
16 (convert_reg_type): Handle cases for OP_REG_MSA and OP_REG_MSA_CTRL.
17 (match_mdmx_imm_reg_operand): Update accordingly.
18 (match_imm_index_operand): New function.
19 (match_reg_index_operand): New function.
20 (match_operand): Handle cases for OP_IMM_INDEX and OP_REG_INDEX.
21 (md_convert_frag): Convert bz.b/h/w/d, bnz.b/h/w/d, bz.v bnz.v.
22 (md_show_usage): Print -mmsa and -mno-msa.
23 * doc/as.texinfo: Document -mmsa and -mno-msa.
24 * doc/c-mips.texi: Document -mmsa and -mno-msa.
25 Document .set msa and .set nomsa.
26
b2e951ec
NC
272013-10-14 Nick Clifton <nickc@redhat.com>
28
29 * read.c (add_include_dir): Use xrealloc.
30 * config/tc-score.c (do_macro_bcmp): Initialise inst_main.
31 * config/tc-tic6x.c (tic6x_parse_operand): Initialise second_reg.
32
ae335a4e
SL
332013-10-13 Sandra Loosemore <sandra@codesourcery.com>
34
35 * config/tc-nios2.c (nios2_consume_arg): Make the "ba" warning
36 also test/refer to "sstatus". Reformat the warning message.
37
0e1c2434
SK
382013-10-10 Sean Keys <skeys@ipdatasys.com>
39
40 * tc-xgate.c (xgate_find_match): Refactor opcode matching.
41
47cd3fa7
JB
422013-10-10 Jan Beulich <jbeulich@suse.com>
43
44 * tc-i386-intel.c (i386_intel_simplify_register): Suppress base/index
45 swapping for bndmk, bndldx, and bndstx.
46
6085f853
NC
472013-10-09 Nick Clifton <nickc@redhat.com>
48
b7b2bb1d
NC
49 PR gas/16025
50 * config/tc-epiphany.c (md_convert_frag): Add missing break
51 statement.
52
6085f853
NC
53 PR gas/16026
54 * config/tc-mn10200.c (md_convert_frag): Add missing break
55 statement.
56
cecf1424
JB
572013-10-08 Jan Beulich <jbeulich@suse.com>
58
59 * tc-i386.c (check_word_reg): Remove misplaced "else".
60 (check_long_reg): Restore symmetry with check_word_reg.
61
d3bfe16e
JB
622013-10-08 Jan Beulich <jbeulich@suse.com>
63
64 * gas/config/tc-arm.c (do_t_push_pop): Honor inst.size_req. Simplify
65 LR/PC check.
66
38d77545
NC
672013-10-08 Nick Clifton <nickc@redhat.com>
68
69 * config/tc-msp430.c (msp430_operands): Accept "<foo>.a" as an alias
70 for "<foo>a". Issue error messages for unrecognised or corrrupt
71 size extensions.
72
fe8b4cc3
KT
732013-10-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
74
75 * config/tc-arm.c (do_t_mvn_tst): Use narrow form for tst when
76 possible.
77
c7b0bd56
SE
782013-09-30 Saravanan Ekanathan <saravanan.ekanathan@amd.com>
79
80 * config/tc-i386.c (cpu_arch): Add CPU_BDVER4_FLAGS.
81 * doc/c-i386.texi: Add -march=bdver4 option.
82
cc9afea3
AM
832013-09-20 Alan Modra <amodra@gmail.com>
84
85 * configure: Regenerate.
86
58ca03a2
TG
872013-09-18 Tristan Gingold <gingold@adacore.com>
88
89 * NEWS: Add marker for 2.24.
90
ab905915
NC
912013-09-18 Nick Clifton <nickc@redhat.com>
92
93 * config/tc-msp430.c (OPTION_MOVE_DATA): Define.
94 (move_data): New variable.
95 (md_parse_option): Parse -md.
96 (msp430_section): New function. Catch references to the .bss or
97 .data sections and generate a special symbol for use by the libcrt
98 library.
99 (md_pseudo_table): Intercept .section directives.
100 (md_longopt): Add -md
101 (md_show_usage): Likewise.
102 (msp430_operands): Generate a warning message if a NOP is inserted
103 into the instruction stream.
104 * doc/c-msp430.texi (node MSP430 Options): Document -md option.
105
f1c38003
SE
1062013-09-17 Doug Gilmore <Doug.Gilmore@imgtec.com>
107
108 * config/tc-mips.c (mips_elf_final_processing): Set
ab905915 109 EF_MIPS_FP64 for -mgp32 -mfp64, removing old FIXME.
f1c38003 110
1d50d57c
WN
1112013-09-16 Will Newton <will.newton@linaro.org>
112
113 * config/tc-arm.c (do_neon_ld_st_interleave): Add constraint
114 disallowing element size 64 with interleave other than 1.
115
173d3447
CF
1162013-09-12 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
117
118 * config/tc-mips.c (match_insn): Set error when $31 is used for
119 bltzal* and bgezal*.
120
ac21e7da
TG
1212013-09-04 Tristan Gingold <gingold@adacore.com>
122
123 * config/tc-ppc.c (md_apply_fix): Handle defined after use toc
124 symbols.
125
74db7efb
NC
1262013-09-04 Roland McGrath <mcgrathr@google.com>
127
128 PR gas/15914
129 * config/tc-arm.c (T16_32_TAB): Add _udf.
130 (do_t_udf): New function.
131 (insns): Add "udf".
132
664a88c6
DD
1332013-08-23 Sandeep Kumar Singh <Sandeep.Singh2@kpitcummins.com>
134
135 * config/rx-parse.y: Rearrange the components of a bison grammar to issue
136 assembler errors at correct position.
137
9aff4b7a
NC
1382013-08-23 Yuri Chornoivan <yurchor@ukr.net>
139
140 PR binutils/15834
141 * config/tc-ia64.c: Fix typos.
142 * config/tc-sparc.c: Likewise.
143 * config/tc-z80.c: Likewise.
144 * doc/c-i386.texi: Likewise.
145 * doc/c-m32r.texi: Likewise.
146
4f2374c7
WN
1472013-08-23 Will Newton <will.newton@linaro.org>
148
9aff4b7a 149 * config/tc-arm.c: (do_neon_ldx_stx): Add extra constraints
4f2374c7
WN
150 for pre-indexed addressing modes.
151
b4e6cb80
AM
1522013-08-21 Alan Modra <amodra@gmail.com>
153
154 * symbols.c (fb_label_instance_inc, fb_label_instance): Properly
155 range check label number for use with fb_low_counter array.
156
1661c76c
RS
1572013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
158
159 * config/tc-mips.c (mips_check_isa_supports_ase, reg_lookup)
160 (mips_parse_argument_token, validate_micromips_insn, md_begin)
161 (check_regno, match_float_constant, check_completed_insn, append_insn)
162 (match_insn, match_mips16_insn, match_insns, macro_start)
163 (macro_build_ldst_constoffset, load_register, macro, mips_ip)
164 (mips16_ip, mips_set_option_string, md_parse_option)
165 (mips_after_parse_args, mips_after_parse_args, md_pcrel_from)
166 (md_apply_fix, s_align, s_option, s_mipsset, s_tls_rel_directive)
167 (s_gpword, s_gpdword, s_ehword, s_nan, tc_gen_reloc, md_convert_frag)
168 (s_mips_end, s_mips_ent, s_mips_frame, s_mips_mask, mips_parse_cpu):
169 Start error messages with a lower-case letter. Do not end error
170 messages with a period. Wrap long messages to 80 character-lines.
171 Use "cannot" instead of "can't" and "can not".
172
b0e6f033
RS
1732013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
174
175 * config/tc-mips.c (imm_expr): Expand comment.
176 (set_at, macro, mips16_macro): Expect imm_expr to be O_constant
177 when populated.
178
e423441d
RS
1792013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
180
181 * config/tc-mips.c (imm2_expr): Delete.
182 (md_assemble, match_insn, imm2_expr.X_op, mips_ip): Update accordingly.
183
5e0dc5ba
RS
1842013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
185
186 * config/tc-mips.c (report_bad_range, report_bad_field): Delete.
187 (macro): Remove M_DEXT and M_DINS handling.
188
60f20e8b
RS
1892013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
190
191 * config/tc-mips.c (mips_arg_info): Replace allow_nonconst and
192 lax_max with lax_match.
193 (match_int_operand): Update accordingly. Don't report an error
194 for !lax_match-only cases.
195 (match_insn): Replace more_alts with lax_match and use it to
196 initialize the mips_arg_info field. Add a complete_p parameter.
197 Handle implicit VU0 suffixes here.
198 (match_invalid_for_isa, match_insns, match_mips16_insns): New
199 functions.
200 (mips_ip, mips16_ip): Use them.
201
d436c1c2
RS
2022013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
203
204 * config/tc-mips.c (match_expression): Report uses of registers here.
205 Add a "must be an immediate expression" error. Handle elided offsets
206 here rather than...
207 (match_int_operand): ...here.
208
1a00e612
RS
2092013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
210
211 * config/tc-mips.c (mips_arg_info): Remove soft_match.
212 (match_out_of_range, match_not_constant): New functions.
213 (match_const_int): Remove fallback parameter and check for soft_match.
214 Use match_not_constant.
215 (match_mapped_int_operand, match_addiusp_operand)
216 (match_perf_reg_operand, match_save_restore_list_operand)
217 (match_mdmx_imm_reg_operand): Update accordingly. Use
218 match_out_of_range and set_insn_error* instead of as_bad.
219 (match_int_operand): Likewise. Use match_not_constant in the
220 !allows_nonconst case.
221 (match_float_constant): Report invalid float constants.
222 (match_insn, match_mips16_insn): Remove soft_match code. Rely on
223 match_float_constant to check for invalid constants. Fail the
224 match if match_const_int or match_float_constant return false.
225 (mips_ip): Update accordingly.
226 (mips16_ip): Likewise. Undo null termination of instruction name
227 once lookup is complete.
228
e3de51ce
RS
2292013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
230
231 * config/tc-mips.c (mips_insn_error_format): New enum.
232 (mips_insn_error): New struct.
233 (insn_error): Change to a mips_insn_error.
234 (clear_insn_error, set_insn_error_format, set_insn_error)
235 (set_insn_error_i, set_insn_error_ss, report_insn_error): New
236 functions.
237 (mips_parse_argument_token, md_assemble, match_insn)
238 (match_mips16_insn): Use them instead of manipulating insn_error
239 directly.
240 (mips_ip, mips16_ip): Likewise. Simplify control flow.
241
97d87491
RS
2422013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
243
244 * config/tc-mips.c (normalize_constant_expr): Move further up file.
245 (normalize_address_expr): Likewise.
246 (match_insn, match_mips16_insn): New functions, split out from...
247 (mips_ip, mips16_ip): ...here.
248
0f35dbc4
RS
2492013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
250
251 * config/tc-mips.c (operand_reg_mask, match_operand): Handle
252 OP_OPTIONAL_REG.
253 (mips_ip, mips16_ip): Use mips_optional_operand_p to check
254 for optional operands.
255
27285eed
AM
2562013-08-16 Alan Modra <amodra@gmail.com>
257
258 * config/tc-ppc.c (ppc_elf_cons): Allow @l and other reloc
259 modifiers generally.
260
cbe02d4f
AM
2612013-08-16 Alan Modra <amodra@gmail.com>
262
263 * config/tc-ppc.c (ppc_elf_lcomm): Use subsection 1.
264
3c02c47f
DE
2652013-08-14 David Edelsohn <dje.gcc@gmail.com>
266
267 * config/tc-ppc.c (ppc_comm): Accept optional fourth .lcomm
268 argument as alignment.
269
4046d87a
NC
2702013-08-09 Nick Clifton <nickc@redhat.com>
271
272 * config/tc-rl78.c (elf_flags): New variable.
273 (enum options): Add OPTION_G10.
274 (md_longopts): Add mg10.
275 (md_parse_option): Parse -mg10.
276 (rl78_elf_final_processing): New function.
277 * config/tc-rl78.c (tc_final_processing): Define.
278 * doc/c-rl78.texi: Document -mg10 option.
279
ee5734f0
RS
2802013-08-06 Jürgen Urban <JuergenUrban@gmx.de>
281
282 * config/tc-mips.c (match_vu0_suffix_operand): Allow single-channel
283 suffixes to be elided too.
284 (mips_lookup_insn): Don't reject INSN2_VU0_CHANNEL_SUFFIX here.
285 (mips_ip): Assume .xyzw if no VU0 suffix is specified. Allow +N
286 to be omitted too.
287
13896403
RS
2882013-08-05 John Tytgat <john@bass-software.com>
289
290 * po/POTFILES.in: Regenerate.
291
d6787ef9
EB
2922013-08-05 Eric Botcazou <ebotcazou@adacore.com>
293 Konrad Eisele <konrad@gaisler.com>
294
295 * config/tc-sparc.c (sparc_arch_types): Add leon.
296 (sparc_arch): Move sparc4 around and add leon.
297 (sparc_target_format): Document -Aleon.
298 * doc/c-sparc.texi: Likewise.
299
da8bca91
RS
3002013-08-05 Richard Sandiford <rdsandiford@googlemail.com>
301
302 * config/tc-mips.c (mips_lookup_insn): Make length and opend signed.
303
14daeee3
RS
3042013-08-04 Jürgen Urban <JuergenUrban@gmx.de>
305 Richard Sandiford <rdsandiford@googlemail.com>
306
307 * config/tc-mips.c (MAX_OPERANDS): Bump to 6.
308 (RWARN): Bump to 0x8000000.
309 (RTYPE_VI, RTYPE_VF, RTYPE_R5900_I, RTYPE_R5900_Q, RTYPE_R5900_R)
310 (RTYPE_R5900_ACC): New register types.
311 (RTYPE_MASK): Include them.
312 (R5900_I_NAMES, R5900_Q_NAMES, R5900_R_NAMES, R5900_ACC_NAMES): New
313 macros.
314 (reg_names): Include them.
315 (mips_parse_register_1): New function, split out from...
316 (mips_parse_register): ...here. Add a channels_ptr parameter.
317 Look for VU0 channel suffixes when nonnull.
318 (reg_lookup): Update the call to mips_parse_register.
319 (mips_parse_vu0_channels): New function.
320 (OT_CHANNELS, OT_DOUBLE_CHAR): New mips_operand_token_types.
321 (mips_operand_token): Add a "channels" field to the union.
322 Extend the comment above "ch" to OT_DOUBLE_CHAR.
323 (mips_parse_base_start): Match -- and ++. Handle channel suffixes.
324 (mips_parse_argument_token): Handle channel suffixes here too.
325 (validate_mips_insn): Handle INSN2_VU0_CHANNEL_SUFFIX.
326 Ignore OP_VU0_MATCH_SUFFIX when calculating the used bits.
327 Handle '#' formats.
328 (md_begin): Register $vfN and $vfI registers.
329 (operand_reg_mask): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX.
330 (convert_reg_type): Handle OP_REG_VI, OP_REG_VF, OP_REG_R5900_I,
331 OP_REG_R5900_Q, OP_REG_R5900_R and OP_REG_R5900_ACC.
332 (match_vu0_suffix_operand): New function.
333 (match_operand): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX.
334 (macro): Use "+7" rather than "E" for LDQ2 and STQ2.
335 (mips_lookup_insn): New function.
336 (mips_ip): Use it. Allow "+K" operands to be elided at the end
337 of an instruction. Handle '#' sequences.
338
c0ebe874
RS
3392013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
340
341 * config/tc-mips.c (macro, mips16_macro): Create an array of operand
342 values and use it instead of sreg, treg, xreg, etc.
343
3ccad066
RS
3442013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
345
346 * config/tc-mips.c (match_int_operand): Use mips_int_operand_min
347 and mips_int_operand_max.
348 (mips16_immed_operand, mips16_immed_operands, MIPS16_NUM_IMMED):
349 Delete.
350 (mips16_immed_operand, mips16_immed_in_range_p): New functions.
351 (mips16_immed, mips16_extended_frag): Use them. Use mips_int_operand
352 instead of mips16_immed_operand.
353
0acfaea6
RS
3542013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
355
356 * config/tc-mips.c (mips16_macro): Don't use move_register.
357 (mips16_ip): Allow macros to use 'p'.
358
fc76e730
RS
3592013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
360
361 * config/tc-mips.c (MAX_OPERANDS): New macro.
362 (mips_operand_array): New structure.
363 (mips_operands, mips16_operands, micromips_operands): New arrays.
364 (micromips_to_32_reg_b_map, micromips_to_32_reg_c_map)
365 (micromips_to_32_reg_e_map, micromips_to_32_reg_f_map)
366 (micromips_to_32_reg_g_map, micromips_to_32_reg_l_map)
367 (micromips_to_32_reg_q_map): Delete.
368 (insn_operands, insn_opno, insn_extract_operand): New functions.
369 (validate_mips_insn): Take a mips_operand_array as argument and
370 use it to build up a list of operands. Extend to handle INSN_MACRO
371 and MIPS16.
372 (validate_mips16_insn): New function.
373 (validate_micromips_insn): Take a mips_operand_array as argument.
374 Handle INSN_MACRO.
375 (md_begin): Initialize mips_operands, mips16_operands and
376 micromips_operands. Call validate_mips_insn and
377 validate_micromips_insn for macro instructions too.
378 Call validate_mips16_insn for MIPS16 instructions.
379 (insn_read_mask, insn_write_mask, operand_reg_mask, insn_reg_mask):
380 New functions.
381 (gpr_read_mask, gpr_write_mask, fpr_read_mask, fpr_write_mask): Use
382 them. Handle INSN_UDI.
383 (get_append_method): Use gpr_read_mask.
384
26545944
RS
3852013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
386
387 * config/tc-mips.c (compact_branch_p, uncond_branch_p): Use the same
388 flags for MIPS16 and non-MIPS16 instructions.
389 (gpr_mod_mask): Move the INSN2_MOD_SP case outside the micromips block.
390 (gpr_read_mask): Use INSN2_READ_GPR_31 for MIPS16 instructions too.
391 (gpr_write_mask): Remove MIPS16_INSN_WRITE_SP handling.
392 (can_swap_branch_p, get_append_method): Use the same flags for MIPS16
393 and non-MIPS16 instructions. Fix formatting.
394
85fcb30f
RS
3952013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
396
397 * config/tc-mips.c (reg_needs_delay): Move later in file.
398 Use gpr_write_mask.
399 (insns_between): Use gpr_read_mask instead of EXTRACT_OPERAND.
400
43234a1e
L
4012013-07-26 Sergey Guriev <sergey.s.guriev@intel.com>
402 Alexander Ivchenko <alexander.ivchenko@intel.com>
403 Maxim Kuznetsov <maxim.kuznetsov@intel.com>
404 Sergey Lega <sergey.s.lega@intel.com>
405 Anna Tikhonova <anna.tikhonova@intel.com>
406 Ilya Tocar <ilya.tocar@intel.com>
407 Andrey Turetskiy <andrey.turetskiy@intel.com>
408 Ilya Verbin <ilya.verbin@intel.com>
409 Kirill Yukhin <kirill.yukhin@intel.com>
410 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
411
412 * config/tc-i386-intel.c (O_zmmword_ptr): New.
413 (i386_types): Add zmmword.
414 (i386_intel_simplify_register): Allow regzmm.
415 (i386_intel_simplify): Handle zmmwords.
416 (i386_intel_operand): Handle RC/SAE, vector operations and
417 zmmwords.
418 * config/tc-i386.c (ZMMWORD_MNEM_SUFFIX): New.
419 (struct RC_Operation): New.
420 (struct Mask_Operation): New.
421 (struct Broadcast_Operation): New.
422 (vex_prefix): Size of bytes increased to 4 to support EVEX
423 encoding.
424 (enum i386_error): Add new error codes: unsupported_broadcast,
425 broadcast_not_on_src_operand, broadcast_needed,
426 unsupported_masking, mask_not_on_destination, no_default_mask,
427 unsupported_rc_sae, rc_sae_operand_not_last_imm,
428 invalid_register_operand, try_vector_disp8.
429 (struct _i386_insn): Add new fields vrex, need_vrex, mask,
430 rounding, broadcast, memshift.
431 (struct RC_name): New.
432 (RC_NamesTable): New.
433 (evexlig): New.
434 (evexwig): New.
435 (extra_symbol_chars): Add '{'.
436 (cpu_arch): Add AVX512F, AVX512CD, AVX512ER and AVX512PF.
437 (i386_operand_type): Add regzmm, regmask and vec_disp8.
438 (match_mem_size): Handle zmmwords.
439 (operand_type_match): Handle zmm-registers.
440 (mode_from_disp_size): Handle vec_disp8.
441 (fits_in_vec_disp8): New.
442 (md_begin): Handle {} properly.
443 (type_names): Add "rZMM", "Mask reg" and "Vector d8".
444 (build_vex_prefix): Handle vrex.
445 (build_evex_prefix): New.
446 (process_immext): Adjust to properly handle EVEX.
447 (md_assemble): Add EVEX encoding support.
448 (swap_2_operands): Correctly handle operands with masking,
449 broadcasting or RC/SAE.
450 (check_VecOperands): Support EVEX features.
451 (VEX_check_operands): Properly handle 16 upper [xyz]mm registers.
452 (match_template): Support regzmm and handle new error codes.
453 (process_suffix): Handle zmmwords and zmm-registers.
454 (check_byte_reg): Extend to zmm-registers.
455 (process_operands): Extend to zmm-registers.
456 (build_modrm_byte): Handle EVEX.
457 (output_insn): Adjust to properly handle EVEX case.
458 (disp_size): Handle vec_disp8.
459 (output_disp): Support compressed disp8*N evex feature.
460 (output_imm): Handle RC/SAE immediates properly.
461 (check_VecOperations): New.
462 (i386_immediate): Handle EVEX features.
463 (i386_index_check): Handle zmmwords and zmm-registers.
464 (RC_SAE_immediate): New.
465 (i386_att_operand): Handle EVEX features.
466 (parse_real_register): Add a check for ZMM/Mask registers.
467 (OPTION_MEVEXLIG): New.
468 (OPTION_MEVEXWIG): New.
469 (md_longopts): Add mevexlig and mevexwig.
470 (md_parse_option): Handle mevexlig and mevexwig options.
471 (md_show_usage): Add description for mevexlig and mevexwig.
472 * doc/c-i386.texi: Document avx512f/.avx512f, avx512cd/.avx512cd,
473 avx512er/.avx512er, avx512pf/.avx512pf, mevexlig and mevexwig.
474
a0046408
L
4752013-07-25 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
476
477 * config/tc-i386.c (cpu_arch): Add .sha.
478 * doc/c-i386.texi: Document sha/.sha.
479
7e8b059b
L
4802013-07-24 Anna Tikhonova <anna.tikhonova@intel.com>
481 Kirill Yukhin <kirill.yukhin@intel.com>
482 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
483
484 * config/tc-i386.c (BND_PREFIX): New.
485 (struct _i386_insn): Add new field bnd_prefix.
486 (add_bnd_prefix): New.
487 (cpu_arch): Add MPX.
488 (i386_operand_type): Add regbnd.
489 (md_assemble): Handle BND prefixes.
490 (parse_insn): Likewise.
491 (output_branch): Likewise.
492 (output_jump): Likewise.
493 (build_modrm_byte): Handle regbnd.
494 (OPTION_MADD_BND_PREFIX): New.
495 (md_longopts): Add entry for 'madd-bnd-prefix'.
496 (md_parse_option): Handle madd-bnd-prefix option.
497 (md_show_usage): Add description for madd-bnd-prefix
498 option.
499 * doc/c-i386.texi: Document mpx/.mpx and -madd-bnd-prefix.
500
7fa9fcb6
TG
5012013-07-24 Tristan Gingold <gingold@adacore.com>
502
503 * config/tc-ppc.c (md_apply_fix): Adjust BFD_RELOC_PPC_B16 on
504 xcoff targets.
505
614eb277
AK
5062013-07-24 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
507
508 * config/tc-s390.c (s390_machine): Don't force the .machine
509 argument to lower case.
510
e673710a
KT
5112013-07-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
512
513 * config/tc-arm.c (s_arm_arch_extension): Improve error message
514 for invalid extension.
515
69091a2c
YZ
5162013-07-19 Yufeng Zhang <yufeng.zhang@arm.com>
517
518 * config/tc-aarch64.c (enum aarch64_abi_type): New enumeration tag.
519 (AARCH64_ABI_LP64, AARCH64_ABI_ILP32): New enumerators.
520 (aarch64_abi): New variable.
521 (ilp32_p): Change to be a macro.
522 (aarch64_opts): Remove the support for option -milp32 and -mlp64.
523 (struct aarch64_option_abi_value_table): New struct.
524 (aarch64_abis): New table.
525 (aarch64_parse_abi): New function.
526 (aarch64_long_opts): Add entry for -mabi=.
527 * doc/as.texinfo (Target AArch64 options): Document -mabi.
528 * doc/c-aarch64.texi: Likewise.
529
faf786e6
NC
5302013-07-18 Jim Thomas <thomas@cfht.hawaii.edu>
531
532 * config/tc-i386-intel.c (i386_intel_operand): Fixed signed vs
533 unsigned comparison.
534
f0c00282
NC
5352013-07-18 Sandeep Kumar Singh <Sandeep.Singh2@kpitcummins.com>
536
cbe02d4f 537 * config/rx-defs.h: Add macros for RX100, RX200, RX600, and
f0c00282 538 RX610.
cbe02d4f 539 * config/rx-parse.y: (rx_check_float_support): Add function to
f0c00282
NC
540 check floating point operation support for target RX100 and
541 RX200.
cbe02d4f
AM
542 * config/tc-rx.c: Add CPU options RX100, RX200, RX600, and RX610.
543 * doc/c-rx.texi: Add -mcpu option to recognize macros for RX100,
544 RX200, RX600, and RX610
f0c00282 545
8c997c27
NC
5462013-07-18 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
547
548 * config/tc-avr.c (md_show_usage): Add avrxmega2 to help text
549
8be59acb
NC
5502013-07-18 Vishnu K.S <vishnu.k_s@atmel.com>
551
552 * config/tc-avr.c: Make ata6289's ISA to AVR_ISA_AVR4.
553 * doc/c-avr.texi: Likewise.
554
4a06e5a2
RS
5552013-07-15 Richard Sandiford <rdsandiford@googlemail.com>
556
557 * config/tc-mips.c (match_save_restore_list_operand): Avoid -Wformat
558 error with older GCCs.
559 (mips16_macro_build): Dereference args.
560
a92713e6
RS
5612013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
562
563 * config/tc-mips.c (mips_prefer_vec_regno, mips_parse_register):
564 New functions, split out from...
565 (reg_lookup): ...here. Remove itbl support.
566 (reglist_lookup): Delete.
567 (mips_operand_token_type): New enum.
568 (mips_operand_token): New structure.
569 (mips_operand_tokens): New variable.
570 (mips_add_token, mips_parse_base_start, mips_parse_argument_token)
571 (mips_parse_arguments): New functions.
572 (md_begin): Initialize mips_operand_tokens.
573 (mips_arg_info): Add a token field. Remove optional_reg field.
574 (match_char, match_expression): New functions.
575 (match_const_int): Use match_expression. Remove "s" argument
576 and return a boolean result. Remove O_register handling.
577 (match_regno, match_reg, match_reg_range): New functions.
578 (match_int_operand, match_mapped_int_operand, match_msb_operand)
579 (match_reg_operand, match_reg_pair_operand, match_perf_reg_operand)
580 (match_addiusp_operand, match_clo_clz_dest_operand)
581 (match_lwm_swm_list_operand, match_entry_exit_operand)
582 (match_save_restore_list_operand, match_mdmx_imm_reg_operand)
583 (match_tied_reg_operand): Remove "s" argument and return a boolean
584 result. Match tokens rather than text. Update calls to
585 match_const_int. Rely on match_regno to call check_regno.
586 (match_pcrel_operand, match_pc_operand): Replace "s" argument with
587 "arg" argument. Return a boolean result.
588 (parse_float_constant): Replace with...
589 (match_float_constant): ...this new function.
590 (match_operand): Remove "s" argument and return a boolean result.
591 Update calls to subfunctions.
592 (mips_ip, mips16_ip): Call mips_parse_arguments. Use match routines
593 rather than string-parsing routines. Update handling of optional
594 registers for token scheme.
595
89565f1b
RS
5962013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
597
598 * config/tc-mips.c (parse_float_constant): Split out from...
599 (mips_ip): ...here.
600
3c14a432
RS
6012013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
602
603 * config/tc-mips.c (INSERT_BITS, INSERT_OPERAND, MIPS16_INSERT_OPERAND):
604 Delete.
605
364215c8
RS
6062013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
607
608 * config/tc-mips.c (mips32_to_16_reg_map): Delete.
609 (match_entry_exit_operand): New function.
610 (match_save_restore_list_operand): Likewise.
611 (match_operand): Use them.
612 (check_absolute_expr): Delete.
613 (mips16_ip): Rewrite main parsing loop to use mips_operands.
614
9e12b7a2
RS
6152013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
616
617 * config/tc-mips.c: Enable functions commented out in previous patch.
618 (SKIP_SPACE_TABS): Move further up file.
619 (mips32_to_micromips_reg_b_map, mips32_to_micromips_reg_c_map)
620 (mips32_to_micromips_reg_d_map, mips32_to_micromips_reg_e_map)
621 (ips32_to_micromips_reg_f_map, mips32_to_micromips_reg_g_map)
622 (mips32_to_micromips_reg_l_map, mips32_to_micromips_reg_m_map)
623 (mips32_to_micromips_reg_q_map, mips32_to_micromips_reg_n_map)
624 (micromips_imm_b_map, micromips_imm_c_map): Delete.
625 (mips_lookup_reg_pair): Delete.
626 (macro): Use report_bad_range and report_bad_field.
627 (mips_immed, expr_const_in_range): Delete.
628 (mips_ip): Rewrite main parsing loop to use new functions.
629
a1d78564
RS
6302013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
631
632 * config/tc-mips.c (mips_oddfpreg_ok): Move further up file.
633 Change return type to bfd_boolean.
634 (report_bad_range, report_bad_field): New functions.
635 (mips_arg_info): New structure.
636 (match_const_int, convert_reg_type, check_regno, match_int_operand)
637 (match_mapped_int_operand, match_msb_operand, match_reg_operand)
638 (match_reg_pair_operand, match_pcrel_operand, match_perf_reg_operand)
639 (match_addiusp_operand, match_clo_clz_dest_operand)
640 (match_lwm_swm_list_operand, match_mdmx_imm_reg_operand)
641 (match_pc_operand, match_tied_reg_operand, match_operand)
642 (check_completed_insn): New functions, commented out for now.
643
e077a1c8
RS
6442013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
645
646 * config/tc-mips.c (insn_insert_operand): New function.
647 (macro_build, mips16_macro_build): Put null character check
648 in the for loop and convert continues to breaks. Use operand
649 structures to handle constant operands.
650
ab902481
RS
6512013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
652
653 * config/tc-mips.c (validate_mips_insn): Move further up file.
654 Add insn_bits and decode_operand arguments. Use the mips_operand
655 fields to work out which bits an operand occupies. Detect double
656 definitions.
657 (validate_micromips_insn): Move further up file. Call into
658 validate_mips_insn.
659
2f8b73cc
RS
6602013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
661
662 * config/tc-mips.c (mips16_macro_build): Remove 'Y' case.
663
c8276761
RS
6642013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
665
666 * config/tc-mips.c (macro_build): Take an int for "C", "k", "\\"
667 and "~".
668 (macro): Update accordingly.
669
77bd4346
RS
6702013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
671
672 * config/tc-mips.c (imm_expr, imm2_expr, offset_expr): Tweak commentary.
673 (imm_reloc): Delete.
674 (md_assemble): Remove imm_reloc handling.
675 (mips_ip): Update commentary. Use offset_expr and offset_reloc
676 rather than imm_expr and imm_reloc for 'i', 'j' and 'u'.
677 Use a temporary array rather than imm_reloc when parsing
678 constant expressions. Remove imm_reloc initialization.
679 (mips16_ip): Update commentary. Use offset_expr and offset_reloc
680 for the relaxable field. Use a relax_char variable to track the
681 type of this field. Remove imm_reloc initialization.
682
cc537e56
RS
6832013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
684
685 * config/tc-mips.c (mips16_ip): Handle "I".
686
ba92f887
MR
6872013-07-12 Maciej W. Rozycki <macro@codesourcery.com>
688
689 * config/tc-mips.c (mips_flag_nan2008): New variable.
690 (options): Add OPTION_NAN enum value.
691 (md_longopts): Handle it.
692 (md_parse_option): Likewise.
693 (s_nan): New function.
694 (mips_elf_final_processing): Handle EF_MIPS_NAN2008.
695 (md_show_usage): Add -mnan.
696
697 * doc/as.texinfo (Overview): Add -mnan.
698 * doc/c-mips.texi (MIPS Opts): Document -mnan.
699 (MIPS NaN Encodings): New node. Document .nan directive.
700 (MIPS-Dependent): List the new node.
701
c1094734
TG
7022013-07-09 Tristan Gingold <gingold@adacore.com>
703
704 * configure.com: Define HAVE_SYS_TYPES_H and HAVE_UNISTD_H
705
0cbbe1b8
RS
7062013-07-08 Richard Sandiford <rdsandiford@googlemail.com>
707
708 * config/tc-mips.c (mips_ip): Unconditionally parse an expression
709 for 'A' and assume that the constant has been elided if the result
710 is an O_register.
711
f2ae14a1
RS
7122013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
713
714 * config/tc-mips.c (gprel16_reloc_p): New function.
715 (macro_read_relocs): Assume BFD_RELOC_LO16 if all relocs are
716 BFD_RELOC_UNUSED.
717 (offset_high_part, small_offset_p): New functions.
718 (nacro): Use them. Remove *_OB and *_DOB cases. For single-
719 register load and store macros, handle the 16-bit offset case first.
720 If a 16-bit offset is not suitable for the instruction we're
721 generating, load it into the temporary register using
722 ADDRESS_ADDI_INSN. Make the M_LI_DD code fall through into the
723 M_L_DAB code once the address has been constructed. For double load
724 and store macros, again handle the 16-bit offset case first.
725 If the second register cannot be accessed from the same high
726 part as the first, load it into AT using ADDRESS_ADDI_INSN.
727 Fix the handling of LD in cases where the first register is the
728 same as the base. Also handle the case where the offset is
729 not 16 bits and the second register cannot be accessed from the
730 same high part as the first. For unaligned loads and stores,
731 fuse the offbits == 12 and old "ab" handling. Apply this handling
732 whenever the second offset needs a different high part from the first.
733 Construct the offset using ADDRESS_ADDI_INSN where possible,
734 for offbits == 16 as well as offbits == 12. Use offset_reloc
735 when constructing the individual loads and stores.
736 (mips_ip): Set up imm_expr, imm2_expr, offset_expr, imm_reloc
737 and offset_reloc before matching against a particular opcode.
738 Handle elided 'A' constants. Allow 'A' constants to use
739 relocation operators.
740
5c324c16
RS
7412013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
742
743 * config/tc-mips.c (validate_mips_insn): Remove "[" and "]" handling.
744 (mips_ip): Likewise. Do not set is_mdmx for INSN_5400 instructions.
745 Check constraints on the VR5400 RZU.OB, SLL.OB and SRL.OB instructions.
746
23e69e47
RS
7472013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
748
749 * config/tc-mips.c (mips_ip): Preserve the real bit number for "+p".
750 Require the msb to be <= 31 for "+s". Check that the size is <= 31
751 for both "+s" and "+S".
752
27c5c572
RS
7532013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
754
755 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn):
756 (mips_ip, mips16_ip): Handle "+i".
757
e76ff5ab
RS
7582013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
759
760 * config/tc-mips.c (mips32_to_micromips_reg_h_map): Delete.
761 (micromips_to_32_reg_h_map): Rename to...
762 (micromips_to_32_reg_h_map1): ...this.
763 (micromips_to_32_reg_i_map): Rename to...
764 (micromips_to_32_reg_h_map2): ...this.
765 (mips_lookup_reg_pair): New function.
766 (gpr_write_mask, macro): Adjust after above renaming.
767 (validate_micromips_insn): Remove "mi" handling.
768 (mips_ip): Likewise. Parse both registers in a pair for "mh".
769
fa7616a4
RS
7702013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
771
772 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn)
773 (mips_ip): Remove "+D" and "+T" handling.
774
fb798c50
AK
7752013-07-05 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
776
777 * config/tc-s390.c (md_gather_operands, md_apply_fix): Support new
778 relocs.
779
2c0a3565
MS
7802013-07-03 Marcus Shawcroft <marcus.shawcroft@arm.com>
781
4aa2c5e2
MS
782 * config/tc-aarch64.c (reloc_table): Merge got_prel19 into got.
783
7842013-07-02 Marcus Shawcroft <marcus.shawcroft@arm.com>
785
2c0a3565
MS
786 * config/tc-aarch64.c (md_apply_fix): Reorder case values.
787 (aarch64_force_relocation): Likewise.
788
f40da81b
AM
7892013-07-02 Alan Modra <amodra@gmail.com>
790
791 * config/tc-ppc.c (ppc_elf_adjust_symtab): Don't make .TOC. weak.
792
81566a9b
MR
7932013-06-26 Maciej W. Rozycki <macro@codesourcery.com>
794
795 * doc/as.texinfo (Overview): Remove @samp from MIPS ISA names.
796 * doc/c-mips.texi (MIPS Options): Remove @sc from MIPS ISA names.
797 Replace @sc{mips16} with literal `MIPS16'.
798 (MIPS ISA): Replace @sc{mips3} with literal `MIPS III'.
799
a6bb11b2
YZ
8002013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
801
802 * config/tc-aarch64.c (reloc_table): Replace
803 BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with
804 BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to
805 BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and
806 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC.
807 (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC,
808 BFD_RELOC_AARCH64_LD32_GOT_LO12_NC,
809 BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC,
810 BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC,
811 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and
812 BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC.
813 (aarch64_force_relocation): Likewise.
814
cec5225b
YZ
8152013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
816
817 * config/tc-aarch64.c (ilp32_p): New static variable.
818 (elf64_aarch64_target_format): Return the target according to the
819 value of 'ilp32_p'.
820 (md_begin): Determine 'mach' according to the value of 'ilp32_p'.
821 (aarch64_opts): Add support for options '-milp32' and '-mlp64'.
822 (aarch64_dwarf2_addr_size): New function.
823 * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration.
824 (DWARF2_ADDR_SIZE): New define.
825
e335d9cb
RS
8262013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
827
828 * doc/c-mips.texi: Use ISA instead of @sc{isa}.
829
18870af7
RS
8302013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
831
832 * config/tc-mips.c (validate_mips_insn): Use STYPE rather than SHAMT.
833
833794fc
MR
8342013-06-25 Maciej W. Rozycki <macro@codesourcery.com>
835
836 * config/tc-mips.c (mips_set_options): Add insn32 member.
837 (mips_opts): Initialize it.
838 (NOP_INSN, NOP_INSN_SIZE): Handle insn32 mode.
839 (options): Add OPTION_INSN32 and OPTION_NO_INSN32 enum values.
840 (md_longopts): Add "minsn32" and "mno-insn32" options.
841 (is_size_valid): Handle insn32 mode.
842 (md_assemble): Pass instruction string down to macro.
843 (brk_fmt): Add second dimension and insn32 mode initializers.
844 (mfhl_fmt): Likewise.
845 (BRK_FMT, MFHL_FMT): Handle insn32 mode.
846 (macro_build) <'c'>: Handle microMIPS 32-bit BREAK encoding.
847 (macro_build_jalr, move_register): Handle insn32 mode.
848 (macro_build_branch_rs): Likewise.
849 (macro): Handle insn32 mode.
850 <M_JRADDIUSP>, <M_JRC>, <M_MOVEP>: New cases.
851 (mips_ip): Handle insn32 mode.
852 (md_parse_option): Handle OPTION_INSN32 and OPTION_NO_INSN32.
853 (s_mipsset): Handle "insn32" and "noinsn32" pseudo-ops.
854 (mips_handle_align): Handle insn32 mode.
855 (md_show_usage): Add -minsn32 and -mno-insn32.
856
857 * doc/as.texinfo (Target MIPS options): Add -minsn32 and
858 -mno-insn32 options.
859 (-minsn32, -mno-insn32): New options.
860 * doc/c-mips.texi (MIPS Opts): Add -minsn32 and -mno-insn32
861 options.
862 (MIPS assembly options): New node. Document .set insn32 and
863 .set noinsn32.
864 (MIPS-Dependent): List the new node.
865
d1706f38
NC
8662013-06-25 Nick Clifton <nickc@redhat.com>
867
868 * config/tc-msp430.c (msp430_srcoperand): Do not allow the use of
869 the PC in indirect addressing on 430xv2 parts.
870 (msp430_operands): Add version test to hardware bug encoding
871 restrictions.
872
477330fc
RM
8732013-06-24 Roland McGrath <mcgrathr@google.com>
874
d996d970
RM
875 * config/tc-arm.c (parse_reg_list): Use skip_past_char for '}',
876 so it skips whitespace before it.
877 (s_arm_unwind_save_mmxwr, s_arm_unwind_save_mmxwcg): Likewise.
878
477330fc
RM
879 * config/tc-arm.c (arm_symbol_chars): Include '{' and '}'.
880 (arm_reg_parse_multi): Skip whitespace first.
881 (parse_reg_list): Likewise.
882 (parse_vfp_reg_list): Likewise.
883 (s_arm_unwind_save_mmxwcg): Likewise.
884
24382199
NC
8852013-06-24 Nick Clifton <nickc@redhat.com>
886
887 PR gas/15623
888 * config/tc-arm.c (do_t_smc): Mark as ending an IT block.
889
c3678916
RS
8902013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
891
892 * config/tc-mips.c (mips_ip): Fix swapped bit numbers in comments.
893
42429eac
RS
8942013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
895
896 * config/tc-mips.c: Assert that offsetT and valueT are at least
897 8 bytes in size.
898 (GPR_SMIN, GPR_SMAX): New macros.
899 (macro, mips_ip): Remove code for 4-byte valueT and offsetT.
900
f3ded42a
RS
9012013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
902
903 * config/tc-mips.c: Remove OBJ_ELF, OBJ_MAYBE_ELF and IS_ELF
904 conditions. Remove any code deselected by them.
905 (s_mips_frame, s_mips_mask): Handle ECOFF_DEBUGGING case first.
906
e8044f35
RS
9072013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
908
909 * NEWS: Note removal of ECOFF support.
910 * doc/as.texinfo (--emulation): Update for the removal of MIPS ECOFF.
911 * Makefile.am (TARG_ENV_HFILES): Remove config/te-lnews.h.
912 (MULTI_CFILES): Remove config/e-mipsecoff.c.
913 * Makefile.in: Regenerate.
914 * configure.in: Remove MIPS ECOFF references.
915 (mips-sony-bsd*, mips-*-bsd*, mips-*-lnews*-ecoff, mips-*-*-ecoff):
916 Delete cases.
917 (mips-*-irix5*-*, mips*-*-linux*-*, mips*-*-freebsd*)
918 (mips*-*-kfreebsd*-gnu, mips-*-*-elf): Fold into...
919 (mips-*-*): ...this single case.
920 (mipsbecoff, mipslecoff, mipsecoff): Remove emulations. Expect
921 MIPS emulations to be e-mipself*.
922 * configure: Regenerate.
923 * configure.tgt (mips-sony-bsd*, mips-*-ultrix*, mips-*-osf*)
924 (mips-*-ecoff*, mips-*-pe*, mips-*-irix*, ips-*-lnews*, mips-*-riscos*)
925 (mips-*-sysv*): Remove coff and ecoff cases.
926 * as.c (mipsbecoff, mipslecoff, mipsecoff): Remove.
927 * ecoff.c: Remove reference to MIPS ECOFF.
928 * config/e-mipsecoff.c, config/te-lnews.h: Delete files.
929 * config/tc-mips.c (ECOFF_LITTLE_FORMAT): Delete.
930 (RDATA_SECTION_NAME, mips_target_form): Remove COFF and ECOFF cases.
931 (mips_hi_fixup): Tweak comment.
932 (append_insn): Require a howto.
933 (mips_after_parse_args): Remove OBJ_MAYBE_ECOFF code.
934
98508b2a
RS
9352013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
936
937 * doc/as.texinfo: Use MIPS rather than @sc{mips} throughout.
938 Use "CPU" instead of "cpu".
939 * doc/c-mips.texi: Likewise.
940 (MIPS Opts): Rename to MIPS Options.
941 (MIPS option stack): Rename to MIPS Option Stack.
942 (MIPS ASE instruction generation overrides): Rename to
943 MIPS ASE Instruction Generation Overrides (for now).
944 (MIPS floating-point): Rename to MIPS Floating-Point.
945
fc16f8cc
RS
9462013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
947
948 * doc/c-mips.texi (MIPS Macros): New section.
949 (MIPS Object): Replace with...
950 (MIPS Small Data): ...this new section.
951
5a7560b5
RS
9522013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
953
954 * doc/c-mips.texi (MIPS symbol sizes): Move section further up file.
955 Capitalize name. Use @kindex instead of @cindex for .set entries.
956
a1b86ab7
RS
9572013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
958
959 * doc/c-mips.texi (MIPS Stabs): Remove section.
960
c6278170
RS
9612013-06-20 Richard Sandiford <rdsandiford@googlemail.com>
962
963 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS, ISA_SUPPORTS_DSP_ASE)
964 (ISA_SUPPORTS_DSP64_ASE, ISA_SUPPORTS_DSPR2_ASE, ISA_SUPPORTS_EVA_ASE)
965 (ISA_SUPPORTS_MT_ASE, ISA_SUPPORTS_MCU_ASE, ISA_SUPPORTS_VIRT_ASE)
966 (ISA_SUPPORTS_VIRT64_ASE): Delete.
967 (mips_ase): New structure.
968 (mips_ases): New table.
969 (FP64_ASES): New macro.
970 (mips_ase_groups): New array.
971 (mips_isa_rev, mips_ase_mask, mips_check_isa_supports_ase)
972 (mips_check_isa_supports_ases, mips_set_ase, mips_lookup_ase): New
973 functions.
974 (is_opcode_valid): Use mips_ases to get the 64-bit ASE flags.
975 (md_parse_option): Use mips_ases and mips_set_ase instead of
976 separate case statements for each ASE option.
977 (mips_after_parse_args): Use FP64_ASES. Use
978 mips_check_isa_supports_ases to check the ASEs against
979 other options.
980 (s_mipsset): Use mips_ases and mips_set_ase instead of
981 separate if statements for each ASE option. Use
982 mips_check_isa_supports_ases, even when a non-ASE option
983 is specified.
984
63a4bc21
KT
9852013-06-19 Greta Yorsh <Greta.Yorsh@arm.com>
986
987 * config/tc-arm.c (arm_cpus): Add support for Cortex-A12.
988
c31f3936
RS
9892013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
990
991 * config/tc-mips.c (md_shortopts, options, md_longopts)
992 (md_longopts_size): Move earlier in file.
993
846ef2d0
RS
9942013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
995
996 * config/tc-mips.c (mips_set_options): Replace separate "ase_*" fields
997 with a single "ase" bitmask.
998 (mips_opts): Update accordingly.
999 (file_ase, file_ase_explicit): New variables.
1000 (file_ase_mips3d, file_ase_mdmx, file_ase_smartmips, file_ase_dsp)
1001 (file_ase_dspr2, file_ase_eva, file_ase_mt, file_ase_virt): Delete.
1002 (ISA_HAS_ROR): Adjust for mips_set_options change.
1003 (is_opcode_valid): Take the base ase mask directly from mips_opts.
1004 (mips_ip): Adjust for mips_set_options change.
1005 (md_parse_option): Likewise. Update file_ase_explicit.
1006 (mips_after_parse_args): Adjust for mips_set_options change.
1007 Use bitmask operations to select the default ASEs. Set file_ase
1008 rather than individual per-ASE variables.
1009 (s_mipsset): Adjust for mips_set_options change.
1010 (mips_elf_final_processing): Test file_ase rather than
1011 file_ase_mdmx. Remove commented-out code.
1012
d16afab6
RS
10132013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
1014
1015 * config/tc-mips.c (mips_cpu_info): Add an "ase" field.
1016 (MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, MIPS_CPU_ASE_MT)
1017 (MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX, MIPS_CPU_ASE_DSPR2)
1018 (MIPS_CPU_ASE_MCU, MIPS_CPU_ASE_VIRT, MIPS_CPU_ASE_EVA): Delete.
1019 (mips_after_parse_args): Use the new "ase" field to choose
1020 the default ASEs.
1021 (mips_cpu_info_table): Move ASEs from the "flags" field to the
1022 "ase" field.
1023
e83a675f
RE
10242013-06-18 Richard Earnshaw <rearnsha@arm.com>
1025
1026 * config/tc-arm.c (symbol_preemptible): New function.
1027 (relax_branch): Use it.
1028
7f3c4072
CM
10292013-06-17 Catherine Moore <clm@codesourcery.com>
1030 Maciej W. Rozycki <macro@codesourcery.com>
1031 Chao-Ying Fu <fu@mips.com>
1032
1033 * config/tc-mips.c (mips_set_options): Add ase_eva.
1034 (mips_set_options mips_opts): Add ase_eva.
1035 (file_ase_eva): Declare.
1036 (ISA_SUPPORTS_EVA_ASE): Define.
1037 (IS_SEXT_9BIT_NUM): Define.
1038 (MIPS_CPU_ASE_EVA): Define.
1039 (is_opcode_valid): Add support for ase_eva.
1040 (macro_build): Likewise.
1041 (macro): Likewise.
1042 (validate_mips_insn): Likewise.
1043 (validate_micromips_insn): Likewise.
1044 (mips_ip): Likewise.
1045 (options): Add OPTION_EVA and OPTION_NO_EVA.
1046 (md_longopts): Add -meva and -mno-eva.
1047 (md_parse_option): Process new options.
1048 (mips_after_parse_args): Check for valid EVA combinations.
1049 (s_mipsset): Likewise.
1050
e410add4
RS
10512013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
1052
1053 * dwarf2dbg.h (dwarf2_move_insn): Declare.
1054 * dwarf2dbg.c (line_subseg): Add pmove_tail.
1055 (get_line_subseg): Add create_p argument. Initialize pmove_tail.
1056 (dwarf2_gen_line_info_1): Update call accordingly.
1057 (dwarf2_move_insn): New function.
1058 * config/tc-mips.c (append_insn): Use dwarf2_move_insn.
1059
6a50d470
RS
10602013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
1061
1062 Revert:
1063
1064 2011-09-05 Richard Sandiford <rdsandiford@googlemail.com>
1065
1066 PR gas/13024
1067 * dwarf2dbg.c (pending_lines, pending_lines_tail): New variables.
1068 (dwarf2_gen_line_info_1): Delete.
1069 (dwarf2_push_line, dwarf2_flush_pending_lines): New functions.
1070 (dwarf2_gen_line_info, dwarf2_emit_label): Use them.
1071 (dwarf2_consume_line_info): Call dwarf2_flush_pending_lines.
1072 (dwarf2_directive_loc): Push previous .locs instead of generating
1073 them immediately.
1074
f122319e
CF
10752013-06-13 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1076
1077 * config/tc-mips.c (ISA_SUPPORTS_VIRT_ASE): Support micromips.
1078 (ISA_SUPPORTS_VIRT64_ASE): Support 64-bit micromips.
1079
909c7f9c
NC
10802013-06-13 Nick Clifton <nickc@redhat.com>
1081
1082 PR gas/15602
1083 * config/tc-m68k.h (TC_CHECK_ADJUSTED_BROKEN_DOT_WORD): Define.
1084 * config/tc-m68k.c (tc_m68k_check_adjusted_broken_word): New
1085 function. Generates an error if the adjusted offset is out of a
1086 16-bit range.
1087
5d5755a7
SL
10882013-06-12 Sandra Loosemore <sandra@codesourcery.com>
1089
1090 * config/tc-nios2.c (md_apply_fix): Mask constant
1091 BFD_RELOC_NIOS2_HIADJ16 value to 16 bits.
1092
3bf0dbfb
MR
10932013-06-10 Maciej W. Rozycki <macro@codesourcery.com>
1094
1095 * config/tc-mips.c (append_insn): Don't do branch relaxation for
1096 MIPS-3D instructions either.
1097 (md_convert_frag): Update the COPx branch mask accordingly.
1098
1099 * config/tc-mips.c (md_show_usage): Document --[no-]relax-branch
1100 option.
1101 * doc/as.texinfo (Overview): Add --relax-branch and
1102 --no-relax-branch.
1103 * doc/c-mips.texi (MIPS Opts): Document --relax-branch and
1104 --no-relax-branch.
1105
9daf7bab
SL
11062013-06-09 Sandra Loosemore <sandra@codesourcery.com>
1107
1108 * config/tc-nios2.c (nios2_parse_args): Allow trap argument to
1109 omitted.
1110
d301a56b
RS
11112013-06-08 Catherine Moore <clm@codesourcery.com>
1112
1113 * config/tc-mips.c (is_opcode_valid): Build ASE mask.
1114 (is_opcode_valid_16): Pass ase value to opcode_is_member.
1115 (append_insn): Change INSN_xxxx to ASE_xxxx.
1116
7bab7634
DC
11172013-06-01 George Thomas <george.thomas@atmel.com>
1118
cbe02d4f 1119 * gas/config/tc-avr.c: Change ISA for devices with USB support to
7bab7634
DC
1120 AVR_ISA_XMEGAU
1121
f60cf82f
L
11222013-05-31 H.J. Lu <hongjiu.lu@intel.com>
1123
1124 * config/tc-i386.c (md_begin): Don't align text/data/bss sections
1125 for ELF.
1126
a3f278e2
CM
11272013-05-31 Paul Brook <paul@codesourcery.com>
1128
a3f278e2
CM
1129 * config/tc-mips.c (s_ehword): New.
1130
067ec077
CM
11312013-05-30 Paul Brook <paul@codesourcery.com>
1132
1133 * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH.
1134
d6101ac2
MR
11352013-05-29 Maciej W. Rozycki <macro@codesourcery.com>
1136
1137 * write.c (resolve_reloc_expr_symbols): On REL targets don't
1138 convert relocs who have no relocatable field either. Rephrase
1139 the conditional so that the PC-relative check is only applied
1140 for REL targets.
1141
f19ccbda
MR
11422013-05-28 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1143
1144 * config/tc-mips.c (macro) <ld>: Don't use $zero for address
1145 calculation.
1146
418009c2
YZ
11472013-05-28 Yufeng Zhang <yufeng.zhang@arm.com>
1148
1149 * config/tc-aarch64.c (reloc_table): Update to use
477330fc 1150 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of
418009c2
YZ
1151 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE.
1152 (md_apply_fix): Likewise.
1153 (aarch64_force_relocation): Likewise.
1154
0a8897c7
KT
11552013-05-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1156
1157 * config/tc-arm.c (it_fsm_post_encode): Improve
1158 warning messages about deprecated IT block formats.
1159
89d2a2a3
MS
11602013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com>
1161
1162 * config/tc-aarch64.c (md_apply_fix): Move value range checking
1163 inside fx_done condition.
1164
c77c0862
RS
11652013-05-22 Jürgen Urban <JuergenUrban@gmx.de>
1166
1167 * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB.
1168
c0637f3a
PB
11692013-05-20 Peter Bergner <bergner@vnet.ibm.com>
1170
1171 * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error
1172 and clean up warning when using PRINT_OPCODE_TABLE.
1173
5656a981
AM
11742013-05-20 Alan Modra <amodra@gmail.com>
1175
1176 * config/tc-ppc.c (md_apply_fix): Hoist code common to insn
1177 and data fixups performing shift/high adjust/sign extension on
1178 fieldval. Sink fx_pcrel handling and checks. Use fixP->fx_size
1179 when writing data fixups rather than recalculating size.
1180
997b26e8
JBG
11812013-05-16 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1182
1183 * doc/c-msp430.texi: Fix typo.
1184
9f6e76f4
TG
11852013-05-16 Tristan Gingold <gingold@adacore.com>
1186
1187 * config/tc-ppc.c (ppc_is_toc_sym): Symbols of class XMC_TC
1188 are also TOC symbols.
1189
638d3803
NC
11902013-05-16 Nick Clifton <nickc@redhat.com>
1191
1192 * config/tc-msp430.c: Make -mmcu recognise more part numbers.
1193 Add -mcpu command to specify core type.
997b26e8 1194 * doc/c-msp430.texi: Update documentation.
638d3803 1195
b015e599
AP
11962013-05-09 Andrew Pinski <apinski@cavium.com>
1197
1198 * config/tc-mips.c (struct mips_set_options): New ase_virt field.
1199 (mips_opts): Update for the new field.
1200 (file_ase_virt): New variable.
1201 (ISA_SUPPORTS_VIRT_ASE): New macro.
1202 (ISA_SUPPORTS_VIRT64_ASE): New macro.
1203 (MIPS_CPU_ASE_VIRT): New define.
1204 (is_opcode_valid): Handle ase_virt.
1205 (macro_build): Handle "+J".
1206 (validate_mips_insn): Likewise.
1207 (mips_ip): Likewise.
1208 (enum options): Add OPTION_VIRT and OPTION_NO_VIRT.
1209 (md_longopts): Add mvirt and mnovirt
1210 (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT.
1211 (mips_after_parse_args): Handle ase_virt field.
1212 (s_mipsset): Handle "virt" and "novirt".
1213 (mips_elf_final_processing): Add a comment about virt ASE might need
1214 a new flag.
1215 (md_show_usage): Print out the usage of -mvirt and mno-virt options.
1216 * doc/c-mips.texi: Document -mvirt and -mno-virt.
1217 Document ".set virt" and ".set novirt".
1218
da8094d7
AM
12192013-05-09 Alan Modra <amodra@gmail.com>
1220
1221 * config/tc-ppc.c (md_apply_fix): Sign extend fieldval under
1222 control of operand flag bits.
1223
c5f8c205
AM
12242013-05-07 Alan Modra <amodra@gmail.com>
1225
1226 * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro.
1227 (PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise.
1228 (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise.
1229 (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise.
1230 (md_apply_fix): Set fx_no_overflow for assorted relocations.
1231 Shift and sign-extend fieldval for use by some VLE reloc
1232 operand->insert functions.
1233
b47468a6
CM
12342013-05-06 Paul Brook <paul@codesourcery.com>
1235 Catherine Moore <clm@codesourcery.com>
1236
c5f8c205
AM
1237 * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL.
1238 (limited_pcrel_reloc_p): Likewise.
b47468a6
CM
1239 (md_apply_fix): Likewise.
1240 (tc_gen_reloc): Likewise.
1241
2de39019
CM
12422013-05-06 Richard Sandiford <rdsandiford@googlemail.com>
1243
1244 * config/tc-mips.c (limited_pcrel_reloc_p): New function.
1245 (mips_fix_adjustable): Adjust pc-relative check to use
1246 limited_pc_reloc_p.
1247
754e2bb9
RS
12482013-05-02 Richard Sandiford <rdsandiford@googlemail.com>
1249
1250 * config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries.
1251 (s_mips_stab): Do not restrict to stabn only.
1252
13761a11
NC
12532013-05-02 Nick Clifton <nickc@redhat.com>
1254
1255 * config/tc-msp430.c: Add support for the MSP430X architecture.
1256 Add code to insert a NOP instruction after any instruction that
1257 might change the interrupt state.
1258 Add support for the LARGE memory model.
1259 Add code to initialise the .MSP430.attributes section.
1260 * config/tc-msp430.h: Add support for the MSP430X architecture.
1261 * doc/c-msp430.texi: Document the new -mL and -mN command line
1262 options.
1263 * NEWS: Mention support for the MSP430X architecture.
1264
df26367c
MR
12652013-05-01 Maciej W. Rozycki <macro@codesourcery.com>
1266
1267 * configure.tgt: Replace alpha*-*-linuxecoff* pattern with
1268 alpha*-*-linux*ecoff*.
1269
f02d8318
CF
12702013-04-30 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1271
1272 * config/tc-mips.c (mips_ip): Add sizelo.
1273 For "+C", "+G", and "+H", set sizelo and compare against it.
1274
b40bf0a2
NC
12752013-04-29 Nick Clifton <nickc@redhat.com>
1276
1277 * as.c (Options): Add -gdwarf-sections.
1278 (parse_args): Likewise.
1279 * as.h (flag_dwarf_sections): Declare.
1280 * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes.
1281 (process_entries): When -gdwarf-sections is enabled generate
1282 fragmentary .debug_line sections.
1283 (out_debug_line): Set the section for the .debug_line section end
1284 symbol.
1285 * doc/as.texinfo: Document -gdwarf-sections.
1286 * NEWS: Mention -gdwarf-sections.
1287
8eeccb77 12882013-04-26 Christian Groessler <chris@groessler.org>
00a3147e
CG
1289
1290 * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdline
1291 according to the target parameter. Don't call s_segm since s_segm
1292 calls bfd_set_arch_mach using stdoutput, but stdoutput isn't
1293 initialized yet.
1294 (md_begin): Call s_segm according to target parameter from command
1295 line.
1296
49926cd0
AM
12972013-04-25 Alan Modra <amodra@gmail.com>
1298
1299 * configure.in: Allow little-endian linux.
1300 * configure: Regenerate.
1301
e3031850
SL
13022013-04-24 Sandra Loosemore <sandra@codesourcery.com>
1303
1304 * config/tc-nios2.c (nios2_control_register_arg_p): Rename
1305 "fstatus" control register to "eccinj".
1306
cb948fc0
KT
13072013-04-19 Kai Tietz <ktietz@redhat.com>
1308
1309 * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin.
1310
4455e9ad
JB
13112013-04-15 Julian Brown <julian@codesourcery.com>
1312
1313 * expr.c (add_to_result, subtract_from_result): Make global.
1314 * expr.h (add_to_result, subtract_from_result): Add prototypes.
1315 * config/tc-sh.c (sh_optimize_expr): Use add_to_result,
1316 subtract_from_result to handle extra bit of precision for .sleb128
1317 directive operands.
1318
956a6ba3
JB
13192013-04-10 Julian Brown <julian@codesourcery.com>
1320
1321 * read.c (convert_to_bignum): Add sign parameter. Use it
1322 instead of X_unsigned to determine sign of resulting bignum.
1323 (emit_expr): Pass extra argument to convert_to_bignum.
1324 (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass
1325 X_extrabit to convert_to_bignum.
1326 (parse_bitfield_cons): Set X_extrabit.
1327 * expr.c (make_expr_symbol, expr_build_uconstant, operand):
1328 Initialise X_extrabit field as appropriate.
1329 (add_to_result): New.
1330 (subtract_from_result): New.
1331 (expr): Use above.
1332 * expr.h (expressionS): Add X_extrabit field.
1333
eb9f3f00
JB
13342013-04-10 Jan Beulich <jbeulich@suse.com>
1335
1336 * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base
1337 register being PC when is_t or writeback, and use distinct
1338 diagnostic for the latter case.
1339
ccb84d65
JB
13402013-04-10 Jan Beulich <jbeulich@suse.com>
1341
1342 * gas/config/tc-arm.c (parse_operands): Re-write
1343 po_barrier_or_imm().
1344 (do_barrier): Remove bogus constraint().
1345 (do_t_barrier): Remove.
1346
4d13caa0
NC
13472013-04-09 Joerg Wunsch <joerg.wunsch@atmel.com>
1348
1349 * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2,
1350 ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2,
1351 ATmega2564RFR2
1352 * gas/doc/c-avr.texi (-mmcu documentation): Likewise.
1353
16d02dc9
JB
13542013-04-09 Jan Beulich <jbeulich@suse.com>
1355
1356 * gas/config/tc-arm.c (do_vmrs): Accept all control registers.
1357 Use local variable Rt in more places.
1358 (do_vmsr): Accept all control registers.
1359
05ac0ffb
JB
13602013-04-09 Jan Beulich <jbeulich@suse.com>
1361
1362 * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
1363 if there was none specified for moves between scalar and core
1364 register.
1365
2d51fb74
JB
13662013-04-09 Jan Beulich <jbeulich@suse.com>
1367
1368 * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the
1369 NEON_ALL_LANES case.
1370
94dcf8bf
JB
13712013-04-08 Jan Beulich <jbeulich@suse.com>
1372
1373 * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for
1374 PC-relative VSTR.
1375
1472d06f
JB
13762013-04-08 Jan Beulich <jbeulich@suse.com>
1377
1378 * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq
1379 entry to sp_fiq.
1380
0c76cae8
AM
13812013-04-03 Alan Modra <amodra@gmail.com>
1382
1383 * doc/as.texinfo: Add support to generate man options for h8300.
1384 * doc/c-h8300.texi: Likewise.
1385
92eb40d9
RR
13862013-03-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
1387
1388 * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and
1389 Cortex-A57.
1390
51dcdd4d
NC
13912013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com>
1392
1393 PR binutils/15068
1394 * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array.
1395
c5d685bf
NC
13962013-03-26 Nick Clifton <nickc@redhat.com>
1397
9b978282
NC
1398 PR gas/15295
1399 * listing.c (rebuffer_line): Rewrite to avoid seeking back to the
1400 start of the file each time.
1401
c5d685bf
NC
1402 PR gas/15178
1403 * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for
1404 FreeBSD targets.
1405
9699c833
TG
14062013-03-26 Douglas B Rupp <rupp@gnat.com>
1407
1408 * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment
1409 after fixup.
1410
4755303e
WN
14112013-03-21 Will Newton <will.newton@linaro.org>
1412
1413 * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all
1414 pc-relative str instructions in Thumb mode.
1415
81f5558e
NC
14162013-03-21 Michael Schewe <michael.schewe@gmx.net>
1417
1418 * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
1419 @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
1420 R_H8_DISP32A16.
1421 * config/tc-h8300.h: Remove duplicated defines.
1422
71863e73
NC
14232013-03-21 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
1424
1425 PR gas/15282
1426 * tc-avr.c (mcu_has_3_byte_pc): New function.
1427 (tc_cfi_frame_initial_instructions): Call it to find return
1428 address size.
1429
795b8e6b
NC
14302013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com>
1431
1432 PR gas/15095
1433 * config/tc-tic6x.c (tic6x_try_encode): Handle
1434 tic6x_coding_dreg_(msb|lsb) field coding types and use it to
1435 encode register pair numbers when required.
1436
ba86b375
WN
14372013-03-15 Will Newton <will.newton@linaro.org>
1438
1439 * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register
1440 in vstr in Thumb mode for pre-ARMv7 cores.
1441
9e6f3811
AS
14422013-03-14 Andreas Schwab <schwab@suse.de>
1443
1444 * doc/c-arc.texi (ARC Directives): Revert last change and use
1445 @itemize instead of @table.
1446 * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
1447
b10bf8c5
NC
14482013-03-14 Nick Clifton <nickc@redhat.com>
1449
1450 PR gas/15273
1451 * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a
1452 NULL message, instead just check ARM_CPU_IS_ANY directly.
1453
ba724cfc
NC
14542013-03-14 Nick Clifton <nickc@redhat.com>
1455
1456 PR gas/15212
9e6f3811 1457 * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet
ba724cfc
NC
1458 for table format.
1459 * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
1460 to the @item directives.
1461 (ARM-Neon-Alignment): Move to correct place in the document.
1462 * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
1463 formatting.
1464 * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
1465 @smallexample.
1466
531a94fd
SL
14672013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
1468
1469 * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'
1470 case. Add default BAD_CASE to switch.
1471
dad60f8e
SL
14722013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
1473
1474 * config/tc-nios2.c (nios2_assemble_args_ds): New function.
1475 (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
1476
dd5181d5
KT
14772013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1478
1479 * config/tc-arm.c (crc_ext_armv8): New feature set.
1480 (UNPRED_REG): New macro.
1481 (do_crc32_1): New function.
1482 (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
1483 do_crc32ch, do_crc32cw): Likewise.
1484 (TUEc): New macro.
1485 (insns): Add entries for crc32 mnemonics.
1486 (arm_extensions): Add entry for crc.
1487
8e723a10
CLT
14882013-03-08 Chung-Lin Tang <cltang@codesourcery.com>
1489
1490 * write.h (struct fix): Add fx_dot_frag field.
1491 (dot_frag): Declare.
1492 * write.c (dot_frag): New variable.
1493 (fix_new_internal): Set fx_dot_frag field with dot_frag.
1494 (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
1495 * expr.c (expr): Save value of frag_now in dot_frag when setting
1496 dot_value.
1497 * read.c (emit_expr): Likewise. Delete comments.
1498
be05d201
L
14992013-03-07 H.J. Lu <hongjiu.lu@intel.com>
1500
1501 * config/tc-i386.c (flag_code_names): Removed.
1502 (i386_index_check): Rewrote.
1503
62b0d0d5
YZ
15042013-03-05 Yufeng Zhang <yufeng.zhang@arm.com>
1505
1506 * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
1507 add comment.
1508 (aarch64_double_precision_fmovable): New function.
1509 (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
1510 function; handle hexadecimal representation of IEEE754 encoding.
1511 (parse_operands): Update the call to parse_aarch64_imm_float.
1512
165de32a
L
15132013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1514
1515 * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
1516 (check_hle): Updated.
1517 (md_assemble): Likewise.
1518 (parse_insn): Likewise.
1519
d5de92cf
L
15202013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1521
1522 * config/tc-i386.c (_i386_insn): Add rep_prefix.
9e6f3811 1523 (md_assemble): Check if REP prefix is OK.
d5de92cf
L
1524 (parse_insn): Remove expecting_string_instruction. Set
1525 i.rep_prefix.
1526
e60bb1dd
YZ
15272013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1528
1529 * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
1530
aeebdd9b
YZ
15312013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1532
1533 * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
1534 for system registers.
1535
4107ae22
DD
15362013-02-27 DJ Delorie <dj@redhat.com>
1537
1538 * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
1539 (rl78_op): Handle %code().
1540 (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
1541 (tc_gen_reloc): Likwise; convert to a computed reloc.
1542 (md_apply_fix): Likewise.
1543
151fa98f
NC
15442013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
1545
1546 * config/rl78-parse.y: Fix encoding of DIVWU insn.
1547
70a8bc5b 15482013-02-25 Terry Guo <terry.guo@arm.com>
1549
1550 * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
1551 * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
1552 list of accepted CPUs.
1553
5c111e37
L
15542013-02-19 H.J. Lu <hongjiu.lu@intel.com>
1555
1556 PR gas/15159
1557 * config/tc-i386.c (cpu_arch): Add ".smap".
1558
1559 * doc/c-i386.texi: Document smap.
1560
8a75745d
MR
15612013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1562
1563 * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
1564 mips_assembling_insn appropriately.
1565 (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
1566
79850f26
MR
15672013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1568
cf29fc61 1569 * config/tc-mips.c (append_insn): Correct indentation, remove
79850f26
MR
1570 extraneous braces.
1571
4c261dff
NC
15722013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1573
5c111e37 1574 * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
4c261dff 1575
ea33f281
NC
15762013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
1577
1578 * configure.tgt: Add nios2-*-rtems*.
1579
a1ccaec9
YZ
15802013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
1581
1582 * config/tc-aarch64.c (md_begin): Change to check if 'name' is
1583 NULL.
1584
0aa27725
RS
15852013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
1586
1587 * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
1588 (macro): Use it. Assert that trunc.w.s is not used for r5900.
1589
da4339ed
NC
15902013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com>
1591
1592 * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
1593 core.
1594
36591ba1 15952013-02-06 Sandra Loosemore <sandra@codesourcery.com>
5c111e37 1596 Andrew Jenner <andrew@codesourcery.com>
36591ba1
SL
1597
1598 Based on patches from Altera Corporation.
1599
1600 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
1601 (TARGET_CPU_HFILES): Add config/tc-nios2.h.
1602 * Makefile.in: Regenerated.
1603 * configure.tgt: Add case for nios2*-linux*.
1604 * config/obj-elf.c: Conditionally include elf/nios2.h.
1605 * config/tc-nios2.c: New file.
1606 * config/tc-nios2.h: New file.
1607 * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
1608 * doc/Makefile.in: Regenerated.
1609 * doc/all.texi: Set NIOSII.
1610 * doc/as.texinfo (Overview): Add Nios II options.
1611 (Machine Dependencies): Include c-nios2.texi.
1612 * doc/c-nios2.texi: New file.
1613 * NEWS: Note Altera Nios II support.
1614
94d4433a
AM
16152013-02-06 Alan Modra <amodra@gmail.com>
1616
1617 PR gas/14255
1618 * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
1619 Don't skip fixups with fx_subsy non-NULL.
1620 * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
1621 with fx_subsy non-NULL.
1622
ace9af6f
L
16232013-02-04 H.J. Lu <hongjiu.lu@intel.com>
1624
1625 * doc/c-metag.texi: Add "@c man" markers.
1626
89d67ed9
AM
16272013-02-04 Alan Modra <amodra@gmail.com>
1628
1629 * write.c (fixup_segment): Return void. Delete seg_reloc_count
1630 related code.
1631 (TC_ADJUST_RELOC_COUNT): Delete.
1632 * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
1633
89072bd6
AM
16342013-02-04 Alan Modra <amodra@gmail.com>
1635
1636 * po/POTFILES.in: Regenerate.
1637
f9b2d544
NC
16382013-01-30 Markos Chandras <markos.chandras@imgtec.com>
1639
1640 * config/tc-metag.c: Make SWAP instruction less permissive with
1641 its operands.
1642
392ca752
DD
16432013-01-29 DJ Delorie <dj@redhat.com>
1644
1645 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
1646 relocs in .word/.etc statements.
1647
427d0db6
RM
16482013-01-29 Roland McGrath <mcgrathr@google.com>
1649
1650 * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
1651 immediate value for 8-bit offset" error so it shows line info.
1652
4faf939a
JM
16532013-01-24 Joseph Myers <joseph@codesourcery.com>
1654
1655 * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
1656 for 64-bit output.
1657
78c8d46c
NC
16582013-01-24 Nick Clifton <nickc@redhat.com>
1659
1660 * config/tc-v850.c: Add support for e3v5 architecture.
1661 * doc/c-v850.texi: Mention new support.
1662
fb5b7503
NC
16632013-01-23 Nick Clifton <nickc@redhat.com>
1664
1665 PR gas/15039
1666 * config/tc-avr.c: Include dwarf2dbg.h.
1667
8ce3d284
L
16682013-01-18 H.J. Lu <hongjiu.lu@intel.com>
1669
1670 * config/tc-i386.c (reloc): Support size relocation only for ELF.
1671 (tc_i386_fix_adjustable): Likewise.
1672 (lex_got): Likewise.
1673 (tc_gen_reloc): Likewise.
1674
f5555712
YZ
16752013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
1676
1677 * config/tc-aarch64.c (output_operand_error_record): Change to output
1678 the out-of-range error message as value-expected message if there is
1679 only one single value in the expected range.
1680 (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
1681 LSL #0 as a programmer-friendly feature.
1682
8fd4256d
L
16832013-01-16 H.J. Lu <hongjiu.lu@intel.com>
1684
1685 * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
1686 (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
1687 BFD_RELOC_64_SIZE relocations.
1688 (lex_got): Support "symbol@SIZE" and don't create GOT symbol
1689 for it.
1690 (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
1691 relocations against local symbols.
1692
a5840dce
AM
16932013-01-16 Alan Modra <amodra@gmail.com>
1694
1695 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
1696 finding some sort of toc syntax error, and break to avoid
1697 compiler uninit warning.
1698
af89796a
L
16992013-01-15 H.J. Lu <hongjiu.lu@intel.com>
1700
1701 PR gas/15019
1702 * config/tc-i386.c (lex_got): Increment length by 1 if the
1703 relocation token is removed.
1704
dd42f060
NC
17052013-01-15 Nick Clifton <nickc@redhat.com>
1706
1707 * config/tc-v850.c (md_assemble): Allow signed values for
1708 V850E_IMMEDIATE.
1709
464e3686
SK
17102013-01-11 Sean Keys <skeys@ipdatasys.com>
1711
1712 * config/tc-xgate.c (md_begin): Fix mistake made when going from
af89796a 1713 git to cvs.
464e3686 1714
5817ffd1
PB
17152013-01-10 Peter Bergner <bergner@vnet.ibm.com>
1716
1717 * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
1718 * doc/c-ppc.texi (PowerPC-Opts): Likewise.
1719 * config/tc-ppc.c (md_show_usage): Likewise.
1720 (ppc_handle_align): Handle power8's group ending nop.
1721
f4b1f6a9
SK
17222013-01-10 Sean Keys <skeys@ipdatasys.com>
1723
1724 * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
af89796a 1725 that the assember exits after the opcodes have been printed.
f4b1f6a9 1726
34bca508
L
17272013-01-10 H.J. Lu <hongjiu.lu@intel.com>
1728
1729 * app.c: Remove trailing white spaces.
1730 * as.c: Likewise.
1731 * as.h: Likewise.
1732 * cond.c: Likewise.
1733 * dw2gencfi.c: Likewise.
1734 * dwarf2dbg.h: Likewise.
1735 * ecoff.c: Likewise.
1736 * input-file.c: Likewise.
1737 * itbl-lex.h: Likewise.
1738 * output-file.c: Likewise.
1739 * read.c: Likewise.
1740 * sb.c: Likewise.
1741 * subsegs.c: Likewise.
1742 * symbols.c: Likewise.
1743 * write.c: Likewise.
1744 * config/tc-i386.c: Likewise.
1745 * doc/Makefile.am: Likewise.
1746 * doc/Makefile.in: Likewise.
1747 * doc/c-aarch64.texi: Likewise.
1748 * doc/c-alpha.texi: Likewise.
1749 * doc/c-arc.texi: Likewise.
1750 * doc/c-arm.texi: Likewise.
1751 * doc/c-avr.texi: Likewise.
1752 * doc/c-bfin.texi: Likewise.
1753 * doc/c-cr16.texi: Likewise.
1754 * doc/c-d10v.texi: Likewise.
1755 * doc/c-d30v.texi: Likewise.
1756 * doc/c-h8300.texi: Likewise.
1757 * doc/c-hppa.texi: Likewise.
1758 * doc/c-i370.texi: Likewise.
1759 * doc/c-i386.texi: Likewise.
1760 * doc/c-i860.texi: Likewise.
1761 * doc/c-m32c.texi: Likewise.
1762 * doc/c-m32r.texi: Likewise.
1763 * doc/c-m68hc11.texi: Likewise.
1764 * doc/c-m68k.texi: Likewise.
1765 * doc/c-microblaze.texi: Likewise.
1766 * doc/c-mips.texi: Likewise.
1767 * doc/c-msp430.texi: Likewise.
1768 * doc/c-mt.texi: Likewise.
1769 * doc/c-s390.texi: Likewise.
1770 * doc/c-score.texi: Likewise.
1771 * doc/c-sh.texi: Likewise.
1772 * doc/c-sh64.texi: Likewise.
1773 * doc/c-tic54x.texi: Likewise.
1774 * doc/c-tic6x.texi: Likewise.
1775 * doc/c-v850.texi: Likewise.
1776 * doc/c-xc16x.texi: Likewise.
1777 * doc/c-xgate.texi: Likewise.
1778 * doc/c-xtensa.texi: Likewise.
1779 * doc/c-z80.texi: Likewise.
1780 * doc/internals.texi: Likewise.
1781
4c665b71
RM
17822013-01-10 Roland McGrath <mcgrathr@google.com>
1783
1784 * hash.c (hash_new_sized): Make it global.
1785 * hash.h: Declare it.
1786 * macro.c (define_macro): Use hash_new_sized instead of hash_new,
1787 pass a small size.
1788
a3c62988
NC
17892013-01-10 Will Newton <will.newton@imgtec.com>
1790
1791 * Makefile.am: Add Meta.
1792 * Makefile.in: Regenerate.
1793 * config/tc-metag.c: New file.
1794 * config/tc-metag.h: New file.
1795 * configure.tgt: Add Meta.
1796 * doc/Makefile.am: Add Meta.
1797 * doc/Makefile.in: Regenerate.
1798 * doc/all.texi: Add Meta.
1799 * doc/as.texiinfo: Document Meta options.
1800 * doc/c-metag.texi: New file.
1801
b37df7c4
SE
18022013-01-09 Steve Ellcey <sellcey@mips.com>
1803
1804 * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
1805 calls.
1806 * config/tc-mips.c (internalError): Remove, replace with abort.
1807
a3251895
YZ
18082013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
1809
1810 * config/tc-aarch64.c (parse_operands): Change to compare the result
1811 of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
1812
8ab8155f
NC
18132013-01-07 Nick Clifton <nickc@redhat.com>
1814
1815 PR gas/14887
1816 * config/tc-arm.c (skip_past_char): Skip whitespace before the
1817 anticipated character.
1818 * config/tc-arm.c (parse_address_main): Delete skip of whitespace
1819 here as it is no longer needed.
1820
a4ac1c42
AS
18212013-01-06 Andreas Schwab <schwab@linux-m68k.org>
1822
1823 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
1824 * doc/c-score.texi (SCORE-Opts): Likewise.
1825 * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
1826
e407c74b
NC
18272013-01-04 Juergen Urban <JuergenUrban@gmx.de>
1828
1829 * config/tc-mips.c: Add support for MIPS r5900.
1830 Add M_LQ_AB and M_SQ_AB to support large values for instructions
1831 lq and sq.
1832 (can_swap_branch_p, get_append_method): Detect some conditional
1833 short loops to fix a bug on the r5900 by NOP in the branch delay
1834 slot.
1835 (M_MUL): Support 3 operands in multu on r5900.
1836 (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
1837 (s_mipsset): Force 32 bit floating point on r5900.
1838 (mips_ip): Check parameter range of instructions mfps and mtps on
1839 r5900.
1840 * configure.in: Detect CPU type when target string contains r5900
1841 (e.g. mips64r5900el-linux-gnu).
1842
62658407
L
18432013-01-02 H.J. Lu <hongjiu.lu@intel.com>
1844
1845 * as.c (parse_args): Update copyright year to 2013.
1846
95830fd1
YZ
18472013-01-02 Yufeng Zhang <yufeng.zhang@arm.com>
1848
1849 * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
1850 and "cortex57".
1851
517bb291 18522013-01-02 Nick Clifton <nickc@redhat.com>
d709e4e6 1853
517bb291
NC
1854 PR gas/14987
1855 * config/tc-arm.c (parse_address_main): Skip whitespace before a
1856 closing bracket.
d709e4e6 1857
517bb291 1858For older changes see ChangeLog-2012
08d56133 1859\f
517bb291 1860Copyright (C) 2013 Free Software Foundation, Inc.
752937aa
NC
1861
1862Copying and distribution of this file, with or without modification,
1863are permitted in any medium without royalty provided the copyright
1864notice and this notice are preserved.
1865
08d56133
NC
1866Local Variables:
1867mode: change-log
1868left-margin: 8
1869fill-column: 74
1870version-control: never
1871End: