]> git.ipfire.org Git - thirdparty/binutils-gdb.git/blame - gas/ChangeLog
ARI fix: Push # directives to start of line.
[thirdparty/binutils-gdb.git] / gas / ChangeLog
CommitLineData
b4e6cb80
AM
12013-08-21 Alan Modra <amodra@gmail.com>
2
3 * symbols.c (fb_label_instance_inc, fb_label_instance): Properly
4 range check label number for use with fb_low_counter array.
5
1661c76c
RS
62013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
7
8 * config/tc-mips.c (mips_check_isa_supports_ase, reg_lookup)
9 (mips_parse_argument_token, validate_micromips_insn, md_begin)
10 (check_regno, match_float_constant, check_completed_insn, append_insn)
11 (match_insn, match_mips16_insn, match_insns, macro_start)
12 (macro_build_ldst_constoffset, load_register, macro, mips_ip)
13 (mips16_ip, mips_set_option_string, md_parse_option)
14 (mips_after_parse_args, mips_after_parse_args, md_pcrel_from)
15 (md_apply_fix, s_align, s_option, s_mipsset, s_tls_rel_directive)
16 (s_gpword, s_gpdword, s_ehword, s_nan, tc_gen_reloc, md_convert_frag)
17 (s_mips_end, s_mips_ent, s_mips_frame, s_mips_mask, mips_parse_cpu):
18 Start error messages with a lower-case letter. Do not end error
19 messages with a period. Wrap long messages to 80 character-lines.
20 Use "cannot" instead of "can't" and "can not".
21
b0e6f033
RS
222013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
23
24 * config/tc-mips.c (imm_expr): Expand comment.
25 (set_at, macro, mips16_macro): Expect imm_expr to be O_constant
26 when populated.
27
e423441d
RS
282013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
29
30 * config/tc-mips.c (imm2_expr): Delete.
31 (md_assemble, match_insn, imm2_expr.X_op, mips_ip): Update accordingly.
32
5e0dc5ba
RS
332013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
34
35 * config/tc-mips.c (report_bad_range, report_bad_field): Delete.
36 (macro): Remove M_DEXT and M_DINS handling.
37
60f20e8b
RS
382013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
39
40 * config/tc-mips.c (mips_arg_info): Replace allow_nonconst and
41 lax_max with lax_match.
42 (match_int_operand): Update accordingly. Don't report an error
43 for !lax_match-only cases.
44 (match_insn): Replace more_alts with lax_match and use it to
45 initialize the mips_arg_info field. Add a complete_p parameter.
46 Handle implicit VU0 suffixes here.
47 (match_invalid_for_isa, match_insns, match_mips16_insns): New
48 functions.
49 (mips_ip, mips16_ip): Use them.
50
d436c1c2
RS
512013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
52
53 * config/tc-mips.c (match_expression): Report uses of registers here.
54 Add a "must be an immediate expression" error. Handle elided offsets
55 here rather than...
56 (match_int_operand): ...here.
57
1a00e612
RS
582013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
59
60 * config/tc-mips.c (mips_arg_info): Remove soft_match.
61 (match_out_of_range, match_not_constant): New functions.
62 (match_const_int): Remove fallback parameter and check for soft_match.
63 Use match_not_constant.
64 (match_mapped_int_operand, match_addiusp_operand)
65 (match_perf_reg_operand, match_save_restore_list_operand)
66 (match_mdmx_imm_reg_operand): Update accordingly. Use
67 match_out_of_range and set_insn_error* instead of as_bad.
68 (match_int_operand): Likewise. Use match_not_constant in the
69 !allows_nonconst case.
70 (match_float_constant): Report invalid float constants.
71 (match_insn, match_mips16_insn): Remove soft_match code. Rely on
72 match_float_constant to check for invalid constants. Fail the
73 match if match_const_int or match_float_constant return false.
74 (mips_ip): Update accordingly.
75 (mips16_ip): Likewise. Undo null termination of instruction name
76 once lookup is complete.
77
e3de51ce
RS
782013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
79
80 * config/tc-mips.c (mips_insn_error_format): New enum.
81 (mips_insn_error): New struct.
82 (insn_error): Change to a mips_insn_error.
83 (clear_insn_error, set_insn_error_format, set_insn_error)
84 (set_insn_error_i, set_insn_error_ss, report_insn_error): New
85 functions.
86 (mips_parse_argument_token, md_assemble, match_insn)
87 (match_mips16_insn): Use them instead of manipulating insn_error
88 directly.
89 (mips_ip, mips16_ip): Likewise. Simplify control flow.
90
97d87491
RS
912013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
92
93 * config/tc-mips.c (normalize_constant_expr): Move further up file.
94 (normalize_address_expr): Likewise.
95 (match_insn, match_mips16_insn): New functions, split out from...
96 (mips_ip, mips16_ip): ...here.
97
0f35dbc4
RS
982013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
99
100 * config/tc-mips.c (operand_reg_mask, match_operand): Handle
101 OP_OPTIONAL_REG.
102 (mips_ip, mips16_ip): Use mips_optional_operand_p to check
103 for optional operands.
104
27285eed
AM
1052013-08-16 Alan Modra <amodra@gmail.com>
106
107 * config/tc-ppc.c (ppc_elf_cons): Allow @l and other reloc
108 modifiers generally.
109
cbe02d4f
AM
1102013-08-16 Alan Modra <amodra@gmail.com>
111
112 * config/tc-ppc.c (ppc_elf_lcomm): Use subsection 1.
113
3c02c47f
DE
1142013-08-14 David Edelsohn <dje.gcc@gmail.com>
115
116 * config/tc-ppc.c (ppc_comm): Accept optional fourth .lcomm
117 argument as alignment.
118
4046d87a
NC
1192013-08-09 Nick Clifton <nickc@redhat.com>
120
121 * config/tc-rl78.c (elf_flags): New variable.
122 (enum options): Add OPTION_G10.
123 (md_longopts): Add mg10.
124 (md_parse_option): Parse -mg10.
125 (rl78_elf_final_processing): New function.
126 * config/tc-rl78.c (tc_final_processing): Define.
127 * doc/c-rl78.texi: Document -mg10 option.
128
ee5734f0
RS
1292013-08-06 Jürgen Urban <JuergenUrban@gmx.de>
130
131 * config/tc-mips.c (match_vu0_suffix_operand): Allow single-channel
132 suffixes to be elided too.
133 (mips_lookup_insn): Don't reject INSN2_VU0_CHANNEL_SUFFIX here.
134 (mips_ip): Assume .xyzw if no VU0 suffix is specified. Allow +N
135 to be omitted too.
136
13896403
RS
1372013-08-05 John Tytgat <john@bass-software.com>
138
139 * po/POTFILES.in: Regenerate.
140
d6787ef9
EB
1412013-08-05 Eric Botcazou <ebotcazou@adacore.com>
142 Konrad Eisele <konrad@gaisler.com>
143
144 * config/tc-sparc.c (sparc_arch_types): Add leon.
145 (sparc_arch): Move sparc4 around and add leon.
146 (sparc_target_format): Document -Aleon.
147 * doc/c-sparc.texi: Likewise.
148
da8bca91
RS
1492013-08-05 Richard Sandiford <rdsandiford@googlemail.com>
150
151 * config/tc-mips.c (mips_lookup_insn): Make length and opend signed.
152
14daeee3
RS
1532013-08-04 Jürgen Urban <JuergenUrban@gmx.de>
154 Richard Sandiford <rdsandiford@googlemail.com>
155
156 * config/tc-mips.c (MAX_OPERANDS): Bump to 6.
157 (RWARN): Bump to 0x8000000.
158 (RTYPE_VI, RTYPE_VF, RTYPE_R5900_I, RTYPE_R5900_Q, RTYPE_R5900_R)
159 (RTYPE_R5900_ACC): New register types.
160 (RTYPE_MASK): Include them.
161 (R5900_I_NAMES, R5900_Q_NAMES, R5900_R_NAMES, R5900_ACC_NAMES): New
162 macros.
163 (reg_names): Include them.
164 (mips_parse_register_1): New function, split out from...
165 (mips_parse_register): ...here. Add a channels_ptr parameter.
166 Look for VU0 channel suffixes when nonnull.
167 (reg_lookup): Update the call to mips_parse_register.
168 (mips_parse_vu0_channels): New function.
169 (OT_CHANNELS, OT_DOUBLE_CHAR): New mips_operand_token_types.
170 (mips_operand_token): Add a "channels" field to the union.
171 Extend the comment above "ch" to OT_DOUBLE_CHAR.
172 (mips_parse_base_start): Match -- and ++. Handle channel suffixes.
173 (mips_parse_argument_token): Handle channel suffixes here too.
174 (validate_mips_insn): Handle INSN2_VU0_CHANNEL_SUFFIX.
175 Ignore OP_VU0_MATCH_SUFFIX when calculating the used bits.
176 Handle '#' formats.
177 (md_begin): Register $vfN and $vfI registers.
178 (operand_reg_mask): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX.
179 (convert_reg_type): Handle OP_REG_VI, OP_REG_VF, OP_REG_R5900_I,
180 OP_REG_R5900_Q, OP_REG_R5900_R and OP_REG_R5900_ACC.
181 (match_vu0_suffix_operand): New function.
182 (match_operand): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX.
183 (macro): Use "+7" rather than "E" for LDQ2 and STQ2.
184 (mips_lookup_insn): New function.
185 (mips_ip): Use it. Allow "+K" operands to be elided at the end
186 of an instruction. Handle '#' sequences.
187
c0ebe874
RS
1882013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
189
190 * config/tc-mips.c (macro, mips16_macro): Create an array of operand
191 values and use it instead of sreg, treg, xreg, etc.
192
3ccad066
RS
1932013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
194
195 * config/tc-mips.c (match_int_operand): Use mips_int_operand_min
196 and mips_int_operand_max.
197 (mips16_immed_operand, mips16_immed_operands, MIPS16_NUM_IMMED):
198 Delete.
199 (mips16_immed_operand, mips16_immed_in_range_p): New functions.
200 (mips16_immed, mips16_extended_frag): Use them. Use mips_int_operand
201 instead of mips16_immed_operand.
202
0acfaea6
RS
2032013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
204
205 * config/tc-mips.c (mips16_macro): Don't use move_register.
206 (mips16_ip): Allow macros to use 'p'.
207
fc76e730
RS
2082013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
209
210 * config/tc-mips.c (MAX_OPERANDS): New macro.
211 (mips_operand_array): New structure.
212 (mips_operands, mips16_operands, micromips_operands): New arrays.
213 (micromips_to_32_reg_b_map, micromips_to_32_reg_c_map)
214 (micromips_to_32_reg_e_map, micromips_to_32_reg_f_map)
215 (micromips_to_32_reg_g_map, micromips_to_32_reg_l_map)
216 (micromips_to_32_reg_q_map): Delete.
217 (insn_operands, insn_opno, insn_extract_operand): New functions.
218 (validate_mips_insn): Take a mips_operand_array as argument and
219 use it to build up a list of operands. Extend to handle INSN_MACRO
220 and MIPS16.
221 (validate_mips16_insn): New function.
222 (validate_micromips_insn): Take a mips_operand_array as argument.
223 Handle INSN_MACRO.
224 (md_begin): Initialize mips_operands, mips16_operands and
225 micromips_operands. Call validate_mips_insn and
226 validate_micromips_insn for macro instructions too.
227 Call validate_mips16_insn for MIPS16 instructions.
228 (insn_read_mask, insn_write_mask, operand_reg_mask, insn_reg_mask):
229 New functions.
230 (gpr_read_mask, gpr_write_mask, fpr_read_mask, fpr_write_mask): Use
231 them. Handle INSN_UDI.
232 (get_append_method): Use gpr_read_mask.
233
26545944
RS
2342013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
235
236 * config/tc-mips.c (compact_branch_p, uncond_branch_p): Use the same
237 flags for MIPS16 and non-MIPS16 instructions.
238 (gpr_mod_mask): Move the INSN2_MOD_SP case outside the micromips block.
239 (gpr_read_mask): Use INSN2_READ_GPR_31 for MIPS16 instructions too.
240 (gpr_write_mask): Remove MIPS16_INSN_WRITE_SP handling.
241 (can_swap_branch_p, get_append_method): Use the same flags for MIPS16
242 and non-MIPS16 instructions. Fix formatting.
243
85fcb30f
RS
2442013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
245
246 * config/tc-mips.c (reg_needs_delay): Move later in file.
247 Use gpr_write_mask.
248 (insns_between): Use gpr_read_mask instead of EXTRACT_OPERAND.
249
43234a1e
L
2502013-07-26 Sergey Guriev <sergey.s.guriev@intel.com>
251 Alexander Ivchenko <alexander.ivchenko@intel.com>
252 Maxim Kuznetsov <maxim.kuznetsov@intel.com>
253 Sergey Lega <sergey.s.lega@intel.com>
254 Anna Tikhonova <anna.tikhonova@intel.com>
255 Ilya Tocar <ilya.tocar@intel.com>
256 Andrey Turetskiy <andrey.turetskiy@intel.com>
257 Ilya Verbin <ilya.verbin@intel.com>
258 Kirill Yukhin <kirill.yukhin@intel.com>
259 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
260
261 * config/tc-i386-intel.c (O_zmmword_ptr): New.
262 (i386_types): Add zmmword.
263 (i386_intel_simplify_register): Allow regzmm.
264 (i386_intel_simplify): Handle zmmwords.
265 (i386_intel_operand): Handle RC/SAE, vector operations and
266 zmmwords.
267 * config/tc-i386.c (ZMMWORD_MNEM_SUFFIX): New.
268 (struct RC_Operation): New.
269 (struct Mask_Operation): New.
270 (struct Broadcast_Operation): New.
271 (vex_prefix): Size of bytes increased to 4 to support EVEX
272 encoding.
273 (enum i386_error): Add new error codes: unsupported_broadcast,
274 broadcast_not_on_src_operand, broadcast_needed,
275 unsupported_masking, mask_not_on_destination, no_default_mask,
276 unsupported_rc_sae, rc_sae_operand_not_last_imm,
277 invalid_register_operand, try_vector_disp8.
278 (struct _i386_insn): Add new fields vrex, need_vrex, mask,
279 rounding, broadcast, memshift.
280 (struct RC_name): New.
281 (RC_NamesTable): New.
282 (evexlig): New.
283 (evexwig): New.
284 (extra_symbol_chars): Add '{'.
285 (cpu_arch): Add AVX512F, AVX512CD, AVX512ER and AVX512PF.
286 (i386_operand_type): Add regzmm, regmask and vec_disp8.
287 (match_mem_size): Handle zmmwords.
288 (operand_type_match): Handle zmm-registers.
289 (mode_from_disp_size): Handle vec_disp8.
290 (fits_in_vec_disp8): New.
291 (md_begin): Handle {} properly.
292 (type_names): Add "rZMM", "Mask reg" and "Vector d8".
293 (build_vex_prefix): Handle vrex.
294 (build_evex_prefix): New.
295 (process_immext): Adjust to properly handle EVEX.
296 (md_assemble): Add EVEX encoding support.
297 (swap_2_operands): Correctly handle operands with masking,
298 broadcasting or RC/SAE.
299 (check_VecOperands): Support EVEX features.
300 (VEX_check_operands): Properly handle 16 upper [xyz]mm registers.
301 (match_template): Support regzmm and handle new error codes.
302 (process_suffix): Handle zmmwords and zmm-registers.
303 (check_byte_reg): Extend to zmm-registers.
304 (process_operands): Extend to zmm-registers.
305 (build_modrm_byte): Handle EVEX.
306 (output_insn): Adjust to properly handle EVEX case.
307 (disp_size): Handle vec_disp8.
308 (output_disp): Support compressed disp8*N evex feature.
309 (output_imm): Handle RC/SAE immediates properly.
310 (check_VecOperations): New.
311 (i386_immediate): Handle EVEX features.
312 (i386_index_check): Handle zmmwords and zmm-registers.
313 (RC_SAE_immediate): New.
314 (i386_att_operand): Handle EVEX features.
315 (parse_real_register): Add a check for ZMM/Mask registers.
316 (OPTION_MEVEXLIG): New.
317 (OPTION_MEVEXWIG): New.
318 (md_longopts): Add mevexlig and mevexwig.
319 (md_parse_option): Handle mevexlig and mevexwig options.
320 (md_show_usage): Add description for mevexlig and mevexwig.
321 * doc/c-i386.texi: Document avx512f/.avx512f, avx512cd/.avx512cd,
322 avx512er/.avx512er, avx512pf/.avx512pf, mevexlig and mevexwig.
323
a0046408
L
3242013-07-25 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
325
326 * config/tc-i386.c (cpu_arch): Add .sha.
327 * doc/c-i386.texi: Document sha/.sha.
328
7e8b059b
L
3292013-07-24 Anna Tikhonova <anna.tikhonova@intel.com>
330 Kirill Yukhin <kirill.yukhin@intel.com>
331 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
332
333 * config/tc-i386.c (BND_PREFIX): New.
334 (struct _i386_insn): Add new field bnd_prefix.
335 (add_bnd_prefix): New.
336 (cpu_arch): Add MPX.
337 (i386_operand_type): Add regbnd.
338 (md_assemble): Handle BND prefixes.
339 (parse_insn): Likewise.
340 (output_branch): Likewise.
341 (output_jump): Likewise.
342 (build_modrm_byte): Handle regbnd.
343 (OPTION_MADD_BND_PREFIX): New.
344 (md_longopts): Add entry for 'madd-bnd-prefix'.
345 (md_parse_option): Handle madd-bnd-prefix option.
346 (md_show_usage): Add description for madd-bnd-prefix
347 option.
348 * doc/c-i386.texi: Document mpx/.mpx and -madd-bnd-prefix.
349
7fa9fcb6
TG
3502013-07-24 Tristan Gingold <gingold@adacore.com>
351
352 * config/tc-ppc.c (md_apply_fix): Adjust BFD_RELOC_PPC_B16 on
353 xcoff targets.
354
614eb277
AK
3552013-07-24 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
356
357 * config/tc-s390.c (s390_machine): Don't force the .machine
358 argument to lower case.
359
e673710a
KT
3602013-07-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
361
362 * config/tc-arm.c (s_arm_arch_extension): Improve error message
363 for invalid extension.
364
69091a2c
YZ
3652013-07-19 Yufeng Zhang <yufeng.zhang@arm.com>
366
367 * config/tc-aarch64.c (enum aarch64_abi_type): New enumeration tag.
368 (AARCH64_ABI_LP64, AARCH64_ABI_ILP32): New enumerators.
369 (aarch64_abi): New variable.
370 (ilp32_p): Change to be a macro.
371 (aarch64_opts): Remove the support for option -milp32 and -mlp64.
372 (struct aarch64_option_abi_value_table): New struct.
373 (aarch64_abis): New table.
374 (aarch64_parse_abi): New function.
375 (aarch64_long_opts): Add entry for -mabi=.
376 * doc/as.texinfo (Target AArch64 options): Document -mabi.
377 * doc/c-aarch64.texi: Likewise.
378
faf786e6
NC
3792013-07-18 Jim Thomas <thomas@cfht.hawaii.edu>
380
381 * config/tc-i386-intel.c (i386_intel_operand): Fixed signed vs
382 unsigned comparison.
383
f0c00282
NC
3842013-07-18 Sandeep Kumar Singh <Sandeep.Singh2@kpitcummins.com>
385
cbe02d4f 386 * config/rx-defs.h: Add macros for RX100, RX200, RX600, and
f0c00282 387 RX610.
cbe02d4f 388 * config/rx-parse.y: (rx_check_float_support): Add function to
f0c00282
NC
389 check floating point operation support for target RX100 and
390 RX200.
cbe02d4f
AM
391 * config/tc-rx.c: Add CPU options RX100, RX200, RX600, and RX610.
392 * doc/c-rx.texi: Add -mcpu option to recognize macros for RX100,
393 RX200, RX600, and RX610
f0c00282 394
8c997c27
NC
3952013-07-18 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
396
397 * config/tc-avr.c (md_show_usage): Add avrxmega2 to help text
398
8be59acb
NC
3992013-07-18 Vishnu K.S <vishnu.k_s@atmel.com>
400
401 * config/tc-avr.c: Make ata6289's ISA to AVR_ISA_AVR4.
402 * doc/c-avr.texi: Likewise.
403
4a06e5a2
RS
4042013-07-15 Richard Sandiford <rdsandiford@googlemail.com>
405
406 * config/tc-mips.c (match_save_restore_list_operand): Avoid -Wformat
407 error with older GCCs.
408 (mips16_macro_build): Dereference args.
409
a92713e6
RS
4102013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
411
412 * config/tc-mips.c (mips_prefer_vec_regno, mips_parse_register):
413 New functions, split out from...
414 (reg_lookup): ...here. Remove itbl support.
415 (reglist_lookup): Delete.
416 (mips_operand_token_type): New enum.
417 (mips_operand_token): New structure.
418 (mips_operand_tokens): New variable.
419 (mips_add_token, mips_parse_base_start, mips_parse_argument_token)
420 (mips_parse_arguments): New functions.
421 (md_begin): Initialize mips_operand_tokens.
422 (mips_arg_info): Add a token field. Remove optional_reg field.
423 (match_char, match_expression): New functions.
424 (match_const_int): Use match_expression. Remove "s" argument
425 and return a boolean result. Remove O_register handling.
426 (match_regno, match_reg, match_reg_range): New functions.
427 (match_int_operand, match_mapped_int_operand, match_msb_operand)
428 (match_reg_operand, match_reg_pair_operand, match_perf_reg_operand)
429 (match_addiusp_operand, match_clo_clz_dest_operand)
430 (match_lwm_swm_list_operand, match_entry_exit_operand)
431 (match_save_restore_list_operand, match_mdmx_imm_reg_operand)
432 (match_tied_reg_operand): Remove "s" argument and return a boolean
433 result. Match tokens rather than text. Update calls to
434 match_const_int. Rely on match_regno to call check_regno.
435 (match_pcrel_operand, match_pc_operand): Replace "s" argument with
436 "arg" argument. Return a boolean result.
437 (parse_float_constant): Replace with...
438 (match_float_constant): ...this new function.
439 (match_operand): Remove "s" argument and return a boolean result.
440 Update calls to subfunctions.
441 (mips_ip, mips16_ip): Call mips_parse_arguments. Use match routines
442 rather than string-parsing routines. Update handling of optional
443 registers for token scheme.
444
89565f1b
RS
4452013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
446
447 * config/tc-mips.c (parse_float_constant): Split out from...
448 (mips_ip): ...here.
449
3c14a432
RS
4502013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
451
452 * config/tc-mips.c (INSERT_BITS, INSERT_OPERAND, MIPS16_INSERT_OPERAND):
453 Delete.
454
364215c8
RS
4552013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
456
457 * config/tc-mips.c (mips32_to_16_reg_map): Delete.
458 (match_entry_exit_operand): New function.
459 (match_save_restore_list_operand): Likewise.
460 (match_operand): Use them.
461 (check_absolute_expr): Delete.
462 (mips16_ip): Rewrite main parsing loop to use mips_operands.
463
9e12b7a2
RS
4642013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
465
466 * config/tc-mips.c: Enable functions commented out in previous patch.
467 (SKIP_SPACE_TABS): Move further up file.
468 (mips32_to_micromips_reg_b_map, mips32_to_micromips_reg_c_map)
469 (mips32_to_micromips_reg_d_map, mips32_to_micromips_reg_e_map)
470 (ips32_to_micromips_reg_f_map, mips32_to_micromips_reg_g_map)
471 (mips32_to_micromips_reg_l_map, mips32_to_micromips_reg_m_map)
472 (mips32_to_micromips_reg_q_map, mips32_to_micromips_reg_n_map)
473 (micromips_imm_b_map, micromips_imm_c_map): Delete.
474 (mips_lookup_reg_pair): Delete.
475 (macro): Use report_bad_range and report_bad_field.
476 (mips_immed, expr_const_in_range): Delete.
477 (mips_ip): Rewrite main parsing loop to use new functions.
478
a1d78564
RS
4792013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
480
481 * config/tc-mips.c (mips_oddfpreg_ok): Move further up file.
482 Change return type to bfd_boolean.
483 (report_bad_range, report_bad_field): New functions.
484 (mips_arg_info): New structure.
485 (match_const_int, convert_reg_type, check_regno, match_int_operand)
486 (match_mapped_int_operand, match_msb_operand, match_reg_operand)
487 (match_reg_pair_operand, match_pcrel_operand, match_perf_reg_operand)
488 (match_addiusp_operand, match_clo_clz_dest_operand)
489 (match_lwm_swm_list_operand, match_mdmx_imm_reg_operand)
490 (match_pc_operand, match_tied_reg_operand, match_operand)
491 (check_completed_insn): New functions, commented out for now.
492
e077a1c8
RS
4932013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
494
495 * config/tc-mips.c (insn_insert_operand): New function.
496 (macro_build, mips16_macro_build): Put null character check
497 in the for loop and convert continues to breaks. Use operand
498 structures to handle constant operands.
499
ab902481
RS
5002013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
501
502 * config/tc-mips.c (validate_mips_insn): Move further up file.
503 Add insn_bits and decode_operand arguments. Use the mips_operand
504 fields to work out which bits an operand occupies. Detect double
505 definitions.
506 (validate_micromips_insn): Move further up file. Call into
507 validate_mips_insn.
508
2f8b73cc
RS
5092013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
510
511 * config/tc-mips.c (mips16_macro_build): Remove 'Y' case.
512
c8276761
RS
5132013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
514
515 * config/tc-mips.c (macro_build): Take an int for "C", "k", "\\"
516 and "~".
517 (macro): Update accordingly.
518
77bd4346
RS
5192013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
520
521 * config/tc-mips.c (imm_expr, imm2_expr, offset_expr): Tweak commentary.
522 (imm_reloc): Delete.
523 (md_assemble): Remove imm_reloc handling.
524 (mips_ip): Update commentary. Use offset_expr and offset_reloc
525 rather than imm_expr and imm_reloc for 'i', 'j' and 'u'.
526 Use a temporary array rather than imm_reloc when parsing
527 constant expressions. Remove imm_reloc initialization.
528 (mips16_ip): Update commentary. Use offset_expr and offset_reloc
529 for the relaxable field. Use a relax_char variable to track the
530 type of this field. Remove imm_reloc initialization.
531
cc537e56
RS
5322013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
533
534 * config/tc-mips.c (mips16_ip): Handle "I".
535
ba92f887
MR
5362013-07-12 Maciej W. Rozycki <macro@codesourcery.com>
537
538 * config/tc-mips.c (mips_flag_nan2008): New variable.
539 (options): Add OPTION_NAN enum value.
540 (md_longopts): Handle it.
541 (md_parse_option): Likewise.
542 (s_nan): New function.
543 (mips_elf_final_processing): Handle EF_MIPS_NAN2008.
544 (md_show_usage): Add -mnan.
545
546 * doc/as.texinfo (Overview): Add -mnan.
547 * doc/c-mips.texi (MIPS Opts): Document -mnan.
548 (MIPS NaN Encodings): New node. Document .nan directive.
549 (MIPS-Dependent): List the new node.
550
c1094734
TG
5512013-07-09 Tristan Gingold <gingold@adacore.com>
552
553 * configure.com: Define HAVE_SYS_TYPES_H and HAVE_UNISTD_H
554
0cbbe1b8
RS
5552013-07-08 Richard Sandiford <rdsandiford@googlemail.com>
556
557 * config/tc-mips.c (mips_ip): Unconditionally parse an expression
558 for 'A' and assume that the constant has been elided if the result
559 is an O_register.
560
f2ae14a1
RS
5612013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
562
563 * config/tc-mips.c (gprel16_reloc_p): New function.
564 (macro_read_relocs): Assume BFD_RELOC_LO16 if all relocs are
565 BFD_RELOC_UNUSED.
566 (offset_high_part, small_offset_p): New functions.
567 (nacro): Use them. Remove *_OB and *_DOB cases. For single-
568 register load and store macros, handle the 16-bit offset case first.
569 If a 16-bit offset is not suitable for the instruction we're
570 generating, load it into the temporary register using
571 ADDRESS_ADDI_INSN. Make the M_LI_DD code fall through into the
572 M_L_DAB code once the address has been constructed. For double load
573 and store macros, again handle the 16-bit offset case first.
574 If the second register cannot be accessed from the same high
575 part as the first, load it into AT using ADDRESS_ADDI_INSN.
576 Fix the handling of LD in cases where the first register is the
577 same as the base. Also handle the case where the offset is
578 not 16 bits and the second register cannot be accessed from the
579 same high part as the first. For unaligned loads and stores,
580 fuse the offbits == 12 and old "ab" handling. Apply this handling
581 whenever the second offset needs a different high part from the first.
582 Construct the offset using ADDRESS_ADDI_INSN where possible,
583 for offbits == 16 as well as offbits == 12. Use offset_reloc
584 when constructing the individual loads and stores.
585 (mips_ip): Set up imm_expr, imm2_expr, offset_expr, imm_reloc
586 and offset_reloc before matching against a particular opcode.
587 Handle elided 'A' constants. Allow 'A' constants to use
588 relocation operators.
589
5c324c16
RS
5902013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
591
592 * config/tc-mips.c (validate_mips_insn): Remove "[" and "]" handling.
593 (mips_ip): Likewise. Do not set is_mdmx for INSN_5400 instructions.
594 Check constraints on the VR5400 RZU.OB, SLL.OB and SRL.OB instructions.
595
23e69e47
RS
5962013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
597
598 * config/tc-mips.c (mips_ip): Preserve the real bit number for "+p".
599 Require the msb to be <= 31 for "+s". Check that the size is <= 31
600 for both "+s" and "+S".
601
27c5c572
RS
6022013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
603
604 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn):
605 (mips_ip, mips16_ip): Handle "+i".
606
e76ff5ab
RS
6072013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
608
609 * config/tc-mips.c (mips32_to_micromips_reg_h_map): Delete.
610 (micromips_to_32_reg_h_map): Rename to...
611 (micromips_to_32_reg_h_map1): ...this.
612 (micromips_to_32_reg_i_map): Rename to...
613 (micromips_to_32_reg_h_map2): ...this.
614 (mips_lookup_reg_pair): New function.
615 (gpr_write_mask, macro): Adjust after above renaming.
616 (validate_micromips_insn): Remove "mi" handling.
617 (mips_ip): Likewise. Parse both registers in a pair for "mh".
618
fa7616a4
RS
6192013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
620
621 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn)
622 (mips_ip): Remove "+D" and "+T" handling.
623
fb798c50
AK
6242013-07-05 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
625
626 * config/tc-s390.c (md_gather_operands, md_apply_fix): Support new
627 relocs.
628
2c0a3565
MS
6292013-07-03 Marcus Shawcroft <marcus.shawcroft@arm.com>
630
4aa2c5e2
MS
631 * config/tc-aarch64.c (reloc_table): Merge got_prel19 into got.
632
6332013-07-02 Marcus Shawcroft <marcus.shawcroft@arm.com>
634
2c0a3565
MS
635 * config/tc-aarch64.c (md_apply_fix): Reorder case values.
636 (aarch64_force_relocation): Likewise.
637
f40da81b
AM
6382013-07-02 Alan Modra <amodra@gmail.com>
639
640 * config/tc-ppc.c (ppc_elf_adjust_symtab): Don't make .TOC. weak.
641
81566a9b
MR
6422013-06-26 Maciej W. Rozycki <macro@codesourcery.com>
643
644 * doc/as.texinfo (Overview): Remove @samp from MIPS ISA names.
645 * doc/c-mips.texi (MIPS Options): Remove @sc from MIPS ISA names.
646 Replace @sc{mips16} with literal `MIPS16'.
647 (MIPS ISA): Replace @sc{mips3} with literal `MIPS III'.
648
a6bb11b2
YZ
6492013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
650
651 * config/tc-aarch64.c (reloc_table): Replace
652 BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with
653 BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to
654 BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and
655 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC.
656 (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC,
657 BFD_RELOC_AARCH64_LD32_GOT_LO12_NC,
658 BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC,
659 BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC,
660 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and
661 BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC.
662 (aarch64_force_relocation): Likewise.
663
cec5225b
YZ
6642013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
665
666 * config/tc-aarch64.c (ilp32_p): New static variable.
667 (elf64_aarch64_target_format): Return the target according to the
668 value of 'ilp32_p'.
669 (md_begin): Determine 'mach' according to the value of 'ilp32_p'.
670 (aarch64_opts): Add support for options '-milp32' and '-mlp64'.
671 (aarch64_dwarf2_addr_size): New function.
672 * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration.
673 (DWARF2_ADDR_SIZE): New define.
674
e335d9cb
RS
6752013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
676
677 * doc/c-mips.texi: Use ISA instead of @sc{isa}.
678
18870af7
RS
6792013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
680
681 * config/tc-mips.c (validate_mips_insn): Use STYPE rather than SHAMT.
682
833794fc
MR
6832013-06-25 Maciej W. Rozycki <macro@codesourcery.com>
684
685 * config/tc-mips.c (mips_set_options): Add insn32 member.
686 (mips_opts): Initialize it.
687 (NOP_INSN, NOP_INSN_SIZE): Handle insn32 mode.
688 (options): Add OPTION_INSN32 and OPTION_NO_INSN32 enum values.
689 (md_longopts): Add "minsn32" and "mno-insn32" options.
690 (is_size_valid): Handle insn32 mode.
691 (md_assemble): Pass instruction string down to macro.
692 (brk_fmt): Add second dimension and insn32 mode initializers.
693 (mfhl_fmt): Likewise.
694 (BRK_FMT, MFHL_FMT): Handle insn32 mode.
695 (macro_build) <'c'>: Handle microMIPS 32-bit BREAK encoding.
696 (macro_build_jalr, move_register): Handle insn32 mode.
697 (macro_build_branch_rs): Likewise.
698 (macro): Handle insn32 mode.
699 <M_JRADDIUSP>, <M_JRC>, <M_MOVEP>: New cases.
700 (mips_ip): Handle insn32 mode.
701 (md_parse_option): Handle OPTION_INSN32 and OPTION_NO_INSN32.
702 (s_mipsset): Handle "insn32" and "noinsn32" pseudo-ops.
703 (mips_handle_align): Handle insn32 mode.
704 (md_show_usage): Add -minsn32 and -mno-insn32.
705
706 * doc/as.texinfo (Target MIPS options): Add -minsn32 and
707 -mno-insn32 options.
708 (-minsn32, -mno-insn32): New options.
709 * doc/c-mips.texi (MIPS Opts): Add -minsn32 and -mno-insn32
710 options.
711 (MIPS assembly options): New node. Document .set insn32 and
712 .set noinsn32.
713 (MIPS-Dependent): List the new node.
714
d1706f38
NC
7152013-06-25 Nick Clifton <nickc@redhat.com>
716
717 * config/tc-msp430.c (msp430_srcoperand): Do not allow the use of
718 the PC in indirect addressing on 430xv2 parts.
719 (msp430_operands): Add version test to hardware bug encoding
720 restrictions.
721
477330fc
RM
7222013-06-24 Roland McGrath <mcgrathr@google.com>
723
d996d970
RM
724 * config/tc-arm.c (parse_reg_list): Use skip_past_char for '}',
725 so it skips whitespace before it.
726 (s_arm_unwind_save_mmxwr, s_arm_unwind_save_mmxwcg): Likewise.
727
477330fc
RM
728 * config/tc-arm.c (arm_symbol_chars): Include '{' and '}'.
729 (arm_reg_parse_multi): Skip whitespace first.
730 (parse_reg_list): Likewise.
731 (parse_vfp_reg_list): Likewise.
732 (s_arm_unwind_save_mmxwcg): Likewise.
733
24382199
NC
7342013-06-24 Nick Clifton <nickc@redhat.com>
735
736 PR gas/15623
737 * config/tc-arm.c (do_t_smc): Mark as ending an IT block.
738
c3678916
RS
7392013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
740
741 * config/tc-mips.c (mips_ip): Fix swapped bit numbers in comments.
742
42429eac
RS
7432013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
744
745 * config/tc-mips.c: Assert that offsetT and valueT are at least
746 8 bytes in size.
747 (GPR_SMIN, GPR_SMAX): New macros.
748 (macro, mips_ip): Remove code for 4-byte valueT and offsetT.
749
f3ded42a
RS
7502013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
751
752 * config/tc-mips.c: Remove OBJ_ELF, OBJ_MAYBE_ELF and IS_ELF
753 conditions. Remove any code deselected by them.
754 (s_mips_frame, s_mips_mask): Handle ECOFF_DEBUGGING case first.
755
e8044f35
RS
7562013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
757
758 * NEWS: Note removal of ECOFF support.
759 * doc/as.texinfo (--emulation): Update for the removal of MIPS ECOFF.
760 * Makefile.am (TARG_ENV_HFILES): Remove config/te-lnews.h.
761 (MULTI_CFILES): Remove config/e-mipsecoff.c.
762 * Makefile.in: Regenerate.
763 * configure.in: Remove MIPS ECOFF references.
764 (mips-sony-bsd*, mips-*-bsd*, mips-*-lnews*-ecoff, mips-*-*-ecoff):
765 Delete cases.
766 (mips-*-irix5*-*, mips*-*-linux*-*, mips*-*-freebsd*)
767 (mips*-*-kfreebsd*-gnu, mips-*-*-elf): Fold into...
768 (mips-*-*): ...this single case.
769 (mipsbecoff, mipslecoff, mipsecoff): Remove emulations. Expect
770 MIPS emulations to be e-mipself*.
771 * configure: Regenerate.
772 * configure.tgt (mips-sony-bsd*, mips-*-ultrix*, mips-*-osf*)
773 (mips-*-ecoff*, mips-*-pe*, mips-*-irix*, ips-*-lnews*, mips-*-riscos*)
774 (mips-*-sysv*): Remove coff and ecoff cases.
775 * as.c (mipsbecoff, mipslecoff, mipsecoff): Remove.
776 * ecoff.c: Remove reference to MIPS ECOFF.
777 * config/e-mipsecoff.c, config/te-lnews.h: Delete files.
778 * config/tc-mips.c (ECOFF_LITTLE_FORMAT): Delete.
779 (RDATA_SECTION_NAME, mips_target_form): Remove COFF and ECOFF cases.
780 (mips_hi_fixup): Tweak comment.
781 (append_insn): Require a howto.
782 (mips_after_parse_args): Remove OBJ_MAYBE_ECOFF code.
783
98508b2a
RS
7842013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
785
786 * doc/as.texinfo: Use MIPS rather than @sc{mips} throughout.
787 Use "CPU" instead of "cpu".
788 * doc/c-mips.texi: Likewise.
789 (MIPS Opts): Rename to MIPS Options.
790 (MIPS option stack): Rename to MIPS Option Stack.
791 (MIPS ASE instruction generation overrides): Rename to
792 MIPS ASE Instruction Generation Overrides (for now).
793 (MIPS floating-point): Rename to MIPS Floating-Point.
794
fc16f8cc
RS
7952013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
796
797 * doc/c-mips.texi (MIPS Macros): New section.
798 (MIPS Object): Replace with...
799 (MIPS Small Data): ...this new section.
800
5a7560b5
RS
8012013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
802
803 * doc/c-mips.texi (MIPS symbol sizes): Move section further up file.
804 Capitalize name. Use @kindex instead of @cindex for .set entries.
805
a1b86ab7
RS
8062013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
807
808 * doc/c-mips.texi (MIPS Stabs): Remove section.
809
c6278170
RS
8102013-06-20 Richard Sandiford <rdsandiford@googlemail.com>
811
812 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS, ISA_SUPPORTS_DSP_ASE)
813 (ISA_SUPPORTS_DSP64_ASE, ISA_SUPPORTS_DSPR2_ASE, ISA_SUPPORTS_EVA_ASE)
814 (ISA_SUPPORTS_MT_ASE, ISA_SUPPORTS_MCU_ASE, ISA_SUPPORTS_VIRT_ASE)
815 (ISA_SUPPORTS_VIRT64_ASE): Delete.
816 (mips_ase): New structure.
817 (mips_ases): New table.
818 (FP64_ASES): New macro.
819 (mips_ase_groups): New array.
820 (mips_isa_rev, mips_ase_mask, mips_check_isa_supports_ase)
821 (mips_check_isa_supports_ases, mips_set_ase, mips_lookup_ase): New
822 functions.
823 (is_opcode_valid): Use mips_ases to get the 64-bit ASE flags.
824 (md_parse_option): Use mips_ases and mips_set_ase instead of
825 separate case statements for each ASE option.
826 (mips_after_parse_args): Use FP64_ASES. Use
827 mips_check_isa_supports_ases to check the ASEs against
828 other options.
829 (s_mipsset): Use mips_ases and mips_set_ase instead of
830 separate if statements for each ASE option. Use
831 mips_check_isa_supports_ases, even when a non-ASE option
832 is specified.
833
63a4bc21
KT
8342013-06-19 Greta Yorsh <Greta.Yorsh@arm.com>
835
836 * config/tc-arm.c (arm_cpus): Add support for Cortex-A12.
837
c31f3936
RS
8382013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
839
840 * config/tc-mips.c (md_shortopts, options, md_longopts)
841 (md_longopts_size): Move earlier in file.
842
846ef2d0
RS
8432013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
844
845 * config/tc-mips.c (mips_set_options): Replace separate "ase_*" fields
846 with a single "ase" bitmask.
847 (mips_opts): Update accordingly.
848 (file_ase, file_ase_explicit): New variables.
849 (file_ase_mips3d, file_ase_mdmx, file_ase_smartmips, file_ase_dsp)
850 (file_ase_dspr2, file_ase_eva, file_ase_mt, file_ase_virt): Delete.
851 (ISA_HAS_ROR): Adjust for mips_set_options change.
852 (is_opcode_valid): Take the base ase mask directly from mips_opts.
853 (mips_ip): Adjust for mips_set_options change.
854 (md_parse_option): Likewise. Update file_ase_explicit.
855 (mips_after_parse_args): Adjust for mips_set_options change.
856 Use bitmask operations to select the default ASEs. Set file_ase
857 rather than individual per-ASE variables.
858 (s_mipsset): Adjust for mips_set_options change.
859 (mips_elf_final_processing): Test file_ase rather than
860 file_ase_mdmx. Remove commented-out code.
861
d16afab6
RS
8622013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
863
864 * config/tc-mips.c (mips_cpu_info): Add an "ase" field.
865 (MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, MIPS_CPU_ASE_MT)
866 (MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX, MIPS_CPU_ASE_DSPR2)
867 (MIPS_CPU_ASE_MCU, MIPS_CPU_ASE_VIRT, MIPS_CPU_ASE_EVA): Delete.
868 (mips_after_parse_args): Use the new "ase" field to choose
869 the default ASEs.
870 (mips_cpu_info_table): Move ASEs from the "flags" field to the
871 "ase" field.
872
e83a675f
RE
8732013-06-18 Richard Earnshaw <rearnsha@arm.com>
874
875 * config/tc-arm.c (symbol_preemptible): New function.
876 (relax_branch): Use it.
877
7f3c4072
CM
8782013-06-17 Catherine Moore <clm@codesourcery.com>
879 Maciej W. Rozycki <macro@codesourcery.com>
880 Chao-Ying Fu <fu@mips.com>
881
882 * config/tc-mips.c (mips_set_options): Add ase_eva.
883 (mips_set_options mips_opts): Add ase_eva.
884 (file_ase_eva): Declare.
885 (ISA_SUPPORTS_EVA_ASE): Define.
886 (IS_SEXT_9BIT_NUM): Define.
887 (MIPS_CPU_ASE_EVA): Define.
888 (is_opcode_valid): Add support for ase_eva.
889 (macro_build): Likewise.
890 (macro): Likewise.
891 (validate_mips_insn): Likewise.
892 (validate_micromips_insn): Likewise.
893 (mips_ip): Likewise.
894 (options): Add OPTION_EVA and OPTION_NO_EVA.
895 (md_longopts): Add -meva and -mno-eva.
896 (md_parse_option): Process new options.
897 (mips_after_parse_args): Check for valid EVA combinations.
898 (s_mipsset): Likewise.
899
e410add4
RS
9002013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
901
902 * dwarf2dbg.h (dwarf2_move_insn): Declare.
903 * dwarf2dbg.c (line_subseg): Add pmove_tail.
904 (get_line_subseg): Add create_p argument. Initialize pmove_tail.
905 (dwarf2_gen_line_info_1): Update call accordingly.
906 (dwarf2_move_insn): New function.
907 * config/tc-mips.c (append_insn): Use dwarf2_move_insn.
908
6a50d470
RS
9092013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
910
911 Revert:
912
913 2011-09-05 Richard Sandiford <rdsandiford@googlemail.com>
914
915 PR gas/13024
916 * dwarf2dbg.c (pending_lines, pending_lines_tail): New variables.
917 (dwarf2_gen_line_info_1): Delete.
918 (dwarf2_push_line, dwarf2_flush_pending_lines): New functions.
919 (dwarf2_gen_line_info, dwarf2_emit_label): Use them.
920 (dwarf2_consume_line_info): Call dwarf2_flush_pending_lines.
921 (dwarf2_directive_loc): Push previous .locs instead of generating
922 them immediately.
923
f122319e
CF
9242013-06-13 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
925
926 * config/tc-mips.c (ISA_SUPPORTS_VIRT_ASE): Support micromips.
927 (ISA_SUPPORTS_VIRT64_ASE): Support 64-bit micromips.
928
909c7f9c
NC
9292013-06-13 Nick Clifton <nickc@redhat.com>
930
931 PR gas/15602
932 * config/tc-m68k.h (TC_CHECK_ADJUSTED_BROKEN_DOT_WORD): Define.
933 * config/tc-m68k.c (tc_m68k_check_adjusted_broken_word): New
934 function. Generates an error if the adjusted offset is out of a
935 16-bit range.
936
5d5755a7
SL
9372013-06-12 Sandra Loosemore <sandra@codesourcery.com>
938
939 * config/tc-nios2.c (md_apply_fix): Mask constant
940 BFD_RELOC_NIOS2_HIADJ16 value to 16 bits.
941
3bf0dbfb
MR
9422013-06-10 Maciej W. Rozycki <macro@codesourcery.com>
943
944 * config/tc-mips.c (append_insn): Don't do branch relaxation for
945 MIPS-3D instructions either.
946 (md_convert_frag): Update the COPx branch mask accordingly.
947
948 * config/tc-mips.c (md_show_usage): Document --[no-]relax-branch
949 option.
950 * doc/as.texinfo (Overview): Add --relax-branch and
951 --no-relax-branch.
952 * doc/c-mips.texi (MIPS Opts): Document --relax-branch and
953 --no-relax-branch.
954
9daf7bab
SL
9552013-06-09 Sandra Loosemore <sandra@codesourcery.com>
956
957 * config/tc-nios2.c (nios2_parse_args): Allow trap argument to
958 omitted.
959
d301a56b
RS
9602013-06-08 Catherine Moore <clm@codesourcery.com>
961
962 * config/tc-mips.c (is_opcode_valid): Build ASE mask.
963 (is_opcode_valid_16): Pass ase value to opcode_is_member.
964 (append_insn): Change INSN_xxxx to ASE_xxxx.
965
7bab7634
DC
9662013-06-01 George Thomas <george.thomas@atmel.com>
967
cbe02d4f 968 * gas/config/tc-avr.c: Change ISA for devices with USB support to
7bab7634
DC
969 AVR_ISA_XMEGAU
970
f60cf82f
L
9712013-05-31 H.J. Lu <hongjiu.lu@intel.com>
972
973 * config/tc-i386.c (md_begin): Don't align text/data/bss sections
974 for ELF.
975
a3f278e2
CM
9762013-05-31 Paul Brook <paul@codesourcery.com>
977
a3f278e2
CM
978 * config/tc-mips.c (s_ehword): New.
979
067ec077
CM
9802013-05-30 Paul Brook <paul@codesourcery.com>
981
982 * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH.
983
d6101ac2
MR
9842013-05-29 Maciej W. Rozycki <macro@codesourcery.com>
985
986 * write.c (resolve_reloc_expr_symbols): On REL targets don't
987 convert relocs who have no relocatable field either. Rephrase
988 the conditional so that the PC-relative check is only applied
989 for REL targets.
990
f19ccbda
MR
9912013-05-28 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
992
993 * config/tc-mips.c (macro) <ld>: Don't use $zero for address
994 calculation.
995
418009c2
YZ
9962013-05-28 Yufeng Zhang <yufeng.zhang@arm.com>
997
998 * config/tc-aarch64.c (reloc_table): Update to use
477330fc 999 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of
418009c2
YZ
1000 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE.
1001 (md_apply_fix): Likewise.
1002 (aarch64_force_relocation): Likewise.
1003
0a8897c7
KT
10042013-05-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1005
1006 * config/tc-arm.c (it_fsm_post_encode): Improve
1007 warning messages about deprecated IT block formats.
1008
89d2a2a3
MS
10092013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com>
1010
1011 * config/tc-aarch64.c (md_apply_fix): Move value range checking
1012 inside fx_done condition.
1013
c77c0862
RS
10142013-05-22 Jürgen Urban <JuergenUrban@gmx.de>
1015
1016 * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB.
1017
c0637f3a
PB
10182013-05-20 Peter Bergner <bergner@vnet.ibm.com>
1019
1020 * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error
1021 and clean up warning when using PRINT_OPCODE_TABLE.
1022
5656a981
AM
10232013-05-20 Alan Modra <amodra@gmail.com>
1024
1025 * config/tc-ppc.c (md_apply_fix): Hoist code common to insn
1026 and data fixups performing shift/high adjust/sign extension on
1027 fieldval. Sink fx_pcrel handling and checks. Use fixP->fx_size
1028 when writing data fixups rather than recalculating size.
1029
997b26e8
JBG
10302013-05-16 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1031
1032 * doc/c-msp430.texi: Fix typo.
1033
9f6e76f4
TG
10342013-05-16 Tristan Gingold <gingold@adacore.com>
1035
1036 * config/tc-ppc.c (ppc_is_toc_sym): Symbols of class XMC_TC
1037 are also TOC symbols.
1038
638d3803
NC
10392013-05-16 Nick Clifton <nickc@redhat.com>
1040
1041 * config/tc-msp430.c: Make -mmcu recognise more part numbers.
1042 Add -mcpu command to specify core type.
997b26e8 1043 * doc/c-msp430.texi: Update documentation.
638d3803 1044
b015e599
AP
10452013-05-09 Andrew Pinski <apinski@cavium.com>
1046
1047 * config/tc-mips.c (struct mips_set_options): New ase_virt field.
1048 (mips_opts): Update for the new field.
1049 (file_ase_virt): New variable.
1050 (ISA_SUPPORTS_VIRT_ASE): New macro.
1051 (ISA_SUPPORTS_VIRT64_ASE): New macro.
1052 (MIPS_CPU_ASE_VIRT): New define.
1053 (is_opcode_valid): Handle ase_virt.
1054 (macro_build): Handle "+J".
1055 (validate_mips_insn): Likewise.
1056 (mips_ip): Likewise.
1057 (enum options): Add OPTION_VIRT and OPTION_NO_VIRT.
1058 (md_longopts): Add mvirt and mnovirt
1059 (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT.
1060 (mips_after_parse_args): Handle ase_virt field.
1061 (s_mipsset): Handle "virt" and "novirt".
1062 (mips_elf_final_processing): Add a comment about virt ASE might need
1063 a new flag.
1064 (md_show_usage): Print out the usage of -mvirt and mno-virt options.
1065 * doc/c-mips.texi: Document -mvirt and -mno-virt.
1066 Document ".set virt" and ".set novirt".
1067
da8094d7
AM
10682013-05-09 Alan Modra <amodra@gmail.com>
1069
1070 * config/tc-ppc.c (md_apply_fix): Sign extend fieldval under
1071 control of operand flag bits.
1072
c5f8c205
AM
10732013-05-07 Alan Modra <amodra@gmail.com>
1074
1075 * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro.
1076 (PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise.
1077 (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise.
1078 (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise.
1079 (md_apply_fix): Set fx_no_overflow for assorted relocations.
1080 Shift and sign-extend fieldval for use by some VLE reloc
1081 operand->insert functions.
1082
b47468a6
CM
10832013-05-06 Paul Brook <paul@codesourcery.com>
1084 Catherine Moore <clm@codesourcery.com>
1085
c5f8c205
AM
1086 * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL.
1087 (limited_pcrel_reloc_p): Likewise.
b47468a6
CM
1088 (md_apply_fix): Likewise.
1089 (tc_gen_reloc): Likewise.
1090
2de39019
CM
10912013-05-06 Richard Sandiford <rdsandiford@googlemail.com>
1092
1093 * config/tc-mips.c (limited_pcrel_reloc_p): New function.
1094 (mips_fix_adjustable): Adjust pc-relative check to use
1095 limited_pc_reloc_p.
1096
754e2bb9
RS
10972013-05-02 Richard Sandiford <rdsandiford@googlemail.com>
1098
1099 * config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries.
1100 (s_mips_stab): Do not restrict to stabn only.
1101
13761a11
NC
11022013-05-02 Nick Clifton <nickc@redhat.com>
1103
1104 * config/tc-msp430.c: Add support for the MSP430X architecture.
1105 Add code to insert a NOP instruction after any instruction that
1106 might change the interrupt state.
1107 Add support for the LARGE memory model.
1108 Add code to initialise the .MSP430.attributes section.
1109 * config/tc-msp430.h: Add support for the MSP430X architecture.
1110 * doc/c-msp430.texi: Document the new -mL and -mN command line
1111 options.
1112 * NEWS: Mention support for the MSP430X architecture.
1113
df26367c
MR
11142013-05-01 Maciej W. Rozycki <macro@codesourcery.com>
1115
1116 * configure.tgt: Replace alpha*-*-linuxecoff* pattern with
1117 alpha*-*-linux*ecoff*.
1118
f02d8318
CF
11192013-04-30 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1120
1121 * config/tc-mips.c (mips_ip): Add sizelo.
1122 For "+C", "+G", and "+H", set sizelo and compare against it.
1123
b40bf0a2
NC
11242013-04-29 Nick Clifton <nickc@redhat.com>
1125
1126 * as.c (Options): Add -gdwarf-sections.
1127 (parse_args): Likewise.
1128 * as.h (flag_dwarf_sections): Declare.
1129 * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes.
1130 (process_entries): When -gdwarf-sections is enabled generate
1131 fragmentary .debug_line sections.
1132 (out_debug_line): Set the section for the .debug_line section end
1133 symbol.
1134 * doc/as.texinfo: Document -gdwarf-sections.
1135 * NEWS: Mention -gdwarf-sections.
1136
8eeccb77 11372013-04-26 Christian Groessler <chris@groessler.org>
00a3147e
CG
1138
1139 * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdline
1140 according to the target parameter. Don't call s_segm since s_segm
1141 calls bfd_set_arch_mach using stdoutput, but stdoutput isn't
1142 initialized yet.
1143 (md_begin): Call s_segm according to target parameter from command
1144 line.
1145
49926cd0
AM
11462013-04-25 Alan Modra <amodra@gmail.com>
1147
1148 * configure.in: Allow little-endian linux.
1149 * configure: Regenerate.
1150
e3031850
SL
11512013-04-24 Sandra Loosemore <sandra@codesourcery.com>
1152
1153 * config/tc-nios2.c (nios2_control_register_arg_p): Rename
1154 "fstatus" control register to "eccinj".
1155
cb948fc0
KT
11562013-04-19 Kai Tietz <ktietz@redhat.com>
1157
1158 * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin.
1159
4455e9ad
JB
11602013-04-15 Julian Brown <julian@codesourcery.com>
1161
1162 * expr.c (add_to_result, subtract_from_result): Make global.
1163 * expr.h (add_to_result, subtract_from_result): Add prototypes.
1164 * config/tc-sh.c (sh_optimize_expr): Use add_to_result,
1165 subtract_from_result to handle extra bit of precision for .sleb128
1166 directive operands.
1167
956a6ba3
JB
11682013-04-10 Julian Brown <julian@codesourcery.com>
1169
1170 * read.c (convert_to_bignum): Add sign parameter. Use it
1171 instead of X_unsigned to determine sign of resulting bignum.
1172 (emit_expr): Pass extra argument to convert_to_bignum.
1173 (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass
1174 X_extrabit to convert_to_bignum.
1175 (parse_bitfield_cons): Set X_extrabit.
1176 * expr.c (make_expr_symbol, expr_build_uconstant, operand):
1177 Initialise X_extrabit field as appropriate.
1178 (add_to_result): New.
1179 (subtract_from_result): New.
1180 (expr): Use above.
1181 * expr.h (expressionS): Add X_extrabit field.
1182
eb9f3f00
JB
11832013-04-10 Jan Beulich <jbeulich@suse.com>
1184
1185 * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base
1186 register being PC when is_t or writeback, and use distinct
1187 diagnostic for the latter case.
1188
ccb84d65
JB
11892013-04-10 Jan Beulich <jbeulich@suse.com>
1190
1191 * gas/config/tc-arm.c (parse_operands): Re-write
1192 po_barrier_or_imm().
1193 (do_barrier): Remove bogus constraint().
1194 (do_t_barrier): Remove.
1195
4d13caa0
NC
11962013-04-09 Joerg Wunsch <joerg.wunsch@atmel.com>
1197
1198 * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2,
1199 ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2,
1200 ATmega2564RFR2
1201 * gas/doc/c-avr.texi (-mmcu documentation): Likewise.
1202
16d02dc9
JB
12032013-04-09 Jan Beulich <jbeulich@suse.com>
1204
1205 * gas/config/tc-arm.c (do_vmrs): Accept all control registers.
1206 Use local variable Rt in more places.
1207 (do_vmsr): Accept all control registers.
1208
05ac0ffb
JB
12092013-04-09 Jan Beulich <jbeulich@suse.com>
1210
1211 * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
1212 if there was none specified for moves between scalar and core
1213 register.
1214
2d51fb74
JB
12152013-04-09 Jan Beulich <jbeulich@suse.com>
1216
1217 * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the
1218 NEON_ALL_LANES case.
1219
94dcf8bf
JB
12202013-04-08 Jan Beulich <jbeulich@suse.com>
1221
1222 * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for
1223 PC-relative VSTR.
1224
1472d06f
JB
12252013-04-08 Jan Beulich <jbeulich@suse.com>
1226
1227 * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq
1228 entry to sp_fiq.
1229
0c76cae8
AM
12302013-04-03 Alan Modra <amodra@gmail.com>
1231
1232 * doc/as.texinfo: Add support to generate man options for h8300.
1233 * doc/c-h8300.texi: Likewise.
1234
92eb40d9
RR
12352013-03-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
1236
1237 * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and
1238 Cortex-A57.
1239
51dcdd4d
NC
12402013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com>
1241
1242 PR binutils/15068
1243 * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array.
1244
c5d685bf
NC
12452013-03-26 Nick Clifton <nickc@redhat.com>
1246
9b978282
NC
1247 PR gas/15295
1248 * listing.c (rebuffer_line): Rewrite to avoid seeking back to the
1249 start of the file each time.
1250
c5d685bf
NC
1251 PR gas/15178
1252 * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for
1253 FreeBSD targets.
1254
9699c833
TG
12552013-03-26 Douglas B Rupp <rupp@gnat.com>
1256
1257 * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment
1258 after fixup.
1259
4755303e
WN
12602013-03-21 Will Newton <will.newton@linaro.org>
1261
1262 * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all
1263 pc-relative str instructions in Thumb mode.
1264
81f5558e
NC
12652013-03-21 Michael Schewe <michael.schewe@gmx.net>
1266
1267 * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
1268 @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
1269 R_H8_DISP32A16.
1270 * config/tc-h8300.h: Remove duplicated defines.
1271
71863e73
NC
12722013-03-21 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
1273
1274 PR gas/15282
1275 * tc-avr.c (mcu_has_3_byte_pc): New function.
1276 (tc_cfi_frame_initial_instructions): Call it to find return
1277 address size.
1278
795b8e6b
NC
12792013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com>
1280
1281 PR gas/15095
1282 * config/tc-tic6x.c (tic6x_try_encode): Handle
1283 tic6x_coding_dreg_(msb|lsb) field coding types and use it to
1284 encode register pair numbers when required.
1285
ba86b375
WN
12862013-03-15 Will Newton <will.newton@linaro.org>
1287
1288 * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register
1289 in vstr in Thumb mode for pre-ARMv7 cores.
1290
9e6f3811
AS
12912013-03-14 Andreas Schwab <schwab@suse.de>
1292
1293 * doc/c-arc.texi (ARC Directives): Revert last change and use
1294 @itemize instead of @table.
1295 * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
1296
b10bf8c5
NC
12972013-03-14 Nick Clifton <nickc@redhat.com>
1298
1299 PR gas/15273
1300 * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a
1301 NULL message, instead just check ARM_CPU_IS_ANY directly.
1302
ba724cfc
NC
13032013-03-14 Nick Clifton <nickc@redhat.com>
1304
1305 PR gas/15212
9e6f3811 1306 * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet
ba724cfc
NC
1307 for table format.
1308 * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
1309 to the @item directives.
1310 (ARM-Neon-Alignment): Move to correct place in the document.
1311 * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
1312 formatting.
1313 * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
1314 @smallexample.
1315
531a94fd
SL
13162013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
1317
1318 * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'
1319 case. Add default BAD_CASE to switch.
1320
dad60f8e
SL
13212013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
1322
1323 * config/tc-nios2.c (nios2_assemble_args_ds): New function.
1324 (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
1325
dd5181d5
KT
13262013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1327
1328 * config/tc-arm.c (crc_ext_armv8): New feature set.
1329 (UNPRED_REG): New macro.
1330 (do_crc32_1): New function.
1331 (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
1332 do_crc32ch, do_crc32cw): Likewise.
1333 (TUEc): New macro.
1334 (insns): Add entries for crc32 mnemonics.
1335 (arm_extensions): Add entry for crc.
1336
8e723a10
CLT
13372013-03-08 Chung-Lin Tang <cltang@codesourcery.com>
1338
1339 * write.h (struct fix): Add fx_dot_frag field.
1340 (dot_frag): Declare.
1341 * write.c (dot_frag): New variable.
1342 (fix_new_internal): Set fx_dot_frag field with dot_frag.
1343 (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
1344 * expr.c (expr): Save value of frag_now in dot_frag when setting
1345 dot_value.
1346 * read.c (emit_expr): Likewise. Delete comments.
1347
be05d201
L
13482013-03-07 H.J. Lu <hongjiu.lu@intel.com>
1349
1350 * config/tc-i386.c (flag_code_names): Removed.
1351 (i386_index_check): Rewrote.
1352
62b0d0d5
YZ
13532013-03-05 Yufeng Zhang <yufeng.zhang@arm.com>
1354
1355 * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
1356 add comment.
1357 (aarch64_double_precision_fmovable): New function.
1358 (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
1359 function; handle hexadecimal representation of IEEE754 encoding.
1360 (parse_operands): Update the call to parse_aarch64_imm_float.
1361
165de32a
L
13622013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1363
1364 * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
1365 (check_hle): Updated.
1366 (md_assemble): Likewise.
1367 (parse_insn): Likewise.
1368
d5de92cf
L
13692013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1370
1371 * config/tc-i386.c (_i386_insn): Add rep_prefix.
9e6f3811 1372 (md_assemble): Check if REP prefix is OK.
d5de92cf
L
1373 (parse_insn): Remove expecting_string_instruction. Set
1374 i.rep_prefix.
1375
e60bb1dd
YZ
13762013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1377
1378 * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
1379
aeebdd9b
YZ
13802013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1381
1382 * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
1383 for system registers.
1384
4107ae22
DD
13852013-02-27 DJ Delorie <dj@redhat.com>
1386
1387 * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
1388 (rl78_op): Handle %code().
1389 (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
1390 (tc_gen_reloc): Likwise; convert to a computed reloc.
1391 (md_apply_fix): Likewise.
1392
151fa98f
NC
13932013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
1394
1395 * config/rl78-parse.y: Fix encoding of DIVWU insn.
1396
70a8bc5b 13972013-02-25 Terry Guo <terry.guo@arm.com>
1398
1399 * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
1400 * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
1401 list of accepted CPUs.
1402
5c111e37
L
14032013-02-19 H.J. Lu <hongjiu.lu@intel.com>
1404
1405 PR gas/15159
1406 * config/tc-i386.c (cpu_arch): Add ".smap".
1407
1408 * doc/c-i386.texi: Document smap.
1409
8a75745d
MR
14102013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1411
1412 * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
1413 mips_assembling_insn appropriately.
1414 (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
1415
79850f26
MR
14162013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1417
cf29fc61 1418 * config/tc-mips.c (append_insn): Correct indentation, remove
79850f26
MR
1419 extraneous braces.
1420
4c261dff
NC
14212013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1422
5c111e37 1423 * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
4c261dff 1424
ea33f281
NC
14252013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
1426
1427 * configure.tgt: Add nios2-*-rtems*.
1428
a1ccaec9
YZ
14292013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
1430
1431 * config/tc-aarch64.c (md_begin): Change to check if 'name' is
1432 NULL.
1433
0aa27725
RS
14342013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
1435
1436 * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
1437 (macro): Use it. Assert that trunc.w.s is not used for r5900.
1438
da4339ed
NC
14392013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com>
1440
1441 * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
1442 core.
1443
36591ba1 14442013-02-06 Sandra Loosemore <sandra@codesourcery.com>
5c111e37 1445 Andrew Jenner <andrew@codesourcery.com>
36591ba1
SL
1446
1447 Based on patches from Altera Corporation.
1448
1449 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
1450 (TARGET_CPU_HFILES): Add config/tc-nios2.h.
1451 * Makefile.in: Regenerated.
1452 * configure.tgt: Add case for nios2*-linux*.
1453 * config/obj-elf.c: Conditionally include elf/nios2.h.
1454 * config/tc-nios2.c: New file.
1455 * config/tc-nios2.h: New file.
1456 * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
1457 * doc/Makefile.in: Regenerated.
1458 * doc/all.texi: Set NIOSII.
1459 * doc/as.texinfo (Overview): Add Nios II options.
1460 (Machine Dependencies): Include c-nios2.texi.
1461 * doc/c-nios2.texi: New file.
1462 * NEWS: Note Altera Nios II support.
1463
94d4433a
AM
14642013-02-06 Alan Modra <amodra@gmail.com>
1465
1466 PR gas/14255
1467 * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
1468 Don't skip fixups with fx_subsy non-NULL.
1469 * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
1470 with fx_subsy non-NULL.
1471
ace9af6f
L
14722013-02-04 H.J. Lu <hongjiu.lu@intel.com>
1473
1474 * doc/c-metag.texi: Add "@c man" markers.
1475
89d67ed9
AM
14762013-02-04 Alan Modra <amodra@gmail.com>
1477
1478 * write.c (fixup_segment): Return void. Delete seg_reloc_count
1479 related code.
1480 (TC_ADJUST_RELOC_COUNT): Delete.
1481 * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
1482
89072bd6
AM
14832013-02-04 Alan Modra <amodra@gmail.com>
1484
1485 * po/POTFILES.in: Regenerate.
1486
f9b2d544
NC
14872013-01-30 Markos Chandras <markos.chandras@imgtec.com>
1488
1489 * config/tc-metag.c: Make SWAP instruction less permissive with
1490 its operands.
1491
392ca752
DD
14922013-01-29 DJ Delorie <dj@redhat.com>
1493
1494 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
1495 relocs in .word/.etc statements.
1496
427d0db6
RM
14972013-01-29 Roland McGrath <mcgrathr@google.com>
1498
1499 * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
1500 immediate value for 8-bit offset" error so it shows line info.
1501
4faf939a
JM
15022013-01-24 Joseph Myers <joseph@codesourcery.com>
1503
1504 * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
1505 for 64-bit output.
1506
78c8d46c
NC
15072013-01-24 Nick Clifton <nickc@redhat.com>
1508
1509 * config/tc-v850.c: Add support for e3v5 architecture.
1510 * doc/c-v850.texi: Mention new support.
1511
fb5b7503
NC
15122013-01-23 Nick Clifton <nickc@redhat.com>
1513
1514 PR gas/15039
1515 * config/tc-avr.c: Include dwarf2dbg.h.
1516
8ce3d284
L
15172013-01-18 H.J. Lu <hongjiu.lu@intel.com>
1518
1519 * config/tc-i386.c (reloc): Support size relocation only for ELF.
1520 (tc_i386_fix_adjustable): Likewise.
1521 (lex_got): Likewise.
1522 (tc_gen_reloc): Likewise.
1523
f5555712
YZ
15242013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
1525
1526 * config/tc-aarch64.c (output_operand_error_record): Change to output
1527 the out-of-range error message as value-expected message if there is
1528 only one single value in the expected range.
1529 (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
1530 LSL #0 as a programmer-friendly feature.
1531
8fd4256d
L
15322013-01-16 H.J. Lu <hongjiu.lu@intel.com>
1533
1534 * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
1535 (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
1536 BFD_RELOC_64_SIZE relocations.
1537 (lex_got): Support "symbol@SIZE" and don't create GOT symbol
1538 for it.
1539 (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
1540 relocations against local symbols.
1541
a5840dce
AM
15422013-01-16 Alan Modra <amodra@gmail.com>
1543
1544 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
1545 finding some sort of toc syntax error, and break to avoid
1546 compiler uninit warning.
1547
af89796a
L
15482013-01-15 H.J. Lu <hongjiu.lu@intel.com>
1549
1550 PR gas/15019
1551 * config/tc-i386.c (lex_got): Increment length by 1 if the
1552 relocation token is removed.
1553
dd42f060
NC
15542013-01-15 Nick Clifton <nickc@redhat.com>
1555
1556 * config/tc-v850.c (md_assemble): Allow signed values for
1557 V850E_IMMEDIATE.
1558
464e3686
SK
15592013-01-11 Sean Keys <skeys@ipdatasys.com>
1560
1561 * config/tc-xgate.c (md_begin): Fix mistake made when going from
af89796a 1562 git to cvs.
464e3686 1563
5817ffd1
PB
15642013-01-10 Peter Bergner <bergner@vnet.ibm.com>
1565
1566 * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
1567 * doc/c-ppc.texi (PowerPC-Opts): Likewise.
1568 * config/tc-ppc.c (md_show_usage): Likewise.
1569 (ppc_handle_align): Handle power8's group ending nop.
1570
f4b1f6a9
SK
15712013-01-10 Sean Keys <skeys@ipdatasys.com>
1572
1573 * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
af89796a 1574 that the assember exits after the opcodes have been printed.
f4b1f6a9 1575
34bca508
L
15762013-01-10 H.J. Lu <hongjiu.lu@intel.com>
1577
1578 * app.c: Remove trailing white spaces.
1579 * as.c: Likewise.
1580 * as.h: Likewise.
1581 * cond.c: Likewise.
1582 * dw2gencfi.c: Likewise.
1583 * dwarf2dbg.h: Likewise.
1584 * ecoff.c: Likewise.
1585 * input-file.c: Likewise.
1586 * itbl-lex.h: Likewise.
1587 * output-file.c: Likewise.
1588 * read.c: Likewise.
1589 * sb.c: Likewise.
1590 * subsegs.c: Likewise.
1591 * symbols.c: Likewise.
1592 * write.c: Likewise.
1593 * config/tc-i386.c: Likewise.
1594 * doc/Makefile.am: Likewise.
1595 * doc/Makefile.in: Likewise.
1596 * doc/c-aarch64.texi: Likewise.
1597 * doc/c-alpha.texi: Likewise.
1598 * doc/c-arc.texi: Likewise.
1599 * doc/c-arm.texi: Likewise.
1600 * doc/c-avr.texi: Likewise.
1601 * doc/c-bfin.texi: Likewise.
1602 * doc/c-cr16.texi: Likewise.
1603 * doc/c-d10v.texi: Likewise.
1604 * doc/c-d30v.texi: Likewise.
1605 * doc/c-h8300.texi: Likewise.
1606 * doc/c-hppa.texi: Likewise.
1607 * doc/c-i370.texi: Likewise.
1608 * doc/c-i386.texi: Likewise.
1609 * doc/c-i860.texi: Likewise.
1610 * doc/c-m32c.texi: Likewise.
1611 * doc/c-m32r.texi: Likewise.
1612 * doc/c-m68hc11.texi: Likewise.
1613 * doc/c-m68k.texi: Likewise.
1614 * doc/c-microblaze.texi: Likewise.
1615 * doc/c-mips.texi: Likewise.
1616 * doc/c-msp430.texi: Likewise.
1617 * doc/c-mt.texi: Likewise.
1618 * doc/c-s390.texi: Likewise.
1619 * doc/c-score.texi: Likewise.
1620 * doc/c-sh.texi: Likewise.
1621 * doc/c-sh64.texi: Likewise.
1622 * doc/c-tic54x.texi: Likewise.
1623 * doc/c-tic6x.texi: Likewise.
1624 * doc/c-v850.texi: Likewise.
1625 * doc/c-xc16x.texi: Likewise.
1626 * doc/c-xgate.texi: Likewise.
1627 * doc/c-xtensa.texi: Likewise.
1628 * doc/c-z80.texi: Likewise.
1629 * doc/internals.texi: Likewise.
1630
4c665b71
RM
16312013-01-10 Roland McGrath <mcgrathr@google.com>
1632
1633 * hash.c (hash_new_sized): Make it global.
1634 * hash.h: Declare it.
1635 * macro.c (define_macro): Use hash_new_sized instead of hash_new,
1636 pass a small size.
1637
a3c62988
NC
16382013-01-10 Will Newton <will.newton@imgtec.com>
1639
1640 * Makefile.am: Add Meta.
1641 * Makefile.in: Regenerate.
1642 * config/tc-metag.c: New file.
1643 * config/tc-metag.h: New file.
1644 * configure.tgt: Add Meta.
1645 * doc/Makefile.am: Add Meta.
1646 * doc/Makefile.in: Regenerate.
1647 * doc/all.texi: Add Meta.
1648 * doc/as.texiinfo: Document Meta options.
1649 * doc/c-metag.texi: New file.
1650
b37df7c4
SE
16512013-01-09 Steve Ellcey <sellcey@mips.com>
1652
1653 * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
1654 calls.
1655 * config/tc-mips.c (internalError): Remove, replace with abort.
1656
a3251895
YZ
16572013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
1658
1659 * config/tc-aarch64.c (parse_operands): Change to compare the result
1660 of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
1661
8ab8155f
NC
16622013-01-07 Nick Clifton <nickc@redhat.com>
1663
1664 PR gas/14887
1665 * config/tc-arm.c (skip_past_char): Skip whitespace before the
1666 anticipated character.
1667 * config/tc-arm.c (parse_address_main): Delete skip of whitespace
1668 here as it is no longer needed.
1669
a4ac1c42
AS
16702013-01-06 Andreas Schwab <schwab@linux-m68k.org>
1671
1672 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
1673 * doc/c-score.texi (SCORE-Opts): Likewise.
1674 * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
1675
e407c74b
NC
16762013-01-04 Juergen Urban <JuergenUrban@gmx.de>
1677
1678 * config/tc-mips.c: Add support for MIPS r5900.
1679 Add M_LQ_AB and M_SQ_AB to support large values for instructions
1680 lq and sq.
1681 (can_swap_branch_p, get_append_method): Detect some conditional
1682 short loops to fix a bug on the r5900 by NOP in the branch delay
1683 slot.
1684 (M_MUL): Support 3 operands in multu on r5900.
1685 (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
1686 (s_mipsset): Force 32 bit floating point on r5900.
1687 (mips_ip): Check parameter range of instructions mfps and mtps on
1688 r5900.
1689 * configure.in: Detect CPU type when target string contains r5900
1690 (e.g. mips64r5900el-linux-gnu).
1691
62658407
L
16922013-01-02 H.J. Lu <hongjiu.lu@intel.com>
1693
1694 * as.c (parse_args): Update copyright year to 2013.
1695
95830fd1
YZ
16962013-01-02 Yufeng Zhang <yufeng.zhang@arm.com>
1697
1698 * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
1699 and "cortex57".
1700
517bb291 17012013-01-02 Nick Clifton <nickc@redhat.com>
d709e4e6 1702
517bb291
NC
1703 PR gas/14987
1704 * config/tc-arm.c (parse_address_main): Skip whitespace before a
1705 closing bracket.
d709e4e6 1706
517bb291 1707For older changes see ChangeLog-2012
08d56133 1708\f
517bb291 1709Copyright (C) 2013 Free Software Foundation, Inc.
752937aa
NC
1710
1711Copying and distribution of this file, with or without modification,
1712are permitted in any medium without royalty provided the copyright
1713notice and this notice are preserved.
1714
08d56133
NC
1715Local Variables:
1716mode: change-log
1717left-margin: 8
1718fill-column: 74
1719version-control: never
1720End: