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2010-02-21 Doug Kwan <dougkwan@google.com>
[thirdparty/binutils-gdb.git] / gas / ChangeLog
CommitLineData
487565fe
AM		 12010-02-19 Alan Modra <amodra@gmail.com>
2
3 * configure.tgt: Whiltespace. Sort moxie entry.
4
cd21e546
MGD		 52010-02-18 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
6
7 * config/tc-arm.c (arm_convert_symbolic_attribute): Add Tag_DIV_use.
8 * doc/c-arm.texi: Likewise.
9
77551a33
DG		 102010-02-12 Daniel Gutson <dgutson@codesourcery.com>
11
12 * config/tc-arm.c (asm_opcode): operands type
13 change.
14 (BAD_PC_ADDRESSING): New macro message.
15 (BAD_PC_WRITEBACK): Likewise.
16 (MIX_ARM_THUMB_OPERANDS): New macro.
17 (operand_parse_code): Added enum values.
18 (parse_operands): Added thumb/arm distinction,
19 plus new enum values handling.
20 (encode_arm_addr_mode_2): Validations enhanced.
21 (encode_arm_addr_mode_3): Likewise.
22 (do_rm_rd_rn): Likewise.
23 (encode_thumb32_addr_mode): Likewise.
24 (do_t_ldrex): Likewise.
25 (do_t_ldst): Likewise.
26 (do_t_strex): Likewise.
27 (md_assemble): Call parse_operands with
28 a new parameter.
29 (OPS_1): New macro.
30 (OPS_2): Likewise.
31 (OPS_3): Likewise.
32 (OPS_4): Likewise.
33 (OPS_5): Likewise.
34 (OPS_6): Likewise.
35 (insns): Updated insns operands.
36
9d0e8497
TG		 372010-02-12 Tristan Gingold <gingold@adacore.com>
38 Douglas B Rupp <rupp@gnat.com>
39
40 * config/tc-ia64.c (enum reloc_func): Add FUNC_SLOTCOUNT_RELOC.
41 (DUMMY_RELOC_IA64_SLOTCOUNT): Added.
42 (pseudo_func): Add an entry for slotcount.
43 (md_begin): Initialize slotcount pseudo symbol.
44 (ia64_parse_name): Handle @slotcount parameter.
45 (ia64_gen_real_reloc_type): Handle slotcount.
46 (md_apply_fix): Ditto.
47 * doc/c-ia64.texi (IA-64-Relocs): Document @slotcount.
48
6fa78d94
SA		 492010-02-11 Sterling Augustine <sterling@jaw.hq.tensilica.com>
50
51 * config/tc-xtensa.c (istack_init): Don't call memset.
52
a89c407e
SA		 532010-02-11 Sterling Augustine <sterling@tensilica.com>
54
55 * config/tc-xtensa.c (cache_literal_section): Handle prefixes as
56 well as suffixes.
57
6fa78d94 582010-02-11 Sterling Augustine <sterling@tensilica.com>
a89c407e
SA		 59
60 * config/tc-xtensa.c (xtensa_find_unaligned_loops): Rewrite.
61
24981e7b
L		 622010-02-11 H.J. Lu <hongjiu.lu@intel.com>
63
64 * config/tc-i386.c (build_modrm_byte): Reformat.
65
c75ef631
L		 662010-02-11 H.J. Lu <hongjiu.lu@intel.com>
67
68 * config/tc-i386.c: Update copyright.
69
a683cc34
SP		 702010-02-10 Quentin Neill <quentin.neill@amd.com>
71 Sebastian Pop <sebastian.pop@amd.com>
72
73 * config/tc-i386.c (vec_imm4) New operand type.
74 (fits_in_imm4): New.
75 (VEX_check_operands): New.
76 (check_reverse): Call VEX_check_operands.
77 (build_modrm_byte): Reintroduce code for 5
78 operand insns. Fix whitespace.
79
cdc51b07
RS		 802010-02-10 Richard Sandiford <r.sandiford@uk.ibm.com>
81
82 * config/tc-ppc.c (md_show_usage): Add -mpwr4, -mpwr5, -mpwr5x,
83 -mpwr6 and -mpwr7.
84
3a1e9c4a
SA		 852010-02-09 Sterling Augustine <sterling@tensilica.com>
86
87 * config/tc-xtensa.c (RELAXED_LOOP_INSN_BYTES): New.
88 (next_frag_pre_opcode_bytes): Use RELAXED_LOOP_INSN_BYTES.
89 (xtensa_mark_zcl_first_insns): Rewrite to handle corner case.
90
486499d0
CL		 912010-02-08 Christophe Lyon <christophe.lyon@st.com>
92
93 * config/tc-arm.c (md_pcrel_from_section): Keep base to zero for
94 non-local branches (BFD_RELOC_THUMB_PCREL_BRANCH23,
95 BFD_RELOC_THUMB_PCREL_BLX, BFD_RELOC_ARM_PCREL_BLX,
96 BFD_RELOC_ARM_PCREL_CALL)
97
19ef5f3d
SA		 982010-02-08 Sterling Augustine <sterling@tensilica.com>
99
100 * config/tc-xtensa.c (frag_format_size): Generalize logic to
101 handle more instruction sizes and fetch widths.
102 (branch_align_power): Likewise.
103 (text_align_power): Likewise.
104 (bytes_to_stretch): Likewise.
105
ce3d2015
AM		 1062010-02-08 Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
107
108 * config/tc-ppc.c (md_show_usage): Mention -mtitan. Don't use tabs.
109 (ppc_mach): Handle titan.
110 * doc/c-ppc.texi: Mention -mtitan.
111
19ef5f3d
SA		 1122010-02-05 Sterling Augustine <sterling@tensilica.com>
113
114 * config/tc-xtensa.c (UNREACHABLE_MAX_WIDTH): Delete and
115 replace with...
116 (xtensa_fetch_width) ...this.
117
1e4cb857
JM		 1182010-02-05 Joseph Myers <joseph@codesourcery.com>
119
120 * Makefile.am (CPU_TYPES, OBJ_FORMATS, CPU_OBJ_VALID,
121 MULTI_CPU_TYPES, MULTI_CPU_OBJ_VALID): Remove.
122 * Makefile.in: Regenerate.
123
68339fdf
SP		 1242010-02-03 Quentin Neill <quentin.neill@amd.com>
125
126 * config/tc-i386.c (cpu_arch): Change amdfam15 to bdver1.
127 (i386_align_code): Rename PROCESSOR_AMDFAM15 to PROCESSOR_BDVER1.
128 * config/tc-i386.h (processor_type): Same.
129 * doc/c-i386.texi: Change amdfam15 to bdver1.
130
99b253c5
NC		 1312010-01-29 Nick Clifton <nickc@redhat.com>
132
133 PR 11136
134 * config/tc-arm.c (neon_check_type): Handle a neon_shape value of
135 NS_NULL.
136
31907d5e
DK		 1372010-01-27 Dave Korn <dave.korn.cygwin@gmail.com>
138
139 * NEWS: Mention new feature.
140 * config/obj-coff.c (obj_coff_section): Accept digits and use
141 to override default section alignment power if specified.
142 * doc/as.texinfo (.section directive): Update documentation.
143
539f890d
L		 1442010-01-27 H.J. Lu <hongjiu.lu@intel.com>
145
146 * config/tc-i386.c (avxscalar): New.
147 (OPTION_MAVXSCALAR): Likewise.
148 (build_vex_prefix): Select vector_length for scalar instructions
149 based on avxscalar.
150 (md_longopts): Add OPTION_MAVXSCALAR.
151 (md_parse_option): Handle OPTION_MAVXSCALAR.
152 (md_show_usage): Add -mavxscalar=.
153
154 * doc/c-i386.texi: Document -mavxscalar=.
155
80de6e00
L		 1562010-01-24 H.J. Lu <hongjiu.lu@intel.com>
157
158 * config/tc-i386.c (build_vex_prefix): Set i.vex.bytes[0] to
159 0xc4 individually.
160
c865e45b
RS		 1612010-01-23 Richard Sandiford <r.sandiford@uk.ibm.com>
162
163 * write.h (fix_at_start): Declare.
164 * write.c (fix_new_internal): Add at_beginning parameter.
165 Use it instead of REVERSE_SORT_RELOCS. Fix the handling of
166 seg_fix_tailP for the at_beginning/REVERSE_SORT_RELOCS case.
167 (fix_new, fix_new_exp): Update accordingly.
168 (fix_at_start): New function.
169 * config/tc-ppc.c (md_pseudo_table): Add .ref to the OBJ_XCOFF section.
170 (ppc_ref): New function, for OBJ_XCOFF.
171 (md_apply_fix): Handle BFD_RELOC_NONE for OBJ_XCOFF.
172 * config/te-i386aix.h (REVERSE_SORT_RELOCS): Remove #undef.
173
53e5c8fe
RO		 1742010-01-21 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
175
176 * config/te-solaris.h (DWARF2_EH_FRAME_READ_ONLY): Make read-only
177 on 64-bit Solaris/x86.
178 Include obj-format.h earlier.
179
55786da2 1802010-01-21 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
99b253c5 181
55786da2
AK		 182 * config/tc-s390.c (s390_elf_final_processing): New function.
183 * config/tc-s390.h (elf_tc_final_processing): New macro definition.
184 (s390_elf_final_processing): Added prototype.
185
186
760f3a89
NC		 1872010-01-20 Nick Clifton <nickc@redhat.com>
188
189 PR 11109
190 * config/tc-arm.c (do_neon_cvt): Rename to do_neon_cvt_1. Add
191 code to handle round-to-zero for VCVT conversions.
192 (do_neon_cvt): New. Call do_neon_cvt_1.
193 (do_neon_cvtr): New. Call do_neon_cvt_1.
194 (insns): Use do_neon_cvt for VCVT insn and do_neon_cvtr for VCVTR
195 insn.
196
37a1f277
TG		 1972010-01-18 Tristan Gingold <gingold@adacore.com>
198
199 * config/tc-ia64.c (ia64_vms_note): Generate 24 bytes note headers.
760f3a89 200
a6461c02
SP		 2012010-01-15 Sebastian Pop <sebastian.pop@amd.com>
202
203 * config/tc-i386.c (md_assemble): Before accessing the IMM field
204 check that it's not an XOP insn.
205
62fb9fe1
JZ		 2062010-01-14 Jie Zhang <jie.zhang@analog.com>
207
208 * config/bfin-aux.h: Remove argument names in function
209 declarations.
210 * config/bfin-lex.l (parse_int): Fix shadowed variable name
211 warning.
212 * config/bfin-parse.y (value_match): Remove argument names
213 in declaration.
214 (notethat): Likewise.
215 (yyerror): Likewise.
216
afa62d5e
DJ		 2172010-01-13 Daniel Jacobowitz <dan@codesourcery.com>
218
219 * config/tc-arm.c (do_t_nop): Correct check for Thumb-2 NOP.
220
52b010e4
NC		 2212010-01-13 Nick Clifton <nickc@redhat.com>
222
223 * config/tc-h8300.c (h8300_elf_section): New function - issue a
224 warning message if a new section is created without setting any
225 attributes for it.
226 (md_pseudo_table): Intercept section creation pseudos.
227 (md_pcrel_from): Replace abort with an error message.
228 * config/obj-elf.c (obj_elf_section_name): Export this function.
229 * config/obj-elf.h (obj_elf_section_name): Prototype.
230
cc761f75
AM		 2312010-01-12 Alan Modra <amodra@gmail.com>
232
233 PR 11122
234 * listing.c (print_source): Add one to line number.
235
3725885a
RW		 2362010-01-09 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
237
238 * Makefile.in: Regenerate.
239 * configure: Regenerate.
240 * doc/Makefile.in: Regenerate.
241
5256a5b0
L		 2422010-01-08 H.J. Lu <hongjiu.lu@intel.com>
243
244 * version.c (parse_args): Change to "Copyright 2010".
245
69dd9865
SP		 2462010-01-06 Quentin Neill <quentin.neill@amd.com>
247
248 * config/tc-i386.c (cpu_arch): Add amdfam15.
249 (i386_align_code): Add PROCESSOR_AMDFAM15 cases.
250 * config/tc-i386.h (processor_type): Add PROCESSOR_AMDFAM15.
251 * doc/c-i386.texi: Add amdfam15.
252
4316f0d2
DG		 2532010-01-04 Daniel Gutson <dgutson@codesourcery.com>
254
255 * config/tc-arm.c (do_neon_logic): Accept imm value
256 in the third operand too.
257 (operand_parse_code): OP_RNDQ_IMVNb renamed to
258 OP_RNDQ_Ibig.
259 (parse_operands): OP_NILO case removed, applied renaming.
260 (insns): Neon shape changed for some logic instructions.
261
b1a769ed
DG		 2622010-01-04 Daniel Gutson <dgutson@codesourcery.com>
263
264 * config/tc-arm.c (do_neon_ldx_stx): Added
265 validation for vector load/store insns.
266
0dc93057
AM		 2672010-01-04 Edmar Wienskoski <edmar@freescale.com>
268
269 * config/tc-ppc.c (md_show_usage): Document -me500mc64.
270
88714cb8
DG		 2712010-01-03 Daniel Gutson <dgutson@codesourcery.com>
272
273 * config/tc-arm.c (struct arm_it): New flag 'is_neon'.
274 (NEON_ENC_*): Macros renamed to _NEON_ENC_*.
275 (NEON_ENCODE): New macro.
276 (check_neon_suffixes): New macro.
277 (do_vfp_cond_or_thumb): Set the 'is_neon' flag.
278 (do_vfp_nsyn_opcode): Likewise.
279 (do_vfp_nsyn_nmul): Use the new 'NEON_ENCODE' macro.
280 (do_vfp_nsyn_cmp): Likewise.
281 (do_neon_shl_imm): Likewise.
282 (do_neon_qshl_imm): Likewise.
283 (neon_dyadic_misc): Likewise.
284 (do_neon_mac_maybe_scalar): Likewise.
285 (do_neon_qdmulh): Likewise.
286 (do_neon_qmovn): Likewise.
287 (do_neon_qmovun): Likewise.
288 (do_neon_movn): Likewise.
289 (neon_mac_reg_scalar_long): Likewise.
290 (do_neon_vmull): Likewise.
291 (do_neon_trn): Likewise.
292 (do_neon_ldx_stx): Likewise.
293 (neon_dp_fixup): Changed signature and set the flag.
294 (neon_three_same): Call the above with new signature.
295 (neon_two_same): Likewise.
296 (neon_imm_shift): Likewise.
297 (neon_mul_mac): Likewise.
298 (do_neon_abs_neg): Likewise.
299 (neon_mixed_length): Likewise.
300 (do_neon_ext): Likewise.
301 (do_neon_mov): Likewise.
302 (do_neon_tbl_tbx): Likewise.
303 (do_neon_logic): Likewise, and use the new 'NEON_ENCODE' macro.
304 (neon_compare): Likewise.
305 (do_neon_shll): Likewise.
306 (do_neon_cvt): Likewise.
307 (do_neon_mvn): Likewise.
308 (do_neon_dup): Likewise.
0dc93057 309 (md_assemble): Call check_neon_suffixes ().
99f1a7a7 310
43ecc30f 311For older changes see ChangeLog-2009
08d56133
NC		 312\f
313Local Variables:
314mode: change-log
315left-margin: 8
316fill-column: 74
317version-control: never
318End:
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