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[AArch64] Tidy up switch statement in GAS.
[thirdparty/binutils-gdb.git] / gas / ChangeLog
CommitLineData
2c0a3565
MS		 12013-07-03 Marcus Shawcroft <marcus.shawcroft@arm.com>
2
3 * config/tc-aarch64.c (md_apply_fix): Reorder case values.
4 (aarch64_force_relocation): Likewise.
5
f40da81b
AM		 62013-07-02 Alan Modra <amodra@gmail.com>
7
8 * config/tc-ppc.c (ppc_elf_adjust_symtab): Don't make .TOC. weak.
9
81566a9b
MR		 102013-06-26 Maciej W. Rozycki <macro@codesourcery.com>
11
12 * doc/as.texinfo (Overview): Remove @samp from MIPS ISA names.
13 * doc/c-mips.texi (MIPS Options): Remove @sc from MIPS ISA names.
14 Replace @sc{mips16} with literal `MIPS16'.
15 (MIPS ISA): Replace @sc{mips3} with literal `MIPS III'.
16
a6bb11b2
YZ		 172013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
18
19 * config/tc-aarch64.c (reloc_table): Replace
20 BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with
21 BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to
22 BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and
23 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC.
24 (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC,
25 BFD_RELOC_AARCH64_LD32_GOT_LO12_NC,
26 BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC,
27 BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC,
28 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and
29 BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC.
30 (aarch64_force_relocation): Likewise.
31
cec5225b
YZ		 322013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
33
34 * config/tc-aarch64.c (ilp32_p): New static variable.
35 (elf64_aarch64_target_format): Return the target according to the
36 value of 'ilp32_p'.
37 (md_begin): Determine 'mach' according to the value of 'ilp32_p'.
38 (aarch64_opts): Add support for options '-milp32' and '-mlp64'.
39 (aarch64_dwarf2_addr_size): New function.
40 * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration.
41 (DWARF2_ADDR_SIZE): New define.
42
e335d9cb
RS		 432013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
44
45 * doc/c-mips.texi: Use ISA instead of @sc{isa}.
46
18870af7
RS		 472013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
48
49 * config/tc-mips.c (validate_mips_insn): Use STYPE rather than SHAMT.
50
833794fc
MR		 512013-06-25 Maciej W. Rozycki <macro@codesourcery.com>
52
53 * config/tc-mips.c (mips_set_options): Add insn32 member.
54 (mips_opts): Initialize it.
55 (NOP_INSN, NOP_INSN_SIZE): Handle insn32 mode.
56 (options): Add OPTION_INSN32 and OPTION_NO_INSN32 enum values.
57 (md_longopts): Add "minsn32" and "mno-insn32" options.
58 (is_size_valid): Handle insn32 mode.
59 (md_assemble): Pass instruction string down to macro.
60 (brk_fmt): Add second dimension and insn32 mode initializers.
61 (mfhl_fmt): Likewise.
62 (BRK_FMT, MFHL_FMT): Handle insn32 mode.
63 (macro_build) <'c'>: Handle microMIPS 32-bit BREAK encoding.
64 (macro_build_jalr, move_register): Handle insn32 mode.
65 (macro_build_branch_rs): Likewise.
66 (macro): Handle insn32 mode.
67 <M_JRADDIUSP>, <M_JRC>, <M_MOVEP>: New cases.
68 (mips_ip): Handle insn32 mode.
69 (md_parse_option): Handle OPTION_INSN32 and OPTION_NO_INSN32.
70 (s_mipsset): Handle "insn32" and "noinsn32" pseudo-ops.
71 (mips_handle_align): Handle insn32 mode.
72 (md_show_usage): Add -minsn32 and -mno-insn32.
73
74 * doc/as.texinfo (Target MIPS options): Add -minsn32 and
75 -mno-insn32 options.
76 (-minsn32, -mno-insn32): New options.
77 * doc/c-mips.texi (MIPS Opts): Add -minsn32 and -mno-insn32
78 options.
79 (MIPS assembly options): New node. Document .set insn32 and
80 .set noinsn32.
81 (MIPS-Dependent): List the new node.
82
d1706f38
NC		 832013-06-25 Nick Clifton <nickc@redhat.com>
84
85 * config/tc-msp430.c (msp430_srcoperand): Do not allow the use of
86 the PC in indirect addressing on 430xv2 parts.
87 (msp430_operands): Add version test to hardware bug encoding
88 restrictions.
89
477330fc
RM		 902013-06-24 Roland McGrath <mcgrathr@google.com>
91
d996d970
RM		 92 * config/tc-arm.c (parse_reg_list): Use skip_past_char for '}',
93 so it skips whitespace before it.
94 (s_arm_unwind_save_mmxwr, s_arm_unwind_save_mmxwcg): Likewise.
95
477330fc
RM		 96 * config/tc-arm.c (arm_symbol_chars): Include '{' and '}'.
97 (arm_reg_parse_multi): Skip whitespace first.
98 (parse_reg_list): Likewise.
99 (parse_vfp_reg_list): Likewise.
100 (s_arm_unwind_save_mmxwcg): Likewise.
101
24382199
NC		 1022013-06-24 Nick Clifton <nickc@redhat.com>
103
104 PR gas/15623
105 * config/tc-arm.c (do_t_smc): Mark as ending an IT block.
106
c3678916
RS		 1072013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
108
109 * config/tc-mips.c (mips_ip): Fix swapped bit numbers in comments.
110
42429eac
RS		 1112013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
112
113 * config/tc-mips.c: Assert that offsetT and valueT are at least
114 8 bytes in size.
115 (GPR_SMIN, GPR_SMAX): New macros.
116 (macro, mips_ip): Remove code for 4-byte valueT and offsetT.
117
f3ded42a
RS		 1182013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
119
120 * config/tc-mips.c: Remove OBJ_ELF, OBJ_MAYBE_ELF and IS_ELF
121 conditions. Remove any code deselected by them.
122 (s_mips_frame, s_mips_mask): Handle ECOFF_DEBUGGING case first.
123
e8044f35
RS		 1242013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
125
126 * NEWS: Note removal of ECOFF support.
127 * doc/as.texinfo (--emulation): Update for the removal of MIPS ECOFF.
128 * Makefile.am (TARG_ENV_HFILES): Remove config/te-lnews.h.
129 (MULTI_CFILES): Remove config/e-mipsecoff.c.
130 * Makefile.in: Regenerate.
131 * configure.in: Remove MIPS ECOFF references.
132 (mips-sony-bsd*, mips-*-bsd*, mips-*-lnews*-ecoff, mips-*-*-ecoff):
133 Delete cases.
134 (mips-*-irix5*-*, mips*-*-linux*-*, mips*-*-freebsd*)
135 (mips*-*-kfreebsd*-gnu, mips-*-*-elf): Fold into...
136 (mips-*-*): ...this single case.
137 (mipsbecoff, mipslecoff, mipsecoff): Remove emulations. Expect
138 MIPS emulations to be e-mipself*.
139 * configure: Regenerate.
140 * configure.tgt (mips-sony-bsd*, mips-*-ultrix*, mips-*-osf*)
141 (mips-*-ecoff*, mips-*-pe*, mips-*-irix*, ips-*-lnews*, mips-*-riscos*)
142 (mips-*-sysv*): Remove coff and ecoff cases.
143 * as.c (mipsbecoff, mipslecoff, mipsecoff): Remove.
144 * ecoff.c: Remove reference to MIPS ECOFF.
145 * config/e-mipsecoff.c, config/te-lnews.h: Delete files.
146 * config/tc-mips.c (ECOFF_LITTLE_FORMAT): Delete.
147 (RDATA_SECTION_NAME, mips_target_form): Remove COFF and ECOFF cases.
148 (mips_hi_fixup): Tweak comment.
149 (append_insn): Require a howto.
150 (mips_after_parse_args): Remove OBJ_MAYBE_ECOFF code.
151
98508b2a
RS		 1522013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
153
154 * doc/as.texinfo: Use MIPS rather than @sc{mips} throughout.
155 Use "CPU" instead of "cpu".
156 * doc/c-mips.texi: Likewise.
157 (MIPS Opts): Rename to MIPS Options.
158 (MIPS option stack): Rename to MIPS Option Stack.
159 (MIPS ASE instruction generation overrides): Rename to
160 MIPS ASE Instruction Generation Overrides (for now).
161 (MIPS floating-point): Rename to MIPS Floating-Point.
162
fc16f8cc
RS		 1632013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
164
165 * doc/c-mips.texi (MIPS Macros): New section.
166 (MIPS Object): Replace with...
167 (MIPS Small Data): ...this new section.
168
5a7560b5
RS		 1692013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
170
171 * doc/c-mips.texi (MIPS symbol sizes): Move section further up file.
172 Capitalize name. Use @kindex instead of @cindex for .set entries.
173
a1b86ab7
RS		 1742013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
175
176 * doc/c-mips.texi (MIPS Stabs): Remove section.
177
c6278170
RS		 1782013-06-20 Richard Sandiford <rdsandiford@googlemail.com>
179
180 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS, ISA_SUPPORTS_DSP_ASE)
181 (ISA_SUPPORTS_DSP64_ASE, ISA_SUPPORTS_DSPR2_ASE, ISA_SUPPORTS_EVA_ASE)
182 (ISA_SUPPORTS_MT_ASE, ISA_SUPPORTS_MCU_ASE, ISA_SUPPORTS_VIRT_ASE)
183 (ISA_SUPPORTS_VIRT64_ASE): Delete.
184 (mips_ase): New structure.
185 (mips_ases): New table.
186 (FP64_ASES): New macro.
187 (mips_ase_groups): New array.
188 (mips_isa_rev, mips_ase_mask, mips_check_isa_supports_ase)
189 (mips_check_isa_supports_ases, mips_set_ase, mips_lookup_ase): New
190 functions.
191 (is_opcode_valid): Use mips_ases to get the 64-bit ASE flags.
192 (md_parse_option): Use mips_ases and mips_set_ase instead of
193 separate case statements for each ASE option.
194 (mips_after_parse_args): Use FP64_ASES. Use
195 mips_check_isa_supports_ases to check the ASEs against
196 other options.
197 (s_mipsset): Use mips_ases and mips_set_ase instead of
198 separate if statements for each ASE option. Use
199 mips_check_isa_supports_ases, even when a non-ASE option
200 is specified.
201
63a4bc21
KT		 2022013-06-19 Greta Yorsh <Greta.Yorsh@arm.com>
203
204 * config/tc-arm.c (arm_cpus): Add support for Cortex-A12.
205
c31f3936
RS		 2062013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
207
208 * config/tc-mips.c (md_shortopts, options, md_longopts)
209 (md_longopts_size): Move earlier in file.
210
846ef2d0
RS		 2112013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
212
213 * config/tc-mips.c (mips_set_options): Replace separate "ase_*" fields
214 with a single "ase" bitmask.
215 (mips_opts): Update accordingly.
216 (file_ase, file_ase_explicit): New variables.
217 (file_ase_mips3d, file_ase_mdmx, file_ase_smartmips, file_ase_dsp)
218 (file_ase_dspr2, file_ase_eva, file_ase_mt, file_ase_virt): Delete.
219 (ISA_HAS_ROR): Adjust for mips_set_options change.
220 (is_opcode_valid): Take the base ase mask directly from mips_opts.
221 (mips_ip): Adjust for mips_set_options change.
222 (md_parse_option): Likewise. Update file_ase_explicit.
223 (mips_after_parse_args): Adjust for mips_set_options change.
224 Use bitmask operations to select the default ASEs. Set file_ase
225 rather than individual per-ASE variables.
226 (s_mipsset): Adjust for mips_set_options change.
227 (mips_elf_final_processing): Test file_ase rather than
228 file_ase_mdmx. Remove commented-out code.
229
d16afab6
RS		 2302013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
231
232 * config/tc-mips.c (mips_cpu_info): Add an "ase" field.
233 (MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, MIPS_CPU_ASE_MT)
234 (MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX, MIPS_CPU_ASE_DSPR2)
235 (MIPS_CPU_ASE_MCU, MIPS_CPU_ASE_VIRT, MIPS_CPU_ASE_EVA): Delete.
236 (mips_after_parse_args): Use the new "ase" field to choose
237 the default ASEs.
238 (mips_cpu_info_table): Move ASEs from the "flags" field to the
239 "ase" field.
240
e83a675f
RE		 2412013-06-18 Richard Earnshaw <rearnsha@arm.com>
242
243 * config/tc-arm.c (symbol_preemptible): New function.
244 (relax_branch): Use it.
245
7f3c4072
CM		 2462013-06-17 Catherine Moore <clm@codesourcery.com>
247 Maciej W. Rozycki <macro@codesourcery.com>
248 Chao-Ying Fu <fu@mips.com>
249
250 * config/tc-mips.c (mips_set_options): Add ase_eva.
251 (mips_set_options mips_opts): Add ase_eva.
252 (file_ase_eva): Declare.
253 (ISA_SUPPORTS_EVA_ASE): Define.
254 (IS_SEXT_9BIT_NUM): Define.
255 (MIPS_CPU_ASE_EVA): Define.
256 (is_opcode_valid): Add support for ase_eva.
257 (macro_build): Likewise.
258 (macro): Likewise.
259 (validate_mips_insn): Likewise.
260 (validate_micromips_insn): Likewise.
261 (mips_ip): Likewise.
262 (options): Add OPTION_EVA and OPTION_NO_EVA.
263 (md_longopts): Add -meva and -mno-eva.
264 (md_parse_option): Process new options.
265 (mips_after_parse_args): Check for valid EVA combinations.
266 (s_mipsset): Likewise.
267
e410add4
RS		 2682013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
269
270 * dwarf2dbg.h (dwarf2_move_insn): Declare.
271 * dwarf2dbg.c (line_subseg): Add pmove_tail.
272 (get_line_subseg): Add create_p argument. Initialize pmove_tail.
273 (dwarf2_gen_line_info_1): Update call accordingly.
274 (dwarf2_move_insn): New function.
275 * config/tc-mips.c (append_insn): Use dwarf2_move_insn.
276
6a50d470
RS		 2772013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
278
279 Revert:
280
281 2011-09-05 Richard Sandiford <rdsandiford@googlemail.com>
282
283 PR gas/13024
284 * dwarf2dbg.c (pending_lines, pending_lines_tail): New variables.
285 (dwarf2_gen_line_info_1): Delete.
286 (dwarf2_push_line, dwarf2_flush_pending_lines): New functions.
287 (dwarf2_gen_line_info, dwarf2_emit_label): Use them.
288 (dwarf2_consume_line_info): Call dwarf2_flush_pending_lines.
289 (dwarf2_directive_loc): Push previous .locs instead of generating
290 them immediately.
291
f122319e
CF		 2922013-06-13 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
293
294 * config/tc-mips.c (ISA_SUPPORTS_VIRT_ASE): Support micromips.
295 (ISA_SUPPORTS_VIRT64_ASE): Support 64-bit micromips.
296
909c7f9c
NC		 2972013-06-13 Nick Clifton <nickc@redhat.com>
298
299 PR gas/15602
300 * config/tc-m68k.h (TC_CHECK_ADJUSTED_BROKEN_DOT_WORD): Define.
301 * config/tc-m68k.c (tc_m68k_check_adjusted_broken_word): New
302 function. Generates an error if the adjusted offset is out of a
303 16-bit range.
304
5d5755a7
SL		 3052013-06-12 Sandra Loosemore <sandra@codesourcery.com>
306
307 * config/tc-nios2.c (md_apply_fix): Mask constant
308 BFD_RELOC_NIOS2_HIADJ16 value to 16 bits.
309
3bf0dbfb
MR		 3102013-06-10 Maciej W. Rozycki <macro@codesourcery.com>
311
312 * config/tc-mips.c (append_insn): Don't do branch relaxation for
313 MIPS-3D instructions either.
314 (md_convert_frag): Update the COPx branch mask accordingly.
315
316 * config/tc-mips.c (md_show_usage): Document --[no-]relax-branch
317 option.
318 * doc/as.texinfo (Overview): Add --relax-branch and
319 --no-relax-branch.
320 * doc/c-mips.texi (MIPS Opts): Document --relax-branch and
321 --no-relax-branch.
322
9daf7bab
SL		 3232013-06-09 Sandra Loosemore <sandra@codesourcery.com>
324
325 * config/tc-nios2.c (nios2_parse_args): Allow trap argument to
326 omitted.
327
d301a56b
RS		 3282013-06-08 Catherine Moore <clm@codesourcery.com>
329
330 * config/tc-mips.c (is_opcode_valid): Build ASE mask.
331 (is_opcode_valid_16): Pass ase value to opcode_is_member.
332 (append_insn): Change INSN_xxxx to ASE_xxxx.
333
7bab7634
DC		 3342013-06-01 George Thomas <george.thomas@atmel.com>
335
336 * gas/config/tc-avr.c: Change ISA for devices with USB support to
337 AVR_ISA_XMEGAU
338
f60cf82f
L		 3392013-05-31 H.J. Lu <hongjiu.lu@intel.com>
340
341 * config/tc-i386.c (md_begin): Don't align text/data/bss sections
342 for ELF.
343
a3f278e2
CM		 3442013-05-31 Paul Brook <paul@codesourcery.com>
345
346 gas/
347 * config/tc-mips.c (s_ehword): New.
348
067ec077
CM		 3492013-05-30 Paul Brook <paul@codesourcery.com>
350
351 * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH.
352
d6101ac2
MR		 3532013-05-29 Maciej W. Rozycki <macro@codesourcery.com>
354
355 * write.c (resolve_reloc_expr_symbols): On REL targets don't
356 convert relocs who have no relocatable field either. Rephrase
357 the conditional so that the PC-relative check is only applied
358 for REL targets.
359
f19ccbda
MR		 3602013-05-28 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
361
362 * config/tc-mips.c (macro) <ld>: Don't use $zero for address
363 calculation.
364
418009c2
YZ		 3652013-05-28 Yufeng Zhang <yufeng.zhang@arm.com>
366
367 * config/tc-aarch64.c (reloc_table): Update to use
477330fc 368 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of
418009c2
YZ		 369 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE.
370 (md_apply_fix): Likewise.
371 (aarch64_force_relocation): Likewise.
372
0a8897c7
KT		 3732013-05-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
374
375 * config/tc-arm.c (it_fsm_post_encode): Improve
376 warning messages about deprecated IT block formats.
377
89d2a2a3
MS		 3782013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com>
379
380 * config/tc-aarch64.c (md_apply_fix): Move value range checking
381 inside fx_done condition.
382
c77c0862
RS		 3832013-05-22 Jürgen Urban <JuergenUrban@gmx.de>
384
385 * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB.
386
c0637f3a
PB		 3872013-05-20 Peter Bergner <bergner@vnet.ibm.com>
388
389 * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error
390 and clean up warning when using PRINT_OPCODE_TABLE.
391
5656a981
AM		 3922013-05-20 Alan Modra <amodra@gmail.com>
393
394 * config/tc-ppc.c (md_apply_fix): Hoist code common to insn
395 and data fixups performing shift/high adjust/sign extension on
396 fieldval. Sink fx_pcrel handling and checks. Use fixP->fx_size
397 when writing data fixups rather than recalculating size.
398
997b26e8
JBG		 3992013-05-16 Jan-Benedict Glaw <jbglaw@lug-owl.de>
400
401 * doc/c-msp430.texi: Fix typo.
402
9f6e76f4
TG		 4032013-05-16 Tristan Gingold <gingold@adacore.com>
404
405 * config/tc-ppc.c (ppc_is_toc_sym): Symbols of class XMC_TC
406 are also TOC symbols.
407
638d3803
NC		 4082013-05-16 Nick Clifton <nickc@redhat.com>
409
410 * config/tc-msp430.c: Make -mmcu recognise more part numbers.
411 Add -mcpu command to specify core type.
997b26e8 412 * doc/c-msp430.texi: Update documentation.
638d3803 413
b015e599
AP		 4142013-05-09 Andrew Pinski <apinski@cavium.com>
415
416 * config/tc-mips.c (struct mips_set_options): New ase_virt field.
417 (mips_opts): Update for the new field.
418 (file_ase_virt): New variable.
419 (ISA_SUPPORTS_VIRT_ASE): New macro.
420 (ISA_SUPPORTS_VIRT64_ASE): New macro.
421 (MIPS_CPU_ASE_VIRT): New define.
422 (is_opcode_valid): Handle ase_virt.
423 (macro_build): Handle "+J".
424 (validate_mips_insn): Likewise.
425 (mips_ip): Likewise.
426 (enum options): Add OPTION_VIRT and OPTION_NO_VIRT.
427 (md_longopts): Add mvirt and mnovirt
428 (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT.
429 (mips_after_parse_args): Handle ase_virt field.
430 (s_mipsset): Handle "virt" and "novirt".
431 (mips_elf_final_processing): Add a comment about virt ASE might need
432 a new flag.
433 (md_show_usage): Print out the usage of -mvirt and mno-virt options.
434 * doc/c-mips.texi: Document -mvirt and -mno-virt.
435 Document ".set virt" and ".set novirt".
436
da8094d7
AM		 4372013-05-09 Alan Modra <amodra@gmail.com>
438
439 * config/tc-ppc.c (md_apply_fix): Sign extend fieldval under
440 control of operand flag bits.
441
c5f8c205
AM		 4422013-05-07 Alan Modra <amodra@gmail.com>
443
444 * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro.
445 (PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise.
446 (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise.
447 (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise.
448 (md_apply_fix): Set fx_no_overflow for assorted relocations.
449 Shift and sign-extend fieldval for use by some VLE reloc
450 operand->insert functions.
451
b47468a6
CM		 4522013-05-06 Paul Brook <paul@codesourcery.com>
453 Catherine Moore <clm@codesourcery.com>
454
c5f8c205
AM		 455 * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL.
456 (limited_pcrel_reloc_p): Likewise.
b47468a6
CM		 457 (md_apply_fix): Likewise.
458 (tc_gen_reloc): Likewise.
459
2de39019
CM		 4602013-05-06 Richard Sandiford <rdsandiford@googlemail.com>
461
462 * config/tc-mips.c (limited_pcrel_reloc_p): New function.
463 (mips_fix_adjustable): Adjust pc-relative check to use
464 limited_pc_reloc_p.
465
754e2bb9
RS		 4662013-05-02 Richard Sandiford <rdsandiford@googlemail.com>
467
468 * config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries.
469 (s_mips_stab): Do not restrict to stabn only.
470
13761a11
NC		 4712013-05-02 Nick Clifton <nickc@redhat.com>
472
473 * config/tc-msp430.c: Add support for the MSP430X architecture.
474 Add code to insert a NOP instruction after any instruction that
475 might change the interrupt state.
476 Add support for the LARGE memory model.
477 Add code to initialise the .MSP430.attributes section.
478 * config/tc-msp430.h: Add support for the MSP430X architecture.
479 * doc/c-msp430.texi: Document the new -mL and -mN command line
480 options.
481 * NEWS: Mention support for the MSP430X architecture.
482
df26367c
MR		 4832013-05-01 Maciej W. Rozycki <macro@codesourcery.com>
484
485 * configure.tgt: Replace alpha*-*-linuxecoff* pattern with
486 alpha*-*-linux*ecoff*.
487
f02d8318
CF		 4882013-04-30 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
489
490 * config/tc-mips.c (mips_ip): Add sizelo.
491 For "+C", "+G", and "+H", set sizelo and compare against it.
492
b40bf0a2
NC		 4932013-04-29 Nick Clifton <nickc@redhat.com>
494
495 * as.c (Options): Add -gdwarf-sections.
496 (parse_args): Likewise.
497 * as.h (flag_dwarf_sections): Declare.
498 * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes.
499 (process_entries): When -gdwarf-sections is enabled generate
500 fragmentary .debug_line sections.
501 (out_debug_line): Set the section for the .debug_line section end
502 symbol.
503 * doc/as.texinfo: Document -gdwarf-sections.
504 * NEWS: Mention -gdwarf-sections.
505
8eeccb77 5062013-04-26 Christian Groessler <chris@groessler.org>
00a3147e
CG		 507
508 * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdline
509 according to the target parameter. Don't call s_segm since s_segm
510 calls bfd_set_arch_mach using stdoutput, but stdoutput isn't
511 initialized yet.
512 (md_begin): Call s_segm according to target parameter from command
513 line.
514
49926cd0
AM		 5152013-04-25 Alan Modra <amodra@gmail.com>
516
517 * configure.in: Allow little-endian linux.
518 * configure: Regenerate.
519
e3031850
SL		 5202013-04-24 Sandra Loosemore <sandra@codesourcery.com>
521
522 * config/tc-nios2.c (nios2_control_register_arg_p): Rename
523 "fstatus" control register to "eccinj".
524
cb948fc0
KT		 5252013-04-19 Kai Tietz <ktietz@redhat.com>
526
527 * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin.
528
4455e9ad
JB		 5292013-04-15 Julian Brown <julian@codesourcery.com>
530
531 * expr.c (add_to_result, subtract_from_result): Make global.
532 * expr.h (add_to_result, subtract_from_result): Add prototypes.
533 * config/tc-sh.c (sh_optimize_expr): Use add_to_result,
534 subtract_from_result to handle extra bit of precision for .sleb128
535 directive operands.
536
956a6ba3
JB		 5372013-04-10 Julian Brown <julian@codesourcery.com>
538
539 * read.c (convert_to_bignum): Add sign parameter. Use it
540 instead of X_unsigned to determine sign of resulting bignum.
541 (emit_expr): Pass extra argument to convert_to_bignum.
542 (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass
543 X_extrabit to convert_to_bignum.
544 (parse_bitfield_cons): Set X_extrabit.
545 * expr.c (make_expr_symbol, expr_build_uconstant, operand):
546 Initialise X_extrabit field as appropriate.
547 (add_to_result): New.
548 (subtract_from_result): New.
549 (expr): Use above.
550 * expr.h (expressionS): Add X_extrabit field.
551
eb9f3f00
JB		 5522013-04-10 Jan Beulich <jbeulich@suse.com>
553
554 * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base
555 register being PC when is_t or writeback, and use distinct
556 diagnostic for the latter case.
557
ccb84d65
JB		 5582013-04-10 Jan Beulich <jbeulich@suse.com>
559
560 * gas/config/tc-arm.c (parse_operands): Re-write
561 po_barrier_or_imm().
562 (do_barrier): Remove bogus constraint().
563 (do_t_barrier): Remove.
564
4d13caa0
NC		 5652013-04-09 Joerg Wunsch <joerg.wunsch@atmel.com>
566
567 * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2,
568 ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2,
569 ATmega2564RFR2
570 * gas/doc/c-avr.texi (-mmcu documentation): Likewise.
571
16d02dc9
JB		 5722013-04-09 Jan Beulich <jbeulich@suse.com>
573
574 * gas/config/tc-arm.c (do_vmrs): Accept all control registers.
575 Use local variable Rt in more places.
576 (do_vmsr): Accept all control registers.
577
05ac0ffb
JB		 5782013-04-09 Jan Beulich <jbeulich@suse.com>
579
580 * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
581 if there was none specified for moves between scalar and core
582 register.
583
2d51fb74
JB		 5842013-04-09 Jan Beulich <jbeulich@suse.com>
585
586 * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the
587 NEON_ALL_LANES case.
588
94dcf8bf
JB		 5892013-04-08 Jan Beulich <jbeulich@suse.com>
590
591 * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for
592 PC-relative VSTR.
593
1472d06f
JB		 5942013-04-08 Jan Beulich <jbeulich@suse.com>
595
596 * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq
597 entry to sp_fiq.
598
0c76cae8
AM		 5992013-04-03 Alan Modra <amodra@gmail.com>
600
601 * doc/as.texinfo: Add support to generate man options for h8300.
602 * doc/c-h8300.texi: Likewise.
603
92eb40d9
RR		 6042013-03-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
605
606 * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and
607 Cortex-A57.
608
51dcdd4d
NC		 6092013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com>
610
611 PR binutils/15068
612 * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array.
613
c5d685bf
NC		 6142013-03-26 Nick Clifton <nickc@redhat.com>
615
9b978282
NC		 616 PR gas/15295
617 * listing.c (rebuffer_line): Rewrite to avoid seeking back to the
618 start of the file each time.
619
c5d685bf
NC		 620 PR gas/15178
621 * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for
622 FreeBSD targets.
623
9699c833
TG		 6242013-03-26 Douglas B Rupp <rupp@gnat.com>
625
626 * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment
627 after fixup.
628
4755303e
WN		 6292013-03-21 Will Newton <will.newton@linaro.org>
630
631 * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all
632 pc-relative str instructions in Thumb mode.
633
81f5558e
NC		 6342013-03-21 Michael Schewe <michael.schewe@gmx.net>
635
636 * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
637 @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
638 R_H8_DISP32A16.
639 * config/tc-h8300.h: Remove duplicated defines.
640
71863e73
NC		 6412013-03-21 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
642
643 PR gas/15282
644 * tc-avr.c (mcu_has_3_byte_pc): New function.
645 (tc_cfi_frame_initial_instructions): Call it to find return
646 address size.
647
795b8e6b
NC		 6482013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com>
649
650 PR gas/15095
651 * config/tc-tic6x.c (tic6x_try_encode): Handle
652 tic6x_coding_dreg_(msb|lsb) field coding types and use it to
653 encode register pair numbers when required.
654
ba86b375
WN		 6552013-03-15 Will Newton <will.newton@linaro.org>
656
657 * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register
658 in vstr in Thumb mode for pre-ARMv7 cores.
659
9e6f3811
AS		 6602013-03-14 Andreas Schwab <schwab@suse.de>
661
662 * doc/c-arc.texi (ARC Directives): Revert last change and use
663 @itemize instead of @table.
664 * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
665
b10bf8c5
NC		 6662013-03-14 Nick Clifton <nickc@redhat.com>
667
668 PR gas/15273
669 * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a
670 NULL message, instead just check ARM_CPU_IS_ANY directly.
671
ba724cfc
NC		 6722013-03-14 Nick Clifton <nickc@redhat.com>
673
674 PR gas/15212
9e6f3811 675 * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet
ba724cfc
NC		 676 for table format.
677 * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
678 to the @item directives.
679 (ARM-Neon-Alignment): Move to correct place in the document.
680 * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
681 formatting.
682 * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
683 @smallexample.
684
531a94fd
SL		 6852013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
686
687 * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'
688 case. Add default BAD_CASE to switch.
689
dad60f8e
SL		 6902013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
691
692 * config/tc-nios2.c (nios2_assemble_args_ds): New function.
693 (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
694
dd5181d5
KT		 6952013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
696
697 * config/tc-arm.c (crc_ext_armv8): New feature set.
698 (UNPRED_REG): New macro.
699 (do_crc32_1): New function.
700 (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
701 do_crc32ch, do_crc32cw): Likewise.
702 (TUEc): New macro.
703 (insns): Add entries for crc32 mnemonics.
704 (arm_extensions): Add entry for crc.
705
8e723a10
CLT		 7062013-03-08 Chung-Lin Tang <cltang@codesourcery.com>
707
708 * write.h (struct fix): Add fx_dot_frag field.
709 (dot_frag): Declare.
710 * write.c (dot_frag): New variable.
711 (fix_new_internal): Set fx_dot_frag field with dot_frag.
712 (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
713 * expr.c (expr): Save value of frag_now in dot_frag when setting
714 dot_value.
715 * read.c (emit_expr): Likewise. Delete comments.
716
be05d201
L		 7172013-03-07 H.J. Lu <hongjiu.lu@intel.com>
718
719 * config/tc-i386.c (flag_code_names): Removed.
720 (i386_index_check): Rewrote.
721
62b0d0d5
YZ		 7222013-03-05 Yufeng Zhang <yufeng.zhang@arm.com>
723
724 * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
725 add comment.
726 (aarch64_double_precision_fmovable): New function.
727 (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
728 function; handle hexadecimal representation of IEEE754 encoding.
729 (parse_operands): Update the call to parse_aarch64_imm_float.
730
165de32a
L		 7312013-02-28 H.J. Lu <hongjiu.lu@intel.com>
732
733 * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
734 (check_hle): Updated.
735 (md_assemble): Likewise.
736 (parse_insn): Likewise.
737
d5de92cf
L		 7382013-02-28 H.J. Lu <hongjiu.lu@intel.com>
739
740 * config/tc-i386.c (_i386_insn): Add rep_prefix.
9e6f3811 741 (md_assemble): Check if REP prefix is OK.
d5de92cf
L		 742 (parse_insn): Remove expecting_string_instruction. Set
743 i.rep_prefix.
744
e60bb1dd
YZ		 7452013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
746
747 * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
748
aeebdd9b
YZ		 7492013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
750
751 * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
752 for system registers.
753
4107ae22
DD		 7542013-02-27 DJ Delorie <dj@redhat.com>
755
756 * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
757 (rl78_op): Handle %code().
758 (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
759 (tc_gen_reloc): Likwise; convert to a computed reloc.
760 (md_apply_fix): Likewise.
761
151fa98f
NC		 7622013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
763
764 * config/rl78-parse.y: Fix encoding of DIVWU insn.
765
70a8bc5b 7662013-02-25 Terry Guo <terry.guo@arm.com>
767
768 * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
769 * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
770 list of accepted CPUs.
771
5c111e37
L		 7722013-02-19 H.J. Lu <hongjiu.lu@intel.com>
773
774 PR gas/15159
775 * config/tc-i386.c (cpu_arch): Add ".smap".
776
777 * doc/c-i386.texi: Document smap.
778
8a75745d
MR		 7792013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
780
781 * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
782 mips_assembling_insn appropriately.
783 (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
784
79850f26
MR		 7852013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
786
cf29fc61 787 * config/tc-mips.c (append_insn): Correct indentation, remove
79850f26
MR		 788 extraneous braces.
789
4c261dff
NC		 7902013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
791
5c111e37 792 * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
4c261dff 793
ea33f281
NC		 7942013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
795
796 * configure.tgt: Add nios2-*-rtems*.
797
a1ccaec9
YZ		 7982013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
799
800 * config/tc-aarch64.c (md_begin): Change to check if 'name' is
801 NULL.
802
0aa27725
RS		 8032013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
804
805 * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
806 (macro): Use it. Assert that trunc.w.s is not used for r5900.
807
da4339ed
NC		 8082013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com>
809
810 * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
811 core.
812
36591ba1 8132013-02-06 Sandra Loosemore <sandra@codesourcery.com>
5c111e37 814 Andrew Jenner <andrew@codesourcery.com>
36591ba1
SL		 815
816 Based on patches from Altera Corporation.
817
818 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
819 (TARGET_CPU_HFILES): Add config/tc-nios2.h.
820 * Makefile.in: Regenerated.
821 * configure.tgt: Add case for nios2*-linux*.
822 * config/obj-elf.c: Conditionally include elf/nios2.h.
823 * config/tc-nios2.c: New file.
824 * config/tc-nios2.h: New file.
825 * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
826 * doc/Makefile.in: Regenerated.
827 * doc/all.texi: Set NIOSII.
828 * doc/as.texinfo (Overview): Add Nios II options.
829 (Machine Dependencies): Include c-nios2.texi.
830 * doc/c-nios2.texi: New file.
831 * NEWS: Note Altera Nios II support.
832
94d4433a
AM		 8332013-02-06 Alan Modra <amodra@gmail.com>
834
835 PR gas/14255
836 * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
837 Don't skip fixups with fx_subsy non-NULL.
838 * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
839 with fx_subsy non-NULL.
840
ace9af6f
L		 8412013-02-04 H.J. Lu <hongjiu.lu@intel.com>
842
843 * doc/c-metag.texi: Add "@c man" markers.
844
89d67ed9
AM		 8452013-02-04 Alan Modra <amodra@gmail.com>
846
847 * write.c (fixup_segment): Return void. Delete seg_reloc_count
848 related code.
849 (TC_ADJUST_RELOC_COUNT): Delete.
850 * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
851
89072bd6
AM		 8522013-02-04 Alan Modra <amodra@gmail.com>
853
854 * po/POTFILES.in: Regenerate.
855
f9b2d544
NC		 8562013-01-30 Markos Chandras <markos.chandras@imgtec.com>
857
858 * config/tc-metag.c: Make SWAP instruction less permissive with
859 its operands.
860
392ca752
DD		 8612013-01-29 DJ Delorie <dj@redhat.com>
862
863 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
864 relocs in .word/.etc statements.
865
427d0db6
RM		 8662013-01-29 Roland McGrath <mcgrathr@google.com>
867
868 * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
869 immediate value for 8-bit offset" error so it shows line info.
870
4faf939a
JM		 8712013-01-24 Joseph Myers <joseph@codesourcery.com>
872
873 * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
874 for 64-bit output.
875
78c8d46c
NC		 8762013-01-24 Nick Clifton <nickc@redhat.com>
877
878 * config/tc-v850.c: Add support for e3v5 architecture.
879 * doc/c-v850.texi: Mention new support.
880
fb5b7503
NC		 8812013-01-23 Nick Clifton <nickc@redhat.com>
882
883 PR gas/15039
884 * config/tc-avr.c: Include dwarf2dbg.h.
885
8ce3d284
L		 8862013-01-18 H.J. Lu <hongjiu.lu@intel.com>
887
888 * config/tc-i386.c (reloc): Support size relocation only for ELF.
889 (tc_i386_fix_adjustable): Likewise.
890 (lex_got): Likewise.
891 (tc_gen_reloc): Likewise.
892
f5555712
YZ		 8932013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
894
895 * config/tc-aarch64.c (output_operand_error_record): Change to output
896 the out-of-range error message as value-expected message if there is
897 only one single value in the expected range.
898 (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
899 LSL #0 as a programmer-friendly feature.
900
8fd4256d
L		 9012013-01-16 H.J. Lu <hongjiu.lu@intel.com>
902
903 * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
904 (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
905 BFD_RELOC_64_SIZE relocations.
906 (lex_got): Support "symbol@SIZE" and don't create GOT symbol
907 for it.
908 (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
909 relocations against local symbols.
910
a5840dce
AM		 9112013-01-16 Alan Modra <amodra@gmail.com>
912
913 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
914 finding some sort of toc syntax error, and break to avoid
915 compiler uninit warning.
916
af89796a
L		 9172013-01-15 H.J. Lu <hongjiu.lu@intel.com>
918
919 PR gas/15019
920 * config/tc-i386.c (lex_got): Increment length by 1 if the
921 relocation token is removed.
922
dd42f060
NC		 9232013-01-15 Nick Clifton <nickc@redhat.com>
924
925 * config/tc-v850.c (md_assemble): Allow signed values for
926 V850E_IMMEDIATE.
927
464e3686
SK		 9282013-01-11 Sean Keys <skeys@ipdatasys.com>
929
930 * config/tc-xgate.c (md_begin): Fix mistake made when going from
af89796a 931 git to cvs.
464e3686 932
5817ffd1
PB		 9332013-01-10 Peter Bergner <bergner@vnet.ibm.com>
934
935 * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
936 * doc/c-ppc.texi (PowerPC-Opts): Likewise.
937 * config/tc-ppc.c (md_show_usage): Likewise.
938 (ppc_handle_align): Handle power8's group ending nop.
939
f4b1f6a9
SK		 9402013-01-10 Sean Keys <skeys@ipdatasys.com>
941
942 * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
af89796a 943 that the assember exits after the opcodes have been printed.
f4b1f6a9 944
34bca508
L		 9452013-01-10 H.J. Lu <hongjiu.lu@intel.com>
946
947 * app.c: Remove trailing white spaces.
948 * as.c: Likewise.
949 * as.h: Likewise.
950 * cond.c: Likewise.
951 * dw2gencfi.c: Likewise.
952 * dwarf2dbg.h: Likewise.
953 * ecoff.c: Likewise.
954 * input-file.c: Likewise.
955 * itbl-lex.h: Likewise.
956 * output-file.c: Likewise.
957 * read.c: Likewise.
958 * sb.c: Likewise.
959 * subsegs.c: Likewise.
960 * symbols.c: Likewise.
961 * write.c: Likewise.
962 * config/tc-i386.c: Likewise.
963 * doc/Makefile.am: Likewise.
964 * doc/Makefile.in: Likewise.
965 * doc/c-aarch64.texi: Likewise.
966 * doc/c-alpha.texi: Likewise.
967 * doc/c-arc.texi: Likewise.
968 * doc/c-arm.texi: Likewise.
969 * doc/c-avr.texi: Likewise.
970 * doc/c-bfin.texi: Likewise.
971 * doc/c-cr16.texi: Likewise.
972 * doc/c-d10v.texi: Likewise.
973 * doc/c-d30v.texi: Likewise.
974 * doc/c-h8300.texi: Likewise.
975 * doc/c-hppa.texi: Likewise.
976 * doc/c-i370.texi: Likewise.
977 * doc/c-i386.texi: Likewise.
978 * doc/c-i860.texi: Likewise.
979 * doc/c-m32c.texi: Likewise.
980 * doc/c-m32r.texi: Likewise.
981 * doc/c-m68hc11.texi: Likewise.
982 * doc/c-m68k.texi: Likewise.
983 * doc/c-microblaze.texi: Likewise.
984 * doc/c-mips.texi: Likewise.
985 * doc/c-msp430.texi: Likewise.
986 * doc/c-mt.texi: Likewise.
987 * doc/c-s390.texi: Likewise.
988 * doc/c-score.texi: Likewise.
989 * doc/c-sh.texi: Likewise.
990 * doc/c-sh64.texi: Likewise.
991 * doc/c-tic54x.texi: Likewise.
992 * doc/c-tic6x.texi: Likewise.
993 * doc/c-v850.texi: Likewise.
994 * doc/c-xc16x.texi: Likewise.
995 * doc/c-xgate.texi: Likewise.
996 * doc/c-xtensa.texi: Likewise.
997 * doc/c-z80.texi: Likewise.
998 * doc/internals.texi: Likewise.
999
4c665b71
RM		 10002013-01-10 Roland McGrath <mcgrathr@google.com>
1001
1002 * hash.c (hash_new_sized): Make it global.
1003 * hash.h: Declare it.
1004 * macro.c (define_macro): Use hash_new_sized instead of hash_new,
1005 pass a small size.
1006
a3c62988
NC		 10072013-01-10 Will Newton <will.newton@imgtec.com>
1008
1009 * Makefile.am: Add Meta.
1010 * Makefile.in: Regenerate.
1011 * config/tc-metag.c: New file.
1012 * config/tc-metag.h: New file.
1013 * configure.tgt: Add Meta.
1014 * doc/Makefile.am: Add Meta.
1015 * doc/Makefile.in: Regenerate.
1016 * doc/all.texi: Add Meta.
1017 * doc/as.texiinfo: Document Meta options.
1018 * doc/c-metag.texi: New file.
1019
b37df7c4
SE		 10202013-01-09 Steve Ellcey <sellcey@mips.com>
1021
1022 * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
1023 calls.
1024 * config/tc-mips.c (internalError): Remove, replace with abort.
1025
a3251895
YZ		 10262013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
1027
1028 * config/tc-aarch64.c (parse_operands): Change to compare the result
1029 of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
1030
8ab8155f
NC		 10312013-01-07 Nick Clifton <nickc@redhat.com>
1032
1033 PR gas/14887
1034 * config/tc-arm.c (skip_past_char): Skip whitespace before the
1035 anticipated character.
1036 * config/tc-arm.c (parse_address_main): Delete skip of whitespace
1037 here as it is no longer needed.
1038
a4ac1c42
AS		 10392013-01-06 Andreas Schwab <schwab@linux-m68k.org>
1040
1041 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
1042 * doc/c-score.texi (SCORE-Opts): Likewise.
1043 * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
1044
e407c74b
NC		 10452013-01-04 Juergen Urban <JuergenUrban@gmx.de>
1046
1047 * config/tc-mips.c: Add support for MIPS r5900.
1048 Add M_LQ_AB and M_SQ_AB to support large values for instructions
1049 lq and sq.
1050 (can_swap_branch_p, get_append_method): Detect some conditional
1051 short loops to fix a bug on the r5900 by NOP in the branch delay
1052 slot.
1053 (M_MUL): Support 3 operands in multu on r5900.
1054 (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
1055 (s_mipsset): Force 32 bit floating point on r5900.
1056 (mips_ip): Check parameter range of instructions mfps and mtps on
1057 r5900.
1058 * configure.in: Detect CPU type when target string contains r5900
1059 (e.g. mips64r5900el-linux-gnu).
1060
62658407
L		 10612013-01-02 H.J. Lu <hongjiu.lu@intel.com>
1062
1063 * as.c (parse_args): Update copyright year to 2013.
1064
95830fd1
YZ		 10652013-01-02 Yufeng Zhang <yufeng.zhang@arm.com>
1066
1067 * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
1068 and "cortex57".
1069
517bb291 10702013-01-02 Nick Clifton <nickc@redhat.com>
d709e4e6 1071
517bb291
NC		 1072 PR gas/14987
1073 * config/tc-arm.c (parse_address_main): Skip whitespace before a
1074 closing bracket.
d709e4e6 1075
517bb291 1076For older changes see ChangeLog-2012
08d56133 1077\f
517bb291 1078Copyright (C) 2013 Free Software Foundation, Inc.
752937aa
NC		 1079
1080Copying and distribution of this file, with or without modification,
1081are permitted in any medium without royalty provided the copyright
1082notice and this notice are preserved.
1083
08d56133
NC		 1084Local Variables:
1085mode: change-log
1086left-margin: 8
1087fill-column: 74
1088version-control: never
1089End:
A mirror of the official binutils-gdb repository