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2f8b73cc
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12013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
2
3 * config/tc-mips.c (mips16_macro_build): Remove 'Y' case.
4
c8276761
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52013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
6
7 * config/tc-mips.c (macro_build): Take an int for "C", "k", "\\"
8 and "~".
9 (macro): Update accordingly.
10
77bd4346
RS
112013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
12
13 * config/tc-mips.c (imm_expr, imm2_expr, offset_expr): Tweak commentary.
14 (imm_reloc): Delete.
15 (md_assemble): Remove imm_reloc handling.
16 (mips_ip): Update commentary. Use offset_expr and offset_reloc
17 rather than imm_expr and imm_reloc for 'i', 'j' and 'u'.
18 Use a temporary array rather than imm_reloc when parsing
19 constant expressions. Remove imm_reloc initialization.
20 (mips16_ip): Update commentary. Use offset_expr and offset_reloc
21 for the relaxable field. Use a relax_char variable to track the
22 type of this field. Remove imm_reloc initialization.
23
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242013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
25
26 * config/tc-mips.c (mips16_ip): Handle "I".
27
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282013-07-12 Maciej W. Rozycki <macro@codesourcery.com>
29
30 * config/tc-mips.c (mips_flag_nan2008): New variable.
31 (options): Add OPTION_NAN enum value.
32 (md_longopts): Handle it.
33 (md_parse_option): Likewise.
34 (s_nan): New function.
35 (mips_elf_final_processing): Handle EF_MIPS_NAN2008.
36 (md_show_usage): Add -mnan.
37
38 * doc/as.texinfo (Overview): Add -mnan.
39 * doc/c-mips.texi (MIPS Opts): Document -mnan.
40 (MIPS NaN Encodings): New node. Document .nan directive.
41 (MIPS-Dependent): List the new node.
42
c1094734
TG
432013-07-09 Tristan Gingold <gingold@adacore.com>
44
45 * configure.com: Define HAVE_SYS_TYPES_H and HAVE_UNISTD_H
46
0cbbe1b8
RS
472013-07-08 Richard Sandiford <rdsandiford@googlemail.com>
48
49 * config/tc-mips.c (mips_ip): Unconditionally parse an expression
50 for 'A' and assume that the constant has been elided if the result
51 is an O_register.
52
f2ae14a1
RS
532013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
54
55 * config/tc-mips.c (gprel16_reloc_p): New function.
56 (macro_read_relocs): Assume BFD_RELOC_LO16 if all relocs are
57 BFD_RELOC_UNUSED.
58 (offset_high_part, small_offset_p): New functions.
59 (nacro): Use them. Remove *_OB and *_DOB cases. For single-
60 register load and store macros, handle the 16-bit offset case first.
61 If a 16-bit offset is not suitable for the instruction we're
62 generating, load it into the temporary register using
63 ADDRESS_ADDI_INSN. Make the M_LI_DD code fall through into the
64 M_L_DAB code once the address has been constructed. For double load
65 and store macros, again handle the 16-bit offset case first.
66 If the second register cannot be accessed from the same high
67 part as the first, load it into AT using ADDRESS_ADDI_INSN.
68 Fix the handling of LD in cases where the first register is the
69 same as the base. Also handle the case where the offset is
70 not 16 bits and the second register cannot be accessed from the
71 same high part as the first. For unaligned loads and stores,
72 fuse the offbits == 12 and old "ab" handling. Apply this handling
73 whenever the second offset needs a different high part from the first.
74 Construct the offset using ADDRESS_ADDI_INSN where possible,
75 for offbits == 16 as well as offbits == 12. Use offset_reloc
76 when constructing the individual loads and stores.
77 (mips_ip): Set up imm_expr, imm2_expr, offset_expr, imm_reloc
78 and offset_reloc before matching against a particular opcode.
79 Handle elided 'A' constants. Allow 'A' constants to use
80 relocation operators.
81
5c324c16
RS
822013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
83
84 * config/tc-mips.c (validate_mips_insn): Remove "[" and "]" handling.
85 (mips_ip): Likewise. Do not set is_mdmx for INSN_5400 instructions.
86 Check constraints on the VR5400 RZU.OB, SLL.OB and SRL.OB instructions.
87
23e69e47
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882013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
89
90 * config/tc-mips.c (mips_ip): Preserve the real bit number for "+p".
91 Require the msb to be <= 31 for "+s". Check that the size is <= 31
92 for both "+s" and "+S".
93
27c5c572
RS
942013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
95
96 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn):
97 (mips_ip, mips16_ip): Handle "+i".
98
e76ff5ab
RS
992013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
100
101 * config/tc-mips.c (mips32_to_micromips_reg_h_map): Delete.
102 (micromips_to_32_reg_h_map): Rename to...
103 (micromips_to_32_reg_h_map1): ...this.
104 (micromips_to_32_reg_i_map): Rename to...
105 (micromips_to_32_reg_h_map2): ...this.
106 (mips_lookup_reg_pair): New function.
107 (gpr_write_mask, macro): Adjust after above renaming.
108 (validate_micromips_insn): Remove "mi" handling.
109 (mips_ip): Likewise. Parse both registers in a pair for "mh".
110
fa7616a4
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1112013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
112
113 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn)
114 (mips_ip): Remove "+D" and "+T" handling.
115
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1162013-07-05 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
117
118 * config/tc-s390.c (md_gather_operands, md_apply_fix): Support new
119 relocs.
120
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1212013-07-03 Marcus Shawcroft <marcus.shawcroft@arm.com>
122
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123 * config/tc-aarch64.c (reloc_table): Merge got_prel19 into got.
124
1252013-07-02 Marcus Shawcroft <marcus.shawcroft@arm.com>
126
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127 * config/tc-aarch64.c (md_apply_fix): Reorder case values.
128 (aarch64_force_relocation): Likewise.
129
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1302013-07-02 Alan Modra <amodra@gmail.com>
131
132 * config/tc-ppc.c (ppc_elf_adjust_symtab): Don't make .TOC. weak.
133
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MR
1342013-06-26 Maciej W. Rozycki <macro@codesourcery.com>
135
136 * doc/as.texinfo (Overview): Remove @samp from MIPS ISA names.
137 * doc/c-mips.texi (MIPS Options): Remove @sc from MIPS ISA names.
138 Replace @sc{mips16} with literal `MIPS16'.
139 (MIPS ISA): Replace @sc{mips3} with literal `MIPS III'.
140
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YZ
1412013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
142
143 * config/tc-aarch64.c (reloc_table): Replace
144 BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with
145 BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to
146 BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and
147 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC.
148 (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC,
149 BFD_RELOC_AARCH64_LD32_GOT_LO12_NC,
150 BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC,
151 BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC,
152 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and
153 BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC.
154 (aarch64_force_relocation): Likewise.
155
cec5225b
YZ
1562013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
157
158 * config/tc-aarch64.c (ilp32_p): New static variable.
159 (elf64_aarch64_target_format): Return the target according to the
160 value of 'ilp32_p'.
161 (md_begin): Determine 'mach' according to the value of 'ilp32_p'.
162 (aarch64_opts): Add support for options '-milp32' and '-mlp64'.
163 (aarch64_dwarf2_addr_size): New function.
164 * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration.
165 (DWARF2_ADDR_SIZE): New define.
166
e335d9cb
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1672013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
168
169 * doc/c-mips.texi: Use ISA instead of @sc{isa}.
170
18870af7
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1712013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
172
173 * config/tc-mips.c (validate_mips_insn): Use STYPE rather than SHAMT.
174
833794fc
MR
1752013-06-25 Maciej W. Rozycki <macro@codesourcery.com>
176
177 * config/tc-mips.c (mips_set_options): Add insn32 member.
178 (mips_opts): Initialize it.
179 (NOP_INSN, NOP_INSN_SIZE): Handle insn32 mode.
180 (options): Add OPTION_INSN32 and OPTION_NO_INSN32 enum values.
181 (md_longopts): Add "minsn32" and "mno-insn32" options.
182 (is_size_valid): Handle insn32 mode.
183 (md_assemble): Pass instruction string down to macro.
184 (brk_fmt): Add second dimension and insn32 mode initializers.
185 (mfhl_fmt): Likewise.
186 (BRK_FMT, MFHL_FMT): Handle insn32 mode.
187 (macro_build) <'c'>: Handle microMIPS 32-bit BREAK encoding.
188 (macro_build_jalr, move_register): Handle insn32 mode.
189 (macro_build_branch_rs): Likewise.
190 (macro): Handle insn32 mode.
191 <M_JRADDIUSP>, <M_JRC>, <M_MOVEP>: New cases.
192 (mips_ip): Handle insn32 mode.
193 (md_parse_option): Handle OPTION_INSN32 and OPTION_NO_INSN32.
194 (s_mipsset): Handle "insn32" and "noinsn32" pseudo-ops.
195 (mips_handle_align): Handle insn32 mode.
196 (md_show_usage): Add -minsn32 and -mno-insn32.
197
198 * doc/as.texinfo (Target MIPS options): Add -minsn32 and
199 -mno-insn32 options.
200 (-minsn32, -mno-insn32): New options.
201 * doc/c-mips.texi (MIPS Opts): Add -minsn32 and -mno-insn32
202 options.
203 (MIPS assembly options): New node. Document .set insn32 and
204 .set noinsn32.
205 (MIPS-Dependent): List the new node.
206
d1706f38
NC
2072013-06-25 Nick Clifton <nickc@redhat.com>
208
209 * config/tc-msp430.c (msp430_srcoperand): Do not allow the use of
210 the PC in indirect addressing on 430xv2 parts.
211 (msp430_operands): Add version test to hardware bug encoding
212 restrictions.
213
477330fc
RM
2142013-06-24 Roland McGrath <mcgrathr@google.com>
215
d996d970
RM
216 * config/tc-arm.c (parse_reg_list): Use skip_past_char for '}',
217 so it skips whitespace before it.
218 (s_arm_unwind_save_mmxwr, s_arm_unwind_save_mmxwcg): Likewise.
219
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RM
220 * config/tc-arm.c (arm_symbol_chars): Include '{' and '}'.
221 (arm_reg_parse_multi): Skip whitespace first.
222 (parse_reg_list): Likewise.
223 (parse_vfp_reg_list): Likewise.
224 (s_arm_unwind_save_mmxwcg): Likewise.
225
24382199
NC
2262013-06-24 Nick Clifton <nickc@redhat.com>
227
228 PR gas/15623
229 * config/tc-arm.c (do_t_smc): Mark as ending an IT block.
230
c3678916
RS
2312013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
232
233 * config/tc-mips.c (mips_ip): Fix swapped bit numbers in comments.
234
42429eac
RS
2352013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
236
237 * config/tc-mips.c: Assert that offsetT and valueT are at least
238 8 bytes in size.
239 (GPR_SMIN, GPR_SMAX): New macros.
240 (macro, mips_ip): Remove code for 4-byte valueT and offsetT.
241
f3ded42a
RS
2422013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
243
244 * config/tc-mips.c: Remove OBJ_ELF, OBJ_MAYBE_ELF and IS_ELF
245 conditions. Remove any code deselected by them.
246 (s_mips_frame, s_mips_mask): Handle ECOFF_DEBUGGING case first.
247
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RS
2482013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
249
250 * NEWS: Note removal of ECOFF support.
251 * doc/as.texinfo (--emulation): Update for the removal of MIPS ECOFF.
252 * Makefile.am (TARG_ENV_HFILES): Remove config/te-lnews.h.
253 (MULTI_CFILES): Remove config/e-mipsecoff.c.
254 * Makefile.in: Regenerate.
255 * configure.in: Remove MIPS ECOFF references.
256 (mips-sony-bsd*, mips-*-bsd*, mips-*-lnews*-ecoff, mips-*-*-ecoff):
257 Delete cases.
258 (mips-*-irix5*-*, mips*-*-linux*-*, mips*-*-freebsd*)
259 (mips*-*-kfreebsd*-gnu, mips-*-*-elf): Fold into...
260 (mips-*-*): ...this single case.
261 (mipsbecoff, mipslecoff, mipsecoff): Remove emulations. Expect
262 MIPS emulations to be e-mipself*.
263 * configure: Regenerate.
264 * configure.tgt (mips-sony-bsd*, mips-*-ultrix*, mips-*-osf*)
265 (mips-*-ecoff*, mips-*-pe*, mips-*-irix*, ips-*-lnews*, mips-*-riscos*)
266 (mips-*-sysv*): Remove coff and ecoff cases.
267 * as.c (mipsbecoff, mipslecoff, mipsecoff): Remove.
268 * ecoff.c: Remove reference to MIPS ECOFF.
269 * config/e-mipsecoff.c, config/te-lnews.h: Delete files.
270 * config/tc-mips.c (ECOFF_LITTLE_FORMAT): Delete.
271 (RDATA_SECTION_NAME, mips_target_form): Remove COFF and ECOFF cases.
272 (mips_hi_fixup): Tweak comment.
273 (append_insn): Require a howto.
274 (mips_after_parse_args): Remove OBJ_MAYBE_ECOFF code.
275
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2762013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
277
278 * doc/as.texinfo: Use MIPS rather than @sc{mips} throughout.
279 Use "CPU" instead of "cpu".
280 * doc/c-mips.texi: Likewise.
281 (MIPS Opts): Rename to MIPS Options.
282 (MIPS option stack): Rename to MIPS Option Stack.
283 (MIPS ASE instruction generation overrides): Rename to
284 MIPS ASE Instruction Generation Overrides (for now).
285 (MIPS floating-point): Rename to MIPS Floating-Point.
286
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2872013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
288
289 * doc/c-mips.texi (MIPS Macros): New section.
290 (MIPS Object): Replace with...
291 (MIPS Small Data): ...this new section.
292
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2932013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
294
295 * doc/c-mips.texi (MIPS symbol sizes): Move section further up file.
296 Capitalize name. Use @kindex instead of @cindex for .set entries.
297
a1b86ab7
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2982013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
299
300 * doc/c-mips.texi (MIPS Stabs): Remove section.
301
c6278170
RS
3022013-06-20 Richard Sandiford <rdsandiford@googlemail.com>
303
304 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS, ISA_SUPPORTS_DSP_ASE)
305 (ISA_SUPPORTS_DSP64_ASE, ISA_SUPPORTS_DSPR2_ASE, ISA_SUPPORTS_EVA_ASE)
306 (ISA_SUPPORTS_MT_ASE, ISA_SUPPORTS_MCU_ASE, ISA_SUPPORTS_VIRT_ASE)
307 (ISA_SUPPORTS_VIRT64_ASE): Delete.
308 (mips_ase): New structure.
309 (mips_ases): New table.
310 (FP64_ASES): New macro.
311 (mips_ase_groups): New array.
312 (mips_isa_rev, mips_ase_mask, mips_check_isa_supports_ase)
313 (mips_check_isa_supports_ases, mips_set_ase, mips_lookup_ase): New
314 functions.
315 (is_opcode_valid): Use mips_ases to get the 64-bit ASE flags.
316 (md_parse_option): Use mips_ases and mips_set_ase instead of
317 separate case statements for each ASE option.
318 (mips_after_parse_args): Use FP64_ASES. Use
319 mips_check_isa_supports_ases to check the ASEs against
320 other options.
321 (s_mipsset): Use mips_ases and mips_set_ase instead of
322 separate if statements for each ASE option. Use
323 mips_check_isa_supports_ases, even when a non-ASE option
324 is specified.
325
63a4bc21
KT
3262013-06-19 Greta Yorsh <Greta.Yorsh@arm.com>
327
328 * config/tc-arm.c (arm_cpus): Add support for Cortex-A12.
329
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3302013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
331
332 * config/tc-mips.c (md_shortopts, options, md_longopts)
333 (md_longopts_size): Move earlier in file.
334
846ef2d0
RS
3352013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
336
337 * config/tc-mips.c (mips_set_options): Replace separate "ase_*" fields
338 with a single "ase" bitmask.
339 (mips_opts): Update accordingly.
340 (file_ase, file_ase_explicit): New variables.
341 (file_ase_mips3d, file_ase_mdmx, file_ase_smartmips, file_ase_dsp)
342 (file_ase_dspr2, file_ase_eva, file_ase_mt, file_ase_virt): Delete.
343 (ISA_HAS_ROR): Adjust for mips_set_options change.
344 (is_opcode_valid): Take the base ase mask directly from mips_opts.
345 (mips_ip): Adjust for mips_set_options change.
346 (md_parse_option): Likewise. Update file_ase_explicit.
347 (mips_after_parse_args): Adjust for mips_set_options change.
348 Use bitmask operations to select the default ASEs. Set file_ase
349 rather than individual per-ASE variables.
350 (s_mipsset): Adjust for mips_set_options change.
351 (mips_elf_final_processing): Test file_ase rather than
352 file_ase_mdmx. Remove commented-out code.
353
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3542013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
355
356 * config/tc-mips.c (mips_cpu_info): Add an "ase" field.
357 (MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, MIPS_CPU_ASE_MT)
358 (MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX, MIPS_CPU_ASE_DSPR2)
359 (MIPS_CPU_ASE_MCU, MIPS_CPU_ASE_VIRT, MIPS_CPU_ASE_EVA): Delete.
360 (mips_after_parse_args): Use the new "ase" field to choose
361 the default ASEs.
362 (mips_cpu_info_table): Move ASEs from the "flags" field to the
363 "ase" field.
364
e83a675f
RE
3652013-06-18 Richard Earnshaw <rearnsha@arm.com>
366
367 * config/tc-arm.c (symbol_preemptible): New function.
368 (relax_branch): Use it.
369
7f3c4072
CM
3702013-06-17 Catherine Moore <clm@codesourcery.com>
371 Maciej W. Rozycki <macro@codesourcery.com>
372 Chao-Ying Fu <fu@mips.com>
373
374 * config/tc-mips.c (mips_set_options): Add ase_eva.
375 (mips_set_options mips_opts): Add ase_eva.
376 (file_ase_eva): Declare.
377 (ISA_SUPPORTS_EVA_ASE): Define.
378 (IS_SEXT_9BIT_NUM): Define.
379 (MIPS_CPU_ASE_EVA): Define.
380 (is_opcode_valid): Add support for ase_eva.
381 (macro_build): Likewise.
382 (macro): Likewise.
383 (validate_mips_insn): Likewise.
384 (validate_micromips_insn): Likewise.
385 (mips_ip): Likewise.
386 (options): Add OPTION_EVA and OPTION_NO_EVA.
387 (md_longopts): Add -meva and -mno-eva.
388 (md_parse_option): Process new options.
389 (mips_after_parse_args): Check for valid EVA combinations.
390 (s_mipsset): Likewise.
391
e410add4
RS
3922013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
393
394 * dwarf2dbg.h (dwarf2_move_insn): Declare.
395 * dwarf2dbg.c (line_subseg): Add pmove_tail.
396 (get_line_subseg): Add create_p argument. Initialize pmove_tail.
397 (dwarf2_gen_line_info_1): Update call accordingly.
398 (dwarf2_move_insn): New function.
399 * config/tc-mips.c (append_insn): Use dwarf2_move_insn.
400
6a50d470
RS
4012013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
402
403 Revert:
404
405 2011-09-05 Richard Sandiford <rdsandiford@googlemail.com>
406
407 PR gas/13024
408 * dwarf2dbg.c (pending_lines, pending_lines_tail): New variables.
409 (dwarf2_gen_line_info_1): Delete.
410 (dwarf2_push_line, dwarf2_flush_pending_lines): New functions.
411 (dwarf2_gen_line_info, dwarf2_emit_label): Use them.
412 (dwarf2_consume_line_info): Call dwarf2_flush_pending_lines.
413 (dwarf2_directive_loc): Push previous .locs instead of generating
414 them immediately.
415
f122319e
CF
4162013-06-13 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
417
418 * config/tc-mips.c (ISA_SUPPORTS_VIRT_ASE): Support micromips.
419 (ISA_SUPPORTS_VIRT64_ASE): Support 64-bit micromips.
420
909c7f9c
NC
4212013-06-13 Nick Clifton <nickc@redhat.com>
422
423 PR gas/15602
424 * config/tc-m68k.h (TC_CHECK_ADJUSTED_BROKEN_DOT_WORD): Define.
425 * config/tc-m68k.c (tc_m68k_check_adjusted_broken_word): New
426 function. Generates an error if the adjusted offset is out of a
427 16-bit range.
428
5d5755a7
SL
4292013-06-12 Sandra Loosemore <sandra@codesourcery.com>
430
431 * config/tc-nios2.c (md_apply_fix): Mask constant
432 BFD_RELOC_NIOS2_HIADJ16 value to 16 bits.
433
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MR
4342013-06-10 Maciej W. Rozycki <macro@codesourcery.com>
435
436 * config/tc-mips.c (append_insn): Don't do branch relaxation for
437 MIPS-3D instructions either.
438 (md_convert_frag): Update the COPx branch mask accordingly.
439
440 * config/tc-mips.c (md_show_usage): Document --[no-]relax-branch
441 option.
442 * doc/as.texinfo (Overview): Add --relax-branch and
443 --no-relax-branch.
444 * doc/c-mips.texi (MIPS Opts): Document --relax-branch and
445 --no-relax-branch.
446
9daf7bab
SL
4472013-06-09 Sandra Loosemore <sandra@codesourcery.com>
448
449 * config/tc-nios2.c (nios2_parse_args): Allow trap argument to
450 omitted.
451
d301a56b
RS
4522013-06-08 Catherine Moore <clm@codesourcery.com>
453
454 * config/tc-mips.c (is_opcode_valid): Build ASE mask.
455 (is_opcode_valid_16): Pass ase value to opcode_is_member.
456 (append_insn): Change INSN_xxxx to ASE_xxxx.
457
7bab7634
DC
4582013-06-01 George Thomas <george.thomas@atmel.com>
459
460 * gas/config/tc-avr.c: Change ISA for devices with USB support to
461 AVR_ISA_XMEGAU
462
f60cf82f
L
4632013-05-31 H.J. Lu <hongjiu.lu@intel.com>
464
465 * config/tc-i386.c (md_begin): Don't align text/data/bss sections
466 for ELF.
467
a3f278e2
CM
4682013-05-31 Paul Brook <paul@codesourcery.com>
469
470 gas/
471 * config/tc-mips.c (s_ehword): New.
472
067ec077
CM
4732013-05-30 Paul Brook <paul@codesourcery.com>
474
475 * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH.
476
d6101ac2
MR
4772013-05-29 Maciej W. Rozycki <macro@codesourcery.com>
478
479 * write.c (resolve_reloc_expr_symbols): On REL targets don't
480 convert relocs who have no relocatable field either. Rephrase
481 the conditional so that the PC-relative check is only applied
482 for REL targets.
483
f19ccbda
MR
4842013-05-28 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
485
486 * config/tc-mips.c (macro) <ld>: Don't use $zero for address
487 calculation.
488
418009c2
YZ
4892013-05-28 Yufeng Zhang <yufeng.zhang@arm.com>
490
491 * config/tc-aarch64.c (reloc_table): Update to use
477330fc 492 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of
418009c2
YZ
493 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE.
494 (md_apply_fix): Likewise.
495 (aarch64_force_relocation): Likewise.
496
0a8897c7
KT
4972013-05-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
498
499 * config/tc-arm.c (it_fsm_post_encode): Improve
500 warning messages about deprecated IT block formats.
501
89d2a2a3
MS
5022013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com>
503
504 * config/tc-aarch64.c (md_apply_fix): Move value range checking
505 inside fx_done condition.
506
c77c0862
RS
5072013-05-22 Jürgen Urban <JuergenUrban@gmx.de>
508
509 * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB.
510
c0637f3a
PB
5112013-05-20 Peter Bergner <bergner@vnet.ibm.com>
512
513 * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error
514 and clean up warning when using PRINT_OPCODE_TABLE.
515
5656a981
AM
5162013-05-20 Alan Modra <amodra@gmail.com>
517
518 * config/tc-ppc.c (md_apply_fix): Hoist code common to insn
519 and data fixups performing shift/high adjust/sign extension on
520 fieldval. Sink fx_pcrel handling and checks. Use fixP->fx_size
521 when writing data fixups rather than recalculating size.
522
997b26e8
JBG
5232013-05-16 Jan-Benedict Glaw <jbglaw@lug-owl.de>
524
525 * doc/c-msp430.texi: Fix typo.
526
9f6e76f4
TG
5272013-05-16 Tristan Gingold <gingold@adacore.com>
528
529 * config/tc-ppc.c (ppc_is_toc_sym): Symbols of class XMC_TC
530 are also TOC symbols.
531
638d3803
NC
5322013-05-16 Nick Clifton <nickc@redhat.com>
533
534 * config/tc-msp430.c: Make -mmcu recognise more part numbers.
535 Add -mcpu command to specify core type.
997b26e8 536 * doc/c-msp430.texi: Update documentation.
638d3803 537
b015e599
AP
5382013-05-09 Andrew Pinski <apinski@cavium.com>
539
540 * config/tc-mips.c (struct mips_set_options): New ase_virt field.
541 (mips_opts): Update for the new field.
542 (file_ase_virt): New variable.
543 (ISA_SUPPORTS_VIRT_ASE): New macro.
544 (ISA_SUPPORTS_VIRT64_ASE): New macro.
545 (MIPS_CPU_ASE_VIRT): New define.
546 (is_opcode_valid): Handle ase_virt.
547 (macro_build): Handle "+J".
548 (validate_mips_insn): Likewise.
549 (mips_ip): Likewise.
550 (enum options): Add OPTION_VIRT and OPTION_NO_VIRT.
551 (md_longopts): Add mvirt and mnovirt
552 (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT.
553 (mips_after_parse_args): Handle ase_virt field.
554 (s_mipsset): Handle "virt" and "novirt".
555 (mips_elf_final_processing): Add a comment about virt ASE might need
556 a new flag.
557 (md_show_usage): Print out the usage of -mvirt and mno-virt options.
558 * doc/c-mips.texi: Document -mvirt and -mno-virt.
559 Document ".set virt" and ".set novirt".
560
da8094d7
AM
5612013-05-09 Alan Modra <amodra@gmail.com>
562
563 * config/tc-ppc.c (md_apply_fix): Sign extend fieldval under
564 control of operand flag bits.
565
c5f8c205
AM
5662013-05-07 Alan Modra <amodra@gmail.com>
567
568 * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro.
569 (PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise.
570 (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise.
571 (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise.
572 (md_apply_fix): Set fx_no_overflow for assorted relocations.
573 Shift and sign-extend fieldval for use by some VLE reloc
574 operand->insert functions.
575
b47468a6
CM
5762013-05-06 Paul Brook <paul@codesourcery.com>
577 Catherine Moore <clm@codesourcery.com>
578
c5f8c205
AM
579 * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL.
580 (limited_pcrel_reloc_p): Likewise.
b47468a6
CM
581 (md_apply_fix): Likewise.
582 (tc_gen_reloc): Likewise.
583
2de39019
CM
5842013-05-06 Richard Sandiford <rdsandiford@googlemail.com>
585
586 * config/tc-mips.c (limited_pcrel_reloc_p): New function.
587 (mips_fix_adjustable): Adjust pc-relative check to use
588 limited_pc_reloc_p.
589
754e2bb9
RS
5902013-05-02 Richard Sandiford <rdsandiford@googlemail.com>
591
592 * config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries.
593 (s_mips_stab): Do not restrict to stabn only.
594
13761a11
NC
5952013-05-02 Nick Clifton <nickc@redhat.com>
596
597 * config/tc-msp430.c: Add support for the MSP430X architecture.
598 Add code to insert a NOP instruction after any instruction that
599 might change the interrupt state.
600 Add support for the LARGE memory model.
601 Add code to initialise the .MSP430.attributes section.
602 * config/tc-msp430.h: Add support for the MSP430X architecture.
603 * doc/c-msp430.texi: Document the new -mL and -mN command line
604 options.
605 * NEWS: Mention support for the MSP430X architecture.
606
df26367c
MR
6072013-05-01 Maciej W. Rozycki <macro@codesourcery.com>
608
609 * configure.tgt: Replace alpha*-*-linuxecoff* pattern with
610 alpha*-*-linux*ecoff*.
611
f02d8318
CF
6122013-04-30 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
613
614 * config/tc-mips.c (mips_ip): Add sizelo.
615 For "+C", "+G", and "+H", set sizelo and compare against it.
616
b40bf0a2
NC
6172013-04-29 Nick Clifton <nickc@redhat.com>
618
619 * as.c (Options): Add -gdwarf-sections.
620 (parse_args): Likewise.
621 * as.h (flag_dwarf_sections): Declare.
622 * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes.
623 (process_entries): When -gdwarf-sections is enabled generate
624 fragmentary .debug_line sections.
625 (out_debug_line): Set the section for the .debug_line section end
626 symbol.
627 * doc/as.texinfo: Document -gdwarf-sections.
628 * NEWS: Mention -gdwarf-sections.
629
8eeccb77 6302013-04-26 Christian Groessler <chris@groessler.org>
00a3147e
CG
631
632 * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdline
633 according to the target parameter. Don't call s_segm since s_segm
634 calls bfd_set_arch_mach using stdoutput, but stdoutput isn't
635 initialized yet.
636 (md_begin): Call s_segm according to target parameter from command
637 line.
638
49926cd0
AM
6392013-04-25 Alan Modra <amodra@gmail.com>
640
641 * configure.in: Allow little-endian linux.
642 * configure: Regenerate.
643
e3031850
SL
6442013-04-24 Sandra Loosemore <sandra@codesourcery.com>
645
646 * config/tc-nios2.c (nios2_control_register_arg_p): Rename
647 "fstatus" control register to "eccinj".
648
cb948fc0
KT
6492013-04-19 Kai Tietz <ktietz@redhat.com>
650
651 * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin.
652
4455e9ad
JB
6532013-04-15 Julian Brown <julian@codesourcery.com>
654
655 * expr.c (add_to_result, subtract_from_result): Make global.
656 * expr.h (add_to_result, subtract_from_result): Add prototypes.
657 * config/tc-sh.c (sh_optimize_expr): Use add_to_result,
658 subtract_from_result to handle extra bit of precision for .sleb128
659 directive operands.
660
956a6ba3
JB
6612013-04-10 Julian Brown <julian@codesourcery.com>
662
663 * read.c (convert_to_bignum): Add sign parameter. Use it
664 instead of X_unsigned to determine sign of resulting bignum.
665 (emit_expr): Pass extra argument to convert_to_bignum.
666 (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass
667 X_extrabit to convert_to_bignum.
668 (parse_bitfield_cons): Set X_extrabit.
669 * expr.c (make_expr_symbol, expr_build_uconstant, operand):
670 Initialise X_extrabit field as appropriate.
671 (add_to_result): New.
672 (subtract_from_result): New.
673 (expr): Use above.
674 * expr.h (expressionS): Add X_extrabit field.
675
eb9f3f00
JB
6762013-04-10 Jan Beulich <jbeulich@suse.com>
677
678 * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base
679 register being PC when is_t or writeback, and use distinct
680 diagnostic for the latter case.
681
ccb84d65
JB
6822013-04-10 Jan Beulich <jbeulich@suse.com>
683
684 * gas/config/tc-arm.c (parse_operands): Re-write
685 po_barrier_or_imm().
686 (do_barrier): Remove bogus constraint().
687 (do_t_barrier): Remove.
688
4d13caa0
NC
6892013-04-09 Joerg Wunsch <joerg.wunsch@atmel.com>
690
691 * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2,
692 ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2,
693 ATmega2564RFR2
694 * gas/doc/c-avr.texi (-mmcu documentation): Likewise.
695
16d02dc9
JB
6962013-04-09 Jan Beulich <jbeulich@suse.com>
697
698 * gas/config/tc-arm.c (do_vmrs): Accept all control registers.
699 Use local variable Rt in more places.
700 (do_vmsr): Accept all control registers.
701
05ac0ffb
JB
7022013-04-09 Jan Beulich <jbeulich@suse.com>
703
704 * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
705 if there was none specified for moves between scalar and core
706 register.
707
2d51fb74
JB
7082013-04-09 Jan Beulich <jbeulich@suse.com>
709
710 * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the
711 NEON_ALL_LANES case.
712
94dcf8bf
JB
7132013-04-08 Jan Beulich <jbeulich@suse.com>
714
715 * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for
716 PC-relative VSTR.
717
1472d06f
JB
7182013-04-08 Jan Beulich <jbeulich@suse.com>
719
720 * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq
721 entry to sp_fiq.
722
0c76cae8
AM
7232013-04-03 Alan Modra <amodra@gmail.com>
724
725 * doc/as.texinfo: Add support to generate man options for h8300.
726 * doc/c-h8300.texi: Likewise.
727
92eb40d9
RR
7282013-03-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
729
730 * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and
731 Cortex-A57.
732
51dcdd4d
NC
7332013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com>
734
735 PR binutils/15068
736 * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array.
737
c5d685bf
NC
7382013-03-26 Nick Clifton <nickc@redhat.com>
739
9b978282
NC
740 PR gas/15295
741 * listing.c (rebuffer_line): Rewrite to avoid seeking back to the
742 start of the file each time.
743
c5d685bf
NC
744 PR gas/15178
745 * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for
746 FreeBSD targets.
747
9699c833
TG
7482013-03-26 Douglas B Rupp <rupp@gnat.com>
749
750 * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment
751 after fixup.
752
4755303e
WN
7532013-03-21 Will Newton <will.newton@linaro.org>
754
755 * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all
756 pc-relative str instructions in Thumb mode.
757
81f5558e
NC
7582013-03-21 Michael Schewe <michael.schewe@gmx.net>
759
760 * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
761 @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
762 R_H8_DISP32A16.
763 * config/tc-h8300.h: Remove duplicated defines.
764
71863e73
NC
7652013-03-21 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
766
767 PR gas/15282
768 * tc-avr.c (mcu_has_3_byte_pc): New function.
769 (tc_cfi_frame_initial_instructions): Call it to find return
770 address size.
771
795b8e6b
NC
7722013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com>
773
774 PR gas/15095
775 * config/tc-tic6x.c (tic6x_try_encode): Handle
776 tic6x_coding_dreg_(msb|lsb) field coding types and use it to
777 encode register pair numbers when required.
778
ba86b375
WN
7792013-03-15 Will Newton <will.newton@linaro.org>
780
781 * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register
782 in vstr in Thumb mode for pre-ARMv7 cores.
783
9e6f3811
AS
7842013-03-14 Andreas Schwab <schwab@suse.de>
785
786 * doc/c-arc.texi (ARC Directives): Revert last change and use
787 @itemize instead of @table.
788 * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
789
b10bf8c5
NC
7902013-03-14 Nick Clifton <nickc@redhat.com>
791
792 PR gas/15273
793 * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a
794 NULL message, instead just check ARM_CPU_IS_ANY directly.
795
ba724cfc
NC
7962013-03-14 Nick Clifton <nickc@redhat.com>
797
798 PR gas/15212
9e6f3811 799 * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet
ba724cfc
NC
800 for table format.
801 * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
802 to the @item directives.
803 (ARM-Neon-Alignment): Move to correct place in the document.
804 * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
805 formatting.
806 * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
807 @smallexample.
808
531a94fd
SL
8092013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
810
811 * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'
812 case. Add default BAD_CASE to switch.
813
dad60f8e
SL
8142013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
815
816 * config/tc-nios2.c (nios2_assemble_args_ds): New function.
817 (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
818
dd5181d5
KT
8192013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
820
821 * config/tc-arm.c (crc_ext_armv8): New feature set.
822 (UNPRED_REG): New macro.
823 (do_crc32_1): New function.
824 (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
825 do_crc32ch, do_crc32cw): Likewise.
826 (TUEc): New macro.
827 (insns): Add entries for crc32 mnemonics.
828 (arm_extensions): Add entry for crc.
829
8e723a10
CLT
8302013-03-08 Chung-Lin Tang <cltang@codesourcery.com>
831
832 * write.h (struct fix): Add fx_dot_frag field.
833 (dot_frag): Declare.
834 * write.c (dot_frag): New variable.
835 (fix_new_internal): Set fx_dot_frag field with dot_frag.
836 (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
837 * expr.c (expr): Save value of frag_now in dot_frag when setting
838 dot_value.
839 * read.c (emit_expr): Likewise. Delete comments.
840
be05d201
L
8412013-03-07 H.J. Lu <hongjiu.lu@intel.com>
842
843 * config/tc-i386.c (flag_code_names): Removed.
844 (i386_index_check): Rewrote.
845
62b0d0d5
YZ
8462013-03-05 Yufeng Zhang <yufeng.zhang@arm.com>
847
848 * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
849 add comment.
850 (aarch64_double_precision_fmovable): New function.
851 (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
852 function; handle hexadecimal representation of IEEE754 encoding.
853 (parse_operands): Update the call to parse_aarch64_imm_float.
854
165de32a
L
8552013-02-28 H.J. Lu <hongjiu.lu@intel.com>
856
857 * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
858 (check_hle): Updated.
859 (md_assemble): Likewise.
860 (parse_insn): Likewise.
861
d5de92cf
L
8622013-02-28 H.J. Lu <hongjiu.lu@intel.com>
863
864 * config/tc-i386.c (_i386_insn): Add rep_prefix.
9e6f3811 865 (md_assemble): Check if REP prefix is OK.
d5de92cf
L
866 (parse_insn): Remove expecting_string_instruction. Set
867 i.rep_prefix.
868
e60bb1dd
YZ
8692013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
870
871 * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
872
aeebdd9b
YZ
8732013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
874
875 * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
876 for system registers.
877
4107ae22
DD
8782013-02-27 DJ Delorie <dj@redhat.com>
879
880 * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
881 (rl78_op): Handle %code().
882 (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
883 (tc_gen_reloc): Likwise; convert to a computed reloc.
884 (md_apply_fix): Likewise.
885
151fa98f
NC
8862013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
887
888 * config/rl78-parse.y: Fix encoding of DIVWU insn.
889
70a8bc5b 8902013-02-25 Terry Guo <terry.guo@arm.com>
891
892 * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
893 * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
894 list of accepted CPUs.
895
5c111e37
L
8962013-02-19 H.J. Lu <hongjiu.lu@intel.com>
897
898 PR gas/15159
899 * config/tc-i386.c (cpu_arch): Add ".smap".
900
901 * doc/c-i386.texi: Document smap.
902
8a75745d
MR
9032013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
904
905 * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
906 mips_assembling_insn appropriately.
907 (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
908
79850f26
MR
9092013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
910
cf29fc61 911 * config/tc-mips.c (append_insn): Correct indentation, remove
79850f26
MR
912 extraneous braces.
913
4c261dff
NC
9142013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
915
5c111e37 916 * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
4c261dff 917
ea33f281
NC
9182013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
919
920 * configure.tgt: Add nios2-*-rtems*.
921
a1ccaec9
YZ
9222013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
923
924 * config/tc-aarch64.c (md_begin): Change to check if 'name' is
925 NULL.
926
0aa27725
RS
9272013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
928
929 * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
930 (macro): Use it. Assert that trunc.w.s is not used for r5900.
931
da4339ed
NC
9322013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com>
933
934 * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
935 core.
936
36591ba1 9372013-02-06 Sandra Loosemore <sandra@codesourcery.com>
5c111e37 938 Andrew Jenner <andrew@codesourcery.com>
36591ba1
SL
939
940 Based on patches from Altera Corporation.
941
942 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
943 (TARGET_CPU_HFILES): Add config/tc-nios2.h.
944 * Makefile.in: Regenerated.
945 * configure.tgt: Add case for nios2*-linux*.
946 * config/obj-elf.c: Conditionally include elf/nios2.h.
947 * config/tc-nios2.c: New file.
948 * config/tc-nios2.h: New file.
949 * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
950 * doc/Makefile.in: Regenerated.
951 * doc/all.texi: Set NIOSII.
952 * doc/as.texinfo (Overview): Add Nios II options.
953 (Machine Dependencies): Include c-nios2.texi.
954 * doc/c-nios2.texi: New file.
955 * NEWS: Note Altera Nios II support.
956
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9572013-02-06 Alan Modra <amodra@gmail.com>
958
959 PR gas/14255
960 * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
961 Don't skip fixups with fx_subsy non-NULL.
962 * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
963 with fx_subsy non-NULL.
964
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9652013-02-04 H.J. Lu <hongjiu.lu@intel.com>
966
967 * doc/c-metag.texi: Add "@c man" markers.
968
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AM
9692013-02-04 Alan Modra <amodra@gmail.com>
970
971 * write.c (fixup_segment): Return void. Delete seg_reloc_count
972 related code.
973 (TC_ADJUST_RELOC_COUNT): Delete.
974 * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
975
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AM
9762013-02-04 Alan Modra <amodra@gmail.com>
977
978 * po/POTFILES.in: Regenerate.
979
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9802013-01-30 Markos Chandras <markos.chandras@imgtec.com>
981
982 * config/tc-metag.c: Make SWAP instruction less permissive with
983 its operands.
984
392ca752
DD
9852013-01-29 DJ Delorie <dj@redhat.com>
986
987 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
988 relocs in .word/.etc statements.
989
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RM
9902013-01-29 Roland McGrath <mcgrathr@google.com>
991
992 * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
993 immediate value for 8-bit offset" error so it shows line info.
994
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JM
9952013-01-24 Joseph Myers <joseph@codesourcery.com>
996
997 * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
998 for 64-bit output.
999
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NC
10002013-01-24 Nick Clifton <nickc@redhat.com>
1001
1002 * config/tc-v850.c: Add support for e3v5 architecture.
1003 * doc/c-v850.texi: Mention new support.
1004
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10052013-01-23 Nick Clifton <nickc@redhat.com>
1006
1007 PR gas/15039
1008 * config/tc-avr.c: Include dwarf2dbg.h.
1009
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L
10102013-01-18 H.J. Lu <hongjiu.lu@intel.com>
1011
1012 * config/tc-i386.c (reloc): Support size relocation only for ELF.
1013 (tc_i386_fix_adjustable): Likewise.
1014 (lex_got): Likewise.
1015 (tc_gen_reloc): Likewise.
1016
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10172013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
1018
1019 * config/tc-aarch64.c (output_operand_error_record): Change to output
1020 the out-of-range error message as value-expected message if there is
1021 only one single value in the expected range.
1022 (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
1023 LSL #0 as a programmer-friendly feature.
1024
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10252013-01-16 H.J. Lu <hongjiu.lu@intel.com>
1026
1027 * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
1028 (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
1029 BFD_RELOC_64_SIZE relocations.
1030 (lex_got): Support "symbol@SIZE" and don't create GOT symbol
1031 for it.
1032 (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
1033 relocations against local symbols.
1034
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AM
10352013-01-16 Alan Modra <amodra@gmail.com>
1036
1037 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
1038 finding some sort of toc syntax error, and break to avoid
1039 compiler uninit warning.
1040
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10412013-01-15 H.J. Lu <hongjiu.lu@intel.com>
1042
1043 PR gas/15019
1044 * config/tc-i386.c (lex_got): Increment length by 1 if the
1045 relocation token is removed.
1046
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NC
10472013-01-15 Nick Clifton <nickc@redhat.com>
1048
1049 * config/tc-v850.c (md_assemble): Allow signed values for
1050 V850E_IMMEDIATE.
1051
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SK
10522013-01-11 Sean Keys <skeys@ipdatasys.com>
1053
1054 * config/tc-xgate.c (md_begin): Fix mistake made when going from
af89796a 1055 git to cvs.
464e3686 1056
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PB
10572013-01-10 Peter Bergner <bergner@vnet.ibm.com>
1058
1059 * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
1060 * doc/c-ppc.texi (PowerPC-Opts): Likewise.
1061 * config/tc-ppc.c (md_show_usage): Likewise.
1062 (ppc_handle_align): Handle power8's group ending nop.
1063
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SK
10642013-01-10 Sean Keys <skeys@ipdatasys.com>
1065
1066 * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
af89796a 1067 that the assember exits after the opcodes have been printed.
f4b1f6a9 1068
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10692013-01-10 H.J. Lu <hongjiu.lu@intel.com>
1070
1071 * app.c: Remove trailing white spaces.
1072 * as.c: Likewise.
1073 * as.h: Likewise.
1074 * cond.c: Likewise.
1075 * dw2gencfi.c: Likewise.
1076 * dwarf2dbg.h: Likewise.
1077 * ecoff.c: Likewise.
1078 * input-file.c: Likewise.
1079 * itbl-lex.h: Likewise.
1080 * output-file.c: Likewise.
1081 * read.c: Likewise.
1082 * sb.c: Likewise.
1083 * subsegs.c: Likewise.
1084 * symbols.c: Likewise.
1085 * write.c: Likewise.
1086 * config/tc-i386.c: Likewise.
1087 * doc/Makefile.am: Likewise.
1088 * doc/Makefile.in: Likewise.
1089 * doc/c-aarch64.texi: Likewise.
1090 * doc/c-alpha.texi: Likewise.
1091 * doc/c-arc.texi: Likewise.
1092 * doc/c-arm.texi: Likewise.
1093 * doc/c-avr.texi: Likewise.
1094 * doc/c-bfin.texi: Likewise.
1095 * doc/c-cr16.texi: Likewise.
1096 * doc/c-d10v.texi: Likewise.
1097 * doc/c-d30v.texi: Likewise.
1098 * doc/c-h8300.texi: Likewise.
1099 * doc/c-hppa.texi: Likewise.
1100 * doc/c-i370.texi: Likewise.
1101 * doc/c-i386.texi: Likewise.
1102 * doc/c-i860.texi: Likewise.
1103 * doc/c-m32c.texi: Likewise.
1104 * doc/c-m32r.texi: Likewise.
1105 * doc/c-m68hc11.texi: Likewise.
1106 * doc/c-m68k.texi: Likewise.
1107 * doc/c-microblaze.texi: Likewise.
1108 * doc/c-mips.texi: Likewise.
1109 * doc/c-msp430.texi: Likewise.
1110 * doc/c-mt.texi: Likewise.
1111 * doc/c-s390.texi: Likewise.
1112 * doc/c-score.texi: Likewise.
1113 * doc/c-sh.texi: Likewise.
1114 * doc/c-sh64.texi: Likewise.
1115 * doc/c-tic54x.texi: Likewise.
1116 * doc/c-tic6x.texi: Likewise.
1117 * doc/c-v850.texi: Likewise.
1118 * doc/c-xc16x.texi: Likewise.
1119 * doc/c-xgate.texi: Likewise.
1120 * doc/c-xtensa.texi: Likewise.
1121 * doc/c-z80.texi: Likewise.
1122 * doc/internals.texi: Likewise.
1123
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RM
11242013-01-10 Roland McGrath <mcgrathr@google.com>
1125
1126 * hash.c (hash_new_sized): Make it global.
1127 * hash.h: Declare it.
1128 * macro.c (define_macro): Use hash_new_sized instead of hash_new,
1129 pass a small size.
1130
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11312013-01-10 Will Newton <will.newton@imgtec.com>
1132
1133 * Makefile.am: Add Meta.
1134 * Makefile.in: Regenerate.
1135 * config/tc-metag.c: New file.
1136 * config/tc-metag.h: New file.
1137 * configure.tgt: Add Meta.
1138 * doc/Makefile.am: Add Meta.
1139 * doc/Makefile.in: Regenerate.
1140 * doc/all.texi: Add Meta.
1141 * doc/as.texiinfo: Document Meta options.
1142 * doc/c-metag.texi: New file.
1143
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SE
11442013-01-09 Steve Ellcey <sellcey@mips.com>
1145
1146 * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
1147 calls.
1148 * config/tc-mips.c (internalError): Remove, replace with abort.
1149
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YZ
11502013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
1151
1152 * config/tc-aarch64.c (parse_operands): Change to compare the result
1153 of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
1154
8ab8155f
NC
11552013-01-07 Nick Clifton <nickc@redhat.com>
1156
1157 PR gas/14887
1158 * config/tc-arm.c (skip_past_char): Skip whitespace before the
1159 anticipated character.
1160 * config/tc-arm.c (parse_address_main): Delete skip of whitespace
1161 here as it is no longer needed.
1162
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AS
11632013-01-06 Andreas Schwab <schwab@linux-m68k.org>
1164
1165 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
1166 * doc/c-score.texi (SCORE-Opts): Likewise.
1167 * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
1168
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NC
11692013-01-04 Juergen Urban <JuergenUrban@gmx.de>
1170
1171 * config/tc-mips.c: Add support for MIPS r5900.
1172 Add M_LQ_AB and M_SQ_AB to support large values for instructions
1173 lq and sq.
1174 (can_swap_branch_p, get_append_method): Detect some conditional
1175 short loops to fix a bug on the r5900 by NOP in the branch delay
1176 slot.
1177 (M_MUL): Support 3 operands in multu on r5900.
1178 (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
1179 (s_mipsset): Force 32 bit floating point on r5900.
1180 (mips_ip): Check parameter range of instructions mfps and mtps on
1181 r5900.
1182 * configure.in: Detect CPU type when target string contains r5900
1183 (e.g. mips64r5900el-linux-gnu).
1184
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11852013-01-02 H.J. Lu <hongjiu.lu@intel.com>
1186
1187 * as.c (parse_args): Update copyright year to 2013.
1188
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11892013-01-02 Yufeng Zhang <yufeng.zhang@arm.com>
1190
1191 * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
1192 and "cortex57".
1193
517bb291 11942013-01-02 Nick Clifton <nickc@redhat.com>
d709e4e6 1195
517bb291
NC
1196 PR gas/14987
1197 * config/tc-arm.c (parse_address_main): Skip whitespace before a
1198 closing bracket.
d709e4e6 1199
517bb291 1200For older changes see ChangeLog-2012
08d56133 1201\f
517bb291 1202Copyright (C) 2013 Free Software Foundation, Inc.
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1203
1204Copying and distribution of this file, with or without modification,
1205are permitted in any medium without royalty provided the copyright
1206notice and this notice are preserved.
1207
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1208Local Variables:
1209mode: change-log
1210left-margin: 8
1211fill-column: 74
1212version-control: never
1213End: