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12013-08-16 Alan Modra <amodra@gmail.com>
2
3 * config/tc-ppc.c (ppc_elf_cons): Allow @l and other reloc
4 modifiers generally.
5
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62013-08-16 Alan Modra <amodra@gmail.com>
7
8 * config/tc-ppc.c (ppc_elf_lcomm): Use subsection 1.
9
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102013-08-14 David Edelsohn <dje.gcc@gmail.com>
11
12 * config/tc-ppc.c (ppc_comm): Accept optional fourth .lcomm
13 argument as alignment.
14
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152013-08-09 Nick Clifton <nickc@redhat.com>
16
17 * config/tc-rl78.c (elf_flags): New variable.
18 (enum options): Add OPTION_G10.
19 (md_longopts): Add mg10.
20 (md_parse_option): Parse -mg10.
21 (rl78_elf_final_processing): New function.
22 * config/tc-rl78.c (tc_final_processing): Define.
23 * doc/c-rl78.texi: Document -mg10 option.
24
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252013-08-06 Jürgen Urban <JuergenUrban@gmx.de>
26
27 * config/tc-mips.c (match_vu0_suffix_operand): Allow single-channel
28 suffixes to be elided too.
29 (mips_lookup_insn): Don't reject INSN2_VU0_CHANNEL_SUFFIX here.
30 (mips_ip): Assume .xyzw if no VU0 suffix is specified. Allow +N
31 to be omitted too.
32
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332013-08-05 John Tytgat <john@bass-software.com>
34
35 * po/POTFILES.in: Regenerate.
36
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372013-08-05 Eric Botcazou <ebotcazou@adacore.com>
38 Konrad Eisele <konrad@gaisler.com>
39
40 * config/tc-sparc.c (sparc_arch_types): Add leon.
41 (sparc_arch): Move sparc4 around and add leon.
42 (sparc_target_format): Document -Aleon.
43 * doc/c-sparc.texi: Likewise.
44
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452013-08-05 Richard Sandiford <rdsandiford@googlemail.com>
46
47 * config/tc-mips.c (mips_lookup_insn): Make length and opend signed.
48
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492013-08-04 Jürgen Urban <JuergenUrban@gmx.de>
50 Richard Sandiford <rdsandiford@googlemail.com>
51
52 * config/tc-mips.c (MAX_OPERANDS): Bump to 6.
53 (RWARN): Bump to 0x8000000.
54 (RTYPE_VI, RTYPE_VF, RTYPE_R5900_I, RTYPE_R5900_Q, RTYPE_R5900_R)
55 (RTYPE_R5900_ACC): New register types.
56 (RTYPE_MASK): Include them.
57 (R5900_I_NAMES, R5900_Q_NAMES, R5900_R_NAMES, R5900_ACC_NAMES): New
58 macros.
59 (reg_names): Include them.
60 (mips_parse_register_1): New function, split out from...
61 (mips_parse_register): ...here. Add a channels_ptr parameter.
62 Look for VU0 channel suffixes when nonnull.
63 (reg_lookup): Update the call to mips_parse_register.
64 (mips_parse_vu0_channels): New function.
65 (OT_CHANNELS, OT_DOUBLE_CHAR): New mips_operand_token_types.
66 (mips_operand_token): Add a "channels" field to the union.
67 Extend the comment above "ch" to OT_DOUBLE_CHAR.
68 (mips_parse_base_start): Match -- and ++. Handle channel suffixes.
69 (mips_parse_argument_token): Handle channel suffixes here too.
70 (validate_mips_insn): Handle INSN2_VU0_CHANNEL_SUFFIX.
71 Ignore OP_VU0_MATCH_SUFFIX when calculating the used bits.
72 Handle '#' formats.
73 (md_begin): Register $vfN and $vfI registers.
74 (operand_reg_mask): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX.
75 (convert_reg_type): Handle OP_REG_VI, OP_REG_VF, OP_REG_R5900_I,
76 OP_REG_R5900_Q, OP_REG_R5900_R and OP_REG_R5900_ACC.
77 (match_vu0_suffix_operand): New function.
78 (match_operand): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX.
79 (macro): Use "+7" rather than "E" for LDQ2 and STQ2.
80 (mips_lookup_insn): New function.
81 (mips_ip): Use it. Allow "+K" operands to be elided at the end
82 of an instruction. Handle '#' sequences.
83
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842013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
85
86 * config/tc-mips.c (macro, mips16_macro): Create an array of operand
87 values and use it instead of sreg, treg, xreg, etc.
88
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892013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
90
91 * config/tc-mips.c (match_int_operand): Use mips_int_operand_min
92 and mips_int_operand_max.
93 (mips16_immed_operand, mips16_immed_operands, MIPS16_NUM_IMMED):
94 Delete.
95 (mips16_immed_operand, mips16_immed_in_range_p): New functions.
96 (mips16_immed, mips16_extended_frag): Use them. Use mips_int_operand
97 instead of mips16_immed_operand.
98
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992013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
100
101 * config/tc-mips.c (mips16_macro): Don't use move_register.
102 (mips16_ip): Allow macros to use 'p'.
103
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1042013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
105
106 * config/tc-mips.c (MAX_OPERANDS): New macro.
107 (mips_operand_array): New structure.
108 (mips_operands, mips16_operands, micromips_operands): New arrays.
109 (micromips_to_32_reg_b_map, micromips_to_32_reg_c_map)
110 (micromips_to_32_reg_e_map, micromips_to_32_reg_f_map)
111 (micromips_to_32_reg_g_map, micromips_to_32_reg_l_map)
112 (micromips_to_32_reg_q_map): Delete.
113 (insn_operands, insn_opno, insn_extract_operand): New functions.
114 (validate_mips_insn): Take a mips_operand_array as argument and
115 use it to build up a list of operands. Extend to handle INSN_MACRO
116 and MIPS16.
117 (validate_mips16_insn): New function.
118 (validate_micromips_insn): Take a mips_operand_array as argument.
119 Handle INSN_MACRO.
120 (md_begin): Initialize mips_operands, mips16_operands and
121 micromips_operands. Call validate_mips_insn and
122 validate_micromips_insn for macro instructions too.
123 Call validate_mips16_insn for MIPS16 instructions.
124 (insn_read_mask, insn_write_mask, operand_reg_mask, insn_reg_mask):
125 New functions.
126 (gpr_read_mask, gpr_write_mask, fpr_read_mask, fpr_write_mask): Use
127 them. Handle INSN_UDI.
128 (get_append_method): Use gpr_read_mask.
129
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1302013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
131
132 * config/tc-mips.c (compact_branch_p, uncond_branch_p): Use the same
133 flags for MIPS16 and non-MIPS16 instructions.
134 (gpr_mod_mask): Move the INSN2_MOD_SP case outside the micromips block.
135 (gpr_read_mask): Use INSN2_READ_GPR_31 for MIPS16 instructions too.
136 (gpr_write_mask): Remove MIPS16_INSN_WRITE_SP handling.
137 (can_swap_branch_p, get_append_method): Use the same flags for MIPS16
138 and non-MIPS16 instructions. Fix formatting.
139
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1402013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
141
142 * config/tc-mips.c (reg_needs_delay): Move later in file.
143 Use gpr_write_mask.
144 (insns_between): Use gpr_read_mask instead of EXTRACT_OPERAND.
145
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1462013-07-26 Sergey Guriev <sergey.s.guriev@intel.com>
147 Alexander Ivchenko <alexander.ivchenko@intel.com>
148 Maxim Kuznetsov <maxim.kuznetsov@intel.com>
149 Sergey Lega <sergey.s.lega@intel.com>
150 Anna Tikhonova <anna.tikhonova@intel.com>
151 Ilya Tocar <ilya.tocar@intel.com>
152 Andrey Turetskiy <andrey.turetskiy@intel.com>
153 Ilya Verbin <ilya.verbin@intel.com>
154 Kirill Yukhin <kirill.yukhin@intel.com>
155 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
156
157 * config/tc-i386-intel.c (O_zmmword_ptr): New.
158 (i386_types): Add zmmword.
159 (i386_intel_simplify_register): Allow regzmm.
160 (i386_intel_simplify): Handle zmmwords.
161 (i386_intel_operand): Handle RC/SAE, vector operations and
162 zmmwords.
163 * config/tc-i386.c (ZMMWORD_MNEM_SUFFIX): New.
164 (struct RC_Operation): New.
165 (struct Mask_Operation): New.
166 (struct Broadcast_Operation): New.
167 (vex_prefix): Size of bytes increased to 4 to support EVEX
168 encoding.
169 (enum i386_error): Add new error codes: unsupported_broadcast,
170 broadcast_not_on_src_operand, broadcast_needed,
171 unsupported_masking, mask_not_on_destination, no_default_mask,
172 unsupported_rc_sae, rc_sae_operand_not_last_imm,
173 invalid_register_operand, try_vector_disp8.
174 (struct _i386_insn): Add new fields vrex, need_vrex, mask,
175 rounding, broadcast, memshift.
176 (struct RC_name): New.
177 (RC_NamesTable): New.
178 (evexlig): New.
179 (evexwig): New.
180 (extra_symbol_chars): Add '{'.
181 (cpu_arch): Add AVX512F, AVX512CD, AVX512ER and AVX512PF.
182 (i386_operand_type): Add regzmm, regmask and vec_disp8.
183 (match_mem_size): Handle zmmwords.
184 (operand_type_match): Handle zmm-registers.
185 (mode_from_disp_size): Handle vec_disp8.
186 (fits_in_vec_disp8): New.
187 (md_begin): Handle {} properly.
188 (type_names): Add "rZMM", "Mask reg" and "Vector d8".
189 (build_vex_prefix): Handle vrex.
190 (build_evex_prefix): New.
191 (process_immext): Adjust to properly handle EVEX.
192 (md_assemble): Add EVEX encoding support.
193 (swap_2_operands): Correctly handle operands with masking,
194 broadcasting or RC/SAE.
195 (check_VecOperands): Support EVEX features.
196 (VEX_check_operands): Properly handle 16 upper [xyz]mm registers.
197 (match_template): Support regzmm and handle new error codes.
198 (process_suffix): Handle zmmwords and zmm-registers.
199 (check_byte_reg): Extend to zmm-registers.
200 (process_operands): Extend to zmm-registers.
201 (build_modrm_byte): Handle EVEX.
202 (output_insn): Adjust to properly handle EVEX case.
203 (disp_size): Handle vec_disp8.
204 (output_disp): Support compressed disp8*N evex feature.
205 (output_imm): Handle RC/SAE immediates properly.
206 (check_VecOperations): New.
207 (i386_immediate): Handle EVEX features.
208 (i386_index_check): Handle zmmwords and zmm-registers.
209 (RC_SAE_immediate): New.
210 (i386_att_operand): Handle EVEX features.
211 (parse_real_register): Add a check for ZMM/Mask registers.
212 (OPTION_MEVEXLIG): New.
213 (OPTION_MEVEXWIG): New.
214 (md_longopts): Add mevexlig and mevexwig.
215 (md_parse_option): Handle mevexlig and mevexwig options.
216 (md_show_usage): Add description for mevexlig and mevexwig.
217 * doc/c-i386.texi: Document avx512f/.avx512f, avx512cd/.avx512cd,
218 avx512er/.avx512er, avx512pf/.avx512pf, mevexlig and mevexwig.
219
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2202013-07-25 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
221
222 * config/tc-i386.c (cpu_arch): Add .sha.
223 * doc/c-i386.texi: Document sha/.sha.
224
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2252013-07-24 Anna Tikhonova <anna.tikhonova@intel.com>
226 Kirill Yukhin <kirill.yukhin@intel.com>
227 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
228
229 * config/tc-i386.c (BND_PREFIX): New.
230 (struct _i386_insn): Add new field bnd_prefix.
231 (add_bnd_prefix): New.
232 (cpu_arch): Add MPX.
233 (i386_operand_type): Add regbnd.
234 (md_assemble): Handle BND prefixes.
235 (parse_insn): Likewise.
236 (output_branch): Likewise.
237 (output_jump): Likewise.
238 (build_modrm_byte): Handle regbnd.
239 (OPTION_MADD_BND_PREFIX): New.
240 (md_longopts): Add entry for 'madd-bnd-prefix'.
241 (md_parse_option): Handle madd-bnd-prefix option.
242 (md_show_usage): Add description for madd-bnd-prefix
243 option.
244 * doc/c-i386.texi: Document mpx/.mpx and -madd-bnd-prefix.
245
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2462013-07-24 Tristan Gingold <gingold@adacore.com>
247
248 * config/tc-ppc.c (md_apply_fix): Adjust BFD_RELOC_PPC_B16 on
249 xcoff targets.
250
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2512013-07-24 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
252
253 * config/tc-s390.c (s390_machine): Don't force the .machine
254 argument to lower case.
255
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2562013-07-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
257
258 * config/tc-arm.c (s_arm_arch_extension): Improve error message
259 for invalid extension.
260
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2612013-07-19 Yufeng Zhang <yufeng.zhang@arm.com>
262
263 * config/tc-aarch64.c (enum aarch64_abi_type): New enumeration tag.
264 (AARCH64_ABI_LP64, AARCH64_ABI_ILP32): New enumerators.
265 (aarch64_abi): New variable.
266 (ilp32_p): Change to be a macro.
267 (aarch64_opts): Remove the support for option -milp32 and -mlp64.
268 (struct aarch64_option_abi_value_table): New struct.
269 (aarch64_abis): New table.
270 (aarch64_parse_abi): New function.
271 (aarch64_long_opts): Add entry for -mabi=.
272 * doc/as.texinfo (Target AArch64 options): Document -mabi.
273 * doc/c-aarch64.texi: Likewise.
274
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2752013-07-18 Jim Thomas <thomas@cfht.hawaii.edu>
276
277 * config/tc-i386-intel.c (i386_intel_operand): Fixed signed vs
278 unsigned comparison.
279
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2802013-07-18 Sandeep Kumar Singh <Sandeep.Singh2@kpitcummins.com>
281
cbe02d4f 282 * config/rx-defs.h: Add macros for RX100, RX200, RX600, and
f0c00282 283 RX610.
cbe02d4f 284 * config/rx-parse.y: (rx_check_float_support): Add function to
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285 check floating point operation support for target RX100 and
286 RX200.
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287 * config/tc-rx.c: Add CPU options RX100, RX200, RX600, and RX610.
288 * doc/c-rx.texi: Add -mcpu option to recognize macros for RX100,
289 RX200, RX600, and RX610
f0c00282 290
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2912013-07-18 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
292
293 * config/tc-avr.c (md_show_usage): Add avrxmega2 to help text
294
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2952013-07-18 Vishnu K.S <vishnu.k_s@atmel.com>
296
297 * config/tc-avr.c: Make ata6289's ISA to AVR_ISA_AVR4.
298 * doc/c-avr.texi: Likewise.
299
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3002013-07-15 Richard Sandiford <rdsandiford@googlemail.com>
301
302 * config/tc-mips.c (match_save_restore_list_operand): Avoid -Wformat
303 error with older GCCs.
304 (mips16_macro_build): Dereference args.
305
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3062013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
307
308 * config/tc-mips.c (mips_prefer_vec_regno, mips_parse_register):
309 New functions, split out from...
310 (reg_lookup): ...here. Remove itbl support.
311 (reglist_lookup): Delete.
312 (mips_operand_token_type): New enum.
313 (mips_operand_token): New structure.
314 (mips_operand_tokens): New variable.
315 (mips_add_token, mips_parse_base_start, mips_parse_argument_token)
316 (mips_parse_arguments): New functions.
317 (md_begin): Initialize mips_operand_tokens.
318 (mips_arg_info): Add a token field. Remove optional_reg field.
319 (match_char, match_expression): New functions.
320 (match_const_int): Use match_expression. Remove "s" argument
321 and return a boolean result. Remove O_register handling.
322 (match_regno, match_reg, match_reg_range): New functions.
323 (match_int_operand, match_mapped_int_operand, match_msb_operand)
324 (match_reg_operand, match_reg_pair_operand, match_perf_reg_operand)
325 (match_addiusp_operand, match_clo_clz_dest_operand)
326 (match_lwm_swm_list_operand, match_entry_exit_operand)
327 (match_save_restore_list_operand, match_mdmx_imm_reg_operand)
328 (match_tied_reg_operand): Remove "s" argument and return a boolean
329 result. Match tokens rather than text. Update calls to
330 match_const_int. Rely on match_regno to call check_regno.
331 (match_pcrel_operand, match_pc_operand): Replace "s" argument with
332 "arg" argument. Return a boolean result.
333 (parse_float_constant): Replace with...
334 (match_float_constant): ...this new function.
335 (match_operand): Remove "s" argument and return a boolean result.
336 Update calls to subfunctions.
337 (mips_ip, mips16_ip): Call mips_parse_arguments. Use match routines
338 rather than string-parsing routines. Update handling of optional
339 registers for token scheme.
340
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3412013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
342
343 * config/tc-mips.c (parse_float_constant): Split out from...
344 (mips_ip): ...here.
345
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3462013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
347
348 * config/tc-mips.c (INSERT_BITS, INSERT_OPERAND, MIPS16_INSERT_OPERAND):
349 Delete.
350
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3512013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
352
353 * config/tc-mips.c (mips32_to_16_reg_map): Delete.
354 (match_entry_exit_operand): New function.
355 (match_save_restore_list_operand): Likewise.
356 (match_operand): Use them.
357 (check_absolute_expr): Delete.
358 (mips16_ip): Rewrite main parsing loop to use mips_operands.
359
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3602013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
361
362 * config/tc-mips.c: Enable functions commented out in previous patch.
363 (SKIP_SPACE_TABS): Move further up file.
364 (mips32_to_micromips_reg_b_map, mips32_to_micromips_reg_c_map)
365 (mips32_to_micromips_reg_d_map, mips32_to_micromips_reg_e_map)
366 (ips32_to_micromips_reg_f_map, mips32_to_micromips_reg_g_map)
367 (mips32_to_micromips_reg_l_map, mips32_to_micromips_reg_m_map)
368 (mips32_to_micromips_reg_q_map, mips32_to_micromips_reg_n_map)
369 (micromips_imm_b_map, micromips_imm_c_map): Delete.
370 (mips_lookup_reg_pair): Delete.
371 (macro): Use report_bad_range and report_bad_field.
372 (mips_immed, expr_const_in_range): Delete.
373 (mips_ip): Rewrite main parsing loop to use new functions.
374
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3752013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
376
377 * config/tc-mips.c (mips_oddfpreg_ok): Move further up file.
378 Change return type to bfd_boolean.
379 (report_bad_range, report_bad_field): New functions.
380 (mips_arg_info): New structure.
381 (match_const_int, convert_reg_type, check_regno, match_int_operand)
382 (match_mapped_int_operand, match_msb_operand, match_reg_operand)
383 (match_reg_pair_operand, match_pcrel_operand, match_perf_reg_operand)
384 (match_addiusp_operand, match_clo_clz_dest_operand)
385 (match_lwm_swm_list_operand, match_mdmx_imm_reg_operand)
386 (match_pc_operand, match_tied_reg_operand, match_operand)
387 (check_completed_insn): New functions, commented out for now.
388
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3892013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
390
391 * config/tc-mips.c (insn_insert_operand): New function.
392 (macro_build, mips16_macro_build): Put null character check
393 in the for loop and convert continues to breaks. Use operand
394 structures to handle constant operands.
395
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3962013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
397
398 * config/tc-mips.c (validate_mips_insn): Move further up file.
399 Add insn_bits and decode_operand arguments. Use the mips_operand
400 fields to work out which bits an operand occupies. Detect double
401 definitions.
402 (validate_micromips_insn): Move further up file. Call into
403 validate_mips_insn.
404
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4052013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
406
407 * config/tc-mips.c (mips16_macro_build): Remove 'Y' case.
408
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4092013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
410
411 * config/tc-mips.c (macro_build): Take an int for "C", "k", "\\"
412 and "~".
413 (macro): Update accordingly.
414
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4152013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
416
417 * config/tc-mips.c (imm_expr, imm2_expr, offset_expr): Tweak commentary.
418 (imm_reloc): Delete.
419 (md_assemble): Remove imm_reloc handling.
420 (mips_ip): Update commentary. Use offset_expr and offset_reloc
421 rather than imm_expr and imm_reloc for 'i', 'j' and 'u'.
422 Use a temporary array rather than imm_reloc when parsing
423 constant expressions. Remove imm_reloc initialization.
424 (mips16_ip): Update commentary. Use offset_expr and offset_reloc
425 for the relaxable field. Use a relax_char variable to track the
426 type of this field. Remove imm_reloc initialization.
427
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4282013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
429
430 * config/tc-mips.c (mips16_ip): Handle "I".
431
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4322013-07-12 Maciej W. Rozycki <macro@codesourcery.com>
433
434 * config/tc-mips.c (mips_flag_nan2008): New variable.
435 (options): Add OPTION_NAN enum value.
436 (md_longopts): Handle it.
437 (md_parse_option): Likewise.
438 (s_nan): New function.
439 (mips_elf_final_processing): Handle EF_MIPS_NAN2008.
440 (md_show_usage): Add -mnan.
441
442 * doc/as.texinfo (Overview): Add -mnan.
443 * doc/c-mips.texi (MIPS Opts): Document -mnan.
444 (MIPS NaN Encodings): New node. Document .nan directive.
445 (MIPS-Dependent): List the new node.
446
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4472013-07-09 Tristan Gingold <gingold@adacore.com>
448
449 * configure.com: Define HAVE_SYS_TYPES_H and HAVE_UNISTD_H
450
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4512013-07-08 Richard Sandiford <rdsandiford@googlemail.com>
452
453 * config/tc-mips.c (mips_ip): Unconditionally parse an expression
454 for 'A' and assume that the constant has been elided if the result
455 is an O_register.
456
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4572013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
458
459 * config/tc-mips.c (gprel16_reloc_p): New function.
460 (macro_read_relocs): Assume BFD_RELOC_LO16 if all relocs are
461 BFD_RELOC_UNUSED.
462 (offset_high_part, small_offset_p): New functions.
463 (nacro): Use them. Remove *_OB and *_DOB cases. For single-
464 register load and store macros, handle the 16-bit offset case first.
465 If a 16-bit offset is not suitable for the instruction we're
466 generating, load it into the temporary register using
467 ADDRESS_ADDI_INSN. Make the M_LI_DD code fall through into the
468 M_L_DAB code once the address has been constructed. For double load
469 and store macros, again handle the 16-bit offset case first.
470 If the second register cannot be accessed from the same high
471 part as the first, load it into AT using ADDRESS_ADDI_INSN.
472 Fix the handling of LD in cases where the first register is the
473 same as the base. Also handle the case where the offset is
474 not 16 bits and the second register cannot be accessed from the
475 same high part as the first. For unaligned loads and stores,
476 fuse the offbits == 12 and old "ab" handling. Apply this handling
477 whenever the second offset needs a different high part from the first.
478 Construct the offset using ADDRESS_ADDI_INSN where possible,
479 for offbits == 16 as well as offbits == 12. Use offset_reloc
480 when constructing the individual loads and stores.
481 (mips_ip): Set up imm_expr, imm2_expr, offset_expr, imm_reloc
482 and offset_reloc before matching against a particular opcode.
483 Handle elided 'A' constants. Allow 'A' constants to use
484 relocation operators.
485
5c324c16
RS
4862013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
487
488 * config/tc-mips.c (validate_mips_insn): Remove "[" and "]" handling.
489 (mips_ip): Likewise. Do not set is_mdmx for INSN_5400 instructions.
490 Check constraints on the VR5400 RZU.OB, SLL.OB and SRL.OB instructions.
491
23e69e47
RS
4922013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
493
494 * config/tc-mips.c (mips_ip): Preserve the real bit number for "+p".
495 Require the msb to be <= 31 for "+s". Check that the size is <= 31
496 for both "+s" and "+S".
497
27c5c572
RS
4982013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
499
500 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn):
501 (mips_ip, mips16_ip): Handle "+i".
502
e76ff5ab
RS
5032013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
504
505 * config/tc-mips.c (mips32_to_micromips_reg_h_map): Delete.
506 (micromips_to_32_reg_h_map): Rename to...
507 (micromips_to_32_reg_h_map1): ...this.
508 (micromips_to_32_reg_i_map): Rename to...
509 (micromips_to_32_reg_h_map2): ...this.
510 (mips_lookup_reg_pair): New function.
511 (gpr_write_mask, macro): Adjust after above renaming.
512 (validate_micromips_insn): Remove "mi" handling.
513 (mips_ip): Likewise. Parse both registers in a pair for "mh".
514
fa7616a4
RS
5152013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
516
517 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn)
518 (mips_ip): Remove "+D" and "+T" handling.
519
fb798c50
AK
5202013-07-05 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
521
522 * config/tc-s390.c (md_gather_operands, md_apply_fix): Support new
523 relocs.
524
2c0a3565
MS
5252013-07-03 Marcus Shawcroft <marcus.shawcroft@arm.com>
526
4aa2c5e2
MS
527 * config/tc-aarch64.c (reloc_table): Merge got_prel19 into got.
528
5292013-07-02 Marcus Shawcroft <marcus.shawcroft@arm.com>
530
2c0a3565
MS
531 * config/tc-aarch64.c (md_apply_fix): Reorder case values.
532 (aarch64_force_relocation): Likewise.
533
f40da81b
AM
5342013-07-02 Alan Modra <amodra@gmail.com>
535
536 * config/tc-ppc.c (ppc_elf_adjust_symtab): Don't make .TOC. weak.
537
81566a9b
MR
5382013-06-26 Maciej W. Rozycki <macro@codesourcery.com>
539
540 * doc/as.texinfo (Overview): Remove @samp from MIPS ISA names.
541 * doc/c-mips.texi (MIPS Options): Remove @sc from MIPS ISA names.
542 Replace @sc{mips16} with literal `MIPS16'.
543 (MIPS ISA): Replace @sc{mips3} with literal `MIPS III'.
544
a6bb11b2
YZ
5452013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
546
547 * config/tc-aarch64.c (reloc_table): Replace
548 BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with
549 BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to
550 BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and
551 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC.
552 (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC,
553 BFD_RELOC_AARCH64_LD32_GOT_LO12_NC,
554 BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC,
555 BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC,
556 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and
557 BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC.
558 (aarch64_force_relocation): Likewise.
559
cec5225b
YZ
5602013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
561
562 * config/tc-aarch64.c (ilp32_p): New static variable.
563 (elf64_aarch64_target_format): Return the target according to the
564 value of 'ilp32_p'.
565 (md_begin): Determine 'mach' according to the value of 'ilp32_p'.
566 (aarch64_opts): Add support for options '-milp32' and '-mlp64'.
567 (aarch64_dwarf2_addr_size): New function.
568 * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration.
569 (DWARF2_ADDR_SIZE): New define.
570
e335d9cb
RS
5712013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
572
573 * doc/c-mips.texi: Use ISA instead of @sc{isa}.
574
18870af7
RS
5752013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
576
577 * config/tc-mips.c (validate_mips_insn): Use STYPE rather than SHAMT.
578
833794fc
MR
5792013-06-25 Maciej W. Rozycki <macro@codesourcery.com>
580
581 * config/tc-mips.c (mips_set_options): Add insn32 member.
582 (mips_opts): Initialize it.
583 (NOP_INSN, NOP_INSN_SIZE): Handle insn32 mode.
584 (options): Add OPTION_INSN32 and OPTION_NO_INSN32 enum values.
585 (md_longopts): Add "minsn32" and "mno-insn32" options.
586 (is_size_valid): Handle insn32 mode.
587 (md_assemble): Pass instruction string down to macro.
588 (brk_fmt): Add second dimension and insn32 mode initializers.
589 (mfhl_fmt): Likewise.
590 (BRK_FMT, MFHL_FMT): Handle insn32 mode.
591 (macro_build) <'c'>: Handle microMIPS 32-bit BREAK encoding.
592 (macro_build_jalr, move_register): Handle insn32 mode.
593 (macro_build_branch_rs): Likewise.
594 (macro): Handle insn32 mode.
595 <M_JRADDIUSP>, <M_JRC>, <M_MOVEP>: New cases.
596 (mips_ip): Handle insn32 mode.
597 (md_parse_option): Handle OPTION_INSN32 and OPTION_NO_INSN32.
598 (s_mipsset): Handle "insn32" and "noinsn32" pseudo-ops.
599 (mips_handle_align): Handle insn32 mode.
600 (md_show_usage): Add -minsn32 and -mno-insn32.
601
602 * doc/as.texinfo (Target MIPS options): Add -minsn32 and
603 -mno-insn32 options.
604 (-minsn32, -mno-insn32): New options.
605 * doc/c-mips.texi (MIPS Opts): Add -minsn32 and -mno-insn32
606 options.
607 (MIPS assembly options): New node. Document .set insn32 and
608 .set noinsn32.
609 (MIPS-Dependent): List the new node.
610
d1706f38
NC
6112013-06-25 Nick Clifton <nickc@redhat.com>
612
613 * config/tc-msp430.c (msp430_srcoperand): Do not allow the use of
614 the PC in indirect addressing on 430xv2 parts.
615 (msp430_operands): Add version test to hardware bug encoding
616 restrictions.
617
477330fc
RM
6182013-06-24 Roland McGrath <mcgrathr@google.com>
619
d996d970
RM
620 * config/tc-arm.c (parse_reg_list): Use skip_past_char for '}',
621 so it skips whitespace before it.
622 (s_arm_unwind_save_mmxwr, s_arm_unwind_save_mmxwcg): Likewise.
623
477330fc
RM
624 * config/tc-arm.c (arm_symbol_chars): Include '{' and '}'.
625 (arm_reg_parse_multi): Skip whitespace first.
626 (parse_reg_list): Likewise.
627 (parse_vfp_reg_list): Likewise.
628 (s_arm_unwind_save_mmxwcg): Likewise.
629
24382199
NC
6302013-06-24 Nick Clifton <nickc@redhat.com>
631
632 PR gas/15623
633 * config/tc-arm.c (do_t_smc): Mark as ending an IT block.
634
c3678916
RS
6352013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
636
637 * config/tc-mips.c (mips_ip): Fix swapped bit numbers in comments.
638
42429eac
RS
6392013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
640
641 * config/tc-mips.c: Assert that offsetT and valueT are at least
642 8 bytes in size.
643 (GPR_SMIN, GPR_SMAX): New macros.
644 (macro, mips_ip): Remove code for 4-byte valueT and offsetT.
645
f3ded42a
RS
6462013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
647
648 * config/tc-mips.c: Remove OBJ_ELF, OBJ_MAYBE_ELF and IS_ELF
649 conditions. Remove any code deselected by them.
650 (s_mips_frame, s_mips_mask): Handle ECOFF_DEBUGGING case first.
651
e8044f35
RS
6522013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
653
654 * NEWS: Note removal of ECOFF support.
655 * doc/as.texinfo (--emulation): Update for the removal of MIPS ECOFF.
656 * Makefile.am (TARG_ENV_HFILES): Remove config/te-lnews.h.
657 (MULTI_CFILES): Remove config/e-mipsecoff.c.
658 * Makefile.in: Regenerate.
659 * configure.in: Remove MIPS ECOFF references.
660 (mips-sony-bsd*, mips-*-bsd*, mips-*-lnews*-ecoff, mips-*-*-ecoff):
661 Delete cases.
662 (mips-*-irix5*-*, mips*-*-linux*-*, mips*-*-freebsd*)
663 (mips*-*-kfreebsd*-gnu, mips-*-*-elf): Fold into...
664 (mips-*-*): ...this single case.
665 (mipsbecoff, mipslecoff, mipsecoff): Remove emulations. Expect
666 MIPS emulations to be e-mipself*.
667 * configure: Regenerate.
668 * configure.tgt (mips-sony-bsd*, mips-*-ultrix*, mips-*-osf*)
669 (mips-*-ecoff*, mips-*-pe*, mips-*-irix*, ips-*-lnews*, mips-*-riscos*)
670 (mips-*-sysv*): Remove coff and ecoff cases.
671 * as.c (mipsbecoff, mipslecoff, mipsecoff): Remove.
672 * ecoff.c: Remove reference to MIPS ECOFF.
673 * config/e-mipsecoff.c, config/te-lnews.h: Delete files.
674 * config/tc-mips.c (ECOFF_LITTLE_FORMAT): Delete.
675 (RDATA_SECTION_NAME, mips_target_form): Remove COFF and ECOFF cases.
676 (mips_hi_fixup): Tweak comment.
677 (append_insn): Require a howto.
678 (mips_after_parse_args): Remove OBJ_MAYBE_ECOFF code.
679
98508b2a
RS
6802013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
681
682 * doc/as.texinfo: Use MIPS rather than @sc{mips} throughout.
683 Use "CPU" instead of "cpu".
684 * doc/c-mips.texi: Likewise.
685 (MIPS Opts): Rename to MIPS Options.
686 (MIPS option stack): Rename to MIPS Option Stack.
687 (MIPS ASE instruction generation overrides): Rename to
688 MIPS ASE Instruction Generation Overrides (for now).
689 (MIPS floating-point): Rename to MIPS Floating-Point.
690
fc16f8cc
RS
6912013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
692
693 * doc/c-mips.texi (MIPS Macros): New section.
694 (MIPS Object): Replace with...
695 (MIPS Small Data): ...this new section.
696
5a7560b5
RS
6972013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
698
699 * doc/c-mips.texi (MIPS symbol sizes): Move section further up file.
700 Capitalize name. Use @kindex instead of @cindex for .set entries.
701
a1b86ab7
RS
7022013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
703
704 * doc/c-mips.texi (MIPS Stabs): Remove section.
705
c6278170
RS
7062013-06-20 Richard Sandiford <rdsandiford@googlemail.com>
707
708 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS, ISA_SUPPORTS_DSP_ASE)
709 (ISA_SUPPORTS_DSP64_ASE, ISA_SUPPORTS_DSPR2_ASE, ISA_SUPPORTS_EVA_ASE)
710 (ISA_SUPPORTS_MT_ASE, ISA_SUPPORTS_MCU_ASE, ISA_SUPPORTS_VIRT_ASE)
711 (ISA_SUPPORTS_VIRT64_ASE): Delete.
712 (mips_ase): New structure.
713 (mips_ases): New table.
714 (FP64_ASES): New macro.
715 (mips_ase_groups): New array.
716 (mips_isa_rev, mips_ase_mask, mips_check_isa_supports_ase)
717 (mips_check_isa_supports_ases, mips_set_ase, mips_lookup_ase): New
718 functions.
719 (is_opcode_valid): Use mips_ases to get the 64-bit ASE flags.
720 (md_parse_option): Use mips_ases and mips_set_ase instead of
721 separate case statements for each ASE option.
722 (mips_after_parse_args): Use FP64_ASES. Use
723 mips_check_isa_supports_ases to check the ASEs against
724 other options.
725 (s_mipsset): Use mips_ases and mips_set_ase instead of
726 separate if statements for each ASE option. Use
727 mips_check_isa_supports_ases, even when a non-ASE option
728 is specified.
729
63a4bc21
KT
7302013-06-19 Greta Yorsh <Greta.Yorsh@arm.com>
731
732 * config/tc-arm.c (arm_cpus): Add support for Cortex-A12.
733
c31f3936
RS
7342013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
735
736 * config/tc-mips.c (md_shortopts, options, md_longopts)
737 (md_longopts_size): Move earlier in file.
738
846ef2d0
RS
7392013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
740
741 * config/tc-mips.c (mips_set_options): Replace separate "ase_*" fields
742 with a single "ase" bitmask.
743 (mips_opts): Update accordingly.
744 (file_ase, file_ase_explicit): New variables.
745 (file_ase_mips3d, file_ase_mdmx, file_ase_smartmips, file_ase_dsp)
746 (file_ase_dspr2, file_ase_eva, file_ase_mt, file_ase_virt): Delete.
747 (ISA_HAS_ROR): Adjust for mips_set_options change.
748 (is_opcode_valid): Take the base ase mask directly from mips_opts.
749 (mips_ip): Adjust for mips_set_options change.
750 (md_parse_option): Likewise. Update file_ase_explicit.
751 (mips_after_parse_args): Adjust for mips_set_options change.
752 Use bitmask operations to select the default ASEs. Set file_ase
753 rather than individual per-ASE variables.
754 (s_mipsset): Adjust for mips_set_options change.
755 (mips_elf_final_processing): Test file_ase rather than
756 file_ase_mdmx. Remove commented-out code.
757
d16afab6
RS
7582013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
759
760 * config/tc-mips.c (mips_cpu_info): Add an "ase" field.
761 (MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, MIPS_CPU_ASE_MT)
762 (MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX, MIPS_CPU_ASE_DSPR2)
763 (MIPS_CPU_ASE_MCU, MIPS_CPU_ASE_VIRT, MIPS_CPU_ASE_EVA): Delete.
764 (mips_after_parse_args): Use the new "ase" field to choose
765 the default ASEs.
766 (mips_cpu_info_table): Move ASEs from the "flags" field to the
767 "ase" field.
768
e83a675f
RE
7692013-06-18 Richard Earnshaw <rearnsha@arm.com>
770
771 * config/tc-arm.c (symbol_preemptible): New function.
772 (relax_branch): Use it.
773
7f3c4072
CM
7742013-06-17 Catherine Moore <clm@codesourcery.com>
775 Maciej W. Rozycki <macro@codesourcery.com>
776 Chao-Ying Fu <fu@mips.com>
777
778 * config/tc-mips.c (mips_set_options): Add ase_eva.
779 (mips_set_options mips_opts): Add ase_eva.
780 (file_ase_eva): Declare.
781 (ISA_SUPPORTS_EVA_ASE): Define.
782 (IS_SEXT_9BIT_NUM): Define.
783 (MIPS_CPU_ASE_EVA): Define.
784 (is_opcode_valid): Add support for ase_eva.
785 (macro_build): Likewise.
786 (macro): Likewise.
787 (validate_mips_insn): Likewise.
788 (validate_micromips_insn): Likewise.
789 (mips_ip): Likewise.
790 (options): Add OPTION_EVA and OPTION_NO_EVA.
791 (md_longopts): Add -meva and -mno-eva.
792 (md_parse_option): Process new options.
793 (mips_after_parse_args): Check for valid EVA combinations.
794 (s_mipsset): Likewise.
795
e410add4
RS
7962013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
797
798 * dwarf2dbg.h (dwarf2_move_insn): Declare.
799 * dwarf2dbg.c (line_subseg): Add pmove_tail.
800 (get_line_subseg): Add create_p argument. Initialize pmove_tail.
801 (dwarf2_gen_line_info_1): Update call accordingly.
802 (dwarf2_move_insn): New function.
803 * config/tc-mips.c (append_insn): Use dwarf2_move_insn.
804
6a50d470
RS
8052013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
806
807 Revert:
808
809 2011-09-05 Richard Sandiford <rdsandiford@googlemail.com>
810
811 PR gas/13024
812 * dwarf2dbg.c (pending_lines, pending_lines_tail): New variables.
813 (dwarf2_gen_line_info_1): Delete.
814 (dwarf2_push_line, dwarf2_flush_pending_lines): New functions.
815 (dwarf2_gen_line_info, dwarf2_emit_label): Use them.
816 (dwarf2_consume_line_info): Call dwarf2_flush_pending_lines.
817 (dwarf2_directive_loc): Push previous .locs instead of generating
818 them immediately.
819
f122319e
CF
8202013-06-13 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
821
822 * config/tc-mips.c (ISA_SUPPORTS_VIRT_ASE): Support micromips.
823 (ISA_SUPPORTS_VIRT64_ASE): Support 64-bit micromips.
824
909c7f9c
NC
8252013-06-13 Nick Clifton <nickc@redhat.com>
826
827 PR gas/15602
828 * config/tc-m68k.h (TC_CHECK_ADJUSTED_BROKEN_DOT_WORD): Define.
829 * config/tc-m68k.c (tc_m68k_check_adjusted_broken_word): New
830 function. Generates an error if the adjusted offset is out of a
831 16-bit range.
832
5d5755a7
SL
8332013-06-12 Sandra Loosemore <sandra@codesourcery.com>
834
835 * config/tc-nios2.c (md_apply_fix): Mask constant
836 BFD_RELOC_NIOS2_HIADJ16 value to 16 bits.
837
3bf0dbfb
MR
8382013-06-10 Maciej W. Rozycki <macro@codesourcery.com>
839
840 * config/tc-mips.c (append_insn): Don't do branch relaxation for
841 MIPS-3D instructions either.
842 (md_convert_frag): Update the COPx branch mask accordingly.
843
844 * config/tc-mips.c (md_show_usage): Document --[no-]relax-branch
845 option.
846 * doc/as.texinfo (Overview): Add --relax-branch and
847 --no-relax-branch.
848 * doc/c-mips.texi (MIPS Opts): Document --relax-branch and
849 --no-relax-branch.
850
9daf7bab
SL
8512013-06-09 Sandra Loosemore <sandra@codesourcery.com>
852
853 * config/tc-nios2.c (nios2_parse_args): Allow trap argument to
854 omitted.
855
d301a56b
RS
8562013-06-08 Catherine Moore <clm@codesourcery.com>
857
858 * config/tc-mips.c (is_opcode_valid): Build ASE mask.
859 (is_opcode_valid_16): Pass ase value to opcode_is_member.
860 (append_insn): Change INSN_xxxx to ASE_xxxx.
861
7bab7634
DC
8622013-06-01 George Thomas <george.thomas@atmel.com>
863
cbe02d4f 864 * gas/config/tc-avr.c: Change ISA for devices with USB support to
7bab7634
DC
865 AVR_ISA_XMEGAU
866
f60cf82f
L
8672013-05-31 H.J. Lu <hongjiu.lu@intel.com>
868
869 * config/tc-i386.c (md_begin): Don't align text/data/bss sections
870 for ELF.
871
a3f278e2
CM
8722013-05-31 Paul Brook <paul@codesourcery.com>
873
a3f278e2
CM
874 * config/tc-mips.c (s_ehword): New.
875
067ec077
CM
8762013-05-30 Paul Brook <paul@codesourcery.com>
877
878 * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH.
879
d6101ac2
MR
8802013-05-29 Maciej W. Rozycki <macro@codesourcery.com>
881
882 * write.c (resolve_reloc_expr_symbols): On REL targets don't
883 convert relocs who have no relocatable field either. Rephrase
884 the conditional so that the PC-relative check is only applied
885 for REL targets.
886
f19ccbda
MR
8872013-05-28 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
888
889 * config/tc-mips.c (macro) <ld>: Don't use $zero for address
890 calculation.
891
418009c2
YZ
8922013-05-28 Yufeng Zhang <yufeng.zhang@arm.com>
893
894 * config/tc-aarch64.c (reloc_table): Update to use
477330fc 895 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of
418009c2
YZ
896 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE.
897 (md_apply_fix): Likewise.
898 (aarch64_force_relocation): Likewise.
899
0a8897c7
KT
9002013-05-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
901
902 * config/tc-arm.c (it_fsm_post_encode): Improve
903 warning messages about deprecated IT block formats.
904
89d2a2a3
MS
9052013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com>
906
907 * config/tc-aarch64.c (md_apply_fix): Move value range checking
908 inside fx_done condition.
909
c77c0862
RS
9102013-05-22 Jürgen Urban <JuergenUrban@gmx.de>
911
912 * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB.
913
c0637f3a
PB
9142013-05-20 Peter Bergner <bergner@vnet.ibm.com>
915
916 * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error
917 and clean up warning when using PRINT_OPCODE_TABLE.
918
5656a981
AM
9192013-05-20 Alan Modra <amodra@gmail.com>
920
921 * config/tc-ppc.c (md_apply_fix): Hoist code common to insn
922 and data fixups performing shift/high adjust/sign extension on
923 fieldval. Sink fx_pcrel handling and checks. Use fixP->fx_size
924 when writing data fixups rather than recalculating size.
925
997b26e8
JBG
9262013-05-16 Jan-Benedict Glaw <jbglaw@lug-owl.de>
927
928 * doc/c-msp430.texi: Fix typo.
929
9f6e76f4
TG
9302013-05-16 Tristan Gingold <gingold@adacore.com>
931
932 * config/tc-ppc.c (ppc_is_toc_sym): Symbols of class XMC_TC
933 are also TOC symbols.
934
638d3803
NC
9352013-05-16 Nick Clifton <nickc@redhat.com>
936
937 * config/tc-msp430.c: Make -mmcu recognise more part numbers.
938 Add -mcpu command to specify core type.
997b26e8 939 * doc/c-msp430.texi: Update documentation.
638d3803 940
b015e599
AP
9412013-05-09 Andrew Pinski <apinski@cavium.com>
942
943 * config/tc-mips.c (struct mips_set_options): New ase_virt field.
944 (mips_opts): Update for the new field.
945 (file_ase_virt): New variable.
946 (ISA_SUPPORTS_VIRT_ASE): New macro.
947 (ISA_SUPPORTS_VIRT64_ASE): New macro.
948 (MIPS_CPU_ASE_VIRT): New define.
949 (is_opcode_valid): Handle ase_virt.
950 (macro_build): Handle "+J".
951 (validate_mips_insn): Likewise.
952 (mips_ip): Likewise.
953 (enum options): Add OPTION_VIRT and OPTION_NO_VIRT.
954 (md_longopts): Add mvirt and mnovirt
955 (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT.
956 (mips_after_parse_args): Handle ase_virt field.
957 (s_mipsset): Handle "virt" and "novirt".
958 (mips_elf_final_processing): Add a comment about virt ASE might need
959 a new flag.
960 (md_show_usage): Print out the usage of -mvirt and mno-virt options.
961 * doc/c-mips.texi: Document -mvirt and -mno-virt.
962 Document ".set virt" and ".set novirt".
963
da8094d7
AM
9642013-05-09 Alan Modra <amodra@gmail.com>
965
966 * config/tc-ppc.c (md_apply_fix): Sign extend fieldval under
967 control of operand flag bits.
968
c5f8c205
AM
9692013-05-07 Alan Modra <amodra@gmail.com>
970
971 * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro.
972 (PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise.
973 (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise.
974 (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise.
975 (md_apply_fix): Set fx_no_overflow for assorted relocations.
976 Shift and sign-extend fieldval for use by some VLE reloc
977 operand->insert functions.
978
b47468a6
CM
9792013-05-06 Paul Brook <paul@codesourcery.com>
980 Catherine Moore <clm@codesourcery.com>
981
c5f8c205
AM
982 * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL.
983 (limited_pcrel_reloc_p): Likewise.
b47468a6
CM
984 (md_apply_fix): Likewise.
985 (tc_gen_reloc): Likewise.
986
2de39019
CM
9872013-05-06 Richard Sandiford <rdsandiford@googlemail.com>
988
989 * config/tc-mips.c (limited_pcrel_reloc_p): New function.
990 (mips_fix_adjustable): Adjust pc-relative check to use
991 limited_pc_reloc_p.
992
754e2bb9
RS
9932013-05-02 Richard Sandiford <rdsandiford@googlemail.com>
994
995 * config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries.
996 (s_mips_stab): Do not restrict to stabn only.
997
13761a11
NC
9982013-05-02 Nick Clifton <nickc@redhat.com>
999
1000 * config/tc-msp430.c: Add support for the MSP430X architecture.
1001 Add code to insert a NOP instruction after any instruction that
1002 might change the interrupt state.
1003 Add support for the LARGE memory model.
1004 Add code to initialise the .MSP430.attributes section.
1005 * config/tc-msp430.h: Add support for the MSP430X architecture.
1006 * doc/c-msp430.texi: Document the new -mL and -mN command line
1007 options.
1008 * NEWS: Mention support for the MSP430X architecture.
1009
df26367c
MR
10102013-05-01 Maciej W. Rozycki <macro@codesourcery.com>
1011
1012 * configure.tgt: Replace alpha*-*-linuxecoff* pattern with
1013 alpha*-*-linux*ecoff*.
1014
f02d8318
CF
10152013-04-30 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1016
1017 * config/tc-mips.c (mips_ip): Add sizelo.
1018 For "+C", "+G", and "+H", set sizelo and compare against it.
1019
b40bf0a2
NC
10202013-04-29 Nick Clifton <nickc@redhat.com>
1021
1022 * as.c (Options): Add -gdwarf-sections.
1023 (parse_args): Likewise.
1024 * as.h (flag_dwarf_sections): Declare.
1025 * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes.
1026 (process_entries): When -gdwarf-sections is enabled generate
1027 fragmentary .debug_line sections.
1028 (out_debug_line): Set the section for the .debug_line section end
1029 symbol.
1030 * doc/as.texinfo: Document -gdwarf-sections.
1031 * NEWS: Mention -gdwarf-sections.
1032
8eeccb77 10332013-04-26 Christian Groessler <chris@groessler.org>
00a3147e
CG
1034
1035 * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdline
1036 according to the target parameter. Don't call s_segm since s_segm
1037 calls bfd_set_arch_mach using stdoutput, but stdoutput isn't
1038 initialized yet.
1039 (md_begin): Call s_segm according to target parameter from command
1040 line.
1041
49926cd0
AM
10422013-04-25 Alan Modra <amodra@gmail.com>
1043
1044 * configure.in: Allow little-endian linux.
1045 * configure: Regenerate.
1046
e3031850
SL
10472013-04-24 Sandra Loosemore <sandra@codesourcery.com>
1048
1049 * config/tc-nios2.c (nios2_control_register_arg_p): Rename
1050 "fstatus" control register to "eccinj".
1051
cb948fc0
KT
10522013-04-19 Kai Tietz <ktietz@redhat.com>
1053
1054 * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin.
1055
4455e9ad
JB
10562013-04-15 Julian Brown <julian@codesourcery.com>
1057
1058 * expr.c (add_to_result, subtract_from_result): Make global.
1059 * expr.h (add_to_result, subtract_from_result): Add prototypes.
1060 * config/tc-sh.c (sh_optimize_expr): Use add_to_result,
1061 subtract_from_result to handle extra bit of precision for .sleb128
1062 directive operands.
1063
956a6ba3
JB
10642013-04-10 Julian Brown <julian@codesourcery.com>
1065
1066 * read.c (convert_to_bignum): Add sign parameter. Use it
1067 instead of X_unsigned to determine sign of resulting bignum.
1068 (emit_expr): Pass extra argument to convert_to_bignum.
1069 (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass
1070 X_extrabit to convert_to_bignum.
1071 (parse_bitfield_cons): Set X_extrabit.
1072 * expr.c (make_expr_symbol, expr_build_uconstant, operand):
1073 Initialise X_extrabit field as appropriate.
1074 (add_to_result): New.
1075 (subtract_from_result): New.
1076 (expr): Use above.
1077 * expr.h (expressionS): Add X_extrabit field.
1078
eb9f3f00
JB
10792013-04-10 Jan Beulich <jbeulich@suse.com>
1080
1081 * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base
1082 register being PC when is_t or writeback, and use distinct
1083 diagnostic for the latter case.
1084
ccb84d65
JB
10852013-04-10 Jan Beulich <jbeulich@suse.com>
1086
1087 * gas/config/tc-arm.c (parse_operands): Re-write
1088 po_barrier_or_imm().
1089 (do_barrier): Remove bogus constraint().
1090 (do_t_barrier): Remove.
1091
4d13caa0
NC
10922013-04-09 Joerg Wunsch <joerg.wunsch@atmel.com>
1093
1094 * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2,
1095 ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2,
1096 ATmega2564RFR2
1097 * gas/doc/c-avr.texi (-mmcu documentation): Likewise.
1098
16d02dc9
JB
10992013-04-09 Jan Beulich <jbeulich@suse.com>
1100
1101 * gas/config/tc-arm.c (do_vmrs): Accept all control registers.
1102 Use local variable Rt in more places.
1103 (do_vmsr): Accept all control registers.
1104
05ac0ffb
JB
11052013-04-09 Jan Beulich <jbeulich@suse.com>
1106
1107 * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
1108 if there was none specified for moves between scalar and core
1109 register.
1110
2d51fb74
JB
11112013-04-09 Jan Beulich <jbeulich@suse.com>
1112
1113 * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the
1114 NEON_ALL_LANES case.
1115
94dcf8bf
JB
11162013-04-08 Jan Beulich <jbeulich@suse.com>
1117
1118 * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for
1119 PC-relative VSTR.
1120
1472d06f
JB
11212013-04-08 Jan Beulich <jbeulich@suse.com>
1122
1123 * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq
1124 entry to sp_fiq.
1125
0c76cae8
AM
11262013-04-03 Alan Modra <amodra@gmail.com>
1127
1128 * doc/as.texinfo: Add support to generate man options for h8300.
1129 * doc/c-h8300.texi: Likewise.
1130
92eb40d9
RR
11312013-03-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
1132
1133 * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and
1134 Cortex-A57.
1135
51dcdd4d
NC
11362013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com>
1137
1138 PR binutils/15068
1139 * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array.
1140
c5d685bf
NC
11412013-03-26 Nick Clifton <nickc@redhat.com>
1142
9b978282
NC
1143 PR gas/15295
1144 * listing.c (rebuffer_line): Rewrite to avoid seeking back to the
1145 start of the file each time.
1146
c5d685bf
NC
1147 PR gas/15178
1148 * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for
1149 FreeBSD targets.
1150
9699c833
TG
11512013-03-26 Douglas B Rupp <rupp@gnat.com>
1152
1153 * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment
1154 after fixup.
1155
4755303e
WN
11562013-03-21 Will Newton <will.newton@linaro.org>
1157
1158 * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all
1159 pc-relative str instructions in Thumb mode.
1160
81f5558e
NC
11612013-03-21 Michael Schewe <michael.schewe@gmx.net>
1162
1163 * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
1164 @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
1165 R_H8_DISP32A16.
1166 * config/tc-h8300.h: Remove duplicated defines.
1167
71863e73
NC
11682013-03-21 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
1169
1170 PR gas/15282
1171 * tc-avr.c (mcu_has_3_byte_pc): New function.
1172 (tc_cfi_frame_initial_instructions): Call it to find return
1173 address size.
1174
795b8e6b
NC
11752013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com>
1176
1177 PR gas/15095
1178 * config/tc-tic6x.c (tic6x_try_encode): Handle
1179 tic6x_coding_dreg_(msb|lsb) field coding types and use it to
1180 encode register pair numbers when required.
1181
ba86b375
WN
11822013-03-15 Will Newton <will.newton@linaro.org>
1183
1184 * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register
1185 in vstr in Thumb mode for pre-ARMv7 cores.
1186
9e6f3811
AS
11872013-03-14 Andreas Schwab <schwab@suse.de>
1188
1189 * doc/c-arc.texi (ARC Directives): Revert last change and use
1190 @itemize instead of @table.
1191 * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
1192
b10bf8c5
NC
11932013-03-14 Nick Clifton <nickc@redhat.com>
1194
1195 PR gas/15273
1196 * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a
1197 NULL message, instead just check ARM_CPU_IS_ANY directly.
1198
ba724cfc
NC
11992013-03-14 Nick Clifton <nickc@redhat.com>
1200
1201 PR gas/15212
9e6f3811 1202 * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet
ba724cfc
NC
1203 for table format.
1204 * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
1205 to the @item directives.
1206 (ARM-Neon-Alignment): Move to correct place in the document.
1207 * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
1208 formatting.
1209 * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
1210 @smallexample.
1211
531a94fd
SL
12122013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
1213
1214 * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'
1215 case. Add default BAD_CASE to switch.
1216
dad60f8e
SL
12172013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
1218
1219 * config/tc-nios2.c (nios2_assemble_args_ds): New function.
1220 (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
1221
dd5181d5
KT
12222013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1223
1224 * config/tc-arm.c (crc_ext_armv8): New feature set.
1225 (UNPRED_REG): New macro.
1226 (do_crc32_1): New function.
1227 (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
1228 do_crc32ch, do_crc32cw): Likewise.
1229 (TUEc): New macro.
1230 (insns): Add entries for crc32 mnemonics.
1231 (arm_extensions): Add entry for crc.
1232
8e723a10
CLT
12332013-03-08 Chung-Lin Tang <cltang@codesourcery.com>
1234
1235 * write.h (struct fix): Add fx_dot_frag field.
1236 (dot_frag): Declare.
1237 * write.c (dot_frag): New variable.
1238 (fix_new_internal): Set fx_dot_frag field with dot_frag.
1239 (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
1240 * expr.c (expr): Save value of frag_now in dot_frag when setting
1241 dot_value.
1242 * read.c (emit_expr): Likewise. Delete comments.
1243
be05d201
L
12442013-03-07 H.J. Lu <hongjiu.lu@intel.com>
1245
1246 * config/tc-i386.c (flag_code_names): Removed.
1247 (i386_index_check): Rewrote.
1248
62b0d0d5
YZ
12492013-03-05 Yufeng Zhang <yufeng.zhang@arm.com>
1250
1251 * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
1252 add comment.
1253 (aarch64_double_precision_fmovable): New function.
1254 (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
1255 function; handle hexadecimal representation of IEEE754 encoding.
1256 (parse_operands): Update the call to parse_aarch64_imm_float.
1257
165de32a
L
12582013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1259
1260 * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
1261 (check_hle): Updated.
1262 (md_assemble): Likewise.
1263 (parse_insn): Likewise.
1264
d5de92cf
L
12652013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1266
1267 * config/tc-i386.c (_i386_insn): Add rep_prefix.
9e6f3811 1268 (md_assemble): Check if REP prefix is OK.
d5de92cf
L
1269 (parse_insn): Remove expecting_string_instruction. Set
1270 i.rep_prefix.
1271
e60bb1dd
YZ
12722013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1273
1274 * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
1275
aeebdd9b
YZ
12762013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1277
1278 * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
1279 for system registers.
1280
4107ae22
DD
12812013-02-27 DJ Delorie <dj@redhat.com>
1282
1283 * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
1284 (rl78_op): Handle %code().
1285 (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
1286 (tc_gen_reloc): Likwise; convert to a computed reloc.
1287 (md_apply_fix): Likewise.
1288
151fa98f
NC
12892013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
1290
1291 * config/rl78-parse.y: Fix encoding of DIVWU insn.
1292
70a8bc5b 12932013-02-25 Terry Guo <terry.guo@arm.com>
1294
1295 * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
1296 * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
1297 list of accepted CPUs.
1298
5c111e37
L
12992013-02-19 H.J. Lu <hongjiu.lu@intel.com>
1300
1301 PR gas/15159
1302 * config/tc-i386.c (cpu_arch): Add ".smap".
1303
1304 * doc/c-i386.texi: Document smap.
1305
8a75745d
MR
13062013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1307
1308 * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
1309 mips_assembling_insn appropriately.
1310 (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
1311
79850f26
MR
13122013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1313
cf29fc61 1314 * config/tc-mips.c (append_insn): Correct indentation, remove
79850f26
MR
1315 extraneous braces.
1316
4c261dff
NC
13172013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1318
5c111e37 1319 * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
4c261dff 1320
ea33f281
NC
13212013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
1322
1323 * configure.tgt: Add nios2-*-rtems*.
1324
a1ccaec9
YZ
13252013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
1326
1327 * config/tc-aarch64.c (md_begin): Change to check if 'name' is
1328 NULL.
1329
0aa27725
RS
13302013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
1331
1332 * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
1333 (macro): Use it. Assert that trunc.w.s is not used for r5900.
1334
da4339ed
NC
13352013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com>
1336
1337 * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
1338 core.
1339
36591ba1 13402013-02-06 Sandra Loosemore <sandra@codesourcery.com>
5c111e37 1341 Andrew Jenner <andrew@codesourcery.com>
36591ba1
SL
1342
1343 Based on patches from Altera Corporation.
1344
1345 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
1346 (TARGET_CPU_HFILES): Add config/tc-nios2.h.
1347 * Makefile.in: Regenerated.
1348 * configure.tgt: Add case for nios2*-linux*.
1349 * config/obj-elf.c: Conditionally include elf/nios2.h.
1350 * config/tc-nios2.c: New file.
1351 * config/tc-nios2.h: New file.
1352 * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
1353 * doc/Makefile.in: Regenerated.
1354 * doc/all.texi: Set NIOSII.
1355 * doc/as.texinfo (Overview): Add Nios II options.
1356 (Machine Dependencies): Include c-nios2.texi.
1357 * doc/c-nios2.texi: New file.
1358 * NEWS: Note Altera Nios II support.
1359
94d4433a
AM
13602013-02-06 Alan Modra <amodra@gmail.com>
1361
1362 PR gas/14255
1363 * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
1364 Don't skip fixups with fx_subsy non-NULL.
1365 * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
1366 with fx_subsy non-NULL.
1367
ace9af6f
L
13682013-02-04 H.J. Lu <hongjiu.lu@intel.com>
1369
1370 * doc/c-metag.texi: Add "@c man" markers.
1371
89d67ed9
AM
13722013-02-04 Alan Modra <amodra@gmail.com>
1373
1374 * write.c (fixup_segment): Return void. Delete seg_reloc_count
1375 related code.
1376 (TC_ADJUST_RELOC_COUNT): Delete.
1377 * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
1378
89072bd6
AM
13792013-02-04 Alan Modra <amodra@gmail.com>
1380
1381 * po/POTFILES.in: Regenerate.
1382
f9b2d544
NC
13832013-01-30 Markos Chandras <markos.chandras@imgtec.com>
1384
1385 * config/tc-metag.c: Make SWAP instruction less permissive with
1386 its operands.
1387
392ca752
DD
13882013-01-29 DJ Delorie <dj@redhat.com>
1389
1390 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
1391 relocs in .word/.etc statements.
1392
427d0db6
RM
13932013-01-29 Roland McGrath <mcgrathr@google.com>
1394
1395 * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
1396 immediate value for 8-bit offset" error so it shows line info.
1397
4faf939a
JM
13982013-01-24 Joseph Myers <joseph@codesourcery.com>
1399
1400 * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
1401 for 64-bit output.
1402
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NC
14032013-01-24 Nick Clifton <nickc@redhat.com>
1404
1405 * config/tc-v850.c: Add support for e3v5 architecture.
1406 * doc/c-v850.texi: Mention new support.
1407
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NC
14082013-01-23 Nick Clifton <nickc@redhat.com>
1409
1410 PR gas/15039
1411 * config/tc-avr.c: Include dwarf2dbg.h.
1412
8ce3d284
L
14132013-01-18 H.J. Lu <hongjiu.lu@intel.com>
1414
1415 * config/tc-i386.c (reloc): Support size relocation only for ELF.
1416 (tc_i386_fix_adjustable): Likewise.
1417 (lex_got): Likewise.
1418 (tc_gen_reloc): Likewise.
1419
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YZ
14202013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
1421
1422 * config/tc-aarch64.c (output_operand_error_record): Change to output
1423 the out-of-range error message as value-expected message if there is
1424 only one single value in the expected range.
1425 (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
1426 LSL #0 as a programmer-friendly feature.
1427
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14282013-01-16 H.J. Lu <hongjiu.lu@intel.com>
1429
1430 * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
1431 (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
1432 BFD_RELOC_64_SIZE relocations.
1433 (lex_got): Support "symbol@SIZE" and don't create GOT symbol
1434 for it.
1435 (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
1436 relocations against local symbols.
1437
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AM
14382013-01-16 Alan Modra <amodra@gmail.com>
1439
1440 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
1441 finding some sort of toc syntax error, and break to avoid
1442 compiler uninit warning.
1443
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L
14442013-01-15 H.J. Lu <hongjiu.lu@intel.com>
1445
1446 PR gas/15019
1447 * config/tc-i386.c (lex_got): Increment length by 1 if the
1448 relocation token is removed.
1449
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NC
14502013-01-15 Nick Clifton <nickc@redhat.com>
1451
1452 * config/tc-v850.c (md_assemble): Allow signed values for
1453 V850E_IMMEDIATE.
1454
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SK
14552013-01-11 Sean Keys <skeys@ipdatasys.com>
1456
1457 * config/tc-xgate.c (md_begin): Fix mistake made when going from
af89796a 1458 git to cvs.
464e3686 1459
5817ffd1
PB
14602013-01-10 Peter Bergner <bergner@vnet.ibm.com>
1461
1462 * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
1463 * doc/c-ppc.texi (PowerPC-Opts): Likewise.
1464 * config/tc-ppc.c (md_show_usage): Likewise.
1465 (ppc_handle_align): Handle power8's group ending nop.
1466
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SK
14672013-01-10 Sean Keys <skeys@ipdatasys.com>
1468
1469 * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
af89796a 1470 that the assember exits after the opcodes have been printed.
f4b1f6a9 1471
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L
14722013-01-10 H.J. Lu <hongjiu.lu@intel.com>
1473
1474 * app.c: Remove trailing white spaces.
1475 * as.c: Likewise.
1476 * as.h: Likewise.
1477 * cond.c: Likewise.
1478 * dw2gencfi.c: Likewise.
1479 * dwarf2dbg.h: Likewise.
1480 * ecoff.c: Likewise.
1481 * input-file.c: Likewise.
1482 * itbl-lex.h: Likewise.
1483 * output-file.c: Likewise.
1484 * read.c: Likewise.
1485 * sb.c: Likewise.
1486 * subsegs.c: Likewise.
1487 * symbols.c: Likewise.
1488 * write.c: Likewise.
1489 * config/tc-i386.c: Likewise.
1490 * doc/Makefile.am: Likewise.
1491 * doc/Makefile.in: Likewise.
1492 * doc/c-aarch64.texi: Likewise.
1493 * doc/c-alpha.texi: Likewise.
1494 * doc/c-arc.texi: Likewise.
1495 * doc/c-arm.texi: Likewise.
1496 * doc/c-avr.texi: Likewise.
1497 * doc/c-bfin.texi: Likewise.
1498 * doc/c-cr16.texi: Likewise.
1499 * doc/c-d10v.texi: Likewise.
1500 * doc/c-d30v.texi: Likewise.
1501 * doc/c-h8300.texi: Likewise.
1502 * doc/c-hppa.texi: Likewise.
1503 * doc/c-i370.texi: Likewise.
1504 * doc/c-i386.texi: Likewise.
1505 * doc/c-i860.texi: Likewise.
1506 * doc/c-m32c.texi: Likewise.
1507 * doc/c-m32r.texi: Likewise.
1508 * doc/c-m68hc11.texi: Likewise.
1509 * doc/c-m68k.texi: Likewise.
1510 * doc/c-microblaze.texi: Likewise.
1511 * doc/c-mips.texi: Likewise.
1512 * doc/c-msp430.texi: Likewise.
1513 * doc/c-mt.texi: Likewise.
1514 * doc/c-s390.texi: Likewise.
1515 * doc/c-score.texi: Likewise.
1516 * doc/c-sh.texi: Likewise.
1517 * doc/c-sh64.texi: Likewise.
1518 * doc/c-tic54x.texi: Likewise.
1519 * doc/c-tic6x.texi: Likewise.
1520 * doc/c-v850.texi: Likewise.
1521 * doc/c-xc16x.texi: Likewise.
1522 * doc/c-xgate.texi: Likewise.
1523 * doc/c-xtensa.texi: Likewise.
1524 * doc/c-z80.texi: Likewise.
1525 * doc/internals.texi: Likewise.
1526
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RM
15272013-01-10 Roland McGrath <mcgrathr@google.com>
1528
1529 * hash.c (hash_new_sized): Make it global.
1530 * hash.h: Declare it.
1531 * macro.c (define_macro): Use hash_new_sized instead of hash_new,
1532 pass a small size.
1533
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NC
15342013-01-10 Will Newton <will.newton@imgtec.com>
1535
1536 * Makefile.am: Add Meta.
1537 * Makefile.in: Regenerate.
1538 * config/tc-metag.c: New file.
1539 * config/tc-metag.h: New file.
1540 * configure.tgt: Add Meta.
1541 * doc/Makefile.am: Add Meta.
1542 * doc/Makefile.in: Regenerate.
1543 * doc/all.texi: Add Meta.
1544 * doc/as.texiinfo: Document Meta options.
1545 * doc/c-metag.texi: New file.
1546
b37df7c4
SE
15472013-01-09 Steve Ellcey <sellcey@mips.com>
1548
1549 * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
1550 calls.
1551 * config/tc-mips.c (internalError): Remove, replace with abort.
1552
a3251895
YZ
15532013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
1554
1555 * config/tc-aarch64.c (parse_operands): Change to compare the result
1556 of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
1557
8ab8155f
NC
15582013-01-07 Nick Clifton <nickc@redhat.com>
1559
1560 PR gas/14887
1561 * config/tc-arm.c (skip_past_char): Skip whitespace before the
1562 anticipated character.
1563 * config/tc-arm.c (parse_address_main): Delete skip of whitespace
1564 here as it is no longer needed.
1565
a4ac1c42
AS
15662013-01-06 Andreas Schwab <schwab@linux-m68k.org>
1567
1568 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
1569 * doc/c-score.texi (SCORE-Opts): Likewise.
1570 * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
1571
e407c74b
NC
15722013-01-04 Juergen Urban <JuergenUrban@gmx.de>
1573
1574 * config/tc-mips.c: Add support for MIPS r5900.
1575 Add M_LQ_AB and M_SQ_AB to support large values for instructions
1576 lq and sq.
1577 (can_swap_branch_p, get_append_method): Detect some conditional
1578 short loops to fix a bug on the r5900 by NOP in the branch delay
1579 slot.
1580 (M_MUL): Support 3 operands in multu on r5900.
1581 (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
1582 (s_mipsset): Force 32 bit floating point on r5900.
1583 (mips_ip): Check parameter range of instructions mfps and mtps on
1584 r5900.
1585 * configure.in: Detect CPU type when target string contains r5900
1586 (e.g. mips64r5900el-linux-gnu).
1587
62658407
L
15882013-01-02 H.J. Lu <hongjiu.lu@intel.com>
1589
1590 * as.c (parse_args): Update copyright year to 2013.
1591
95830fd1
YZ
15922013-01-02 Yufeng Zhang <yufeng.zhang@arm.com>
1593
1594 * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
1595 and "cortex57".
1596
517bb291 15972013-01-02 Nick Clifton <nickc@redhat.com>
d709e4e6 1598
517bb291
NC
1599 PR gas/14987
1600 * config/tc-arm.c (parse_address_main): Skip whitespace before a
1601 closing bracket.
d709e4e6 1602
517bb291 1603For older changes see ChangeLog-2012
08d56133 1604\f
517bb291 1605Copyright (C) 2013 Free Software Foundation, Inc.
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1606
1607Copying and distribution of this file, with or without modification,
1608are permitted in any medium without royalty provided the copyright
1609notice and this notice are preserved.
1610
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1611Local Variables:
1612mode: change-log
1613left-margin: 8
1614fill-column: 74
1615version-control: never
1616End: