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364215c8
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12013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
2
3 * config/tc-mips.c (mips32_to_16_reg_map): Delete.
4 (match_entry_exit_operand): New function.
5 (match_save_restore_list_operand): Likewise.
6 (match_operand): Use them.
7 (check_absolute_expr): Delete.
8 (mips16_ip): Rewrite main parsing loop to use mips_operands.
9
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102013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
11
12 * config/tc-mips.c: Enable functions commented out in previous patch.
13 (SKIP_SPACE_TABS): Move further up file.
14 (mips32_to_micromips_reg_b_map, mips32_to_micromips_reg_c_map)
15 (mips32_to_micromips_reg_d_map, mips32_to_micromips_reg_e_map)
16 (ips32_to_micromips_reg_f_map, mips32_to_micromips_reg_g_map)
17 (mips32_to_micromips_reg_l_map, mips32_to_micromips_reg_m_map)
18 (mips32_to_micromips_reg_q_map, mips32_to_micromips_reg_n_map)
19 (micromips_imm_b_map, micromips_imm_c_map): Delete.
20 (mips_lookup_reg_pair): Delete.
21 (macro): Use report_bad_range and report_bad_field.
22 (mips_immed, expr_const_in_range): Delete.
23 (mips_ip): Rewrite main parsing loop to use new functions.
24
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252013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
26
27 * config/tc-mips.c (mips_oddfpreg_ok): Move further up file.
28 Change return type to bfd_boolean.
29 (report_bad_range, report_bad_field): New functions.
30 (mips_arg_info): New structure.
31 (match_const_int, convert_reg_type, check_regno, match_int_operand)
32 (match_mapped_int_operand, match_msb_operand, match_reg_operand)
33 (match_reg_pair_operand, match_pcrel_operand, match_perf_reg_operand)
34 (match_addiusp_operand, match_clo_clz_dest_operand)
35 (match_lwm_swm_list_operand, match_mdmx_imm_reg_operand)
36 (match_pc_operand, match_tied_reg_operand, match_operand)
37 (check_completed_insn): New functions, commented out for now.
38
e077a1c8
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392013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
40
41 * config/tc-mips.c (insn_insert_operand): New function.
42 (macro_build, mips16_macro_build): Put null character check
43 in the for loop and convert continues to breaks. Use operand
44 structures to handle constant operands.
45
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462013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
47
48 * config/tc-mips.c (validate_mips_insn): Move further up file.
49 Add insn_bits and decode_operand arguments. Use the mips_operand
50 fields to work out which bits an operand occupies. Detect double
51 definitions.
52 (validate_micromips_insn): Move further up file. Call into
53 validate_mips_insn.
54
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552013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
56
57 * config/tc-mips.c (mips16_macro_build): Remove 'Y' case.
58
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592013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
60
61 * config/tc-mips.c (macro_build): Take an int for "C", "k", "\\"
62 and "~".
63 (macro): Update accordingly.
64
77bd4346
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652013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
66
67 * config/tc-mips.c (imm_expr, imm2_expr, offset_expr): Tweak commentary.
68 (imm_reloc): Delete.
69 (md_assemble): Remove imm_reloc handling.
70 (mips_ip): Update commentary. Use offset_expr and offset_reloc
71 rather than imm_expr and imm_reloc for 'i', 'j' and 'u'.
72 Use a temporary array rather than imm_reloc when parsing
73 constant expressions. Remove imm_reloc initialization.
74 (mips16_ip): Update commentary. Use offset_expr and offset_reloc
75 for the relaxable field. Use a relax_char variable to track the
76 type of this field. Remove imm_reloc initialization.
77
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782013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
79
80 * config/tc-mips.c (mips16_ip): Handle "I".
81
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822013-07-12 Maciej W. Rozycki <macro@codesourcery.com>
83
84 * config/tc-mips.c (mips_flag_nan2008): New variable.
85 (options): Add OPTION_NAN enum value.
86 (md_longopts): Handle it.
87 (md_parse_option): Likewise.
88 (s_nan): New function.
89 (mips_elf_final_processing): Handle EF_MIPS_NAN2008.
90 (md_show_usage): Add -mnan.
91
92 * doc/as.texinfo (Overview): Add -mnan.
93 * doc/c-mips.texi (MIPS Opts): Document -mnan.
94 (MIPS NaN Encodings): New node. Document .nan directive.
95 (MIPS-Dependent): List the new node.
96
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972013-07-09 Tristan Gingold <gingold@adacore.com>
98
99 * configure.com: Define HAVE_SYS_TYPES_H and HAVE_UNISTD_H
100
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1012013-07-08 Richard Sandiford <rdsandiford@googlemail.com>
102
103 * config/tc-mips.c (mips_ip): Unconditionally parse an expression
104 for 'A' and assume that the constant has been elided if the result
105 is an O_register.
106
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1072013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
108
109 * config/tc-mips.c (gprel16_reloc_p): New function.
110 (macro_read_relocs): Assume BFD_RELOC_LO16 if all relocs are
111 BFD_RELOC_UNUSED.
112 (offset_high_part, small_offset_p): New functions.
113 (nacro): Use them. Remove *_OB and *_DOB cases. For single-
114 register load and store macros, handle the 16-bit offset case first.
115 If a 16-bit offset is not suitable for the instruction we're
116 generating, load it into the temporary register using
117 ADDRESS_ADDI_INSN. Make the M_LI_DD code fall through into the
118 M_L_DAB code once the address has been constructed. For double load
119 and store macros, again handle the 16-bit offset case first.
120 If the second register cannot be accessed from the same high
121 part as the first, load it into AT using ADDRESS_ADDI_INSN.
122 Fix the handling of LD in cases where the first register is the
123 same as the base. Also handle the case where the offset is
124 not 16 bits and the second register cannot be accessed from the
125 same high part as the first. For unaligned loads and stores,
126 fuse the offbits == 12 and old "ab" handling. Apply this handling
127 whenever the second offset needs a different high part from the first.
128 Construct the offset using ADDRESS_ADDI_INSN where possible,
129 for offbits == 16 as well as offbits == 12. Use offset_reloc
130 when constructing the individual loads and stores.
131 (mips_ip): Set up imm_expr, imm2_expr, offset_expr, imm_reloc
132 and offset_reloc before matching against a particular opcode.
133 Handle elided 'A' constants. Allow 'A' constants to use
134 relocation operators.
135
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1362013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
137
138 * config/tc-mips.c (validate_mips_insn): Remove "[" and "]" handling.
139 (mips_ip): Likewise. Do not set is_mdmx for INSN_5400 instructions.
140 Check constraints on the VR5400 RZU.OB, SLL.OB and SRL.OB instructions.
141
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RS
1422013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
143
144 * config/tc-mips.c (mips_ip): Preserve the real bit number for "+p".
145 Require the msb to be <= 31 for "+s". Check that the size is <= 31
146 for both "+s" and "+S".
147
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1482013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
149
150 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn):
151 (mips_ip, mips16_ip): Handle "+i".
152
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1532013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
154
155 * config/tc-mips.c (mips32_to_micromips_reg_h_map): Delete.
156 (micromips_to_32_reg_h_map): Rename to...
157 (micromips_to_32_reg_h_map1): ...this.
158 (micromips_to_32_reg_i_map): Rename to...
159 (micromips_to_32_reg_h_map2): ...this.
160 (mips_lookup_reg_pair): New function.
161 (gpr_write_mask, macro): Adjust after above renaming.
162 (validate_micromips_insn): Remove "mi" handling.
163 (mips_ip): Likewise. Parse both registers in a pair for "mh".
164
fa7616a4
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1652013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
166
167 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn)
168 (mips_ip): Remove "+D" and "+T" handling.
169
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1702013-07-05 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
171
172 * config/tc-s390.c (md_gather_operands, md_apply_fix): Support new
173 relocs.
174
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1752013-07-03 Marcus Shawcroft <marcus.shawcroft@arm.com>
176
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177 * config/tc-aarch64.c (reloc_table): Merge got_prel19 into got.
178
1792013-07-02 Marcus Shawcroft <marcus.shawcroft@arm.com>
180
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181 * config/tc-aarch64.c (md_apply_fix): Reorder case values.
182 (aarch64_force_relocation): Likewise.
183
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1842013-07-02 Alan Modra <amodra@gmail.com>
185
186 * config/tc-ppc.c (ppc_elf_adjust_symtab): Don't make .TOC. weak.
187
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MR
1882013-06-26 Maciej W. Rozycki <macro@codesourcery.com>
189
190 * doc/as.texinfo (Overview): Remove @samp from MIPS ISA names.
191 * doc/c-mips.texi (MIPS Options): Remove @sc from MIPS ISA names.
192 Replace @sc{mips16} with literal `MIPS16'.
193 (MIPS ISA): Replace @sc{mips3} with literal `MIPS III'.
194
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YZ
1952013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
196
197 * config/tc-aarch64.c (reloc_table): Replace
198 BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with
199 BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to
200 BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and
201 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC.
202 (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC,
203 BFD_RELOC_AARCH64_LD32_GOT_LO12_NC,
204 BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC,
205 BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC,
206 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and
207 BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC.
208 (aarch64_force_relocation): Likewise.
209
cec5225b
YZ
2102013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
211
212 * config/tc-aarch64.c (ilp32_p): New static variable.
213 (elf64_aarch64_target_format): Return the target according to the
214 value of 'ilp32_p'.
215 (md_begin): Determine 'mach' according to the value of 'ilp32_p'.
216 (aarch64_opts): Add support for options '-milp32' and '-mlp64'.
217 (aarch64_dwarf2_addr_size): New function.
218 * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration.
219 (DWARF2_ADDR_SIZE): New define.
220
e335d9cb
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2212013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
222
223 * doc/c-mips.texi: Use ISA instead of @sc{isa}.
224
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2252013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
226
227 * config/tc-mips.c (validate_mips_insn): Use STYPE rather than SHAMT.
228
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MR
2292013-06-25 Maciej W. Rozycki <macro@codesourcery.com>
230
231 * config/tc-mips.c (mips_set_options): Add insn32 member.
232 (mips_opts): Initialize it.
233 (NOP_INSN, NOP_INSN_SIZE): Handle insn32 mode.
234 (options): Add OPTION_INSN32 and OPTION_NO_INSN32 enum values.
235 (md_longopts): Add "minsn32" and "mno-insn32" options.
236 (is_size_valid): Handle insn32 mode.
237 (md_assemble): Pass instruction string down to macro.
238 (brk_fmt): Add second dimension and insn32 mode initializers.
239 (mfhl_fmt): Likewise.
240 (BRK_FMT, MFHL_FMT): Handle insn32 mode.
241 (macro_build) <'c'>: Handle microMIPS 32-bit BREAK encoding.
242 (macro_build_jalr, move_register): Handle insn32 mode.
243 (macro_build_branch_rs): Likewise.
244 (macro): Handle insn32 mode.
245 <M_JRADDIUSP>, <M_JRC>, <M_MOVEP>: New cases.
246 (mips_ip): Handle insn32 mode.
247 (md_parse_option): Handle OPTION_INSN32 and OPTION_NO_INSN32.
248 (s_mipsset): Handle "insn32" and "noinsn32" pseudo-ops.
249 (mips_handle_align): Handle insn32 mode.
250 (md_show_usage): Add -minsn32 and -mno-insn32.
251
252 * doc/as.texinfo (Target MIPS options): Add -minsn32 and
253 -mno-insn32 options.
254 (-minsn32, -mno-insn32): New options.
255 * doc/c-mips.texi (MIPS Opts): Add -minsn32 and -mno-insn32
256 options.
257 (MIPS assembly options): New node. Document .set insn32 and
258 .set noinsn32.
259 (MIPS-Dependent): List the new node.
260
d1706f38
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2612013-06-25 Nick Clifton <nickc@redhat.com>
262
263 * config/tc-msp430.c (msp430_srcoperand): Do not allow the use of
264 the PC in indirect addressing on 430xv2 parts.
265 (msp430_operands): Add version test to hardware bug encoding
266 restrictions.
267
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RM
2682013-06-24 Roland McGrath <mcgrathr@google.com>
269
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RM
270 * config/tc-arm.c (parse_reg_list): Use skip_past_char for '}',
271 so it skips whitespace before it.
272 (s_arm_unwind_save_mmxwr, s_arm_unwind_save_mmxwcg): Likewise.
273
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274 * config/tc-arm.c (arm_symbol_chars): Include '{' and '}'.
275 (arm_reg_parse_multi): Skip whitespace first.
276 (parse_reg_list): Likewise.
277 (parse_vfp_reg_list): Likewise.
278 (s_arm_unwind_save_mmxwcg): Likewise.
279
24382199
NC
2802013-06-24 Nick Clifton <nickc@redhat.com>
281
282 PR gas/15623
283 * config/tc-arm.c (do_t_smc): Mark as ending an IT block.
284
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2852013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
286
287 * config/tc-mips.c (mips_ip): Fix swapped bit numbers in comments.
288
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2892013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
290
291 * config/tc-mips.c: Assert that offsetT and valueT are at least
292 8 bytes in size.
293 (GPR_SMIN, GPR_SMAX): New macros.
294 (macro, mips_ip): Remove code for 4-byte valueT and offsetT.
295
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2962013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
297
298 * config/tc-mips.c: Remove OBJ_ELF, OBJ_MAYBE_ELF and IS_ELF
299 conditions. Remove any code deselected by them.
300 (s_mips_frame, s_mips_mask): Handle ECOFF_DEBUGGING case first.
301
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3022013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
303
304 * NEWS: Note removal of ECOFF support.
305 * doc/as.texinfo (--emulation): Update for the removal of MIPS ECOFF.
306 * Makefile.am (TARG_ENV_HFILES): Remove config/te-lnews.h.
307 (MULTI_CFILES): Remove config/e-mipsecoff.c.
308 * Makefile.in: Regenerate.
309 * configure.in: Remove MIPS ECOFF references.
310 (mips-sony-bsd*, mips-*-bsd*, mips-*-lnews*-ecoff, mips-*-*-ecoff):
311 Delete cases.
312 (mips-*-irix5*-*, mips*-*-linux*-*, mips*-*-freebsd*)
313 (mips*-*-kfreebsd*-gnu, mips-*-*-elf): Fold into...
314 (mips-*-*): ...this single case.
315 (mipsbecoff, mipslecoff, mipsecoff): Remove emulations. Expect
316 MIPS emulations to be e-mipself*.
317 * configure: Regenerate.
318 * configure.tgt (mips-sony-bsd*, mips-*-ultrix*, mips-*-osf*)
319 (mips-*-ecoff*, mips-*-pe*, mips-*-irix*, ips-*-lnews*, mips-*-riscos*)
320 (mips-*-sysv*): Remove coff and ecoff cases.
321 * as.c (mipsbecoff, mipslecoff, mipsecoff): Remove.
322 * ecoff.c: Remove reference to MIPS ECOFF.
323 * config/e-mipsecoff.c, config/te-lnews.h: Delete files.
324 * config/tc-mips.c (ECOFF_LITTLE_FORMAT): Delete.
325 (RDATA_SECTION_NAME, mips_target_form): Remove COFF and ECOFF cases.
326 (mips_hi_fixup): Tweak comment.
327 (append_insn): Require a howto.
328 (mips_after_parse_args): Remove OBJ_MAYBE_ECOFF code.
329
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3302013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
331
332 * doc/as.texinfo: Use MIPS rather than @sc{mips} throughout.
333 Use "CPU" instead of "cpu".
334 * doc/c-mips.texi: Likewise.
335 (MIPS Opts): Rename to MIPS Options.
336 (MIPS option stack): Rename to MIPS Option Stack.
337 (MIPS ASE instruction generation overrides): Rename to
338 MIPS ASE Instruction Generation Overrides (for now).
339 (MIPS floating-point): Rename to MIPS Floating-Point.
340
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3412013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
342
343 * doc/c-mips.texi (MIPS Macros): New section.
344 (MIPS Object): Replace with...
345 (MIPS Small Data): ...this new section.
346
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3472013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
348
349 * doc/c-mips.texi (MIPS symbol sizes): Move section further up file.
350 Capitalize name. Use @kindex instead of @cindex for .set entries.
351
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3522013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
353
354 * doc/c-mips.texi (MIPS Stabs): Remove section.
355
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3562013-06-20 Richard Sandiford <rdsandiford@googlemail.com>
357
358 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS, ISA_SUPPORTS_DSP_ASE)
359 (ISA_SUPPORTS_DSP64_ASE, ISA_SUPPORTS_DSPR2_ASE, ISA_SUPPORTS_EVA_ASE)
360 (ISA_SUPPORTS_MT_ASE, ISA_SUPPORTS_MCU_ASE, ISA_SUPPORTS_VIRT_ASE)
361 (ISA_SUPPORTS_VIRT64_ASE): Delete.
362 (mips_ase): New structure.
363 (mips_ases): New table.
364 (FP64_ASES): New macro.
365 (mips_ase_groups): New array.
366 (mips_isa_rev, mips_ase_mask, mips_check_isa_supports_ase)
367 (mips_check_isa_supports_ases, mips_set_ase, mips_lookup_ase): New
368 functions.
369 (is_opcode_valid): Use mips_ases to get the 64-bit ASE flags.
370 (md_parse_option): Use mips_ases and mips_set_ase instead of
371 separate case statements for each ASE option.
372 (mips_after_parse_args): Use FP64_ASES. Use
373 mips_check_isa_supports_ases to check the ASEs against
374 other options.
375 (s_mipsset): Use mips_ases and mips_set_ase instead of
376 separate if statements for each ASE option. Use
377 mips_check_isa_supports_ases, even when a non-ASE option
378 is specified.
379
63a4bc21
KT
3802013-06-19 Greta Yorsh <Greta.Yorsh@arm.com>
381
382 * config/tc-arm.c (arm_cpus): Add support for Cortex-A12.
383
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3842013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
385
386 * config/tc-mips.c (md_shortopts, options, md_longopts)
387 (md_longopts_size): Move earlier in file.
388
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3892013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
390
391 * config/tc-mips.c (mips_set_options): Replace separate "ase_*" fields
392 with a single "ase" bitmask.
393 (mips_opts): Update accordingly.
394 (file_ase, file_ase_explicit): New variables.
395 (file_ase_mips3d, file_ase_mdmx, file_ase_smartmips, file_ase_dsp)
396 (file_ase_dspr2, file_ase_eva, file_ase_mt, file_ase_virt): Delete.
397 (ISA_HAS_ROR): Adjust for mips_set_options change.
398 (is_opcode_valid): Take the base ase mask directly from mips_opts.
399 (mips_ip): Adjust for mips_set_options change.
400 (md_parse_option): Likewise. Update file_ase_explicit.
401 (mips_after_parse_args): Adjust for mips_set_options change.
402 Use bitmask operations to select the default ASEs. Set file_ase
403 rather than individual per-ASE variables.
404 (s_mipsset): Adjust for mips_set_options change.
405 (mips_elf_final_processing): Test file_ase rather than
406 file_ase_mdmx. Remove commented-out code.
407
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4082013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
409
410 * config/tc-mips.c (mips_cpu_info): Add an "ase" field.
411 (MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, MIPS_CPU_ASE_MT)
412 (MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX, MIPS_CPU_ASE_DSPR2)
413 (MIPS_CPU_ASE_MCU, MIPS_CPU_ASE_VIRT, MIPS_CPU_ASE_EVA): Delete.
414 (mips_after_parse_args): Use the new "ase" field to choose
415 the default ASEs.
416 (mips_cpu_info_table): Move ASEs from the "flags" field to the
417 "ase" field.
418
e83a675f
RE
4192013-06-18 Richard Earnshaw <rearnsha@arm.com>
420
421 * config/tc-arm.c (symbol_preemptible): New function.
422 (relax_branch): Use it.
423
7f3c4072
CM
4242013-06-17 Catherine Moore <clm@codesourcery.com>
425 Maciej W. Rozycki <macro@codesourcery.com>
426 Chao-Ying Fu <fu@mips.com>
427
428 * config/tc-mips.c (mips_set_options): Add ase_eva.
429 (mips_set_options mips_opts): Add ase_eva.
430 (file_ase_eva): Declare.
431 (ISA_SUPPORTS_EVA_ASE): Define.
432 (IS_SEXT_9BIT_NUM): Define.
433 (MIPS_CPU_ASE_EVA): Define.
434 (is_opcode_valid): Add support for ase_eva.
435 (macro_build): Likewise.
436 (macro): Likewise.
437 (validate_mips_insn): Likewise.
438 (validate_micromips_insn): Likewise.
439 (mips_ip): Likewise.
440 (options): Add OPTION_EVA and OPTION_NO_EVA.
441 (md_longopts): Add -meva and -mno-eva.
442 (md_parse_option): Process new options.
443 (mips_after_parse_args): Check for valid EVA combinations.
444 (s_mipsset): Likewise.
445
e410add4
RS
4462013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
447
448 * dwarf2dbg.h (dwarf2_move_insn): Declare.
449 * dwarf2dbg.c (line_subseg): Add pmove_tail.
450 (get_line_subseg): Add create_p argument. Initialize pmove_tail.
451 (dwarf2_gen_line_info_1): Update call accordingly.
452 (dwarf2_move_insn): New function.
453 * config/tc-mips.c (append_insn): Use dwarf2_move_insn.
454
6a50d470
RS
4552013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
456
457 Revert:
458
459 2011-09-05 Richard Sandiford <rdsandiford@googlemail.com>
460
461 PR gas/13024
462 * dwarf2dbg.c (pending_lines, pending_lines_tail): New variables.
463 (dwarf2_gen_line_info_1): Delete.
464 (dwarf2_push_line, dwarf2_flush_pending_lines): New functions.
465 (dwarf2_gen_line_info, dwarf2_emit_label): Use them.
466 (dwarf2_consume_line_info): Call dwarf2_flush_pending_lines.
467 (dwarf2_directive_loc): Push previous .locs instead of generating
468 them immediately.
469
f122319e
CF
4702013-06-13 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
471
472 * config/tc-mips.c (ISA_SUPPORTS_VIRT_ASE): Support micromips.
473 (ISA_SUPPORTS_VIRT64_ASE): Support 64-bit micromips.
474
909c7f9c
NC
4752013-06-13 Nick Clifton <nickc@redhat.com>
476
477 PR gas/15602
478 * config/tc-m68k.h (TC_CHECK_ADJUSTED_BROKEN_DOT_WORD): Define.
479 * config/tc-m68k.c (tc_m68k_check_adjusted_broken_word): New
480 function. Generates an error if the adjusted offset is out of a
481 16-bit range.
482
5d5755a7
SL
4832013-06-12 Sandra Loosemore <sandra@codesourcery.com>
484
485 * config/tc-nios2.c (md_apply_fix): Mask constant
486 BFD_RELOC_NIOS2_HIADJ16 value to 16 bits.
487
3bf0dbfb
MR
4882013-06-10 Maciej W. Rozycki <macro@codesourcery.com>
489
490 * config/tc-mips.c (append_insn): Don't do branch relaxation for
491 MIPS-3D instructions either.
492 (md_convert_frag): Update the COPx branch mask accordingly.
493
494 * config/tc-mips.c (md_show_usage): Document --[no-]relax-branch
495 option.
496 * doc/as.texinfo (Overview): Add --relax-branch and
497 --no-relax-branch.
498 * doc/c-mips.texi (MIPS Opts): Document --relax-branch and
499 --no-relax-branch.
500
9daf7bab
SL
5012013-06-09 Sandra Loosemore <sandra@codesourcery.com>
502
503 * config/tc-nios2.c (nios2_parse_args): Allow trap argument to
504 omitted.
505
d301a56b
RS
5062013-06-08 Catherine Moore <clm@codesourcery.com>
507
508 * config/tc-mips.c (is_opcode_valid): Build ASE mask.
509 (is_opcode_valid_16): Pass ase value to opcode_is_member.
510 (append_insn): Change INSN_xxxx to ASE_xxxx.
511
7bab7634
DC
5122013-06-01 George Thomas <george.thomas@atmel.com>
513
514 * gas/config/tc-avr.c: Change ISA for devices with USB support to
515 AVR_ISA_XMEGAU
516
f60cf82f
L
5172013-05-31 H.J. Lu <hongjiu.lu@intel.com>
518
519 * config/tc-i386.c (md_begin): Don't align text/data/bss sections
520 for ELF.
521
a3f278e2
CM
5222013-05-31 Paul Brook <paul@codesourcery.com>
523
524 gas/
525 * config/tc-mips.c (s_ehword): New.
526
067ec077
CM
5272013-05-30 Paul Brook <paul@codesourcery.com>
528
529 * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH.
530
d6101ac2
MR
5312013-05-29 Maciej W. Rozycki <macro@codesourcery.com>
532
533 * write.c (resolve_reloc_expr_symbols): On REL targets don't
534 convert relocs who have no relocatable field either. Rephrase
535 the conditional so that the PC-relative check is only applied
536 for REL targets.
537
f19ccbda
MR
5382013-05-28 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
539
540 * config/tc-mips.c (macro) <ld>: Don't use $zero for address
541 calculation.
542
418009c2
YZ
5432013-05-28 Yufeng Zhang <yufeng.zhang@arm.com>
544
545 * config/tc-aarch64.c (reloc_table): Update to use
477330fc 546 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of
418009c2
YZ
547 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE.
548 (md_apply_fix): Likewise.
549 (aarch64_force_relocation): Likewise.
550
0a8897c7
KT
5512013-05-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
552
553 * config/tc-arm.c (it_fsm_post_encode): Improve
554 warning messages about deprecated IT block formats.
555
89d2a2a3
MS
5562013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com>
557
558 * config/tc-aarch64.c (md_apply_fix): Move value range checking
559 inside fx_done condition.
560
c77c0862
RS
5612013-05-22 Jürgen Urban <JuergenUrban@gmx.de>
562
563 * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB.
564
c0637f3a
PB
5652013-05-20 Peter Bergner <bergner@vnet.ibm.com>
566
567 * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error
568 and clean up warning when using PRINT_OPCODE_TABLE.
569
5656a981
AM
5702013-05-20 Alan Modra <amodra@gmail.com>
571
572 * config/tc-ppc.c (md_apply_fix): Hoist code common to insn
573 and data fixups performing shift/high adjust/sign extension on
574 fieldval. Sink fx_pcrel handling and checks. Use fixP->fx_size
575 when writing data fixups rather than recalculating size.
576
997b26e8
JBG
5772013-05-16 Jan-Benedict Glaw <jbglaw@lug-owl.de>
578
579 * doc/c-msp430.texi: Fix typo.
580
9f6e76f4
TG
5812013-05-16 Tristan Gingold <gingold@adacore.com>
582
583 * config/tc-ppc.c (ppc_is_toc_sym): Symbols of class XMC_TC
584 are also TOC symbols.
585
638d3803
NC
5862013-05-16 Nick Clifton <nickc@redhat.com>
587
588 * config/tc-msp430.c: Make -mmcu recognise more part numbers.
589 Add -mcpu command to specify core type.
997b26e8 590 * doc/c-msp430.texi: Update documentation.
638d3803 591
b015e599
AP
5922013-05-09 Andrew Pinski <apinski@cavium.com>
593
594 * config/tc-mips.c (struct mips_set_options): New ase_virt field.
595 (mips_opts): Update for the new field.
596 (file_ase_virt): New variable.
597 (ISA_SUPPORTS_VIRT_ASE): New macro.
598 (ISA_SUPPORTS_VIRT64_ASE): New macro.
599 (MIPS_CPU_ASE_VIRT): New define.
600 (is_opcode_valid): Handle ase_virt.
601 (macro_build): Handle "+J".
602 (validate_mips_insn): Likewise.
603 (mips_ip): Likewise.
604 (enum options): Add OPTION_VIRT and OPTION_NO_VIRT.
605 (md_longopts): Add mvirt and mnovirt
606 (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT.
607 (mips_after_parse_args): Handle ase_virt field.
608 (s_mipsset): Handle "virt" and "novirt".
609 (mips_elf_final_processing): Add a comment about virt ASE might need
610 a new flag.
611 (md_show_usage): Print out the usage of -mvirt and mno-virt options.
612 * doc/c-mips.texi: Document -mvirt and -mno-virt.
613 Document ".set virt" and ".set novirt".
614
da8094d7
AM
6152013-05-09 Alan Modra <amodra@gmail.com>
616
617 * config/tc-ppc.c (md_apply_fix): Sign extend fieldval under
618 control of operand flag bits.
619
c5f8c205
AM
6202013-05-07 Alan Modra <amodra@gmail.com>
621
622 * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro.
623 (PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise.
624 (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise.
625 (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise.
626 (md_apply_fix): Set fx_no_overflow for assorted relocations.
627 Shift and sign-extend fieldval for use by some VLE reloc
628 operand->insert functions.
629
b47468a6
CM
6302013-05-06 Paul Brook <paul@codesourcery.com>
631 Catherine Moore <clm@codesourcery.com>
632
c5f8c205
AM
633 * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL.
634 (limited_pcrel_reloc_p): Likewise.
b47468a6
CM
635 (md_apply_fix): Likewise.
636 (tc_gen_reloc): Likewise.
637
2de39019
CM
6382013-05-06 Richard Sandiford <rdsandiford@googlemail.com>
639
640 * config/tc-mips.c (limited_pcrel_reloc_p): New function.
641 (mips_fix_adjustable): Adjust pc-relative check to use
642 limited_pc_reloc_p.
643
754e2bb9
RS
6442013-05-02 Richard Sandiford <rdsandiford@googlemail.com>
645
646 * config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries.
647 (s_mips_stab): Do not restrict to stabn only.
648
13761a11
NC
6492013-05-02 Nick Clifton <nickc@redhat.com>
650
651 * config/tc-msp430.c: Add support for the MSP430X architecture.
652 Add code to insert a NOP instruction after any instruction that
653 might change the interrupt state.
654 Add support for the LARGE memory model.
655 Add code to initialise the .MSP430.attributes section.
656 * config/tc-msp430.h: Add support for the MSP430X architecture.
657 * doc/c-msp430.texi: Document the new -mL and -mN command line
658 options.
659 * NEWS: Mention support for the MSP430X architecture.
660
df26367c
MR
6612013-05-01 Maciej W. Rozycki <macro@codesourcery.com>
662
663 * configure.tgt: Replace alpha*-*-linuxecoff* pattern with
664 alpha*-*-linux*ecoff*.
665
f02d8318
CF
6662013-04-30 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
667
668 * config/tc-mips.c (mips_ip): Add sizelo.
669 For "+C", "+G", and "+H", set sizelo and compare against it.
670
b40bf0a2
NC
6712013-04-29 Nick Clifton <nickc@redhat.com>
672
673 * as.c (Options): Add -gdwarf-sections.
674 (parse_args): Likewise.
675 * as.h (flag_dwarf_sections): Declare.
676 * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes.
677 (process_entries): When -gdwarf-sections is enabled generate
678 fragmentary .debug_line sections.
679 (out_debug_line): Set the section for the .debug_line section end
680 symbol.
681 * doc/as.texinfo: Document -gdwarf-sections.
682 * NEWS: Mention -gdwarf-sections.
683
8eeccb77 6842013-04-26 Christian Groessler <chris@groessler.org>
00a3147e
CG
685
686 * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdline
687 according to the target parameter. Don't call s_segm since s_segm
688 calls bfd_set_arch_mach using stdoutput, but stdoutput isn't
689 initialized yet.
690 (md_begin): Call s_segm according to target parameter from command
691 line.
692
49926cd0
AM
6932013-04-25 Alan Modra <amodra@gmail.com>
694
695 * configure.in: Allow little-endian linux.
696 * configure: Regenerate.
697
e3031850
SL
6982013-04-24 Sandra Loosemore <sandra@codesourcery.com>
699
700 * config/tc-nios2.c (nios2_control_register_arg_p): Rename
701 "fstatus" control register to "eccinj".
702
cb948fc0
KT
7032013-04-19 Kai Tietz <ktietz@redhat.com>
704
705 * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin.
706
4455e9ad
JB
7072013-04-15 Julian Brown <julian@codesourcery.com>
708
709 * expr.c (add_to_result, subtract_from_result): Make global.
710 * expr.h (add_to_result, subtract_from_result): Add prototypes.
711 * config/tc-sh.c (sh_optimize_expr): Use add_to_result,
712 subtract_from_result to handle extra bit of precision for .sleb128
713 directive operands.
714
956a6ba3
JB
7152013-04-10 Julian Brown <julian@codesourcery.com>
716
717 * read.c (convert_to_bignum): Add sign parameter. Use it
718 instead of X_unsigned to determine sign of resulting bignum.
719 (emit_expr): Pass extra argument to convert_to_bignum.
720 (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass
721 X_extrabit to convert_to_bignum.
722 (parse_bitfield_cons): Set X_extrabit.
723 * expr.c (make_expr_symbol, expr_build_uconstant, operand):
724 Initialise X_extrabit field as appropriate.
725 (add_to_result): New.
726 (subtract_from_result): New.
727 (expr): Use above.
728 * expr.h (expressionS): Add X_extrabit field.
729
eb9f3f00
JB
7302013-04-10 Jan Beulich <jbeulich@suse.com>
731
732 * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base
733 register being PC when is_t or writeback, and use distinct
734 diagnostic for the latter case.
735
ccb84d65
JB
7362013-04-10 Jan Beulich <jbeulich@suse.com>
737
738 * gas/config/tc-arm.c (parse_operands): Re-write
739 po_barrier_or_imm().
740 (do_barrier): Remove bogus constraint().
741 (do_t_barrier): Remove.
742
4d13caa0
NC
7432013-04-09 Joerg Wunsch <joerg.wunsch@atmel.com>
744
745 * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2,
746 ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2,
747 ATmega2564RFR2
748 * gas/doc/c-avr.texi (-mmcu documentation): Likewise.
749
16d02dc9
JB
7502013-04-09 Jan Beulich <jbeulich@suse.com>
751
752 * gas/config/tc-arm.c (do_vmrs): Accept all control registers.
753 Use local variable Rt in more places.
754 (do_vmsr): Accept all control registers.
755
05ac0ffb
JB
7562013-04-09 Jan Beulich <jbeulich@suse.com>
757
758 * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
759 if there was none specified for moves between scalar and core
760 register.
761
2d51fb74
JB
7622013-04-09 Jan Beulich <jbeulich@suse.com>
763
764 * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the
765 NEON_ALL_LANES case.
766
94dcf8bf
JB
7672013-04-08 Jan Beulich <jbeulich@suse.com>
768
769 * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for
770 PC-relative VSTR.
771
1472d06f
JB
7722013-04-08 Jan Beulich <jbeulich@suse.com>
773
774 * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq
775 entry to sp_fiq.
776
0c76cae8
AM
7772013-04-03 Alan Modra <amodra@gmail.com>
778
779 * doc/as.texinfo: Add support to generate man options for h8300.
780 * doc/c-h8300.texi: Likewise.
781
92eb40d9
RR
7822013-03-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
783
784 * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and
785 Cortex-A57.
786
51dcdd4d
NC
7872013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com>
788
789 PR binutils/15068
790 * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array.
791
c5d685bf
NC
7922013-03-26 Nick Clifton <nickc@redhat.com>
793
9b978282
NC
794 PR gas/15295
795 * listing.c (rebuffer_line): Rewrite to avoid seeking back to the
796 start of the file each time.
797
c5d685bf
NC
798 PR gas/15178
799 * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for
800 FreeBSD targets.
801
9699c833
TG
8022013-03-26 Douglas B Rupp <rupp@gnat.com>
803
804 * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment
805 after fixup.
806
4755303e
WN
8072013-03-21 Will Newton <will.newton@linaro.org>
808
809 * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all
810 pc-relative str instructions in Thumb mode.
811
81f5558e
NC
8122013-03-21 Michael Schewe <michael.schewe@gmx.net>
813
814 * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
815 @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
816 R_H8_DISP32A16.
817 * config/tc-h8300.h: Remove duplicated defines.
818
71863e73
NC
8192013-03-21 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
820
821 PR gas/15282
822 * tc-avr.c (mcu_has_3_byte_pc): New function.
823 (tc_cfi_frame_initial_instructions): Call it to find return
824 address size.
825
795b8e6b
NC
8262013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com>
827
828 PR gas/15095
829 * config/tc-tic6x.c (tic6x_try_encode): Handle
830 tic6x_coding_dreg_(msb|lsb) field coding types and use it to
831 encode register pair numbers when required.
832
ba86b375
WN
8332013-03-15 Will Newton <will.newton@linaro.org>
834
835 * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register
836 in vstr in Thumb mode for pre-ARMv7 cores.
837
9e6f3811
AS
8382013-03-14 Andreas Schwab <schwab@suse.de>
839
840 * doc/c-arc.texi (ARC Directives): Revert last change and use
841 @itemize instead of @table.
842 * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
843
b10bf8c5
NC
8442013-03-14 Nick Clifton <nickc@redhat.com>
845
846 PR gas/15273
847 * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a
848 NULL message, instead just check ARM_CPU_IS_ANY directly.
849
ba724cfc
NC
8502013-03-14 Nick Clifton <nickc@redhat.com>
851
852 PR gas/15212
9e6f3811 853 * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet
ba724cfc
NC
854 for table format.
855 * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
856 to the @item directives.
857 (ARM-Neon-Alignment): Move to correct place in the document.
858 * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
859 formatting.
860 * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
861 @smallexample.
862
531a94fd
SL
8632013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
864
865 * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'
866 case. Add default BAD_CASE to switch.
867
dad60f8e
SL
8682013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
869
870 * config/tc-nios2.c (nios2_assemble_args_ds): New function.
871 (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
872
dd5181d5
KT
8732013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
874
875 * config/tc-arm.c (crc_ext_armv8): New feature set.
876 (UNPRED_REG): New macro.
877 (do_crc32_1): New function.
878 (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
879 do_crc32ch, do_crc32cw): Likewise.
880 (TUEc): New macro.
881 (insns): Add entries for crc32 mnemonics.
882 (arm_extensions): Add entry for crc.
883
8e723a10
CLT
8842013-03-08 Chung-Lin Tang <cltang@codesourcery.com>
885
886 * write.h (struct fix): Add fx_dot_frag field.
887 (dot_frag): Declare.
888 * write.c (dot_frag): New variable.
889 (fix_new_internal): Set fx_dot_frag field with dot_frag.
890 (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
891 * expr.c (expr): Save value of frag_now in dot_frag when setting
892 dot_value.
893 * read.c (emit_expr): Likewise. Delete comments.
894
be05d201
L
8952013-03-07 H.J. Lu <hongjiu.lu@intel.com>
896
897 * config/tc-i386.c (flag_code_names): Removed.
898 (i386_index_check): Rewrote.
899
62b0d0d5
YZ
9002013-03-05 Yufeng Zhang <yufeng.zhang@arm.com>
901
902 * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
903 add comment.
904 (aarch64_double_precision_fmovable): New function.
905 (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
906 function; handle hexadecimal representation of IEEE754 encoding.
907 (parse_operands): Update the call to parse_aarch64_imm_float.
908
165de32a
L
9092013-02-28 H.J. Lu <hongjiu.lu@intel.com>
910
911 * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
912 (check_hle): Updated.
913 (md_assemble): Likewise.
914 (parse_insn): Likewise.
915
d5de92cf
L
9162013-02-28 H.J. Lu <hongjiu.lu@intel.com>
917
918 * config/tc-i386.c (_i386_insn): Add rep_prefix.
9e6f3811 919 (md_assemble): Check if REP prefix is OK.
d5de92cf
L
920 (parse_insn): Remove expecting_string_instruction. Set
921 i.rep_prefix.
922
e60bb1dd
YZ
9232013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
924
925 * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
926
aeebdd9b
YZ
9272013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
928
929 * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
930 for system registers.
931
4107ae22
DD
9322013-02-27 DJ Delorie <dj@redhat.com>
933
934 * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
935 (rl78_op): Handle %code().
936 (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
937 (tc_gen_reloc): Likwise; convert to a computed reloc.
938 (md_apply_fix): Likewise.
939
151fa98f
NC
9402013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
941
942 * config/rl78-parse.y: Fix encoding of DIVWU insn.
943
70a8bc5b 9442013-02-25 Terry Guo <terry.guo@arm.com>
945
946 * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
947 * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
948 list of accepted CPUs.
949
5c111e37
L
9502013-02-19 H.J. Lu <hongjiu.lu@intel.com>
951
952 PR gas/15159
953 * config/tc-i386.c (cpu_arch): Add ".smap".
954
955 * doc/c-i386.texi: Document smap.
956
8a75745d
MR
9572013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
958
959 * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
960 mips_assembling_insn appropriately.
961 (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
962
79850f26
MR
9632013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
964
cf29fc61 965 * config/tc-mips.c (append_insn): Correct indentation, remove
79850f26
MR
966 extraneous braces.
967
4c261dff
NC
9682013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
969
5c111e37 970 * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
4c261dff 971
ea33f281
NC
9722013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
973
974 * configure.tgt: Add nios2-*-rtems*.
975
a1ccaec9
YZ
9762013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
977
978 * config/tc-aarch64.c (md_begin): Change to check if 'name' is
979 NULL.
980
0aa27725
RS
9812013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
982
983 * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
984 (macro): Use it. Assert that trunc.w.s is not used for r5900.
985
da4339ed
NC
9862013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com>
987
988 * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
989 core.
990
36591ba1 9912013-02-06 Sandra Loosemore <sandra@codesourcery.com>
5c111e37 992 Andrew Jenner <andrew@codesourcery.com>
36591ba1
SL
993
994 Based on patches from Altera Corporation.
995
996 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
997 (TARGET_CPU_HFILES): Add config/tc-nios2.h.
998 * Makefile.in: Regenerated.
999 * configure.tgt: Add case for nios2*-linux*.
1000 * config/obj-elf.c: Conditionally include elf/nios2.h.
1001 * config/tc-nios2.c: New file.
1002 * config/tc-nios2.h: New file.
1003 * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
1004 * doc/Makefile.in: Regenerated.
1005 * doc/all.texi: Set NIOSII.
1006 * doc/as.texinfo (Overview): Add Nios II options.
1007 (Machine Dependencies): Include c-nios2.texi.
1008 * doc/c-nios2.texi: New file.
1009 * NEWS: Note Altera Nios II support.
1010
94d4433a
AM
10112013-02-06 Alan Modra <amodra@gmail.com>
1012
1013 PR gas/14255
1014 * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
1015 Don't skip fixups with fx_subsy non-NULL.
1016 * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
1017 with fx_subsy non-NULL.
1018
ace9af6f
L
10192013-02-04 H.J. Lu <hongjiu.lu@intel.com>
1020
1021 * doc/c-metag.texi: Add "@c man" markers.
1022
89d67ed9
AM
10232013-02-04 Alan Modra <amodra@gmail.com>
1024
1025 * write.c (fixup_segment): Return void. Delete seg_reloc_count
1026 related code.
1027 (TC_ADJUST_RELOC_COUNT): Delete.
1028 * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
1029
89072bd6
AM
10302013-02-04 Alan Modra <amodra@gmail.com>
1031
1032 * po/POTFILES.in: Regenerate.
1033
f9b2d544
NC
10342013-01-30 Markos Chandras <markos.chandras@imgtec.com>
1035
1036 * config/tc-metag.c: Make SWAP instruction less permissive with
1037 its operands.
1038
392ca752
DD
10392013-01-29 DJ Delorie <dj@redhat.com>
1040
1041 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
1042 relocs in .word/.etc statements.
1043
427d0db6
RM
10442013-01-29 Roland McGrath <mcgrathr@google.com>
1045
1046 * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
1047 immediate value for 8-bit offset" error so it shows line info.
1048
4faf939a
JM
10492013-01-24 Joseph Myers <joseph@codesourcery.com>
1050
1051 * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
1052 for 64-bit output.
1053
78c8d46c
NC
10542013-01-24 Nick Clifton <nickc@redhat.com>
1055
1056 * config/tc-v850.c: Add support for e3v5 architecture.
1057 * doc/c-v850.texi: Mention new support.
1058
fb5b7503
NC
10592013-01-23 Nick Clifton <nickc@redhat.com>
1060
1061 PR gas/15039
1062 * config/tc-avr.c: Include dwarf2dbg.h.
1063
8ce3d284
L
10642013-01-18 H.J. Lu <hongjiu.lu@intel.com>
1065
1066 * config/tc-i386.c (reloc): Support size relocation only for ELF.
1067 (tc_i386_fix_adjustable): Likewise.
1068 (lex_got): Likewise.
1069 (tc_gen_reloc): Likewise.
1070
f5555712
YZ
10712013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
1072
1073 * config/tc-aarch64.c (output_operand_error_record): Change to output
1074 the out-of-range error message as value-expected message if there is
1075 only one single value in the expected range.
1076 (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
1077 LSL #0 as a programmer-friendly feature.
1078
8fd4256d
L
10792013-01-16 H.J. Lu <hongjiu.lu@intel.com>
1080
1081 * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
1082 (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
1083 BFD_RELOC_64_SIZE relocations.
1084 (lex_got): Support "symbol@SIZE" and don't create GOT symbol
1085 for it.
1086 (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
1087 relocations against local symbols.
1088
a5840dce
AM
10892013-01-16 Alan Modra <amodra@gmail.com>
1090
1091 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
1092 finding some sort of toc syntax error, and break to avoid
1093 compiler uninit warning.
1094
af89796a
L
10952013-01-15 H.J. Lu <hongjiu.lu@intel.com>
1096
1097 PR gas/15019
1098 * config/tc-i386.c (lex_got): Increment length by 1 if the
1099 relocation token is removed.
1100
dd42f060
NC
11012013-01-15 Nick Clifton <nickc@redhat.com>
1102
1103 * config/tc-v850.c (md_assemble): Allow signed values for
1104 V850E_IMMEDIATE.
1105
464e3686
SK
11062013-01-11 Sean Keys <skeys@ipdatasys.com>
1107
1108 * config/tc-xgate.c (md_begin): Fix mistake made when going from
af89796a 1109 git to cvs.
464e3686 1110
5817ffd1
PB
11112013-01-10 Peter Bergner <bergner@vnet.ibm.com>
1112
1113 * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
1114 * doc/c-ppc.texi (PowerPC-Opts): Likewise.
1115 * config/tc-ppc.c (md_show_usage): Likewise.
1116 (ppc_handle_align): Handle power8's group ending nop.
1117
f4b1f6a9
SK
11182013-01-10 Sean Keys <skeys@ipdatasys.com>
1119
1120 * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
af89796a 1121 that the assember exits after the opcodes have been printed.
f4b1f6a9 1122
34bca508
L
11232013-01-10 H.J. Lu <hongjiu.lu@intel.com>
1124
1125 * app.c: Remove trailing white spaces.
1126 * as.c: Likewise.
1127 * as.h: Likewise.
1128 * cond.c: Likewise.
1129 * dw2gencfi.c: Likewise.
1130 * dwarf2dbg.h: Likewise.
1131 * ecoff.c: Likewise.
1132 * input-file.c: Likewise.
1133 * itbl-lex.h: Likewise.
1134 * output-file.c: Likewise.
1135 * read.c: Likewise.
1136 * sb.c: Likewise.
1137 * subsegs.c: Likewise.
1138 * symbols.c: Likewise.
1139 * write.c: Likewise.
1140 * config/tc-i386.c: Likewise.
1141 * doc/Makefile.am: Likewise.
1142 * doc/Makefile.in: Likewise.
1143 * doc/c-aarch64.texi: Likewise.
1144 * doc/c-alpha.texi: Likewise.
1145 * doc/c-arc.texi: Likewise.
1146 * doc/c-arm.texi: Likewise.
1147 * doc/c-avr.texi: Likewise.
1148 * doc/c-bfin.texi: Likewise.
1149 * doc/c-cr16.texi: Likewise.
1150 * doc/c-d10v.texi: Likewise.
1151 * doc/c-d30v.texi: Likewise.
1152 * doc/c-h8300.texi: Likewise.
1153 * doc/c-hppa.texi: Likewise.
1154 * doc/c-i370.texi: Likewise.
1155 * doc/c-i386.texi: Likewise.
1156 * doc/c-i860.texi: Likewise.
1157 * doc/c-m32c.texi: Likewise.
1158 * doc/c-m32r.texi: Likewise.
1159 * doc/c-m68hc11.texi: Likewise.
1160 * doc/c-m68k.texi: Likewise.
1161 * doc/c-microblaze.texi: Likewise.
1162 * doc/c-mips.texi: Likewise.
1163 * doc/c-msp430.texi: Likewise.
1164 * doc/c-mt.texi: Likewise.
1165 * doc/c-s390.texi: Likewise.
1166 * doc/c-score.texi: Likewise.
1167 * doc/c-sh.texi: Likewise.
1168 * doc/c-sh64.texi: Likewise.
1169 * doc/c-tic54x.texi: Likewise.
1170 * doc/c-tic6x.texi: Likewise.
1171 * doc/c-v850.texi: Likewise.
1172 * doc/c-xc16x.texi: Likewise.
1173 * doc/c-xgate.texi: Likewise.
1174 * doc/c-xtensa.texi: Likewise.
1175 * doc/c-z80.texi: Likewise.
1176 * doc/internals.texi: Likewise.
1177
4c665b71
RM
11782013-01-10 Roland McGrath <mcgrathr@google.com>
1179
1180 * hash.c (hash_new_sized): Make it global.
1181 * hash.h: Declare it.
1182 * macro.c (define_macro): Use hash_new_sized instead of hash_new,
1183 pass a small size.
1184
a3c62988
NC
11852013-01-10 Will Newton <will.newton@imgtec.com>
1186
1187 * Makefile.am: Add Meta.
1188 * Makefile.in: Regenerate.
1189 * config/tc-metag.c: New file.
1190 * config/tc-metag.h: New file.
1191 * configure.tgt: Add Meta.
1192 * doc/Makefile.am: Add Meta.
1193 * doc/Makefile.in: Regenerate.
1194 * doc/all.texi: Add Meta.
1195 * doc/as.texiinfo: Document Meta options.
1196 * doc/c-metag.texi: New file.
1197
b37df7c4
SE
11982013-01-09 Steve Ellcey <sellcey@mips.com>
1199
1200 * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
1201 calls.
1202 * config/tc-mips.c (internalError): Remove, replace with abort.
1203
a3251895
YZ
12042013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
1205
1206 * config/tc-aarch64.c (parse_operands): Change to compare the result
1207 of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
1208
8ab8155f
NC
12092013-01-07 Nick Clifton <nickc@redhat.com>
1210
1211 PR gas/14887
1212 * config/tc-arm.c (skip_past_char): Skip whitespace before the
1213 anticipated character.
1214 * config/tc-arm.c (parse_address_main): Delete skip of whitespace
1215 here as it is no longer needed.
1216
a4ac1c42
AS
12172013-01-06 Andreas Schwab <schwab@linux-m68k.org>
1218
1219 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
1220 * doc/c-score.texi (SCORE-Opts): Likewise.
1221 * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
1222
e407c74b
NC
12232013-01-04 Juergen Urban <JuergenUrban@gmx.de>
1224
1225 * config/tc-mips.c: Add support for MIPS r5900.
1226 Add M_LQ_AB and M_SQ_AB to support large values for instructions
1227 lq and sq.
1228 (can_swap_branch_p, get_append_method): Detect some conditional
1229 short loops to fix a bug on the r5900 by NOP in the branch delay
1230 slot.
1231 (M_MUL): Support 3 operands in multu on r5900.
1232 (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
1233 (s_mipsset): Force 32 bit floating point on r5900.
1234 (mips_ip): Check parameter range of instructions mfps and mtps on
1235 r5900.
1236 * configure.in: Detect CPU type when target string contains r5900
1237 (e.g. mips64r5900el-linux-gnu).
1238
62658407
L
12392013-01-02 H.J. Lu <hongjiu.lu@intel.com>
1240
1241 * as.c (parse_args): Update copyright year to 2013.
1242
95830fd1
YZ
12432013-01-02 Yufeng Zhang <yufeng.zhang@arm.com>
1244
1245 * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
1246 and "cortex57".
1247
517bb291 12482013-01-02 Nick Clifton <nickc@redhat.com>
d709e4e6 1249
517bb291
NC
1250 PR gas/14987
1251 * config/tc-arm.c (parse_address_main): Skip whitespace before a
1252 closing bracket.
d709e4e6 1253
517bb291 1254For older changes see ChangeLog-2012
08d56133 1255\f
517bb291 1256Copyright (C) 2013 Free Software Foundation, Inc.
752937aa
NC
1257
1258Copying and distribution of this file, with or without modification,
1259are permitted in any medium without royalty provided the copyright
1260notice and this notice are preserved.
1261
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NC
1262Local Variables:
1263mode: change-log
1264left-margin: 8
1265fill-column: 74
1266version-control: never
1267End: