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* config/tc-msp430.c (msp430_operands): Accept "<foo>.a" as an alias
[thirdparty/binutils-gdb.git] / gas / ChangeLog
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12013-10-08 Nick Clifton <nickc@redhat.com>
2
3 * config/tc-msp430.c (msp430_operands): Accept "<foo>.a" as an alias
4 for "<foo>a". Issue error messages for unrecognised or corrrupt
5 size extensions.
6
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72013-10-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
8
9 * config/tc-arm.c (do_t_mvn_tst): Use narrow form for tst when
10 possible.
11
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122013-09-30 Saravanan Ekanathan <saravanan.ekanathan@amd.com>
13
14 * config/tc-i386.c (cpu_arch): Add CPU_BDVER4_FLAGS.
15 * doc/c-i386.texi: Add -march=bdver4 option.
16
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172013-09-20 Alan Modra <amodra@gmail.com>
18
19 * configure: Regenerate.
20
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212013-09-18 Tristan Gingold <gingold@adacore.com>
22
23 * NEWS: Add marker for 2.24.
24
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252013-09-18 Nick Clifton <nickc@redhat.com>
26
27 * config/tc-msp430.c (OPTION_MOVE_DATA): Define.
28 (move_data): New variable.
29 (md_parse_option): Parse -md.
30 (msp430_section): New function. Catch references to the .bss or
31 .data sections and generate a special symbol for use by the libcrt
32 library.
33 (md_pseudo_table): Intercept .section directives.
34 (md_longopt): Add -md
35 (md_show_usage): Likewise.
36 (msp430_operands): Generate a warning message if a NOP is inserted
37 into the instruction stream.
38 * doc/c-msp430.texi (node MSP430 Options): Document -md option.
39
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402013-09-17 Doug Gilmore <Doug.Gilmore@imgtec.com>
41
42 * config/tc-mips.c (mips_elf_final_processing): Set
ab905915 43 EF_MIPS_FP64 for -mgp32 -mfp64, removing old FIXME.
f1c38003 44
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452013-09-16 Will Newton <will.newton@linaro.org>
46
47 * config/tc-arm.c (do_neon_ld_st_interleave): Add constraint
48 disallowing element size 64 with interleave other than 1.
49
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502013-09-12 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
51
52 * config/tc-mips.c (match_insn): Set error when $31 is used for
53 bltzal* and bgezal*.
54
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552013-09-04 Tristan Gingold <gingold@adacore.com>
56
57 * config/tc-ppc.c (md_apply_fix): Handle defined after use toc
58 symbols.
59
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602013-09-04 Roland McGrath <mcgrathr@google.com>
61
62 PR gas/15914
63 * config/tc-arm.c (T16_32_TAB): Add _udf.
64 (do_t_udf): New function.
65 (insns): Add "udf".
66
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672013-08-23 Sandeep Kumar Singh <Sandeep.Singh2@kpitcummins.com>
68
69 * config/rx-parse.y: Rearrange the components of a bison grammar to issue
70 assembler errors at correct position.
71
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722013-08-23 Yuri Chornoivan <yurchor@ukr.net>
73
74 PR binutils/15834
75 * config/tc-ia64.c: Fix typos.
76 * config/tc-sparc.c: Likewise.
77 * config/tc-z80.c: Likewise.
78 * doc/c-i386.texi: Likewise.
79 * doc/c-m32r.texi: Likewise.
80
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812013-08-23 Will Newton <will.newton@linaro.org>
82
9aff4b7a 83 * config/tc-arm.c: (do_neon_ldx_stx): Add extra constraints
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84 for pre-indexed addressing modes.
85
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862013-08-21 Alan Modra <amodra@gmail.com>
87
88 * symbols.c (fb_label_instance_inc, fb_label_instance): Properly
89 range check label number for use with fb_low_counter array.
90
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912013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
92
93 * config/tc-mips.c (mips_check_isa_supports_ase, reg_lookup)
94 (mips_parse_argument_token, validate_micromips_insn, md_begin)
95 (check_regno, match_float_constant, check_completed_insn, append_insn)
96 (match_insn, match_mips16_insn, match_insns, macro_start)
97 (macro_build_ldst_constoffset, load_register, macro, mips_ip)
98 (mips16_ip, mips_set_option_string, md_parse_option)
99 (mips_after_parse_args, mips_after_parse_args, md_pcrel_from)
100 (md_apply_fix, s_align, s_option, s_mipsset, s_tls_rel_directive)
101 (s_gpword, s_gpdword, s_ehword, s_nan, tc_gen_reloc, md_convert_frag)
102 (s_mips_end, s_mips_ent, s_mips_frame, s_mips_mask, mips_parse_cpu):
103 Start error messages with a lower-case letter. Do not end error
104 messages with a period. Wrap long messages to 80 character-lines.
105 Use "cannot" instead of "can't" and "can not".
106
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1072013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
108
109 * config/tc-mips.c (imm_expr): Expand comment.
110 (set_at, macro, mips16_macro): Expect imm_expr to be O_constant
111 when populated.
112
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1132013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
114
115 * config/tc-mips.c (imm2_expr): Delete.
116 (md_assemble, match_insn, imm2_expr.X_op, mips_ip): Update accordingly.
117
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1182013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
119
120 * config/tc-mips.c (report_bad_range, report_bad_field): Delete.
121 (macro): Remove M_DEXT and M_DINS handling.
122
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1232013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
124
125 * config/tc-mips.c (mips_arg_info): Replace allow_nonconst and
126 lax_max with lax_match.
127 (match_int_operand): Update accordingly. Don't report an error
128 for !lax_match-only cases.
129 (match_insn): Replace more_alts with lax_match and use it to
130 initialize the mips_arg_info field. Add a complete_p parameter.
131 Handle implicit VU0 suffixes here.
132 (match_invalid_for_isa, match_insns, match_mips16_insns): New
133 functions.
134 (mips_ip, mips16_ip): Use them.
135
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1362013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
137
138 * config/tc-mips.c (match_expression): Report uses of registers here.
139 Add a "must be an immediate expression" error. Handle elided offsets
140 here rather than...
141 (match_int_operand): ...here.
142
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1432013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
144
145 * config/tc-mips.c (mips_arg_info): Remove soft_match.
146 (match_out_of_range, match_not_constant): New functions.
147 (match_const_int): Remove fallback parameter and check for soft_match.
148 Use match_not_constant.
149 (match_mapped_int_operand, match_addiusp_operand)
150 (match_perf_reg_operand, match_save_restore_list_operand)
151 (match_mdmx_imm_reg_operand): Update accordingly. Use
152 match_out_of_range and set_insn_error* instead of as_bad.
153 (match_int_operand): Likewise. Use match_not_constant in the
154 !allows_nonconst case.
155 (match_float_constant): Report invalid float constants.
156 (match_insn, match_mips16_insn): Remove soft_match code. Rely on
157 match_float_constant to check for invalid constants. Fail the
158 match if match_const_int or match_float_constant return false.
159 (mips_ip): Update accordingly.
160 (mips16_ip): Likewise. Undo null termination of instruction name
161 once lookup is complete.
162
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1632013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
164
165 * config/tc-mips.c (mips_insn_error_format): New enum.
166 (mips_insn_error): New struct.
167 (insn_error): Change to a mips_insn_error.
168 (clear_insn_error, set_insn_error_format, set_insn_error)
169 (set_insn_error_i, set_insn_error_ss, report_insn_error): New
170 functions.
171 (mips_parse_argument_token, md_assemble, match_insn)
172 (match_mips16_insn): Use them instead of manipulating insn_error
173 directly.
174 (mips_ip, mips16_ip): Likewise. Simplify control flow.
175
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1762013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
177
178 * config/tc-mips.c (normalize_constant_expr): Move further up file.
179 (normalize_address_expr): Likewise.
180 (match_insn, match_mips16_insn): New functions, split out from...
181 (mips_ip, mips16_ip): ...here.
182
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1832013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
184
185 * config/tc-mips.c (operand_reg_mask, match_operand): Handle
186 OP_OPTIONAL_REG.
187 (mips_ip, mips16_ip): Use mips_optional_operand_p to check
188 for optional operands.
189
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1902013-08-16 Alan Modra <amodra@gmail.com>
191
192 * config/tc-ppc.c (ppc_elf_cons): Allow @l and other reloc
193 modifiers generally.
194
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1952013-08-16 Alan Modra <amodra@gmail.com>
196
197 * config/tc-ppc.c (ppc_elf_lcomm): Use subsection 1.
198
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1992013-08-14 David Edelsohn <dje.gcc@gmail.com>
200
201 * config/tc-ppc.c (ppc_comm): Accept optional fourth .lcomm
202 argument as alignment.
203
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2042013-08-09 Nick Clifton <nickc@redhat.com>
205
206 * config/tc-rl78.c (elf_flags): New variable.
207 (enum options): Add OPTION_G10.
208 (md_longopts): Add mg10.
209 (md_parse_option): Parse -mg10.
210 (rl78_elf_final_processing): New function.
211 * config/tc-rl78.c (tc_final_processing): Define.
212 * doc/c-rl78.texi: Document -mg10 option.
213
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2142013-08-06 Jürgen Urban <JuergenUrban@gmx.de>
215
216 * config/tc-mips.c (match_vu0_suffix_operand): Allow single-channel
217 suffixes to be elided too.
218 (mips_lookup_insn): Don't reject INSN2_VU0_CHANNEL_SUFFIX here.
219 (mips_ip): Assume .xyzw if no VU0 suffix is specified. Allow +N
220 to be omitted too.
221
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2222013-08-05 John Tytgat <john@bass-software.com>
223
224 * po/POTFILES.in: Regenerate.
225
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2262013-08-05 Eric Botcazou <ebotcazou@adacore.com>
227 Konrad Eisele <konrad@gaisler.com>
228
229 * config/tc-sparc.c (sparc_arch_types): Add leon.
230 (sparc_arch): Move sparc4 around and add leon.
231 (sparc_target_format): Document -Aleon.
232 * doc/c-sparc.texi: Likewise.
233
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2342013-08-05 Richard Sandiford <rdsandiford@googlemail.com>
235
236 * config/tc-mips.c (mips_lookup_insn): Make length and opend signed.
237
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2382013-08-04 Jürgen Urban <JuergenUrban@gmx.de>
239 Richard Sandiford <rdsandiford@googlemail.com>
240
241 * config/tc-mips.c (MAX_OPERANDS): Bump to 6.
242 (RWARN): Bump to 0x8000000.
243 (RTYPE_VI, RTYPE_VF, RTYPE_R5900_I, RTYPE_R5900_Q, RTYPE_R5900_R)
244 (RTYPE_R5900_ACC): New register types.
245 (RTYPE_MASK): Include them.
246 (R5900_I_NAMES, R5900_Q_NAMES, R5900_R_NAMES, R5900_ACC_NAMES): New
247 macros.
248 (reg_names): Include them.
249 (mips_parse_register_1): New function, split out from...
250 (mips_parse_register): ...here. Add a channels_ptr parameter.
251 Look for VU0 channel suffixes when nonnull.
252 (reg_lookup): Update the call to mips_parse_register.
253 (mips_parse_vu0_channels): New function.
254 (OT_CHANNELS, OT_DOUBLE_CHAR): New mips_operand_token_types.
255 (mips_operand_token): Add a "channels" field to the union.
256 Extend the comment above "ch" to OT_DOUBLE_CHAR.
257 (mips_parse_base_start): Match -- and ++. Handle channel suffixes.
258 (mips_parse_argument_token): Handle channel suffixes here too.
259 (validate_mips_insn): Handle INSN2_VU0_CHANNEL_SUFFIX.
260 Ignore OP_VU0_MATCH_SUFFIX when calculating the used bits.
261 Handle '#' formats.
262 (md_begin): Register $vfN and $vfI registers.
263 (operand_reg_mask): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX.
264 (convert_reg_type): Handle OP_REG_VI, OP_REG_VF, OP_REG_R5900_I,
265 OP_REG_R5900_Q, OP_REG_R5900_R and OP_REG_R5900_ACC.
266 (match_vu0_suffix_operand): New function.
267 (match_operand): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX.
268 (macro): Use "+7" rather than "E" for LDQ2 and STQ2.
269 (mips_lookup_insn): New function.
270 (mips_ip): Use it. Allow "+K" operands to be elided at the end
271 of an instruction. Handle '#' sequences.
272
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2732013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
274
275 * config/tc-mips.c (macro, mips16_macro): Create an array of operand
276 values and use it instead of sreg, treg, xreg, etc.
277
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2782013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
279
280 * config/tc-mips.c (match_int_operand): Use mips_int_operand_min
281 and mips_int_operand_max.
282 (mips16_immed_operand, mips16_immed_operands, MIPS16_NUM_IMMED):
283 Delete.
284 (mips16_immed_operand, mips16_immed_in_range_p): New functions.
285 (mips16_immed, mips16_extended_frag): Use them. Use mips_int_operand
286 instead of mips16_immed_operand.
287
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2882013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
289
290 * config/tc-mips.c (mips16_macro): Don't use move_register.
291 (mips16_ip): Allow macros to use 'p'.
292
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2932013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
294
295 * config/tc-mips.c (MAX_OPERANDS): New macro.
296 (mips_operand_array): New structure.
297 (mips_operands, mips16_operands, micromips_operands): New arrays.
298 (micromips_to_32_reg_b_map, micromips_to_32_reg_c_map)
299 (micromips_to_32_reg_e_map, micromips_to_32_reg_f_map)
300 (micromips_to_32_reg_g_map, micromips_to_32_reg_l_map)
301 (micromips_to_32_reg_q_map): Delete.
302 (insn_operands, insn_opno, insn_extract_operand): New functions.
303 (validate_mips_insn): Take a mips_operand_array as argument and
304 use it to build up a list of operands. Extend to handle INSN_MACRO
305 and MIPS16.
306 (validate_mips16_insn): New function.
307 (validate_micromips_insn): Take a mips_operand_array as argument.
308 Handle INSN_MACRO.
309 (md_begin): Initialize mips_operands, mips16_operands and
310 micromips_operands. Call validate_mips_insn and
311 validate_micromips_insn for macro instructions too.
312 Call validate_mips16_insn for MIPS16 instructions.
313 (insn_read_mask, insn_write_mask, operand_reg_mask, insn_reg_mask):
314 New functions.
315 (gpr_read_mask, gpr_write_mask, fpr_read_mask, fpr_write_mask): Use
316 them. Handle INSN_UDI.
317 (get_append_method): Use gpr_read_mask.
318
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3192013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
320
321 * config/tc-mips.c (compact_branch_p, uncond_branch_p): Use the same
322 flags for MIPS16 and non-MIPS16 instructions.
323 (gpr_mod_mask): Move the INSN2_MOD_SP case outside the micromips block.
324 (gpr_read_mask): Use INSN2_READ_GPR_31 for MIPS16 instructions too.
325 (gpr_write_mask): Remove MIPS16_INSN_WRITE_SP handling.
326 (can_swap_branch_p, get_append_method): Use the same flags for MIPS16
327 and non-MIPS16 instructions. Fix formatting.
328
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3292013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
330
331 * config/tc-mips.c (reg_needs_delay): Move later in file.
332 Use gpr_write_mask.
333 (insns_between): Use gpr_read_mask instead of EXTRACT_OPERAND.
334
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3352013-07-26 Sergey Guriev <sergey.s.guriev@intel.com>
336 Alexander Ivchenko <alexander.ivchenko@intel.com>
337 Maxim Kuznetsov <maxim.kuznetsov@intel.com>
338 Sergey Lega <sergey.s.lega@intel.com>
339 Anna Tikhonova <anna.tikhonova@intel.com>
340 Ilya Tocar <ilya.tocar@intel.com>
341 Andrey Turetskiy <andrey.turetskiy@intel.com>
342 Ilya Verbin <ilya.verbin@intel.com>
343 Kirill Yukhin <kirill.yukhin@intel.com>
344 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
345
346 * config/tc-i386-intel.c (O_zmmword_ptr): New.
347 (i386_types): Add zmmword.
348 (i386_intel_simplify_register): Allow regzmm.
349 (i386_intel_simplify): Handle zmmwords.
350 (i386_intel_operand): Handle RC/SAE, vector operations and
351 zmmwords.
352 * config/tc-i386.c (ZMMWORD_MNEM_SUFFIX): New.
353 (struct RC_Operation): New.
354 (struct Mask_Operation): New.
355 (struct Broadcast_Operation): New.
356 (vex_prefix): Size of bytes increased to 4 to support EVEX
357 encoding.
358 (enum i386_error): Add new error codes: unsupported_broadcast,
359 broadcast_not_on_src_operand, broadcast_needed,
360 unsupported_masking, mask_not_on_destination, no_default_mask,
361 unsupported_rc_sae, rc_sae_operand_not_last_imm,
362 invalid_register_operand, try_vector_disp8.
363 (struct _i386_insn): Add new fields vrex, need_vrex, mask,
364 rounding, broadcast, memshift.
365 (struct RC_name): New.
366 (RC_NamesTable): New.
367 (evexlig): New.
368 (evexwig): New.
369 (extra_symbol_chars): Add '{'.
370 (cpu_arch): Add AVX512F, AVX512CD, AVX512ER and AVX512PF.
371 (i386_operand_type): Add regzmm, regmask and vec_disp8.
372 (match_mem_size): Handle zmmwords.
373 (operand_type_match): Handle zmm-registers.
374 (mode_from_disp_size): Handle vec_disp8.
375 (fits_in_vec_disp8): New.
376 (md_begin): Handle {} properly.
377 (type_names): Add "rZMM", "Mask reg" and "Vector d8".
378 (build_vex_prefix): Handle vrex.
379 (build_evex_prefix): New.
380 (process_immext): Adjust to properly handle EVEX.
381 (md_assemble): Add EVEX encoding support.
382 (swap_2_operands): Correctly handle operands with masking,
383 broadcasting or RC/SAE.
384 (check_VecOperands): Support EVEX features.
385 (VEX_check_operands): Properly handle 16 upper [xyz]mm registers.
386 (match_template): Support regzmm and handle new error codes.
387 (process_suffix): Handle zmmwords and zmm-registers.
388 (check_byte_reg): Extend to zmm-registers.
389 (process_operands): Extend to zmm-registers.
390 (build_modrm_byte): Handle EVEX.
391 (output_insn): Adjust to properly handle EVEX case.
392 (disp_size): Handle vec_disp8.
393 (output_disp): Support compressed disp8*N evex feature.
394 (output_imm): Handle RC/SAE immediates properly.
395 (check_VecOperations): New.
396 (i386_immediate): Handle EVEX features.
397 (i386_index_check): Handle zmmwords and zmm-registers.
398 (RC_SAE_immediate): New.
399 (i386_att_operand): Handle EVEX features.
400 (parse_real_register): Add a check for ZMM/Mask registers.
401 (OPTION_MEVEXLIG): New.
402 (OPTION_MEVEXWIG): New.
403 (md_longopts): Add mevexlig and mevexwig.
404 (md_parse_option): Handle mevexlig and mevexwig options.
405 (md_show_usage): Add description for mevexlig and mevexwig.
406 * doc/c-i386.texi: Document avx512f/.avx512f, avx512cd/.avx512cd,
407 avx512er/.avx512er, avx512pf/.avx512pf, mevexlig and mevexwig.
408
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4092013-07-25 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
410
411 * config/tc-i386.c (cpu_arch): Add .sha.
412 * doc/c-i386.texi: Document sha/.sha.
413
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4142013-07-24 Anna Tikhonova <anna.tikhonova@intel.com>
415 Kirill Yukhin <kirill.yukhin@intel.com>
416 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
417
418 * config/tc-i386.c (BND_PREFIX): New.
419 (struct _i386_insn): Add new field bnd_prefix.
420 (add_bnd_prefix): New.
421 (cpu_arch): Add MPX.
422 (i386_operand_type): Add regbnd.
423 (md_assemble): Handle BND prefixes.
424 (parse_insn): Likewise.
425 (output_branch): Likewise.
426 (output_jump): Likewise.
427 (build_modrm_byte): Handle regbnd.
428 (OPTION_MADD_BND_PREFIX): New.
429 (md_longopts): Add entry for 'madd-bnd-prefix'.
430 (md_parse_option): Handle madd-bnd-prefix option.
431 (md_show_usage): Add description for madd-bnd-prefix
432 option.
433 * doc/c-i386.texi: Document mpx/.mpx and -madd-bnd-prefix.
434
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4352013-07-24 Tristan Gingold <gingold@adacore.com>
436
437 * config/tc-ppc.c (md_apply_fix): Adjust BFD_RELOC_PPC_B16 on
438 xcoff targets.
439
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4402013-07-24 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
441
442 * config/tc-s390.c (s390_machine): Don't force the .machine
443 argument to lower case.
444
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4452013-07-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
446
447 * config/tc-arm.c (s_arm_arch_extension): Improve error message
448 for invalid extension.
449
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4502013-07-19 Yufeng Zhang <yufeng.zhang@arm.com>
451
452 * config/tc-aarch64.c (enum aarch64_abi_type): New enumeration tag.
453 (AARCH64_ABI_LP64, AARCH64_ABI_ILP32): New enumerators.
454 (aarch64_abi): New variable.
455 (ilp32_p): Change to be a macro.
456 (aarch64_opts): Remove the support for option -milp32 and -mlp64.
457 (struct aarch64_option_abi_value_table): New struct.
458 (aarch64_abis): New table.
459 (aarch64_parse_abi): New function.
460 (aarch64_long_opts): Add entry for -mabi=.
461 * doc/as.texinfo (Target AArch64 options): Document -mabi.
462 * doc/c-aarch64.texi: Likewise.
463
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4642013-07-18 Jim Thomas <thomas@cfht.hawaii.edu>
465
466 * config/tc-i386-intel.c (i386_intel_operand): Fixed signed vs
467 unsigned comparison.
468
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NC
4692013-07-18 Sandeep Kumar Singh <Sandeep.Singh2@kpitcummins.com>
470
cbe02d4f 471 * config/rx-defs.h: Add macros for RX100, RX200, RX600, and
f0c00282 472 RX610.
cbe02d4f 473 * config/rx-parse.y: (rx_check_float_support): Add function to
f0c00282
NC
474 check floating point operation support for target RX100 and
475 RX200.
cbe02d4f
AM
476 * config/tc-rx.c: Add CPU options RX100, RX200, RX600, and RX610.
477 * doc/c-rx.texi: Add -mcpu option to recognize macros for RX100,
478 RX200, RX600, and RX610
f0c00282 479
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NC
4802013-07-18 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
481
482 * config/tc-avr.c (md_show_usage): Add avrxmega2 to help text
483
8be59acb
NC
4842013-07-18 Vishnu K.S <vishnu.k_s@atmel.com>
485
486 * config/tc-avr.c: Make ata6289's ISA to AVR_ISA_AVR4.
487 * doc/c-avr.texi: Likewise.
488
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RS
4892013-07-15 Richard Sandiford <rdsandiford@googlemail.com>
490
491 * config/tc-mips.c (match_save_restore_list_operand): Avoid -Wformat
492 error with older GCCs.
493 (mips16_macro_build): Dereference args.
494
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RS
4952013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
496
497 * config/tc-mips.c (mips_prefer_vec_regno, mips_parse_register):
498 New functions, split out from...
499 (reg_lookup): ...here. Remove itbl support.
500 (reglist_lookup): Delete.
501 (mips_operand_token_type): New enum.
502 (mips_operand_token): New structure.
503 (mips_operand_tokens): New variable.
504 (mips_add_token, mips_parse_base_start, mips_parse_argument_token)
505 (mips_parse_arguments): New functions.
506 (md_begin): Initialize mips_operand_tokens.
507 (mips_arg_info): Add a token field. Remove optional_reg field.
508 (match_char, match_expression): New functions.
509 (match_const_int): Use match_expression. Remove "s" argument
510 and return a boolean result. Remove O_register handling.
511 (match_regno, match_reg, match_reg_range): New functions.
512 (match_int_operand, match_mapped_int_operand, match_msb_operand)
513 (match_reg_operand, match_reg_pair_operand, match_perf_reg_operand)
514 (match_addiusp_operand, match_clo_clz_dest_operand)
515 (match_lwm_swm_list_operand, match_entry_exit_operand)
516 (match_save_restore_list_operand, match_mdmx_imm_reg_operand)
517 (match_tied_reg_operand): Remove "s" argument and return a boolean
518 result. Match tokens rather than text. Update calls to
519 match_const_int. Rely on match_regno to call check_regno.
520 (match_pcrel_operand, match_pc_operand): Replace "s" argument with
521 "arg" argument. Return a boolean result.
522 (parse_float_constant): Replace with...
523 (match_float_constant): ...this new function.
524 (match_operand): Remove "s" argument and return a boolean result.
525 Update calls to subfunctions.
526 (mips_ip, mips16_ip): Call mips_parse_arguments. Use match routines
527 rather than string-parsing routines. Update handling of optional
528 registers for token scheme.
529
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5302013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
531
532 * config/tc-mips.c (parse_float_constant): Split out from...
533 (mips_ip): ...here.
534
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RS
5352013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
536
537 * config/tc-mips.c (INSERT_BITS, INSERT_OPERAND, MIPS16_INSERT_OPERAND):
538 Delete.
539
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RS
5402013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
541
542 * config/tc-mips.c (mips32_to_16_reg_map): Delete.
543 (match_entry_exit_operand): New function.
544 (match_save_restore_list_operand): Likewise.
545 (match_operand): Use them.
546 (check_absolute_expr): Delete.
547 (mips16_ip): Rewrite main parsing loop to use mips_operands.
548
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5492013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
550
551 * config/tc-mips.c: Enable functions commented out in previous patch.
552 (SKIP_SPACE_TABS): Move further up file.
553 (mips32_to_micromips_reg_b_map, mips32_to_micromips_reg_c_map)
554 (mips32_to_micromips_reg_d_map, mips32_to_micromips_reg_e_map)
555 (ips32_to_micromips_reg_f_map, mips32_to_micromips_reg_g_map)
556 (mips32_to_micromips_reg_l_map, mips32_to_micromips_reg_m_map)
557 (mips32_to_micromips_reg_q_map, mips32_to_micromips_reg_n_map)
558 (micromips_imm_b_map, micromips_imm_c_map): Delete.
559 (mips_lookup_reg_pair): Delete.
560 (macro): Use report_bad_range and report_bad_field.
561 (mips_immed, expr_const_in_range): Delete.
562 (mips_ip): Rewrite main parsing loop to use new functions.
563
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5642013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
565
566 * config/tc-mips.c (mips_oddfpreg_ok): Move further up file.
567 Change return type to bfd_boolean.
568 (report_bad_range, report_bad_field): New functions.
569 (mips_arg_info): New structure.
570 (match_const_int, convert_reg_type, check_regno, match_int_operand)
571 (match_mapped_int_operand, match_msb_operand, match_reg_operand)
572 (match_reg_pair_operand, match_pcrel_operand, match_perf_reg_operand)
573 (match_addiusp_operand, match_clo_clz_dest_operand)
574 (match_lwm_swm_list_operand, match_mdmx_imm_reg_operand)
575 (match_pc_operand, match_tied_reg_operand, match_operand)
576 (check_completed_insn): New functions, commented out for now.
577
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5782013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
579
580 * config/tc-mips.c (insn_insert_operand): New function.
581 (macro_build, mips16_macro_build): Put null character check
582 in the for loop and convert continues to breaks. Use operand
583 structures to handle constant operands.
584
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5852013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
586
587 * config/tc-mips.c (validate_mips_insn): Move further up file.
588 Add insn_bits and decode_operand arguments. Use the mips_operand
589 fields to work out which bits an operand occupies. Detect double
590 definitions.
591 (validate_micromips_insn): Move further up file. Call into
592 validate_mips_insn.
593
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5942013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
595
596 * config/tc-mips.c (mips16_macro_build): Remove 'Y' case.
597
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5982013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
599
600 * config/tc-mips.c (macro_build): Take an int for "C", "k", "\\"
601 and "~".
602 (macro): Update accordingly.
603
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RS
6042013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
605
606 * config/tc-mips.c (imm_expr, imm2_expr, offset_expr): Tweak commentary.
607 (imm_reloc): Delete.
608 (md_assemble): Remove imm_reloc handling.
609 (mips_ip): Update commentary. Use offset_expr and offset_reloc
610 rather than imm_expr and imm_reloc for 'i', 'j' and 'u'.
611 Use a temporary array rather than imm_reloc when parsing
612 constant expressions. Remove imm_reloc initialization.
613 (mips16_ip): Update commentary. Use offset_expr and offset_reloc
614 for the relaxable field. Use a relax_char variable to track the
615 type of this field. Remove imm_reloc initialization.
616
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6172013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
618
619 * config/tc-mips.c (mips16_ip): Handle "I".
620
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MR
6212013-07-12 Maciej W. Rozycki <macro@codesourcery.com>
622
623 * config/tc-mips.c (mips_flag_nan2008): New variable.
624 (options): Add OPTION_NAN enum value.
625 (md_longopts): Handle it.
626 (md_parse_option): Likewise.
627 (s_nan): New function.
628 (mips_elf_final_processing): Handle EF_MIPS_NAN2008.
629 (md_show_usage): Add -mnan.
630
631 * doc/as.texinfo (Overview): Add -mnan.
632 * doc/c-mips.texi (MIPS Opts): Document -mnan.
633 (MIPS NaN Encodings): New node. Document .nan directive.
634 (MIPS-Dependent): List the new node.
635
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TG
6362013-07-09 Tristan Gingold <gingold@adacore.com>
637
638 * configure.com: Define HAVE_SYS_TYPES_H and HAVE_UNISTD_H
639
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RS
6402013-07-08 Richard Sandiford <rdsandiford@googlemail.com>
641
642 * config/tc-mips.c (mips_ip): Unconditionally parse an expression
643 for 'A' and assume that the constant has been elided if the result
644 is an O_register.
645
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RS
6462013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
647
648 * config/tc-mips.c (gprel16_reloc_p): New function.
649 (macro_read_relocs): Assume BFD_RELOC_LO16 if all relocs are
650 BFD_RELOC_UNUSED.
651 (offset_high_part, small_offset_p): New functions.
652 (nacro): Use them. Remove *_OB and *_DOB cases. For single-
653 register load and store macros, handle the 16-bit offset case first.
654 If a 16-bit offset is not suitable for the instruction we're
655 generating, load it into the temporary register using
656 ADDRESS_ADDI_INSN. Make the M_LI_DD code fall through into the
657 M_L_DAB code once the address has been constructed. For double load
658 and store macros, again handle the 16-bit offset case first.
659 If the second register cannot be accessed from the same high
660 part as the first, load it into AT using ADDRESS_ADDI_INSN.
661 Fix the handling of LD in cases where the first register is the
662 same as the base. Also handle the case where the offset is
663 not 16 bits and the second register cannot be accessed from the
664 same high part as the first. For unaligned loads and stores,
665 fuse the offbits == 12 and old "ab" handling. Apply this handling
666 whenever the second offset needs a different high part from the first.
667 Construct the offset using ADDRESS_ADDI_INSN where possible,
668 for offbits == 16 as well as offbits == 12. Use offset_reloc
669 when constructing the individual loads and stores.
670 (mips_ip): Set up imm_expr, imm2_expr, offset_expr, imm_reloc
671 and offset_reloc before matching against a particular opcode.
672 Handle elided 'A' constants. Allow 'A' constants to use
673 relocation operators.
674
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6752013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
676
677 * config/tc-mips.c (validate_mips_insn): Remove "[" and "]" handling.
678 (mips_ip): Likewise. Do not set is_mdmx for INSN_5400 instructions.
679 Check constraints on the VR5400 RZU.OB, SLL.OB and SRL.OB instructions.
680
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RS
6812013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
682
683 * config/tc-mips.c (mips_ip): Preserve the real bit number for "+p".
684 Require the msb to be <= 31 for "+s". Check that the size is <= 31
685 for both "+s" and "+S".
686
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6872013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
688
689 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn):
690 (mips_ip, mips16_ip): Handle "+i".
691
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6922013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
693
694 * config/tc-mips.c (mips32_to_micromips_reg_h_map): Delete.
695 (micromips_to_32_reg_h_map): Rename to...
696 (micromips_to_32_reg_h_map1): ...this.
697 (micromips_to_32_reg_i_map): Rename to...
698 (micromips_to_32_reg_h_map2): ...this.
699 (mips_lookup_reg_pair): New function.
700 (gpr_write_mask, macro): Adjust after above renaming.
701 (validate_micromips_insn): Remove "mi" handling.
702 (mips_ip): Likewise. Parse both registers in a pair for "mh".
703
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7042013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
705
706 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn)
707 (mips_ip): Remove "+D" and "+T" handling.
708
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AK
7092013-07-05 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
710
711 * config/tc-s390.c (md_gather_operands, md_apply_fix): Support new
712 relocs.
713
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MS
7142013-07-03 Marcus Shawcroft <marcus.shawcroft@arm.com>
715
4aa2c5e2
MS
716 * config/tc-aarch64.c (reloc_table): Merge got_prel19 into got.
717
7182013-07-02 Marcus Shawcroft <marcus.shawcroft@arm.com>
719
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MS
720 * config/tc-aarch64.c (md_apply_fix): Reorder case values.
721 (aarch64_force_relocation): Likewise.
722
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AM
7232013-07-02 Alan Modra <amodra@gmail.com>
724
725 * config/tc-ppc.c (ppc_elf_adjust_symtab): Don't make .TOC. weak.
726
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MR
7272013-06-26 Maciej W. Rozycki <macro@codesourcery.com>
728
729 * doc/as.texinfo (Overview): Remove @samp from MIPS ISA names.
730 * doc/c-mips.texi (MIPS Options): Remove @sc from MIPS ISA names.
731 Replace @sc{mips16} with literal `MIPS16'.
732 (MIPS ISA): Replace @sc{mips3} with literal `MIPS III'.
733
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YZ
7342013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
735
736 * config/tc-aarch64.c (reloc_table): Replace
737 BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with
738 BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to
739 BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and
740 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC.
741 (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC,
742 BFD_RELOC_AARCH64_LD32_GOT_LO12_NC,
743 BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC,
744 BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC,
745 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and
746 BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC.
747 (aarch64_force_relocation): Likewise.
748
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YZ
7492013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
750
751 * config/tc-aarch64.c (ilp32_p): New static variable.
752 (elf64_aarch64_target_format): Return the target according to the
753 value of 'ilp32_p'.
754 (md_begin): Determine 'mach' according to the value of 'ilp32_p'.
755 (aarch64_opts): Add support for options '-milp32' and '-mlp64'.
756 (aarch64_dwarf2_addr_size): New function.
757 * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration.
758 (DWARF2_ADDR_SIZE): New define.
759
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7602013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
761
762 * doc/c-mips.texi: Use ISA instead of @sc{isa}.
763
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7642013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
765
766 * config/tc-mips.c (validate_mips_insn): Use STYPE rather than SHAMT.
767
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MR
7682013-06-25 Maciej W. Rozycki <macro@codesourcery.com>
769
770 * config/tc-mips.c (mips_set_options): Add insn32 member.
771 (mips_opts): Initialize it.
772 (NOP_INSN, NOP_INSN_SIZE): Handle insn32 mode.
773 (options): Add OPTION_INSN32 and OPTION_NO_INSN32 enum values.
774 (md_longopts): Add "minsn32" and "mno-insn32" options.
775 (is_size_valid): Handle insn32 mode.
776 (md_assemble): Pass instruction string down to macro.
777 (brk_fmt): Add second dimension and insn32 mode initializers.
778 (mfhl_fmt): Likewise.
779 (BRK_FMT, MFHL_FMT): Handle insn32 mode.
780 (macro_build) <'c'>: Handle microMIPS 32-bit BREAK encoding.
781 (macro_build_jalr, move_register): Handle insn32 mode.
782 (macro_build_branch_rs): Likewise.
783 (macro): Handle insn32 mode.
784 <M_JRADDIUSP>, <M_JRC>, <M_MOVEP>: New cases.
785 (mips_ip): Handle insn32 mode.
786 (md_parse_option): Handle OPTION_INSN32 and OPTION_NO_INSN32.
787 (s_mipsset): Handle "insn32" and "noinsn32" pseudo-ops.
788 (mips_handle_align): Handle insn32 mode.
789 (md_show_usage): Add -minsn32 and -mno-insn32.
790
791 * doc/as.texinfo (Target MIPS options): Add -minsn32 and
792 -mno-insn32 options.
793 (-minsn32, -mno-insn32): New options.
794 * doc/c-mips.texi (MIPS Opts): Add -minsn32 and -mno-insn32
795 options.
796 (MIPS assembly options): New node. Document .set insn32 and
797 .set noinsn32.
798 (MIPS-Dependent): List the new node.
799
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NC
8002013-06-25 Nick Clifton <nickc@redhat.com>
801
802 * config/tc-msp430.c (msp430_srcoperand): Do not allow the use of
803 the PC in indirect addressing on 430xv2 parts.
804 (msp430_operands): Add version test to hardware bug encoding
805 restrictions.
806
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8072013-06-24 Roland McGrath <mcgrathr@google.com>
808
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RM
809 * config/tc-arm.c (parse_reg_list): Use skip_past_char for '}',
810 so it skips whitespace before it.
811 (s_arm_unwind_save_mmxwr, s_arm_unwind_save_mmxwcg): Likewise.
812
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813 * config/tc-arm.c (arm_symbol_chars): Include '{' and '}'.
814 (arm_reg_parse_multi): Skip whitespace first.
815 (parse_reg_list): Likewise.
816 (parse_vfp_reg_list): Likewise.
817 (s_arm_unwind_save_mmxwcg): Likewise.
818
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NC
8192013-06-24 Nick Clifton <nickc@redhat.com>
820
821 PR gas/15623
822 * config/tc-arm.c (do_t_smc): Mark as ending an IT block.
823
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8242013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
825
826 * config/tc-mips.c (mips_ip): Fix swapped bit numbers in comments.
827
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8282013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
829
830 * config/tc-mips.c: Assert that offsetT and valueT are at least
831 8 bytes in size.
832 (GPR_SMIN, GPR_SMAX): New macros.
833 (macro, mips_ip): Remove code for 4-byte valueT and offsetT.
834
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8352013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
836
837 * config/tc-mips.c: Remove OBJ_ELF, OBJ_MAYBE_ELF and IS_ELF
838 conditions. Remove any code deselected by them.
839 (s_mips_frame, s_mips_mask): Handle ECOFF_DEBUGGING case first.
840
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8412013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
842
843 * NEWS: Note removal of ECOFF support.
844 * doc/as.texinfo (--emulation): Update for the removal of MIPS ECOFF.
845 * Makefile.am (TARG_ENV_HFILES): Remove config/te-lnews.h.
846 (MULTI_CFILES): Remove config/e-mipsecoff.c.
847 * Makefile.in: Regenerate.
848 * configure.in: Remove MIPS ECOFF references.
849 (mips-sony-bsd*, mips-*-bsd*, mips-*-lnews*-ecoff, mips-*-*-ecoff):
850 Delete cases.
851 (mips-*-irix5*-*, mips*-*-linux*-*, mips*-*-freebsd*)
852 (mips*-*-kfreebsd*-gnu, mips-*-*-elf): Fold into...
853 (mips-*-*): ...this single case.
854 (mipsbecoff, mipslecoff, mipsecoff): Remove emulations. Expect
855 MIPS emulations to be e-mipself*.
856 * configure: Regenerate.
857 * configure.tgt (mips-sony-bsd*, mips-*-ultrix*, mips-*-osf*)
858 (mips-*-ecoff*, mips-*-pe*, mips-*-irix*, ips-*-lnews*, mips-*-riscos*)
859 (mips-*-sysv*): Remove coff and ecoff cases.
860 * as.c (mipsbecoff, mipslecoff, mipsecoff): Remove.
861 * ecoff.c: Remove reference to MIPS ECOFF.
862 * config/e-mipsecoff.c, config/te-lnews.h: Delete files.
863 * config/tc-mips.c (ECOFF_LITTLE_FORMAT): Delete.
864 (RDATA_SECTION_NAME, mips_target_form): Remove COFF and ECOFF cases.
865 (mips_hi_fixup): Tweak comment.
866 (append_insn): Require a howto.
867 (mips_after_parse_args): Remove OBJ_MAYBE_ECOFF code.
868
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8692013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
870
871 * doc/as.texinfo: Use MIPS rather than @sc{mips} throughout.
872 Use "CPU" instead of "cpu".
873 * doc/c-mips.texi: Likewise.
874 (MIPS Opts): Rename to MIPS Options.
875 (MIPS option stack): Rename to MIPS Option Stack.
876 (MIPS ASE instruction generation overrides): Rename to
877 MIPS ASE Instruction Generation Overrides (for now).
878 (MIPS floating-point): Rename to MIPS Floating-Point.
879
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8802013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
881
882 * doc/c-mips.texi (MIPS Macros): New section.
883 (MIPS Object): Replace with...
884 (MIPS Small Data): ...this new section.
885
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8862013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
887
888 * doc/c-mips.texi (MIPS symbol sizes): Move section further up file.
889 Capitalize name. Use @kindex instead of @cindex for .set entries.
890
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8912013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
892
893 * doc/c-mips.texi (MIPS Stabs): Remove section.
894
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RS
8952013-06-20 Richard Sandiford <rdsandiford@googlemail.com>
896
897 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS, ISA_SUPPORTS_DSP_ASE)
898 (ISA_SUPPORTS_DSP64_ASE, ISA_SUPPORTS_DSPR2_ASE, ISA_SUPPORTS_EVA_ASE)
899 (ISA_SUPPORTS_MT_ASE, ISA_SUPPORTS_MCU_ASE, ISA_SUPPORTS_VIRT_ASE)
900 (ISA_SUPPORTS_VIRT64_ASE): Delete.
901 (mips_ase): New structure.
902 (mips_ases): New table.
903 (FP64_ASES): New macro.
904 (mips_ase_groups): New array.
905 (mips_isa_rev, mips_ase_mask, mips_check_isa_supports_ase)
906 (mips_check_isa_supports_ases, mips_set_ase, mips_lookup_ase): New
907 functions.
908 (is_opcode_valid): Use mips_ases to get the 64-bit ASE flags.
909 (md_parse_option): Use mips_ases and mips_set_ase instead of
910 separate case statements for each ASE option.
911 (mips_after_parse_args): Use FP64_ASES. Use
912 mips_check_isa_supports_ases to check the ASEs against
913 other options.
914 (s_mipsset): Use mips_ases and mips_set_ase instead of
915 separate if statements for each ASE option. Use
916 mips_check_isa_supports_ases, even when a non-ASE option
917 is specified.
918
63a4bc21
KT
9192013-06-19 Greta Yorsh <Greta.Yorsh@arm.com>
920
921 * config/tc-arm.c (arm_cpus): Add support for Cortex-A12.
922
c31f3936
RS
9232013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
924
925 * config/tc-mips.c (md_shortopts, options, md_longopts)
926 (md_longopts_size): Move earlier in file.
927
846ef2d0
RS
9282013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
929
930 * config/tc-mips.c (mips_set_options): Replace separate "ase_*" fields
931 with a single "ase" bitmask.
932 (mips_opts): Update accordingly.
933 (file_ase, file_ase_explicit): New variables.
934 (file_ase_mips3d, file_ase_mdmx, file_ase_smartmips, file_ase_dsp)
935 (file_ase_dspr2, file_ase_eva, file_ase_mt, file_ase_virt): Delete.
936 (ISA_HAS_ROR): Adjust for mips_set_options change.
937 (is_opcode_valid): Take the base ase mask directly from mips_opts.
938 (mips_ip): Adjust for mips_set_options change.
939 (md_parse_option): Likewise. Update file_ase_explicit.
940 (mips_after_parse_args): Adjust for mips_set_options change.
941 Use bitmask operations to select the default ASEs. Set file_ase
942 rather than individual per-ASE variables.
943 (s_mipsset): Adjust for mips_set_options change.
944 (mips_elf_final_processing): Test file_ase rather than
945 file_ase_mdmx. Remove commented-out code.
946
d16afab6
RS
9472013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
948
949 * config/tc-mips.c (mips_cpu_info): Add an "ase" field.
950 (MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, MIPS_CPU_ASE_MT)
951 (MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX, MIPS_CPU_ASE_DSPR2)
952 (MIPS_CPU_ASE_MCU, MIPS_CPU_ASE_VIRT, MIPS_CPU_ASE_EVA): Delete.
953 (mips_after_parse_args): Use the new "ase" field to choose
954 the default ASEs.
955 (mips_cpu_info_table): Move ASEs from the "flags" field to the
956 "ase" field.
957
e83a675f
RE
9582013-06-18 Richard Earnshaw <rearnsha@arm.com>
959
960 * config/tc-arm.c (symbol_preemptible): New function.
961 (relax_branch): Use it.
962
7f3c4072
CM
9632013-06-17 Catherine Moore <clm@codesourcery.com>
964 Maciej W. Rozycki <macro@codesourcery.com>
965 Chao-Ying Fu <fu@mips.com>
966
967 * config/tc-mips.c (mips_set_options): Add ase_eva.
968 (mips_set_options mips_opts): Add ase_eva.
969 (file_ase_eva): Declare.
970 (ISA_SUPPORTS_EVA_ASE): Define.
971 (IS_SEXT_9BIT_NUM): Define.
972 (MIPS_CPU_ASE_EVA): Define.
973 (is_opcode_valid): Add support for ase_eva.
974 (macro_build): Likewise.
975 (macro): Likewise.
976 (validate_mips_insn): Likewise.
977 (validate_micromips_insn): Likewise.
978 (mips_ip): Likewise.
979 (options): Add OPTION_EVA and OPTION_NO_EVA.
980 (md_longopts): Add -meva and -mno-eva.
981 (md_parse_option): Process new options.
982 (mips_after_parse_args): Check for valid EVA combinations.
983 (s_mipsset): Likewise.
984
e410add4
RS
9852013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
986
987 * dwarf2dbg.h (dwarf2_move_insn): Declare.
988 * dwarf2dbg.c (line_subseg): Add pmove_tail.
989 (get_line_subseg): Add create_p argument. Initialize pmove_tail.
990 (dwarf2_gen_line_info_1): Update call accordingly.
991 (dwarf2_move_insn): New function.
992 * config/tc-mips.c (append_insn): Use dwarf2_move_insn.
993
6a50d470
RS
9942013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
995
996 Revert:
997
998 2011-09-05 Richard Sandiford <rdsandiford@googlemail.com>
999
1000 PR gas/13024
1001 * dwarf2dbg.c (pending_lines, pending_lines_tail): New variables.
1002 (dwarf2_gen_line_info_1): Delete.
1003 (dwarf2_push_line, dwarf2_flush_pending_lines): New functions.
1004 (dwarf2_gen_line_info, dwarf2_emit_label): Use them.
1005 (dwarf2_consume_line_info): Call dwarf2_flush_pending_lines.
1006 (dwarf2_directive_loc): Push previous .locs instead of generating
1007 them immediately.
1008
f122319e
CF
10092013-06-13 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1010
1011 * config/tc-mips.c (ISA_SUPPORTS_VIRT_ASE): Support micromips.
1012 (ISA_SUPPORTS_VIRT64_ASE): Support 64-bit micromips.
1013
909c7f9c
NC
10142013-06-13 Nick Clifton <nickc@redhat.com>
1015
1016 PR gas/15602
1017 * config/tc-m68k.h (TC_CHECK_ADJUSTED_BROKEN_DOT_WORD): Define.
1018 * config/tc-m68k.c (tc_m68k_check_adjusted_broken_word): New
1019 function. Generates an error if the adjusted offset is out of a
1020 16-bit range.
1021
5d5755a7
SL
10222013-06-12 Sandra Loosemore <sandra@codesourcery.com>
1023
1024 * config/tc-nios2.c (md_apply_fix): Mask constant
1025 BFD_RELOC_NIOS2_HIADJ16 value to 16 bits.
1026
3bf0dbfb
MR
10272013-06-10 Maciej W. Rozycki <macro@codesourcery.com>
1028
1029 * config/tc-mips.c (append_insn): Don't do branch relaxation for
1030 MIPS-3D instructions either.
1031 (md_convert_frag): Update the COPx branch mask accordingly.
1032
1033 * config/tc-mips.c (md_show_usage): Document --[no-]relax-branch
1034 option.
1035 * doc/as.texinfo (Overview): Add --relax-branch and
1036 --no-relax-branch.
1037 * doc/c-mips.texi (MIPS Opts): Document --relax-branch and
1038 --no-relax-branch.
1039
9daf7bab
SL
10402013-06-09 Sandra Loosemore <sandra@codesourcery.com>
1041
1042 * config/tc-nios2.c (nios2_parse_args): Allow trap argument to
1043 omitted.
1044
d301a56b
RS
10452013-06-08 Catherine Moore <clm@codesourcery.com>
1046
1047 * config/tc-mips.c (is_opcode_valid): Build ASE mask.
1048 (is_opcode_valid_16): Pass ase value to opcode_is_member.
1049 (append_insn): Change INSN_xxxx to ASE_xxxx.
1050
7bab7634
DC
10512013-06-01 George Thomas <george.thomas@atmel.com>
1052
cbe02d4f 1053 * gas/config/tc-avr.c: Change ISA for devices with USB support to
7bab7634
DC
1054 AVR_ISA_XMEGAU
1055
f60cf82f
L
10562013-05-31 H.J. Lu <hongjiu.lu@intel.com>
1057
1058 * config/tc-i386.c (md_begin): Don't align text/data/bss sections
1059 for ELF.
1060
a3f278e2
CM
10612013-05-31 Paul Brook <paul@codesourcery.com>
1062
a3f278e2
CM
1063 * config/tc-mips.c (s_ehword): New.
1064
067ec077
CM
10652013-05-30 Paul Brook <paul@codesourcery.com>
1066
1067 * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH.
1068
d6101ac2
MR
10692013-05-29 Maciej W. Rozycki <macro@codesourcery.com>
1070
1071 * write.c (resolve_reloc_expr_symbols): On REL targets don't
1072 convert relocs who have no relocatable field either. Rephrase
1073 the conditional so that the PC-relative check is only applied
1074 for REL targets.
1075
f19ccbda
MR
10762013-05-28 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1077
1078 * config/tc-mips.c (macro) <ld>: Don't use $zero for address
1079 calculation.
1080
418009c2
YZ
10812013-05-28 Yufeng Zhang <yufeng.zhang@arm.com>
1082
1083 * config/tc-aarch64.c (reloc_table): Update to use
477330fc 1084 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of
418009c2
YZ
1085 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE.
1086 (md_apply_fix): Likewise.
1087 (aarch64_force_relocation): Likewise.
1088
0a8897c7
KT
10892013-05-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1090
1091 * config/tc-arm.c (it_fsm_post_encode): Improve
1092 warning messages about deprecated IT block formats.
1093
89d2a2a3
MS
10942013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com>
1095
1096 * config/tc-aarch64.c (md_apply_fix): Move value range checking
1097 inside fx_done condition.
1098
c77c0862
RS
10992013-05-22 Jürgen Urban <JuergenUrban@gmx.de>
1100
1101 * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB.
1102
c0637f3a
PB
11032013-05-20 Peter Bergner <bergner@vnet.ibm.com>
1104
1105 * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error
1106 and clean up warning when using PRINT_OPCODE_TABLE.
1107
5656a981
AM
11082013-05-20 Alan Modra <amodra@gmail.com>
1109
1110 * config/tc-ppc.c (md_apply_fix): Hoist code common to insn
1111 and data fixups performing shift/high adjust/sign extension on
1112 fieldval. Sink fx_pcrel handling and checks. Use fixP->fx_size
1113 when writing data fixups rather than recalculating size.
1114
997b26e8
JBG
11152013-05-16 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1116
1117 * doc/c-msp430.texi: Fix typo.
1118
9f6e76f4
TG
11192013-05-16 Tristan Gingold <gingold@adacore.com>
1120
1121 * config/tc-ppc.c (ppc_is_toc_sym): Symbols of class XMC_TC
1122 are also TOC symbols.
1123
638d3803
NC
11242013-05-16 Nick Clifton <nickc@redhat.com>
1125
1126 * config/tc-msp430.c: Make -mmcu recognise more part numbers.
1127 Add -mcpu command to specify core type.
997b26e8 1128 * doc/c-msp430.texi: Update documentation.
638d3803 1129
b015e599
AP
11302013-05-09 Andrew Pinski <apinski@cavium.com>
1131
1132 * config/tc-mips.c (struct mips_set_options): New ase_virt field.
1133 (mips_opts): Update for the new field.
1134 (file_ase_virt): New variable.
1135 (ISA_SUPPORTS_VIRT_ASE): New macro.
1136 (ISA_SUPPORTS_VIRT64_ASE): New macro.
1137 (MIPS_CPU_ASE_VIRT): New define.
1138 (is_opcode_valid): Handle ase_virt.
1139 (macro_build): Handle "+J".
1140 (validate_mips_insn): Likewise.
1141 (mips_ip): Likewise.
1142 (enum options): Add OPTION_VIRT and OPTION_NO_VIRT.
1143 (md_longopts): Add mvirt and mnovirt
1144 (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT.
1145 (mips_after_parse_args): Handle ase_virt field.
1146 (s_mipsset): Handle "virt" and "novirt".
1147 (mips_elf_final_processing): Add a comment about virt ASE might need
1148 a new flag.
1149 (md_show_usage): Print out the usage of -mvirt and mno-virt options.
1150 * doc/c-mips.texi: Document -mvirt and -mno-virt.
1151 Document ".set virt" and ".set novirt".
1152
da8094d7
AM
11532013-05-09 Alan Modra <amodra@gmail.com>
1154
1155 * config/tc-ppc.c (md_apply_fix): Sign extend fieldval under
1156 control of operand flag bits.
1157
c5f8c205
AM
11582013-05-07 Alan Modra <amodra@gmail.com>
1159
1160 * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro.
1161 (PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise.
1162 (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise.
1163 (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise.
1164 (md_apply_fix): Set fx_no_overflow for assorted relocations.
1165 Shift and sign-extend fieldval for use by some VLE reloc
1166 operand->insert functions.
1167
b47468a6
CM
11682013-05-06 Paul Brook <paul@codesourcery.com>
1169 Catherine Moore <clm@codesourcery.com>
1170
c5f8c205
AM
1171 * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL.
1172 (limited_pcrel_reloc_p): Likewise.
b47468a6
CM
1173 (md_apply_fix): Likewise.
1174 (tc_gen_reloc): Likewise.
1175
2de39019
CM
11762013-05-06 Richard Sandiford <rdsandiford@googlemail.com>
1177
1178 * config/tc-mips.c (limited_pcrel_reloc_p): New function.
1179 (mips_fix_adjustable): Adjust pc-relative check to use
1180 limited_pc_reloc_p.
1181
754e2bb9
RS
11822013-05-02 Richard Sandiford <rdsandiford@googlemail.com>
1183
1184 * config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries.
1185 (s_mips_stab): Do not restrict to stabn only.
1186
13761a11
NC
11872013-05-02 Nick Clifton <nickc@redhat.com>
1188
1189 * config/tc-msp430.c: Add support for the MSP430X architecture.
1190 Add code to insert a NOP instruction after any instruction that
1191 might change the interrupt state.
1192 Add support for the LARGE memory model.
1193 Add code to initialise the .MSP430.attributes section.
1194 * config/tc-msp430.h: Add support for the MSP430X architecture.
1195 * doc/c-msp430.texi: Document the new -mL and -mN command line
1196 options.
1197 * NEWS: Mention support for the MSP430X architecture.
1198
df26367c
MR
11992013-05-01 Maciej W. Rozycki <macro@codesourcery.com>
1200
1201 * configure.tgt: Replace alpha*-*-linuxecoff* pattern with
1202 alpha*-*-linux*ecoff*.
1203
f02d8318
CF
12042013-04-30 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1205
1206 * config/tc-mips.c (mips_ip): Add sizelo.
1207 For "+C", "+G", and "+H", set sizelo and compare against it.
1208
b40bf0a2
NC
12092013-04-29 Nick Clifton <nickc@redhat.com>
1210
1211 * as.c (Options): Add -gdwarf-sections.
1212 (parse_args): Likewise.
1213 * as.h (flag_dwarf_sections): Declare.
1214 * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes.
1215 (process_entries): When -gdwarf-sections is enabled generate
1216 fragmentary .debug_line sections.
1217 (out_debug_line): Set the section for the .debug_line section end
1218 symbol.
1219 * doc/as.texinfo: Document -gdwarf-sections.
1220 * NEWS: Mention -gdwarf-sections.
1221
8eeccb77 12222013-04-26 Christian Groessler <chris@groessler.org>
00a3147e
CG
1223
1224 * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdline
1225 according to the target parameter. Don't call s_segm since s_segm
1226 calls bfd_set_arch_mach using stdoutput, but stdoutput isn't
1227 initialized yet.
1228 (md_begin): Call s_segm according to target parameter from command
1229 line.
1230
49926cd0
AM
12312013-04-25 Alan Modra <amodra@gmail.com>
1232
1233 * configure.in: Allow little-endian linux.
1234 * configure: Regenerate.
1235
e3031850
SL
12362013-04-24 Sandra Loosemore <sandra@codesourcery.com>
1237
1238 * config/tc-nios2.c (nios2_control_register_arg_p): Rename
1239 "fstatus" control register to "eccinj".
1240
cb948fc0
KT
12412013-04-19 Kai Tietz <ktietz@redhat.com>
1242
1243 * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin.
1244
4455e9ad
JB
12452013-04-15 Julian Brown <julian@codesourcery.com>
1246
1247 * expr.c (add_to_result, subtract_from_result): Make global.
1248 * expr.h (add_to_result, subtract_from_result): Add prototypes.
1249 * config/tc-sh.c (sh_optimize_expr): Use add_to_result,
1250 subtract_from_result to handle extra bit of precision for .sleb128
1251 directive operands.
1252
956a6ba3
JB
12532013-04-10 Julian Brown <julian@codesourcery.com>
1254
1255 * read.c (convert_to_bignum): Add sign parameter. Use it
1256 instead of X_unsigned to determine sign of resulting bignum.
1257 (emit_expr): Pass extra argument to convert_to_bignum.
1258 (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass
1259 X_extrabit to convert_to_bignum.
1260 (parse_bitfield_cons): Set X_extrabit.
1261 * expr.c (make_expr_symbol, expr_build_uconstant, operand):
1262 Initialise X_extrabit field as appropriate.
1263 (add_to_result): New.
1264 (subtract_from_result): New.
1265 (expr): Use above.
1266 * expr.h (expressionS): Add X_extrabit field.
1267
eb9f3f00
JB
12682013-04-10 Jan Beulich <jbeulich@suse.com>
1269
1270 * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base
1271 register being PC when is_t or writeback, and use distinct
1272 diagnostic for the latter case.
1273
ccb84d65
JB
12742013-04-10 Jan Beulich <jbeulich@suse.com>
1275
1276 * gas/config/tc-arm.c (parse_operands): Re-write
1277 po_barrier_or_imm().
1278 (do_barrier): Remove bogus constraint().
1279 (do_t_barrier): Remove.
1280
4d13caa0
NC
12812013-04-09 Joerg Wunsch <joerg.wunsch@atmel.com>
1282
1283 * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2,
1284 ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2,
1285 ATmega2564RFR2
1286 * gas/doc/c-avr.texi (-mmcu documentation): Likewise.
1287
16d02dc9
JB
12882013-04-09 Jan Beulich <jbeulich@suse.com>
1289
1290 * gas/config/tc-arm.c (do_vmrs): Accept all control registers.
1291 Use local variable Rt in more places.
1292 (do_vmsr): Accept all control registers.
1293
05ac0ffb
JB
12942013-04-09 Jan Beulich <jbeulich@suse.com>
1295
1296 * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
1297 if there was none specified for moves between scalar and core
1298 register.
1299
2d51fb74
JB
13002013-04-09 Jan Beulich <jbeulich@suse.com>
1301
1302 * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the
1303 NEON_ALL_LANES case.
1304
94dcf8bf
JB
13052013-04-08 Jan Beulich <jbeulich@suse.com>
1306
1307 * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for
1308 PC-relative VSTR.
1309
1472d06f
JB
13102013-04-08 Jan Beulich <jbeulich@suse.com>
1311
1312 * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq
1313 entry to sp_fiq.
1314
0c76cae8
AM
13152013-04-03 Alan Modra <amodra@gmail.com>
1316
1317 * doc/as.texinfo: Add support to generate man options for h8300.
1318 * doc/c-h8300.texi: Likewise.
1319
92eb40d9
RR
13202013-03-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
1321
1322 * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and
1323 Cortex-A57.
1324
51dcdd4d
NC
13252013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com>
1326
1327 PR binutils/15068
1328 * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array.
1329
c5d685bf
NC
13302013-03-26 Nick Clifton <nickc@redhat.com>
1331
9b978282
NC
1332 PR gas/15295
1333 * listing.c (rebuffer_line): Rewrite to avoid seeking back to the
1334 start of the file each time.
1335
c5d685bf
NC
1336 PR gas/15178
1337 * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for
1338 FreeBSD targets.
1339
9699c833
TG
13402013-03-26 Douglas B Rupp <rupp@gnat.com>
1341
1342 * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment
1343 after fixup.
1344
4755303e
WN
13452013-03-21 Will Newton <will.newton@linaro.org>
1346
1347 * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all
1348 pc-relative str instructions in Thumb mode.
1349
81f5558e
NC
13502013-03-21 Michael Schewe <michael.schewe@gmx.net>
1351
1352 * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
1353 @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
1354 R_H8_DISP32A16.
1355 * config/tc-h8300.h: Remove duplicated defines.
1356
71863e73
NC
13572013-03-21 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
1358
1359 PR gas/15282
1360 * tc-avr.c (mcu_has_3_byte_pc): New function.
1361 (tc_cfi_frame_initial_instructions): Call it to find return
1362 address size.
1363
795b8e6b
NC
13642013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com>
1365
1366 PR gas/15095
1367 * config/tc-tic6x.c (tic6x_try_encode): Handle
1368 tic6x_coding_dreg_(msb|lsb) field coding types and use it to
1369 encode register pair numbers when required.
1370
ba86b375
WN
13712013-03-15 Will Newton <will.newton@linaro.org>
1372
1373 * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register
1374 in vstr in Thumb mode for pre-ARMv7 cores.
1375
9e6f3811
AS
13762013-03-14 Andreas Schwab <schwab@suse.de>
1377
1378 * doc/c-arc.texi (ARC Directives): Revert last change and use
1379 @itemize instead of @table.
1380 * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
1381
b10bf8c5
NC
13822013-03-14 Nick Clifton <nickc@redhat.com>
1383
1384 PR gas/15273
1385 * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a
1386 NULL message, instead just check ARM_CPU_IS_ANY directly.
1387
ba724cfc
NC
13882013-03-14 Nick Clifton <nickc@redhat.com>
1389
1390 PR gas/15212
9e6f3811 1391 * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet
ba724cfc
NC
1392 for table format.
1393 * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
1394 to the @item directives.
1395 (ARM-Neon-Alignment): Move to correct place in the document.
1396 * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
1397 formatting.
1398 * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
1399 @smallexample.
1400
531a94fd
SL
14012013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
1402
1403 * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'
1404 case. Add default BAD_CASE to switch.
1405
dad60f8e
SL
14062013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
1407
1408 * config/tc-nios2.c (nios2_assemble_args_ds): New function.
1409 (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
1410
dd5181d5
KT
14112013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1412
1413 * config/tc-arm.c (crc_ext_armv8): New feature set.
1414 (UNPRED_REG): New macro.
1415 (do_crc32_1): New function.
1416 (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
1417 do_crc32ch, do_crc32cw): Likewise.
1418 (TUEc): New macro.
1419 (insns): Add entries for crc32 mnemonics.
1420 (arm_extensions): Add entry for crc.
1421
8e723a10
CLT
14222013-03-08 Chung-Lin Tang <cltang@codesourcery.com>
1423
1424 * write.h (struct fix): Add fx_dot_frag field.
1425 (dot_frag): Declare.
1426 * write.c (dot_frag): New variable.
1427 (fix_new_internal): Set fx_dot_frag field with dot_frag.
1428 (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
1429 * expr.c (expr): Save value of frag_now in dot_frag when setting
1430 dot_value.
1431 * read.c (emit_expr): Likewise. Delete comments.
1432
be05d201
L
14332013-03-07 H.J. Lu <hongjiu.lu@intel.com>
1434
1435 * config/tc-i386.c (flag_code_names): Removed.
1436 (i386_index_check): Rewrote.
1437
62b0d0d5
YZ
14382013-03-05 Yufeng Zhang <yufeng.zhang@arm.com>
1439
1440 * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
1441 add comment.
1442 (aarch64_double_precision_fmovable): New function.
1443 (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
1444 function; handle hexadecimal representation of IEEE754 encoding.
1445 (parse_operands): Update the call to parse_aarch64_imm_float.
1446
165de32a
L
14472013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1448
1449 * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
1450 (check_hle): Updated.
1451 (md_assemble): Likewise.
1452 (parse_insn): Likewise.
1453
d5de92cf
L
14542013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1455
1456 * config/tc-i386.c (_i386_insn): Add rep_prefix.
9e6f3811 1457 (md_assemble): Check if REP prefix is OK.
d5de92cf
L
1458 (parse_insn): Remove expecting_string_instruction. Set
1459 i.rep_prefix.
1460
e60bb1dd
YZ
14612013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1462
1463 * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
1464
aeebdd9b
YZ
14652013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1466
1467 * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
1468 for system registers.
1469
4107ae22
DD
14702013-02-27 DJ Delorie <dj@redhat.com>
1471
1472 * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
1473 (rl78_op): Handle %code().
1474 (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
1475 (tc_gen_reloc): Likwise; convert to a computed reloc.
1476 (md_apply_fix): Likewise.
1477
151fa98f
NC
14782013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
1479
1480 * config/rl78-parse.y: Fix encoding of DIVWU insn.
1481
70a8bc5b 14822013-02-25 Terry Guo <terry.guo@arm.com>
1483
1484 * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
1485 * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
1486 list of accepted CPUs.
1487
5c111e37
L
14882013-02-19 H.J. Lu <hongjiu.lu@intel.com>
1489
1490 PR gas/15159
1491 * config/tc-i386.c (cpu_arch): Add ".smap".
1492
1493 * doc/c-i386.texi: Document smap.
1494
8a75745d
MR
14952013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1496
1497 * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
1498 mips_assembling_insn appropriately.
1499 (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
1500
79850f26
MR
15012013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1502
cf29fc61 1503 * config/tc-mips.c (append_insn): Correct indentation, remove
79850f26
MR
1504 extraneous braces.
1505
4c261dff
NC
15062013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1507
5c111e37 1508 * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
4c261dff 1509
ea33f281
NC
15102013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
1511
1512 * configure.tgt: Add nios2-*-rtems*.
1513
a1ccaec9
YZ
15142013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
1515
1516 * config/tc-aarch64.c (md_begin): Change to check if 'name' is
1517 NULL.
1518
0aa27725
RS
15192013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
1520
1521 * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
1522 (macro): Use it. Assert that trunc.w.s is not used for r5900.
1523
da4339ed
NC
15242013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com>
1525
1526 * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
1527 core.
1528
36591ba1 15292013-02-06 Sandra Loosemore <sandra@codesourcery.com>
5c111e37 1530 Andrew Jenner <andrew@codesourcery.com>
36591ba1
SL
1531
1532 Based on patches from Altera Corporation.
1533
1534 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
1535 (TARGET_CPU_HFILES): Add config/tc-nios2.h.
1536 * Makefile.in: Regenerated.
1537 * configure.tgt: Add case for nios2*-linux*.
1538 * config/obj-elf.c: Conditionally include elf/nios2.h.
1539 * config/tc-nios2.c: New file.
1540 * config/tc-nios2.h: New file.
1541 * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
1542 * doc/Makefile.in: Regenerated.
1543 * doc/all.texi: Set NIOSII.
1544 * doc/as.texinfo (Overview): Add Nios II options.
1545 (Machine Dependencies): Include c-nios2.texi.
1546 * doc/c-nios2.texi: New file.
1547 * NEWS: Note Altera Nios II support.
1548
94d4433a
AM
15492013-02-06 Alan Modra <amodra@gmail.com>
1550
1551 PR gas/14255
1552 * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
1553 Don't skip fixups with fx_subsy non-NULL.
1554 * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
1555 with fx_subsy non-NULL.
1556
ace9af6f
L
15572013-02-04 H.J. Lu <hongjiu.lu@intel.com>
1558
1559 * doc/c-metag.texi: Add "@c man" markers.
1560
89d67ed9
AM
15612013-02-04 Alan Modra <amodra@gmail.com>
1562
1563 * write.c (fixup_segment): Return void. Delete seg_reloc_count
1564 related code.
1565 (TC_ADJUST_RELOC_COUNT): Delete.
1566 * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
1567
89072bd6
AM
15682013-02-04 Alan Modra <amodra@gmail.com>
1569
1570 * po/POTFILES.in: Regenerate.
1571
f9b2d544
NC
15722013-01-30 Markos Chandras <markos.chandras@imgtec.com>
1573
1574 * config/tc-metag.c: Make SWAP instruction less permissive with
1575 its operands.
1576
392ca752
DD
15772013-01-29 DJ Delorie <dj@redhat.com>
1578
1579 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
1580 relocs in .word/.etc statements.
1581
427d0db6
RM
15822013-01-29 Roland McGrath <mcgrathr@google.com>
1583
1584 * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
1585 immediate value for 8-bit offset" error so it shows line info.
1586
4faf939a
JM
15872013-01-24 Joseph Myers <joseph@codesourcery.com>
1588
1589 * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
1590 for 64-bit output.
1591
78c8d46c
NC
15922013-01-24 Nick Clifton <nickc@redhat.com>
1593
1594 * config/tc-v850.c: Add support for e3v5 architecture.
1595 * doc/c-v850.texi: Mention new support.
1596
fb5b7503
NC
15972013-01-23 Nick Clifton <nickc@redhat.com>
1598
1599 PR gas/15039
1600 * config/tc-avr.c: Include dwarf2dbg.h.
1601
8ce3d284
L
16022013-01-18 H.J. Lu <hongjiu.lu@intel.com>
1603
1604 * config/tc-i386.c (reloc): Support size relocation only for ELF.
1605 (tc_i386_fix_adjustable): Likewise.
1606 (lex_got): Likewise.
1607 (tc_gen_reloc): Likewise.
1608
f5555712
YZ
16092013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
1610
1611 * config/tc-aarch64.c (output_operand_error_record): Change to output
1612 the out-of-range error message as value-expected message if there is
1613 only one single value in the expected range.
1614 (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
1615 LSL #0 as a programmer-friendly feature.
1616
8fd4256d
L
16172013-01-16 H.J. Lu <hongjiu.lu@intel.com>
1618
1619 * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
1620 (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
1621 BFD_RELOC_64_SIZE relocations.
1622 (lex_got): Support "symbol@SIZE" and don't create GOT symbol
1623 for it.
1624 (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
1625 relocations against local symbols.
1626
a5840dce
AM
16272013-01-16 Alan Modra <amodra@gmail.com>
1628
1629 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
1630 finding some sort of toc syntax error, and break to avoid
1631 compiler uninit warning.
1632
af89796a
L
16332013-01-15 H.J. Lu <hongjiu.lu@intel.com>
1634
1635 PR gas/15019
1636 * config/tc-i386.c (lex_got): Increment length by 1 if the
1637 relocation token is removed.
1638
dd42f060
NC
16392013-01-15 Nick Clifton <nickc@redhat.com>
1640
1641 * config/tc-v850.c (md_assemble): Allow signed values for
1642 V850E_IMMEDIATE.
1643
464e3686
SK
16442013-01-11 Sean Keys <skeys@ipdatasys.com>
1645
1646 * config/tc-xgate.c (md_begin): Fix mistake made when going from
af89796a 1647 git to cvs.
464e3686 1648
5817ffd1
PB
16492013-01-10 Peter Bergner <bergner@vnet.ibm.com>
1650
1651 * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
1652 * doc/c-ppc.texi (PowerPC-Opts): Likewise.
1653 * config/tc-ppc.c (md_show_usage): Likewise.
1654 (ppc_handle_align): Handle power8's group ending nop.
1655
f4b1f6a9
SK
16562013-01-10 Sean Keys <skeys@ipdatasys.com>
1657
1658 * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
af89796a 1659 that the assember exits after the opcodes have been printed.
f4b1f6a9 1660
34bca508
L
16612013-01-10 H.J. Lu <hongjiu.lu@intel.com>
1662
1663 * app.c: Remove trailing white spaces.
1664 * as.c: Likewise.
1665 * as.h: Likewise.
1666 * cond.c: Likewise.
1667 * dw2gencfi.c: Likewise.
1668 * dwarf2dbg.h: Likewise.
1669 * ecoff.c: Likewise.
1670 * input-file.c: Likewise.
1671 * itbl-lex.h: Likewise.
1672 * output-file.c: Likewise.
1673 * read.c: Likewise.
1674 * sb.c: Likewise.
1675 * subsegs.c: Likewise.
1676 * symbols.c: Likewise.
1677 * write.c: Likewise.
1678 * config/tc-i386.c: Likewise.
1679 * doc/Makefile.am: Likewise.
1680 * doc/Makefile.in: Likewise.
1681 * doc/c-aarch64.texi: Likewise.
1682 * doc/c-alpha.texi: Likewise.
1683 * doc/c-arc.texi: Likewise.
1684 * doc/c-arm.texi: Likewise.
1685 * doc/c-avr.texi: Likewise.
1686 * doc/c-bfin.texi: Likewise.
1687 * doc/c-cr16.texi: Likewise.
1688 * doc/c-d10v.texi: Likewise.
1689 * doc/c-d30v.texi: Likewise.
1690 * doc/c-h8300.texi: Likewise.
1691 * doc/c-hppa.texi: Likewise.
1692 * doc/c-i370.texi: Likewise.
1693 * doc/c-i386.texi: Likewise.
1694 * doc/c-i860.texi: Likewise.
1695 * doc/c-m32c.texi: Likewise.
1696 * doc/c-m32r.texi: Likewise.
1697 * doc/c-m68hc11.texi: Likewise.
1698 * doc/c-m68k.texi: Likewise.
1699 * doc/c-microblaze.texi: Likewise.
1700 * doc/c-mips.texi: Likewise.
1701 * doc/c-msp430.texi: Likewise.
1702 * doc/c-mt.texi: Likewise.
1703 * doc/c-s390.texi: Likewise.
1704 * doc/c-score.texi: Likewise.
1705 * doc/c-sh.texi: Likewise.
1706 * doc/c-sh64.texi: Likewise.
1707 * doc/c-tic54x.texi: Likewise.
1708 * doc/c-tic6x.texi: Likewise.
1709 * doc/c-v850.texi: Likewise.
1710 * doc/c-xc16x.texi: Likewise.
1711 * doc/c-xgate.texi: Likewise.
1712 * doc/c-xtensa.texi: Likewise.
1713 * doc/c-z80.texi: Likewise.
1714 * doc/internals.texi: Likewise.
1715
4c665b71
RM
17162013-01-10 Roland McGrath <mcgrathr@google.com>
1717
1718 * hash.c (hash_new_sized): Make it global.
1719 * hash.h: Declare it.
1720 * macro.c (define_macro): Use hash_new_sized instead of hash_new,
1721 pass a small size.
1722
a3c62988
NC
17232013-01-10 Will Newton <will.newton@imgtec.com>
1724
1725 * Makefile.am: Add Meta.
1726 * Makefile.in: Regenerate.
1727 * config/tc-metag.c: New file.
1728 * config/tc-metag.h: New file.
1729 * configure.tgt: Add Meta.
1730 * doc/Makefile.am: Add Meta.
1731 * doc/Makefile.in: Regenerate.
1732 * doc/all.texi: Add Meta.
1733 * doc/as.texiinfo: Document Meta options.
1734 * doc/c-metag.texi: New file.
1735
b37df7c4
SE
17362013-01-09 Steve Ellcey <sellcey@mips.com>
1737
1738 * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
1739 calls.
1740 * config/tc-mips.c (internalError): Remove, replace with abort.
1741
a3251895
YZ
17422013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
1743
1744 * config/tc-aarch64.c (parse_operands): Change to compare the result
1745 of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
1746
8ab8155f
NC
17472013-01-07 Nick Clifton <nickc@redhat.com>
1748
1749 PR gas/14887
1750 * config/tc-arm.c (skip_past_char): Skip whitespace before the
1751 anticipated character.
1752 * config/tc-arm.c (parse_address_main): Delete skip of whitespace
1753 here as it is no longer needed.
1754
a4ac1c42
AS
17552013-01-06 Andreas Schwab <schwab@linux-m68k.org>
1756
1757 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
1758 * doc/c-score.texi (SCORE-Opts): Likewise.
1759 * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
1760
e407c74b
NC
17612013-01-04 Juergen Urban <JuergenUrban@gmx.de>
1762
1763 * config/tc-mips.c: Add support for MIPS r5900.
1764 Add M_LQ_AB and M_SQ_AB to support large values for instructions
1765 lq and sq.
1766 (can_swap_branch_p, get_append_method): Detect some conditional
1767 short loops to fix a bug on the r5900 by NOP in the branch delay
1768 slot.
1769 (M_MUL): Support 3 operands in multu on r5900.
1770 (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
1771 (s_mipsset): Force 32 bit floating point on r5900.
1772 (mips_ip): Check parameter range of instructions mfps and mtps on
1773 r5900.
1774 * configure.in: Detect CPU type when target string contains r5900
1775 (e.g. mips64r5900el-linux-gnu).
1776
62658407
L
17772013-01-02 H.J. Lu <hongjiu.lu@intel.com>
1778
1779 * as.c (parse_args): Update copyright year to 2013.
1780
95830fd1
YZ
17812013-01-02 Yufeng Zhang <yufeng.zhang@arm.com>
1782
1783 * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
1784 and "cortex57".
1785
517bb291 17862013-01-02 Nick Clifton <nickc@redhat.com>
d709e4e6 1787
517bb291
NC
1788 PR gas/14987
1789 * config/tc-arm.c (parse_address_main): Skip whitespace before a
1790 closing bracket.
d709e4e6 1791
517bb291 1792For older changes see ChangeLog-2012
08d56133 1793\f
517bb291 1794Copyright (C) 2013 Free Software Foundation, Inc.
752937aa
NC
1795
1796Copying and distribution of this file, with or without modification,
1797are permitted in any medium without royalty provided the copyright
1798notice and this notice are preserved.
1799
08d56133
NC
1800Local Variables:
1801mode: change-log
1802left-margin: 8
1803fill-column: 74
1804version-control: never
1805End: