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* elf32-arm.c (arm_type_of_stub): Don't use ST_BRANCH_TO_ARM for
[thirdparty/binutils-gdb.git] / gas / ChangeLog
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12013-07-18 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
2
3 * config/tc-avr.c (md_show_usage): Add avrxmega2 to help text
4
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52013-07-18 Vishnu K.S <vishnu.k_s@atmel.com>
6
7 * config/tc-avr.c: Make ata6289's ISA to AVR_ISA_AVR4.
8 * doc/c-avr.texi: Likewise.
9
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102013-07-15 Richard Sandiford <rdsandiford@googlemail.com>
11
12 * config/tc-mips.c (match_save_restore_list_operand): Avoid -Wformat
13 error with older GCCs.
14 (mips16_macro_build): Dereference args.
15
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162013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
17
18 * config/tc-mips.c (mips_prefer_vec_regno, mips_parse_register):
19 New functions, split out from...
20 (reg_lookup): ...here. Remove itbl support.
21 (reglist_lookup): Delete.
22 (mips_operand_token_type): New enum.
23 (mips_operand_token): New structure.
24 (mips_operand_tokens): New variable.
25 (mips_add_token, mips_parse_base_start, mips_parse_argument_token)
26 (mips_parse_arguments): New functions.
27 (md_begin): Initialize mips_operand_tokens.
28 (mips_arg_info): Add a token field. Remove optional_reg field.
29 (match_char, match_expression): New functions.
30 (match_const_int): Use match_expression. Remove "s" argument
31 and return a boolean result. Remove O_register handling.
32 (match_regno, match_reg, match_reg_range): New functions.
33 (match_int_operand, match_mapped_int_operand, match_msb_operand)
34 (match_reg_operand, match_reg_pair_operand, match_perf_reg_operand)
35 (match_addiusp_operand, match_clo_clz_dest_operand)
36 (match_lwm_swm_list_operand, match_entry_exit_operand)
37 (match_save_restore_list_operand, match_mdmx_imm_reg_operand)
38 (match_tied_reg_operand): Remove "s" argument and return a boolean
39 result. Match tokens rather than text. Update calls to
40 match_const_int. Rely on match_regno to call check_regno.
41 (match_pcrel_operand, match_pc_operand): Replace "s" argument with
42 "arg" argument. Return a boolean result.
43 (parse_float_constant): Replace with...
44 (match_float_constant): ...this new function.
45 (match_operand): Remove "s" argument and return a boolean result.
46 Update calls to subfunctions.
47 (mips_ip, mips16_ip): Call mips_parse_arguments. Use match routines
48 rather than string-parsing routines. Update handling of optional
49 registers for token scheme.
50
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512013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
52
53 * config/tc-mips.c (parse_float_constant): Split out from...
54 (mips_ip): ...here.
55
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562013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
57
58 * config/tc-mips.c (INSERT_BITS, INSERT_OPERAND, MIPS16_INSERT_OPERAND):
59 Delete.
60
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612013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
62
63 * config/tc-mips.c (mips32_to_16_reg_map): Delete.
64 (match_entry_exit_operand): New function.
65 (match_save_restore_list_operand): Likewise.
66 (match_operand): Use them.
67 (check_absolute_expr): Delete.
68 (mips16_ip): Rewrite main parsing loop to use mips_operands.
69
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702013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
71
72 * config/tc-mips.c: Enable functions commented out in previous patch.
73 (SKIP_SPACE_TABS): Move further up file.
74 (mips32_to_micromips_reg_b_map, mips32_to_micromips_reg_c_map)
75 (mips32_to_micromips_reg_d_map, mips32_to_micromips_reg_e_map)
76 (ips32_to_micromips_reg_f_map, mips32_to_micromips_reg_g_map)
77 (mips32_to_micromips_reg_l_map, mips32_to_micromips_reg_m_map)
78 (mips32_to_micromips_reg_q_map, mips32_to_micromips_reg_n_map)
79 (micromips_imm_b_map, micromips_imm_c_map): Delete.
80 (mips_lookup_reg_pair): Delete.
81 (macro): Use report_bad_range and report_bad_field.
82 (mips_immed, expr_const_in_range): Delete.
83 (mips_ip): Rewrite main parsing loop to use new functions.
84
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852013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
86
87 * config/tc-mips.c (mips_oddfpreg_ok): Move further up file.
88 Change return type to bfd_boolean.
89 (report_bad_range, report_bad_field): New functions.
90 (mips_arg_info): New structure.
91 (match_const_int, convert_reg_type, check_regno, match_int_operand)
92 (match_mapped_int_operand, match_msb_operand, match_reg_operand)
93 (match_reg_pair_operand, match_pcrel_operand, match_perf_reg_operand)
94 (match_addiusp_operand, match_clo_clz_dest_operand)
95 (match_lwm_swm_list_operand, match_mdmx_imm_reg_operand)
96 (match_pc_operand, match_tied_reg_operand, match_operand)
97 (check_completed_insn): New functions, commented out for now.
98
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992013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
100
101 * config/tc-mips.c (insn_insert_operand): New function.
102 (macro_build, mips16_macro_build): Put null character check
103 in the for loop and convert continues to breaks. Use operand
104 structures to handle constant operands.
105
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1062013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
107
108 * config/tc-mips.c (validate_mips_insn): Move further up file.
109 Add insn_bits and decode_operand arguments. Use the mips_operand
110 fields to work out which bits an operand occupies. Detect double
111 definitions.
112 (validate_micromips_insn): Move further up file. Call into
113 validate_mips_insn.
114
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1152013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
116
117 * config/tc-mips.c (mips16_macro_build): Remove 'Y' case.
118
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1192013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
120
121 * config/tc-mips.c (macro_build): Take an int for "C", "k", "\\"
122 and "~".
123 (macro): Update accordingly.
124
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1252013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
126
127 * config/tc-mips.c (imm_expr, imm2_expr, offset_expr): Tweak commentary.
128 (imm_reloc): Delete.
129 (md_assemble): Remove imm_reloc handling.
130 (mips_ip): Update commentary. Use offset_expr and offset_reloc
131 rather than imm_expr and imm_reloc for 'i', 'j' and 'u'.
132 Use a temporary array rather than imm_reloc when parsing
133 constant expressions. Remove imm_reloc initialization.
134 (mips16_ip): Update commentary. Use offset_expr and offset_reloc
135 for the relaxable field. Use a relax_char variable to track the
136 type of this field. Remove imm_reloc initialization.
137
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1382013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
139
140 * config/tc-mips.c (mips16_ip): Handle "I".
141
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1422013-07-12 Maciej W. Rozycki <macro@codesourcery.com>
143
144 * config/tc-mips.c (mips_flag_nan2008): New variable.
145 (options): Add OPTION_NAN enum value.
146 (md_longopts): Handle it.
147 (md_parse_option): Likewise.
148 (s_nan): New function.
149 (mips_elf_final_processing): Handle EF_MIPS_NAN2008.
150 (md_show_usage): Add -mnan.
151
152 * doc/as.texinfo (Overview): Add -mnan.
153 * doc/c-mips.texi (MIPS Opts): Document -mnan.
154 (MIPS NaN Encodings): New node. Document .nan directive.
155 (MIPS-Dependent): List the new node.
156
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1572013-07-09 Tristan Gingold <gingold@adacore.com>
158
159 * configure.com: Define HAVE_SYS_TYPES_H and HAVE_UNISTD_H
160
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1612013-07-08 Richard Sandiford <rdsandiford@googlemail.com>
162
163 * config/tc-mips.c (mips_ip): Unconditionally parse an expression
164 for 'A' and assume that the constant has been elided if the result
165 is an O_register.
166
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1672013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
168
169 * config/tc-mips.c (gprel16_reloc_p): New function.
170 (macro_read_relocs): Assume BFD_RELOC_LO16 if all relocs are
171 BFD_RELOC_UNUSED.
172 (offset_high_part, small_offset_p): New functions.
173 (nacro): Use them. Remove *_OB and *_DOB cases. For single-
174 register load and store macros, handle the 16-bit offset case first.
175 If a 16-bit offset is not suitable for the instruction we're
176 generating, load it into the temporary register using
177 ADDRESS_ADDI_INSN. Make the M_LI_DD code fall through into the
178 M_L_DAB code once the address has been constructed. For double load
179 and store macros, again handle the 16-bit offset case first.
180 If the second register cannot be accessed from the same high
181 part as the first, load it into AT using ADDRESS_ADDI_INSN.
182 Fix the handling of LD in cases where the first register is the
183 same as the base. Also handle the case where the offset is
184 not 16 bits and the second register cannot be accessed from the
185 same high part as the first. For unaligned loads and stores,
186 fuse the offbits == 12 and old "ab" handling. Apply this handling
187 whenever the second offset needs a different high part from the first.
188 Construct the offset using ADDRESS_ADDI_INSN where possible,
189 for offbits == 16 as well as offbits == 12. Use offset_reloc
190 when constructing the individual loads and stores.
191 (mips_ip): Set up imm_expr, imm2_expr, offset_expr, imm_reloc
192 and offset_reloc before matching against a particular opcode.
193 Handle elided 'A' constants. Allow 'A' constants to use
194 relocation operators.
195
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1962013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
197
198 * config/tc-mips.c (validate_mips_insn): Remove "[" and "]" handling.
199 (mips_ip): Likewise. Do not set is_mdmx for INSN_5400 instructions.
200 Check constraints on the VR5400 RZU.OB, SLL.OB and SRL.OB instructions.
201
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2022013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
203
204 * config/tc-mips.c (mips_ip): Preserve the real bit number for "+p".
205 Require the msb to be <= 31 for "+s". Check that the size is <= 31
206 for both "+s" and "+S".
207
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2082013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
209
210 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn):
211 (mips_ip, mips16_ip): Handle "+i".
212
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2132013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
214
215 * config/tc-mips.c (mips32_to_micromips_reg_h_map): Delete.
216 (micromips_to_32_reg_h_map): Rename to...
217 (micromips_to_32_reg_h_map1): ...this.
218 (micromips_to_32_reg_i_map): Rename to...
219 (micromips_to_32_reg_h_map2): ...this.
220 (mips_lookup_reg_pair): New function.
221 (gpr_write_mask, macro): Adjust after above renaming.
222 (validate_micromips_insn): Remove "mi" handling.
223 (mips_ip): Likewise. Parse both registers in a pair for "mh".
224
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2252013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
226
227 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn)
228 (mips_ip): Remove "+D" and "+T" handling.
229
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2302013-07-05 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
231
232 * config/tc-s390.c (md_gather_operands, md_apply_fix): Support new
233 relocs.
234
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2352013-07-03 Marcus Shawcroft <marcus.shawcroft@arm.com>
236
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237 * config/tc-aarch64.c (reloc_table): Merge got_prel19 into got.
238
2392013-07-02 Marcus Shawcroft <marcus.shawcroft@arm.com>
240
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241 * config/tc-aarch64.c (md_apply_fix): Reorder case values.
242 (aarch64_force_relocation): Likewise.
243
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2442013-07-02 Alan Modra <amodra@gmail.com>
245
246 * config/tc-ppc.c (ppc_elf_adjust_symtab): Don't make .TOC. weak.
247
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2482013-06-26 Maciej W. Rozycki <macro@codesourcery.com>
249
250 * doc/as.texinfo (Overview): Remove @samp from MIPS ISA names.
251 * doc/c-mips.texi (MIPS Options): Remove @sc from MIPS ISA names.
252 Replace @sc{mips16} with literal `MIPS16'.
253 (MIPS ISA): Replace @sc{mips3} with literal `MIPS III'.
254
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2552013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
256
257 * config/tc-aarch64.c (reloc_table): Replace
258 BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with
259 BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to
260 BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and
261 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC.
262 (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC,
263 BFD_RELOC_AARCH64_LD32_GOT_LO12_NC,
264 BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC,
265 BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC,
266 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and
267 BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC.
268 (aarch64_force_relocation): Likewise.
269
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2702013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
271
272 * config/tc-aarch64.c (ilp32_p): New static variable.
273 (elf64_aarch64_target_format): Return the target according to the
274 value of 'ilp32_p'.
275 (md_begin): Determine 'mach' according to the value of 'ilp32_p'.
276 (aarch64_opts): Add support for options '-milp32' and '-mlp64'.
277 (aarch64_dwarf2_addr_size): New function.
278 * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration.
279 (DWARF2_ADDR_SIZE): New define.
280
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2812013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
282
283 * doc/c-mips.texi: Use ISA instead of @sc{isa}.
284
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2852013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
286
287 * config/tc-mips.c (validate_mips_insn): Use STYPE rather than SHAMT.
288
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2892013-06-25 Maciej W. Rozycki <macro@codesourcery.com>
290
291 * config/tc-mips.c (mips_set_options): Add insn32 member.
292 (mips_opts): Initialize it.
293 (NOP_INSN, NOP_INSN_SIZE): Handle insn32 mode.
294 (options): Add OPTION_INSN32 and OPTION_NO_INSN32 enum values.
295 (md_longopts): Add "minsn32" and "mno-insn32" options.
296 (is_size_valid): Handle insn32 mode.
297 (md_assemble): Pass instruction string down to macro.
298 (brk_fmt): Add second dimension and insn32 mode initializers.
299 (mfhl_fmt): Likewise.
300 (BRK_FMT, MFHL_FMT): Handle insn32 mode.
301 (macro_build) <'c'>: Handle microMIPS 32-bit BREAK encoding.
302 (macro_build_jalr, move_register): Handle insn32 mode.
303 (macro_build_branch_rs): Likewise.
304 (macro): Handle insn32 mode.
305 <M_JRADDIUSP>, <M_JRC>, <M_MOVEP>: New cases.
306 (mips_ip): Handle insn32 mode.
307 (md_parse_option): Handle OPTION_INSN32 and OPTION_NO_INSN32.
308 (s_mipsset): Handle "insn32" and "noinsn32" pseudo-ops.
309 (mips_handle_align): Handle insn32 mode.
310 (md_show_usage): Add -minsn32 and -mno-insn32.
311
312 * doc/as.texinfo (Target MIPS options): Add -minsn32 and
313 -mno-insn32 options.
314 (-minsn32, -mno-insn32): New options.
315 * doc/c-mips.texi (MIPS Opts): Add -minsn32 and -mno-insn32
316 options.
317 (MIPS assembly options): New node. Document .set insn32 and
318 .set noinsn32.
319 (MIPS-Dependent): List the new node.
320
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3212013-06-25 Nick Clifton <nickc@redhat.com>
322
323 * config/tc-msp430.c (msp430_srcoperand): Do not allow the use of
324 the PC in indirect addressing on 430xv2 parts.
325 (msp430_operands): Add version test to hardware bug encoding
326 restrictions.
327
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3282013-06-24 Roland McGrath <mcgrathr@google.com>
329
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330 * config/tc-arm.c (parse_reg_list): Use skip_past_char for '}',
331 so it skips whitespace before it.
332 (s_arm_unwind_save_mmxwr, s_arm_unwind_save_mmxwcg): Likewise.
333
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334 * config/tc-arm.c (arm_symbol_chars): Include '{' and '}'.
335 (arm_reg_parse_multi): Skip whitespace first.
336 (parse_reg_list): Likewise.
337 (parse_vfp_reg_list): Likewise.
338 (s_arm_unwind_save_mmxwcg): Likewise.
339
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3402013-06-24 Nick Clifton <nickc@redhat.com>
341
342 PR gas/15623
343 * config/tc-arm.c (do_t_smc): Mark as ending an IT block.
344
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3452013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
346
347 * config/tc-mips.c (mips_ip): Fix swapped bit numbers in comments.
348
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3492013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
350
351 * config/tc-mips.c: Assert that offsetT and valueT are at least
352 8 bytes in size.
353 (GPR_SMIN, GPR_SMAX): New macros.
354 (macro, mips_ip): Remove code for 4-byte valueT and offsetT.
355
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3562013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
357
358 * config/tc-mips.c: Remove OBJ_ELF, OBJ_MAYBE_ELF and IS_ELF
359 conditions. Remove any code deselected by them.
360 (s_mips_frame, s_mips_mask): Handle ECOFF_DEBUGGING case first.
361
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3622013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
363
364 * NEWS: Note removal of ECOFF support.
365 * doc/as.texinfo (--emulation): Update for the removal of MIPS ECOFF.
366 * Makefile.am (TARG_ENV_HFILES): Remove config/te-lnews.h.
367 (MULTI_CFILES): Remove config/e-mipsecoff.c.
368 * Makefile.in: Regenerate.
369 * configure.in: Remove MIPS ECOFF references.
370 (mips-sony-bsd*, mips-*-bsd*, mips-*-lnews*-ecoff, mips-*-*-ecoff):
371 Delete cases.
372 (mips-*-irix5*-*, mips*-*-linux*-*, mips*-*-freebsd*)
373 (mips*-*-kfreebsd*-gnu, mips-*-*-elf): Fold into...
374 (mips-*-*): ...this single case.
375 (mipsbecoff, mipslecoff, mipsecoff): Remove emulations. Expect
376 MIPS emulations to be e-mipself*.
377 * configure: Regenerate.
378 * configure.tgt (mips-sony-bsd*, mips-*-ultrix*, mips-*-osf*)
379 (mips-*-ecoff*, mips-*-pe*, mips-*-irix*, ips-*-lnews*, mips-*-riscos*)
380 (mips-*-sysv*): Remove coff and ecoff cases.
381 * as.c (mipsbecoff, mipslecoff, mipsecoff): Remove.
382 * ecoff.c: Remove reference to MIPS ECOFF.
383 * config/e-mipsecoff.c, config/te-lnews.h: Delete files.
384 * config/tc-mips.c (ECOFF_LITTLE_FORMAT): Delete.
385 (RDATA_SECTION_NAME, mips_target_form): Remove COFF and ECOFF cases.
386 (mips_hi_fixup): Tweak comment.
387 (append_insn): Require a howto.
388 (mips_after_parse_args): Remove OBJ_MAYBE_ECOFF code.
389
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3902013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
391
392 * doc/as.texinfo: Use MIPS rather than @sc{mips} throughout.
393 Use "CPU" instead of "cpu".
394 * doc/c-mips.texi: Likewise.
395 (MIPS Opts): Rename to MIPS Options.
396 (MIPS option stack): Rename to MIPS Option Stack.
397 (MIPS ASE instruction generation overrides): Rename to
398 MIPS ASE Instruction Generation Overrides (for now).
399 (MIPS floating-point): Rename to MIPS Floating-Point.
400
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4012013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
402
403 * doc/c-mips.texi (MIPS Macros): New section.
404 (MIPS Object): Replace with...
405 (MIPS Small Data): ...this new section.
406
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4072013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
408
409 * doc/c-mips.texi (MIPS symbol sizes): Move section further up file.
410 Capitalize name. Use @kindex instead of @cindex for .set entries.
411
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4122013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
413
414 * doc/c-mips.texi (MIPS Stabs): Remove section.
415
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4162013-06-20 Richard Sandiford <rdsandiford@googlemail.com>
417
418 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS, ISA_SUPPORTS_DSP_ASE)
419 (ISA_SUPPORTS_DSP64_ASE, ISA_SUPPORTS_DSPR2_ASE, ISA_SUPPORTS_EVA_ASE)
420 (ISA_SUPPORTS_MT_ASE, ISA_SUPPORTS_MCU_ASE, ISA_SUPPORTS_VIRT_ASE)
421 (ISA_SUPPORTS_VIRT64_ASE): Delete.
422 (mips_ase): New structure.
423 (mips_ases): New table.
424 (FP64_ASES): New macro.
425 (mips_ase_groups): New array.
426 (mips_isa_rev, mips_ase_mask, mips_check_isa_supports_ase)
427 (mips_check_isa_supports_ases, mips_set_ase, mips_lookup_ase): New
428 functions.
429 (is_opcode_valid): Use mips_ases to get the 64-bit ASE flags.
430 (md_parse_option): Use mips_ases and mips_set_ase instead of
431 separate case statements for each ASE option.
432 (mips_after_parse_args): Use FP64_ASES. Use
433 mips_check_isa_supports_ases to check the ASEs against
434 other options.
435 (s_mipsset): Use mips_ases and mips_set_ase instead of
436 separate if statements for each ASE option. Use
437 mips_check_isa_supports_ases, even when a non-ASE option
438 is specified.
439
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4402013-06-19 Greta Yorsh <Greta.Yorsh@arm.com>
441
442 * config/tc-arm.c (arm_cpus): Add support for Cortex-A12.
443
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4442013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
445
446 * config/tc-mips.c (md_shortopts, options, md_longopts)
447 (md_longopts_size): Move earlier in file.
448
846ef2d0
RS
4492013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
450
451 * config/tc-mips.c (mips_set_options): Replace separate "ase_*" fields
452 with a single "ase" bitmask.
453 (mips_opts): Update accordingly.
454 (file_ase, file_ase_explicit): New variables.
455 (file_ase_mips3d, file_ase_mdmx, file_ase_smartmips, file_ase_dsp)
456 (file_ase_dspr2, file_ase_eva, file_ase_mt, file_ase_virt): Delete.
457 (ISA_HAS_ROR): Adjust for mips_set_options change.
458 (is_opcode_valid): Take the base ase mask directly from mips_opts.
459 (mips_ip): Adjust for mips_set_options change.
460 (md_parse_option): Likewise. Update file_ase_explicit.
461 (mips_after_parse_args): Adjust for mips_set_options change.
462 Use bitmask operations to select the default ASEs. Set file_ase
463 rather than individual per-ASE variables.
464 (s_mipsset): Adjust for mips_set_options change.
465 (mips_elf_final_processing): Test file_ase rather than
466 file_ase_mdmx. Remove commented-out code.
467
d16afab6
RS
4682013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
469
470 * config/tc-mips.c (mips_cpu_info): Add an "ase" field.
471 (MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, MIPS_CPU_ASE_MT)
472 (MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX, MIPS_CPU_ASE_DSPR2)
473 (MIPS_CPU_ASE_MCU, MIPS_CPU_ASE_VIRT, MIPS_CPU_ASE_EVA): Delete.
474 (mips_after_parse_args): Use the new "ase" field to choose
475 the default ASEs.
476 (mips_cpu_info_table): Move ASEs from the "flags" field to the
477 "ase" field.
478
e83a675f
RE
4792013-06-18 Richard Earnshaw <rearnsha@arm.com>
480
481 * config/tc-arm.c (symbol_preemptible): New function.
482 (relax_branch): Use it.
483
7f3c4072
CM
4842013-06-17 Catherine Moore <clm@codesourcery.com>
485 Maciej W. Rozycki <macro@codesourcery.com>
486 Chao-Ying Fu <fu@mips.com>
487
488 * config/tc-mips.c (mips_set_options): Add ase_eva.
489 (mips_set_options mips_opts): Add ase_eva.
490 (file_ase_eva): Declare.
491 (ISA_SUPPORTS_EVA_ASE): Define.
492 (IS_SEXT_9BIT_NUM): Define.
493 (MIPS_CPU_ASE_EVA): Define.
494 (is_opcode_valid): Add support for ase_eva.
495 (macro_build): Likewise.
496 (macro): Likewise.
497 (validate_mips_insn): Likewise.
498 (validate_micromips_insn): Likewise.
499 (mips_ip): Likewise.
500 (options): Add OPTION_EVA and OPTION_NO_EVA.
501 (md_longopts): Add -meva and -mno-eva.
502 (md_parse_option): Process new options.
503 (mips_after_parse_args): Check for valid EVA combinations.
504 (s_mipsset): Likewise.
505
e410add4
RS
5062013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
507
508 * dwarf2dbg.h (dwarf2_move_insn): Declare.
509 * dwarf2dbg.c (line_subseg): Add pmove_tail.
510 (get_line_subseg): Add create_p argument. Initialize pmove_tail.
511 (dwarf2_gen_line_info_1): Update call accordingly.
512 (dwarf2_move_insn): New function.
513 * config/tc-mips.c (append_insn): Use dwarf2_move_insn.
514
6a50d470
RS
5152013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
516
517 Revert:
518
519 2011-09-05 Richard Sandiford <rdsandiford@googlemail.com>
520
521 PR gas/13024
522 * dwarf2dbg.c (pending_lines, pending_lines_tail): New variables.
523 (dwarf2_gen_line_info_1): Delete.
524 (dwarf2_push_line, dwarf2_flush_pending_lines): New functions.
525 (dwarf2_gen_line_info, dwarf2_emit_label): Use them.
526 (dwarf2_consume_line_info): Call dwarf2_flush_pending_lines.
527 (dwarf2_directive_loc): Push previous .locs instead of generating
528 them immediately.
529
f122319e
CF
5302013-06-13 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
531
532 * config/tc-mips.c (ISA_SUPPORTS_VIRT_ASE): Support micromips.
533 (ISA_SUPPORTS_VIRT64_ASE): Support 64-bit micromips.
534
909c7f9c
NC
5352013-06-13 Nick Clifton <nickc@redhat.com>
536
537 PR gas/15602
538 * config/tc-m68k.h (TC_CHECK_ADJUSTED_BROKEN_DOT_WORD): Define.
539 * config/tc-m68k.c (tc_m68k_check_adjusted_broken_word): New
540 function. Generates an error if the adjusted offset is out of a
541 16-bit range.
542
5d5755a7
SL
5432013-06-12 Sandra Loosemore <sandra@codesourcery.com>
544
545 * config/tc-nios2.c (md_apply_fix): Mask constant
546 BFD_RELOC_NIOS2_HIADJ16 value to 16 bits.
547
3bf0dbfb
MR
5482013-06-10 Maciej W. Rozycki <macro@codesourcery.com>
549
550 * config/tc-mips.c (append_insn): Don't do branch relaxation for
551 MIPS-3D instructions either.
552 (md_convert_frag): Update the COPx branch mask accordingly.
553
554 * config/tc-mips.c (md_show_usage): Document --[no-]relax-branch
555 option.
556 * doc/as.texinfo (Overview): Add --relax-branch and
557 --no-relax-branch.
558 * doc/c-mips.texi (MIPS Opts): Document --relax-branch and
559 --no-relax-branch.
560
9daf7bab
SL
5612013-06-09 Sandra Loosemore <sandra@codesourcery.com>
562
563 * config/tc-nios2.c (nios2_parse_args): Allow trap argument to
564 omitted.
565
d301a56b
RS
5662013-06-08 Catherine Moore <clm@codesourcery.com>
567
568 * config/tc-mips.c (is_opcode_valid): Build ASE mask.
569 (is_opcode_valid_16): Pass ase value to opcode_is_member.
570 (append_insn): Change INSN_xxxx to ASE_xxxx.
571
7bab7634
DC
5722013-06-01 George Thomas <george.thomas@atmel.com>
573
574 * gas/config/tc-avr.c: Change ISA for devices with USB support to
575 AVR_ISA_XMEGAU
576
f60cf82f
L
5772013-05-31 H.J. Lu <hongjiu.lu@intel.com>
578
579 * config/tc-i386.c (md_begin): Don't align text/data/bss sections
580 for ELF.
581
a3f278e2
CM
5822013-05-31 Paul Brook <paul@codesourcery.com>
583
584 gas/
585 * config/tc-mips.c (s_ehword): New.
586
067ec077
CM
5872013-05-30 Paul Brook <paul@codesourcery.com>
588
589 * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH.
590
d6101ac2
MR
5912013-05-29 Maciej W. Rozycki <macro@codesourcery.com>
592
593 * write.c (resolve_reloc_expr_symbols): On REL targets don't
594 convert relocs who have no relocatable field either. Rephrase
595 the conditional so that the PC-relative check is only applied
596 for REL targets.
597
f19ccbda
MR
5982013-05-28 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
599
600 * config/tc-mips.c (macro) <ld>: Don't use $zero for address
601 calculation.
602
418009c2
YZ
6032013-05-28 Yufeng Zhang <yufeng.zhang@arm.com>
604
605 * config/tc-aarch64.c (reloc_table): Update to use
477330fc 606 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of
418009c2
YZ
607 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE.
608 (md_apply_fix): Likewise.
609 (aarch64_force_relocation): Likewise.
610
0a8897c7
KT
6112013-05-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
612
613 * config/tc-arm.c (it_fsm_post_encode): Improve
614 warning messages about deprecated IT block formats.
615
89d2a2a3
MS
6162013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com>
617
618 * config/tc-aarch64.c (md_apply_fix): Move value range checking
619 inside fx_done condition.
620
c77c0862
RS
6212013-05-22 Jürgen Urban <JuergenUrban@gmx.de>
622
623 * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB.
624
c0637f3a
PB
6252013-05-20 Peter Bergner <bergner@vnet.ibm.com>
626
627 * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error
628 and clean up warning when using PRINT_OPCODE_TABLE.
629
5656a981
AM
6302013-05-20 Alan Modra <amodra@gmail.com>
631
632 * config/tc-ppc.c (md_apply_fix): Hoist code common to insn
633 and data fixups performing shift/high adjust/sign extension on
634 fieldval. Sink fx_pcrel handling and checks. Use fixP->fx_size
635 when writing data fixups rather than recalculating size.
636
997b26e8
JBG
6372013-05-16 Jan-Benedict Glaw <jbglaw@lug-owl.de>
638
639 * doc/c-msp430.texi: Fix typo.
640
9f6e76f4
TG
6412013-05-16 Tristan Gingold <gingold@adacore.com>
642
643 * config/tc-ppc.c (ppc_is_toc_sym): Symbols of class XMC_TC
644 are also TOC symbols.
645
638d3803
NC
6462013-05-16 Nick Clifton <nickc@redhat.com>
647
648 * config/tc-msp430.c: Make -mmcu recognise more part numbers.
649 Add -mcpu command to specify core type.
997b26e8 650 * doc/c-msp430.texi: Update documentation.
638d3803 651
b015e599
AP
6522013-05-09 Andrew Pinski <apinski@cavium.com>
653
654 * config/tc-mips.c (struct mips_set_options): New ase_virt field.
655 (mips_opts): Update for the new field.
656 (file_ase_virt): New variable.
657 (ISA_SUPPORTS_VIRT_ASE): New macro.
658 (ISA_SUPPORTS_VIRT64_ASE): New macro.
659 (MIPS_CPU_ASE_VIRT): New define.
660 (is_opcode_valid): Handle ase_virt.
661 (macro_build): Handle "+J".
662 (validate_mips_insn): Likewise.
663 (mips_ip): Likewise.
664 (enum options): Add OPTION_VIRT and OPTION_NO_VIRT.
665 (md_longopts): Add mvirt and mnovirt
666 (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT.
667 (mips_after_parse_args): Handle ase_virt field.
668 (s_mipsset): Handle "virt" and "novirt".
669 (mips_elf_final_processing): Add a comment about virt ASE might need
670 a new flag.
671 (md_show_usage): Print out the usage of -mvirt and mno-virt options.
672 * doc/c-mips.texi: Document -mvirt and -mno-virt.
673 Document ".set virt" and ".set novirt".
674
da8094d7
AM
6752013-05-09 Alan Modra <amodra@gmail.com>
676
677 * config/tc-ppc.c (md_apply_fix): Sign extend fieldval under
678 control of operand flag bits.
679
c5f8c205
AM
6802013-05-07 Alan Modra <amodra@gmail.com>
681
682 * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro.
683 (PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise.
684 (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise.
685 (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise.
686 (md_apply_fix): Set fx_no_overflow for assorted relocations.
687 Shift and sign-extend fieldval for use by some VLE reloc
688 operand->insert functions.
689
b47468a6
CM
6902013-05-06 Paul Brook <paul@codesourcery.com>
691 Catherine Moore <clm@codesourcery.com>
692
c5f8c205
AM
693 * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL.
694 (limited_pcrel_reloc_p): Likewise.
b47468a6
CM
695 (md_apply_fix): Likewise.
696 (tc_gen_reloc): Likewise.
697
2de39019
CM
6982013-05-06 Richard Sandiford <rdsandiford@googlemail.com>
699
700 * config/tc-mips.c (limited_pcrel_reloc_p): New function.
701 (mips_fix_adjustable): Adjust pc-relative check to use
702 limited_pc_reloc_p.
703
754e2bb9
RS
7042013-05-02 Richard Sandiford <rdsandiford@googlemail.com>
705
706 * config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries.
707 (s_mips_stab): Do not restrict to stabn only.
708
13761a11
NC
7092013-05-02 Nick Clifton <nickc@redhat.com>
710
711 * config/tc-msp430.c: Add support for the MSP430X architecture.
712 Add code to insert a NOP instruction after any instruction that
713 might change the interrupt state.
714 Add support for the LARGE memory model.
715 Add code to initialise the .MSP430.attributes section.
716 * config/tc-msp430.h: Add support for the MSP430X architecture.
717 * doc/c-msp430.texi: Document the new -mL and -mN command line
718 options.
719 * NEWS: Mention support for the MSP430X architecture.
720
df26367c
MR
7212013-05-01 Maciej W. Rozycki <macro@codesourcery.com>
722
723 * configure.tgt: Replace alpha*-*-linuxecoff* pattern with
724 alpha*-*-linux*ecoff*.
725
f02d8318
CF
7262013-04-30 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
727
728 * config/tc-mips.c (mips_ip): Add sizelo.
729 For "+C", "+G", and "+H", set sizelo and compare against it.
730
b40bf0a2
NC
7312013-04-29 Nick Clifton <nickc@redhat.com>
732
733 * as.c (Options): Add -gdwarf-sections.
734 (parse_args): Likewise.
735 * as.h (flag_dwarf_sections): Declare.
736 * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes.
737 (process_entries): When -gdwarf-sections is enabled generate
738 fragmentary .debug_line sections.
739 (out_debug_line): Set the section for the .debug_line section end
740 symbol.
741 * doc/as.texinfo: Document -gdwarf-sections.
742 * NEWS: Mention -gdwarf-sections.
743
8eeccb77 7442013-04-26 Christian Groessler <chris@groessler.org>
00a3147e
CG
745
746 * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdline
747 according to the target parameter. Don't call s_segm since s_segm
748 calls bfd_set_arch_mach using stdoutput, but stdoutput isn't
749 initialized yet.
750 (md_begin): Call s_segm according to target parameter from command
751 line.
752
49926cd0
AM
7532013-04-25 Alan Modra <amodra@gmail.com>
754
755 * configure.in: Allow little-endian linux.
756 * configure: Regenerate.
757
e3031850
SL
7582013-04-24 Sandra Loosemore <sandra@codesourcery.com>
759
760 * config/tc-nios2.c (nios2_control_register_arg_p): Rename
761 "fstatus" control register to "eccinj".
762
cb948fc0
KT
7632013-04-19 Kai Tietz <ktietz@redhat.com>
764
765 * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin.
766
4455e9ad
JB
7672013-04-15 Julian Brown <julian@codesourcery.com>
768
769 * expr.c (add_to_result, subtract_from_result): Make global.
770 * expr.h (add_to_result, subtract_from_result): Add prototypes.
771 * config/tc-sh.c (sh_optimize_expr): Use add_to_result,
772 subtract_from_result to handle extra bit of precision for .sleb128
773 directive operands.
774
956a6ba3
JB
7752013-04-10 Julian Brown <julian@codesourcery.com>
776
777 * read.c (convert_to_bignum): Add sign parameter. Use it
778 instead of X_unsigned to determine sign of resulting bignum.
779 (emit_expr): Pass extra argument to convert_to_bignum.
780 (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass
781 X_extrabit to convert_to_bignum.
782 (parse_bitfield_cons): Set X_extrabit.
783 * expr.c (make_expr_symbol, expr_build_uconstant, operand):
784 Initialise X_extrabit field as appropriate.
785 (add_to_result): New.
786 (subtract_from_result): New.
787 (expr): Use above.
788 * expr.h (expressionS): Add X_extrabit field.
789
eb9f3f00
JB
7902013-04-10 Jan Beulich <jbeulich@suse.com>
791
792 * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base
793 register being PC when is_t or writeback, and use distinct
794 diagnostic for the latter case.
795
ccb84d65
JB
7962013-04-10 Jan Beulich <jbeulich@suse.com>
797
798 * gas/config/tc-arm.c (parse_operands): Re-write
799 po_barrier_or_imm().
800 (do_barrier): Remove bogus constraint().
801 (do_t_barrier): Remove.
802
4d13caa0
NC
8032013-04-09 Joerg Wunsch <joerg.wunsch@atmel.com>
804
805 * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2,
806 ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2,
807 ATmega2564RFR2
808 * gas/doc/c-avr.texi (-mmcu documentation): Likewise.
809
16d02dc9
JB
8102013-04-09 Jan Beulich <jbeulich@suse.com>
811
812 * gas/config/tc-arm.c (do_vmrs): Accept all control registers.
813 Use local variable Rt in more places.
814 (do_vmsr): Accept all control registers.
815
05ac0ffb
JB
8162013-04-09 Jan Beulich <jbeulich@suse.com>
817
818 * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
819 if there was none specified for moves between scalar and core
820 register.
821
2d51fb74
JB
8222013-04-09 Jan Beulich <jbeulich@suse.com>
823
824 * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the
825 NEON_ALL_LANES case.
826
94dcf8bf
JB
8272013-04-08 Jan Beulich <jbeulich@suse.com>
828
829 * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for
830 PC-relative VSTR.
831
1472d06f
JB
8322013-04-08 Jan Beulich <jbeulich@suse.com>
833
834 * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq
835 entry to sp_fiq.
836
0c76cae8
AM
8372013-04-03 Alan Modra <amodra@gmail.com>
838
839 * doc/as.texinfo: Add support to generate man options for h8300.
840 * doc/c-h8300.texi: Likewise.
841
92eb40d9
RR
8422013-03-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
843
844 * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and
845 Cortex-A57.
846
51dcdd4d
NC
8472013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com>
848
849 PR binutils/15068
850 * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array.
851
c5d685bf
NC
8522013-03-26 Nick Clifton <nickc@redhat.com>
853
9b978282
NC
854 PR gas/15295
855 * listing.c (rebuffer_line): Rewrite to avoid seeking back to the
856 start of the file each time.
857
c5d685bf
NC
858 PR gas/15178
859 * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for
860 FreeBSD targets.
861
9699c833
TG
8622013-03-26 Douglas B Rupp <rupp@gnat.com>
863
864 * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment
865 after fixup.
866
4755303e
WN
8672013-03-21 Will Newton <will.newton@linaro.org>
868
869 * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all
870 pc-relative str instructions in Thumb mode.
871
81f5558e
NC
8722013-03-21 Michael Schewe <michael.schewe@gmx.net>
873
874 * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
875 @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
876 R_H8_DISP32A16.
877 * config/tc-h8300.h: Remove duplicated defines.
878
71863e73
NC
8792013-03-21 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
880
881 PR gas/15282
882 * tc-avr.c (mcu_has_3_byte_pc): New function.
883 (tc_cfi_frame_initial_instructions): Call it to find return
884 address size.
885
795b8e6b
NC
8862013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com>
887
888 PR gas/15095
889 * config/tc-tic6x.c (tic6x_try_encode): Handle
890 tic6x_coding_dreg_(msb|lsb) field coding types and use it to
891 encode register pair numbers when required.
892
ba86b375
WN
8932013-03-15 Will Newton <will.newton@linaro.org>
894
895 * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register
896 in vstr in Thumb mode for pre-ARMv7 cores.
897
9e6f3811
AS
8982013-03-14 Andreas Schwab <schwab@suse.de>
899
900 * doc/c-arc.texi (ARC Directives): Revert last change and use
901 @itemize instead of @table.
902 * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
903
b10bf8c5
NC
9042013-03-14 Nick Clifton <nickc@redhat.com>
905
906 PR gas/15273
907 * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a
908 NULL message, instead just check ARM_CPU_IS_ANY directly.
909
ba724cfc
NC
9102013-03-14 Nick Clifton <nickc@redhat.com>
911
912 PR gas/15212
9e6f3811 913 * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet
ba724cfc
NC
914 for table format.
915 * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
916 to the @item directives.
917 (ARM-Neon-Alignment): Move to correct place in the document.
918 * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
919 formatting.
920 * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
921 @smallexample.
922
531a94fd
SL
9232013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
924
925 * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'
926 case. Add default BAD_CASE to switch.
927
dad60f8e
SL
9282013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
929
930 * config/tc-nios2.c (nios2_assemble_args_ds): New function.
931 (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
932
dd5181d5
KT
9332013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
934
935 * config/tc-arm.c (crc_ext_armv8): New feature set.
936 (UNPRED_REG): New macro.
937 (do_crc32_1): New function.
938 (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
939 do_crc32ch, do_crc32cw): Likewise.
940 (TUEc): New macro.
941 (insns): Add entries for crc32 mnemonics.
942 (arm_extensions): Add entry for crc.
943
8e723a10
CLT
9442013-03-08 Chung-Lin Tang <cltang@codesourcery.com>
945
946 * write.h (struct fix): Add fx_dot_frag field.
947 (dot_frag): Declare.
948 * write.c (dot_frag): New variable.
949 (fix_new_internal): Set fx_dot_frag field with dot_frag.
950 (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
951 * expr.c (expr): Save value of frag_now in dot_frag when setting
952 dot_value.
953 * read.c (emit_expr): Likewise. Delete comments.
954
be05d201
L
9552013-03-07 H.J. Lu <hongjiu.lu@intel.com>
956
957 * config/tc-i386.c (flag_code_names): Removed.
958 (i386_index_check): Rewrote.
959
62b0d0d5
YZ
9602013-03-05 Yufeng Zhang <yufeng.zhang@arm.com>
961
962 * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
963 add comment.
964 (aarch64_double_precision_fmovable): New function.
965 (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
966 function; handle hexadecimal representation of IEEE754 encoding.
967 (parse_operands): Update the call to parse_aarch64_imm_float.
968
165de32a
L
9692013-02-28 H.J. Lu <hongjiu.lu@intel.com>
970
971 * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
972 (check_hle): Updated.
973 (md_assemble): Likewise.
974 (parse_insn): Likewise.
975
d5de92cf
L
9762013-02-28 H.J. Lu <hongjiu.lu@intel.com>
977
978 * config/tc-i386.c (_i386_insn): Add rep_prefix.
9e6f3811 979 (md_assemble): Check if REP prefix is OK.
d5de92cf
L
980 (parse_insn): Remove expecting_string_instruction. Set
981 i.rep_prefix.
982
e60bb1dd
YZ
9832013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
984
985 * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
986
aeebdd9b
YZ
9872013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
988
989 * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
990 for system registers.
991
4107ae22
DD
9922013-02-27 DJ Delorie <dj@redhat.com>
993
994 * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
995 (rl78_op): Handle %code().
996 (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
997 (tc_gen_reloc): Likwise; convert to a computed reloc.
998 (md_apply_fix): Likewise.
999
151fa98f
NC
10002013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
1001
1002 * config/rl78-parse.y: Fix encoding of DIVWU insn.
1003
70a8bc5b 10042013-02-25 Terry Guo <terry.guo@arm.com>
1005
1006 * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
1007 * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
1008 list of accepted CPUs.
1009
5c111e37
L
10102013-02-19 H.J. Lu <hongjiu.lu@intel.com>
1011
1012 PR gas/15159
1013 * config/tc-i386.c (cpu_arch): Add ".smap".
1014
1015 * doc/c-i386.texi: Document smap.
1016
8a75745d
MR
10172013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1018
1019 * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
1020 mips_assembling_insn appropriately.
1021 (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
1022
79850f26
MR
10232013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1024
cf29fc61 1025 * config/tc-mips.c (append_insn): Correct indentation, remove
79850f26
MR
1026 extraneous braces.
1027
4c261dff
NC
10282013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1029
5c111e37 1030 * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
4c261dff 1031
ea33f281
NC
10322013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
1033
1034 * configure.tgt: Add nios2-*-rtems*.
1035
a1ccaec9
YZ
10362013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
1037
1038 * config/tc-aarch64.c (md_begin): Change to check if 'name' is
1039 NULL.
1040
0aa27725
RS
10412013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
1042
1043 * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
1044 (macro): Use it. Assert that trunc.w.s is not used for r5900.
1045
da4339ed
NC
10462013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com>
1047
1048 * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
1049 core.
1050
36591ba1 10512013-02-06 Sandra Loosemore <sandra@codesourcery.com>
5c111e37 1052 Andrew Jenner <andrew@codesourcery.com>
36591ba1
SL
1053
1054 Based on patches from Altera Corporation.
1055
1056 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
1057 (TARGET_CPU_HFILES): Add config/tc-nios2.h.
1058 * Makefile.in: Regenerated.
1059 * configure.tgt: Add case for nios2*-linux*.
1060 * config/obj-elf.c: Conditionally include elf/nios2.h.
1061 * config/tc-nios2.c: New file.
1062 * config/tc-nios2.h: New file.
1063 * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
1064 * doc/Makefile.in: Regenerated.
1065 * doc/all.texi: Set NIOSII.
1066 * doc/as.texinfo (Overview): Add Nios II options.
1067 (Machine Dependencies): Include c-nios2.texi.
1068 * doc/c-nios2.texi: New file.
1069 * NEWS: Note Altera Nios II support.
1070
94d4433a
AM
10712013-02-06 Alan Modra <amodra@gmail.com>
1072
1073 PR gas/14255
1074 * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
1075 Don't skip fixups with fx_subsy non-NULL.
1076 * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
1077 with fx_subsy non-NULL.
1078
ace9af6f
L
10792013-02-04 H.J. Lu <hongjiu.lu@intel.com>
1080
1081 * doc/c-metag.texi: Add "@c man" markers.
1082
89d67ed9
AM
10832013-02-04 Alan Modra <amodra@gmail.com>
1084
1085 * write.c (fixup_segment): Return void. Delete seg_reloc_count
1086 related code.
1087 (TC_ADJUST_RELOC_COUNT): Delete.
1088 * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
1089
89072bd6
AM
10902013-02-04 Alan Modra <amodra@gmail.com>
1091
1092 * po/POTFILES.in: Regenerate.
1093
f9b2d544
NC
10942013-01-30 Markos Chandras <markos.chandras@imgtec.com>
1095
1096 * config/tc-metag.c: Make SWAP instruction less permissive with
1097 its operands.
1098
392ca752
DD
10992013-01-29 DJ Delorie <dj@redhat.com>
1100
1101 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
1102 relocs in .word/.etc statements.
1103
427d0db6
RM
11042013-01-29 Roland McGrath <mcgrathr@google.com>
1105
1106 * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
1107 immediate value for 8-bit offset" error so it shows line info.
1108
4faf939a
JM
11092013-01-24 Joseph Myers <joseph@codesourcery.com>
1110
1111 * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
1112 for 64-bit output.
1113
78c8d46c
NC
11142013-01-24 Nick Clifton <nickc@redhat.com>
1115
1116 * config/tc-v850.c: Add support for e3v5 architecture.
1117 * doc/c-v850.texi: Mention new support.
1118
fb5b7503
NC
11192013-01-23 Nick Clifton <nickc@redhat.com>
1120
1121 PR gas/15039
1122 * config/tc-avr.c: Include dwarf2dbg.h.
1123
8ce3d284
L
11242013-01-18 H.J. Lu <hongjiu.lu@intel.com>
1125
1126 * config/tc-i386.c (reloc): Support size relocation only for ELF.
1127 (tc_i386_fix_adjustable): Likewise.
1128 (lex_got): Likewise.
1129 (tc_gen_reloc): Likewise.
1130
f5555712
YZ
11312013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
1132
1133 * config/tc-aarch64.c (output_operand_error_record): Change to output
1134 the out-of-range error message as value-expected message if there is
1135 only one single value in the expected range.
1136 (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
1137 LSL #0 as a programmer-friendly feature.
1138
8fd4256d
L
11392013-01-16 H.J. Lu <hongjiu.lu@intel.com>
1140
1141 * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
1142 (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
1143 BFD_RELOC_64_SIZE relocations.
1144 (lex_got): Support "symbol@SIZE" and don't create GOT symbol
1145 for it.
1146 (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
1147 relocations against local symbols.
1148
a5840dce
AM
11492013-01-16 Alan Modra <amodra@gmail.com>
1150
1151 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
1152 finding some sort of toc syntax error, and break to avoid
1153 compiler uninit warning.
1154
af89796a
L
11552013-01-15 H.J. Lu <hongjiu.lu@intel.com>
1156
1157 PR gas/15019
1158 * config/tc-i386.c (lex_got): Increment length by 1 if the
1159 relocation token is removed.
1160
dd42f060
NC
11612013-01-15 Nick Clifton <nickc@redhat.com>
1162
1163 * config/tc-v850.c (md_assemble): Allow signed values for
1164 V850E_IMMEDIATE.
1165
464e3686
SK
11662013-01-11 Sean Keys <skeys@ipdatasys.com>
1167
1168 * config/tc-xgate.c (md_begin): Fix mistake made when going from
af89796a 1169 git to cvs.
464e3686 1170
5817ffd1
PB
11712013-01-10 Peter Bergner <bergner@vnet.ibm.com>
1172
1173 * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
1174 * doc/c-ppc.texi (PowerPC-Opts): Likewise.
1175 * config/tc-ppc.c (md_show_usage): Likewise.
1176 (ppc_handle_align): Handle power8's group ending nop.
1177
f4b1f6a9
SK
11782013-01-10 Sean Keys <skeys@ipdatasys.com>
1179
1180 * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
af89796a 1181 that the assember exits after the opcodes have been printed.
f4b1f6a9 1182
34bca508
L
11832013-01-10 H.J. Lu <hongjiu.lu@intel.com>
1184
1185 * app.c: Remove trailing white spaces.
1186 * as.c: Likewise.
1187 * as.h: Likewise.
1188 * cond.c: Likewise.
1189 * dw2gencfi.c: Likewise.
1190 * dwarf2dbg.h: Likewise.
1191 * ecoff.c: Likewise.
1192 * input-file.c: Likewise.
1193 * itbl-lex.h: Likewise.
1194 * output-file.c: Likewise.
1195 * read.c: Likewise.
1196 * sb.c: Likewise.
1197 * subsegs.c: Likewise.
1198 * symbols.c: Likewise.
1199 * write.c: Likewise.
1200 * config/tc-i386.c: Likewise.
1201 * doc/Makefile.am: Likewise.
1202 * doc/Makefile.in: Likewise.
1203 * doc/c-aarch64.texi: Likewise.
1204 * doc/c-alpha.texi: Likewise.
1205 * doc/c-arc.texi: Likewise.
1206 * doc/c-arm.texi: Likewise.
1207 * doc/c-avr.texi: Likewise.
1208 * doc/c-bfin.texi: Likewise.
1209 * doc/c-cr16.texi: Likewise.
1210 * doc/c-d10v.texi: Likewise.
1211 * doc/c-d30v.texi: Likewise.
1212 * doc/c-h8300.texi: Likewise.
1213 * doc/c-hppa.texi: Likewise.
1214 * doc/c-i370.texi: Likewise.
1215 * doc/c-i386.texi: Likewise.
1216 * doc/c-i860.texi: Likewise.
1217 * doc/c-m32c.texi: Likewise.
1218 * doc/c-m32r.texi: Likewise.
1219 * doc/c-m68hc11.texi: Likewise.
1220 * doc/c-m68k.texi: Likewise.
1221 * doc/c-microblaze.texi: Likewise.
1222 * doc/c-mips.texi: Likewise.
1223 * doc/c-msp430.texi: Likewise.
1224 * doc/c-mt.texi: Likewise.
1225 * doc/c-s390.texi: Likewise.
1226 * doc/c-score.texi: Likewise.
1227 * doc/c-sh.texi: Likewise.
1228 * doc/c-sh64.texi: Likewise.
1229 * doc/c-tic54x.texi: Likewise.
1230 * doc/c-tic6x.texi: Likewise.
1231 * doc/c-v850.texi: Likewise.
1232 * doc/c-xc16x.texi: Likewise.
1233 * doc/c-xgate.texi: Likewise.
1234 * doc/c-xtensa.texi: Likewise.
1235 * doc/c-z80.texi: Likewise.
1236 * doc/internals.texi: Likewise.
1237
4c665b71
RM
12382013-01-10 Roland McGrath <mcgrathr@google.com>
1239
1240 * hash.c (hash_new_sized): Make it global.
1241 * hash.h: Declare it.
1242 * macro.c (define_macro): Use hash_new_sized instead of hash_new,
1243 pass a small size.
1244
a3c62988
NC
12452013-01-10 Will Newton <will.newton@imgtec.com>
1246
1247 * Makefile.am: Add Meta.
1248 * Makefile.in: Regenerate.
1249 * config/tc-metag.c: New file.
1250 * config/tc-metag.h: New file.
1251 * configure.tgt: Add Meta.
1252 * doc/Makefile.am: Add Meta.
1253 * doc/Makefile.in: Regenerate.
1254 * doc/all.texi: Add Meta.
1255 * doc/as.texiinfo: Document Meta options.
1256 * doc/c-metag.texi: New file.
1257
b37df7c4
SE
12582013-01-09 Steve Ellcey <sellcey@mips.com>
1259
1260 * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
1261 calls.
1262 * config/tc-mips.c (internalError): Remove, replace with abort.
1263
a3251895
YZ
12642013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
1265
1266 * config/tc-aarch64.c (parse_operands): Change to compare the result
1267 of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
1268
8ab8155f
NC
12692013-01-07 Nick Clifton <nickc@redhat.com>
1270
1271 PR gas/14887
1272 * config/tc-arm.c (skip_past_char): Skip whitespace before the
1273 anticipated character.
1274 * config/tc-arm.c (parse_address_main): Delete skip of whitespace
1275 here as it is no longer needed.
1276
a4ac1c42
AS
12772013-01-06 Andreas Schwab <schwab@linux-m68k.org>
1278
1279 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
1280 * doc/c-score.texi (SCORE-Opts): Likewise.
1281 * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
1282
e407c74b
NC
12832013-01-04 Juergen Urban <JuergenUrban@gmx.de>
1284
1285 * config/tc-mips.c: Add support for MIPS r5900.
1286 Add M_LQ_AB and M_SQ_AB to support large values for instructions
1287 lq and sq.
1288 (can_swap_branch_p, get_append_method): Detect some conditional
1289 short loops to fix a bug on the r5900 by NOP in the branch delay
1290 slot.
1291 (M_MUL): Support 3 operands in multu on r5900.
1292 (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
1293 (s_mipsset): Force 32 bit floating point on r5900.
1294 (mips_ip): Check parameter range of instructions mfps and mtps on
1295 r5900.
1296 * configure.in: Detect CPU type when target string contains r5900
1297 (e.g. mips64r5900el-linux-gnu).
1298
62658407
L
12992013-01-02 H.J. Lu <hongjiu.lu@intel.com>
1300
1301 * as.c (parse_args): Update copyright year to 2013.
1302
95830fd1
YZ
13032013-01-02 Yufeng Zhang <yufeng.zhang@arm.com>
1304
1305 * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
1306 and "cortex57".
1307
517bb291 13082013-01-02 Nick Clifton <nickc@redhat.com>
d709e4e6 1309
517bb291
NC
1310 PR gas/14987
1311 * config/tc-arm.c (parse_address_main): Skip whitespace before a
1312 closing bracket.
d709e4e6 1313
517bb291 1314For older changes see ChangeLog-2012
08d56133 1315\f
517bb291 1316Copyright (C) 2013 Free Software Foundation, Inc.
752937aa
NC
1317
1318Copying and distribution of this file, with or without modification,
1319are permitted in any medium without royalty provided the copyright
1320notice and this notice are preserved.
1321
08d56133
NC
1322Local Variables:
1323mode: change-log
1324left-margin: 8
1325fill-column: 74
1326version-control: never
1327End: