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3c14a432
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12013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
2
3 * config/tc-mips.c (INSERT_BITS, INSERT_OPERAND, MIPS16_INSERT_OPERAND):
4 Delete.
5
364215c8
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62013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
7
8 * config/tc-mips.c (mips32_to_16_reg_map): Delete.
9 (match_entry_exit_operand): New function.
10 (match_save_restore_list_operand): Likewise.
11 (match_operand): Use them.
12 (check_absolute_expr): Delete.
13 (mips16_ip): Rewrite main parsing loop to use mips_operands.
14
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152013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
16
17 * config/tc-mips.c: Enable functions commented out in previous patch.
18 (SKIP_SPACE_TABS): Move further up file.
19 (mips32_to_micromips_reg_b_map, mips32_to_micromips_reg_c_map)
20 (mips32_to_micromips_reg_d_map, mips32_to_micromips_reg_e_map)
21 (ips32_to_micromips_reg_f_map, mips32_to_micromips_reg_g_map)
22 (mips32_to_micromips_reg_l_map, mips32_to_micromips_reg_m_map)
23 (mips32_to_micromips_reg_q_map, mips32_to_micromips_reg_n_map)
24 (micromips_imm_b_map, micromips_imm_c_map): Delete.
25 (mips_lookup_reg_pair): Delete.
26 (macro): Use report_bad_range and report_bad_field.
27 (mips_immed, expr_const_in_range): Delete.
28 (mips_ip): Rewrite main parsing loop to use new functions.
29
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302013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
31
32 * config/tc-mips.c (mips_oddfpreg_ok): Move further up file.
33 Change return type to bfd_boolean.
34 (report_bad_range, report_bad_field): New functions.
35 (mips_arg_info): New structure.
36 (match_const_int, convert_reg_type, check_regno, match_int_operand)
37 (match_mapped_int_operand, match_msb_operand, match_reg_operand)
38 (match_reg_pair_operand, match_pcrel_operand, match_perf_reg_operand)
39 (match_addiusp_operand, match_clo_clz_dest_operand)
40 (match_lwm_swm_list_operand, match_mdmx_imm_reg_operand)
41 (match_pc_operand, match_tied_reg_operand, match_operand)
42 (check_completed_insn): New functions, commented out for now.
43
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442013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
45
46 * config/tc-mips.c (insn_insert_operand): New function.
47 (macro_build, mips16_macro_build): Put null character check
48 in the for loop and convert continues to breaks. Use operand
49 structures to handle constant operands.
50
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512013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
52
53 * config/tc-mips.c (validate_mips_insn): Move further up file.
54 Add insn_bits and decode_operand arguments. Use the mips_operand
55 fields to work out which bits an operand occupies. Detect double
56 definitions.
57 (validate_micromips_insn): Move further up file. Call into
58 validate_mips_insn.
59
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602013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
61
62 * config/tc-mips.c (mips16_macro_build): Remove 'Y' case.
63
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642013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
65
66 * config/tc-mips.c (macro_build): Take an int for "C", "k", "\\"
67 and "~".
68 (macro): Update accordingly.
69
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RS
702013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
71
72 * config/tc-mips.c (imm_expr, imm2_expr, offset_expr): Tweak commentary.
73 (imm_reloc): Delete.
74 (md_assemble): Remove imm_reloc handling.
75 (mips_ip): Update commentary. Use offset_expr and offset_reloc
76 rather than imm_expr and imm_reloc for 'i', 'j' and 'u'.
77 Use a temporary array rather than imm_reloc when parsing
78 constant expressions. Remove imm_reloc initialization.
79 (mips16_ip): Update commentary. Use offset_expr and offset_reloc
80 for the relaxable field. Use a relax_char variable to track the
81 type of this field. Remove imm_reloc initialization.
82
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832013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
84
85 * config/tc-mips.c (mips16_ip): Handle "I".
86
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872013-07-12 Maciej W. Rozycki <macro@codesourcery.com>
88
89 * config/tc-mips.c (mips_flag_nan2008): New variable.
90 (options): Add OPTION_NAN enum value.
91 (md_longopts): Handle it.
92 (md_parse_option): Likewise.
93 (s_nan): New function.
94 (mips_elf_final_processing): Handle EF_MIPS_NAN2008.
95 (md_show_usage): Add -mnan.
96
97 * doc/as.texinfo (Overview): Add -mnan.
98 * doc/c-mips.texi (MIPS Opts): Document -mnan.
99 (MIPS NaN Encodings): New node. Document .nan directive.
100 (MIPS-Dependent): List the new node.
101
c1094734
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1022013-07-09 Tristan Gingold <gingold@adacore.com>
103
104 * configure.com: Define HAVE_SYS_TYPES_H and HAVE_UNISTD_H
105
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1062013-07-08 Richard Sandiford <rdsandiford@googlemail.com>
107
108 * config/tc-mips.c (mips_ip): Unconditionally parse an expression
109 for 'A' and assume that the constant has been elided if the result
110 is an O_register.
111
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1122013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
113
114 * config/tc-mips.c (gprel16_reloc_p): New function.
115 (macro_read_relocs): Assume BFD_RELOC_LO16 if all relocs are
116 BFD_RELOC_UNUSED.
117 (offset_high_part, small_offset_p): New functions.
118 (nacro): Use them. Remove *_OB and *_DOB cases. For single-
119 register load and store macros, handle the 16-bit offset case first.
120 If a 16-bit offset is not suitable for the instruction we're
121 generating, load it into the temporary register using
122 ADDRESS_ADDI_INSN. Make the M_LI_DD code fall through into the
123 M_L_DAB code once the address has been constructed. For double load
124 and store macros, again handle the 16-bit offset case first.
125 If the second register cannot be accessed from the same high
126 part as the first, load it into AT using ADDRESS_ADDI_INSN.
127 Fix the handling of LD in cases where the first register is the
128 same as the base. Also handle the case where the offset is
129 not 16 bits and the second register cannot be accessed from the
130 same high part as the first. For unaligned loads and stores,
131 fuse the offbits == 12 and old "ab" handling. Apply this handling
132 whenever the second offset needs a different high part from the first.
133 Construct the offset using ADDRESS_ADDI_INSN where possible,
134 for offbits == 16 as well as offbits == 12. Use offset_reloc
135 when constructing the individual loads and stores.
136 (mips_ip): Set up imm_expr, imm2_expr, offset_expr, imm_reloc
137 and offset_reloc before matching against a particular opcode.
138 Handle elided 'A' constants. Allow 'A' constants to use
139 relocation operators.
140
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1412013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
142
143 * config/tc-mips.c (validate_mips_insn): Remove "[" and "]" handling.
144 (mips_ip): Likewise. Do not set is_mdmx for INSN_5400 instructions.
145 Check constraints on the VR5400 RZU.OB, SLL.OB and SRL.OB instructions.
146
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RS
1472013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
148
149 * config/tc-mips.c (mips_ip): Preserve the real bit number for "+p".
150 Require the msb to be <= 31 for "+s". Check that the size is <= 31
151 for both "+s" and "+S".
152
27c5c572
RS
1532013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
154
155 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn):
156 (mips_ip, mips16_ip): Handle "+i".
157
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1582013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
159
160 * config/tc-mips.c (mips32_to_micromips_reg_h_map): Delete.
161 (micromips_to_32_reg_h_map): Rename to...
162 (micromips_to_32_reg_h_map1): ...this.
163 (micromips_to_32_reg_i_map): Rename to...
164 (micromips_to_32_reg_h_map2): ...this.
165 (mips_lookup_reg_pair): New function.
166 (gpr_write_mask, macro): Adjust after above renaming.
167 (validate_micromips_insn): Remove "mi" handling.
168 (mips_ip): Likewise. Parse both registers in a pair for "mh".
169
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1702013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
171
172 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn)
173 (mips_ip): Remove "+D" and "+T" handling.
174
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1752013-07-05 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
176
177 * config/tc-s390.c (md_gather_operands, md_apply_fix): Support new
178 relocs.
179
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1802013-07-03 Marcus Shawcroft <marcus.shawcroft@arm.com>
181
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182 * config/tc-aarch64.c (reloc_table): Merge got_prel19 into got.
183
1842013-07-02 Marcus Shawcroft <marcus.shawcroft@arm.com>
185
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MS
186 * config/tc-aarch64.c (md_apply_fix): Reorder case values.
187 (aarch64_force_relocation): Likewise.
188
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1892013-07-02 Alan Modra <amodra@gmail.com>
190
191 * config/tc-ppc.c (ppc_elf_adjust_symtab): Don't make .TOC. weak.
192
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MR
1932013-06-26 Maciej W. Rozycki <macro@codesourcery.com>
194
195 * doc/as.texinfo (Overview): Remove @samp from MIPS ISA names.
196 * doc/c-mips.texi (MIPS Options): Remove @sc from MIPS ISA names.
197 Replace @sc{mips16} with literal `MIPS16'.
198 (MIPS ISA): Replace @sc{mips3} with literal `MIPS III'.
199
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YZ
2002013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
201
202 * config/tc-aarch64.c (reloc_table): Replace
203 BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with
204 BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to
205 BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and
206 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC.
207 (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC,
208 BFD_RELOC_AARCH64_LD32_GOT_LO12_NC,
209 BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC,
210 BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC,
211 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and
212 BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC.
213 (aarch64_force_relocation): Likewise.
214
cec5225b
YZ
2152013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
216
217 * config/tc-aarch64.c (ilp32_p): New static variable.
218 (elf64_aarch64_target_format): Return the target according to the
219 value of 'ilp32_p'.
220 (md_begin): Determine 'mach' according to the value of 'ilp32_p'.
221 (aarch64_opts): Add support for options '-milp32' and '-mlp64'.
222 (aarch64_dwarf2_addr_size): New function.
223 * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration.
224 (DWARF2_ADDR_SIZE): New define.
225
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2262013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
227
228 * doc/c-mips.texi: Use ISA instead of @sc{isa}.
229
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2302013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
231
232 * config/tc-mips.c (validate_mips_insn): Use STYPE rather than SHAMT.
233
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MR
2342013-06-25 Maciej W. Rozycki <macro@codesourcery.com>
235
236 * config/tc-mips.c (mips_set_options): Add insn32 member.
237 (mips_opts): Initialize it.
238 (NOP_INSN, NOP_INSN_SIZE): Handle insn32 mode.
239 (options): Add OPTION_INSN32 and OPTION_NO_INSN32 enum values.
240 (md_longopts): Add "minsn32" and "mno-insn32" options.
241 (is_size_valid): Handle insn32 mode.
242 (md_assemble): Pass instruction string down to macro.
243 (brk_fmt): Add second dimension and insn32 mode initializers.
244 (mfhl_fmt): Likewise.
245 (BRK_FMT, MFHL_FMT): Handle insn32 mode.
246 (macro_build) <'c'>: Handle microMIPS 32-bit BREAK encoding.
247 (macro_build_jalr, move_register): Handle insn32 mode.
248 (macro_build_branch_rs): Likewise.
249 (macro): Handle insn32 mode.
250 <M_JRADDIUSP>, <M_JRC>, <M_MOVEP>: New cases.
251 (mips_ip): Handle insn32 mode.
252 (md_parse_option): Handle OPTION_INSN32 and OPTION_NO_INSN32.
253 (s_mipsset): Handle "insn32" and "noinsn32" pseudo-ops.
254 (mips_handle_align): Handle insn32 mode.
255 (md_show_usage): Add -minsn32 and -mno-insn32.
256
257 * doc/as.texinfo (Target MIPS options): Add -minsn32 and
258 -mno-insn32 options.
259 (-minsn32, -mno-insn32): New options.
260 * doc/c-mips.texi (MIPS Opts): Add -minsn32 and -mno-insn32
261 options.
262 (MIPS assembly options): New node. Document .set insn32 and
263 .set noinsn32.
264 (MIPS-Dependent): List the new node.
265
d1706f38
NC
2662013-06-25 Nick Clifton <nickc@redhat.com>
267
268 * config/tc-msp430.c (msp430_srcoperand): Do not allow the use of
269 the PC in indirect addressing on 430xv2 parts.
270 (msp430_operands): Add version test to hardware bug encoding
271 restrictions.
272
477330fc
RM
2732013-06-24 Roland McGrath <mcgrathr@google.com>
274
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RM
275 * config/tc-arm.c (parse_reg_list): Use skip_past_char for '}',
276 so it skips whitespace before it.
277 (s_arm_unwind_save_mmxwr, s_arm_unwind_save_mmxwcg): Likewise.
278
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RM
279 * config/tc-arm.c (arm_symbol_chars): Include '{' and '}'.
280 (arm_reg_parse_multi): Skip whitespace first.
281 (parse_reg_list): Likewise.
282 (parse_vfp_reg_list): Likewise.
283 (s_arm_unwind_save_mmxwcg): Likewise.
284
24382199
NC
2852013-06-24 Nick Clifton <nickc@redhat.com>
286
287 PR gas/15623
288 * config/tc-arm.c (do_t_smc): Mark as ending an IT block.
289
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2902013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
291
292 * config/tc-mips.c (mips_ip): Fix swapped bit numbers in comments.
293
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RS
2942013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
295
296 * config/tc-mips.c: Assert that offsetT and valueT are at least
297 8 bytes in size.
298 (GPR_SMIN, GPR_SMAX): New macros.
299 (macro, mips_ip): Remove code for 4-byte valueT and offsetT.
300
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3012013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
302
303 * config/tc-mips.c: Remove OBJ_ELF, OBJ_MAYBE_ELF and IS_ELF
304 conditions. Remove any code deselected by them.
305 (s_mips_frame, s_mips_mask): Handle ECOFF_DEBUGGING case first.
306
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3072013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
308
309 * NEWS: Note removal of ECOFF support.
310 * doc/as.texinfo (--emulation): Update for the removal of MIPS ECOFF.
311 * Makefile.am (TARG_ENV_HFILES): Remove config/te-lnews.h.
312 (MULTI_CFILES): Remove config/e-mipsecoff.c.
313 * Makefile.in: Regenerate.
314 * configure.in: Remove MIPS ECOFF references.
315 (mips-sony-bsd*, mips-*-bsd*, mips-*-lnews*-ecoff, mips-*-*-ecoff):
316 Delete cases.
317 (mips-*-irix5*-*, mips*-*-linux*-*, mips*-*-freebsd*)
318 (mips*-*-kfreebsd*-gnu, mips-*-*-elf): Fold into...
319 (mips-*-*): ...this single case.
320 (mipsbecoff, mipslecoff, mipsecoff): Remove emulations. Expect
321 MIPS emulations to be e-mipself*.
322 * configure: Regenerate.
323 * configure.tgt (mips-sony-bsd*, mips-*-ultrix*, mips-*-osf*)
324 (mips-*-ecoff*, mips-*-pe*, mips-*-irix*, ips-*-lnews*, mips-*-riscos*)
325 (mips-*-sysv*): Remove coff and ecoff cases.
326 * as.c (mipsbecoff, mipslecoff, mipsecoff): Remove.
327 * ecoff.c: Remove reference to MIPS ECOFF.
328 * config/e-mipsecoff.c, config/te-lnews.h: Delete files.
329 * config/tc-mips.c (ECOFF_LITTLE_FORMAT): Delete.
330 (RDATA_SECTION_NAME, mips_target_form): Remove COFF and ECOFF cases.
331 (mips_hi_fixup): Tweak comment.
332 (append_insn): Require a howto.
333 (mips_after_parse_args): Remove OBJ_MAYBE_ECOFF code.
334
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3352013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
336
337 * doc/as.texinfo: Use MIPS rather than @sc{mips} throughout.
338 Use "CPU" instead of "cpu".
339 * doc/c-mips.texi: Likewise.
340 (MIPS Opts): Rename to MIPS Options.
341 (MIPS option stack): Rename to MIPS Option Stack.
342 (MIPS ASE instruction generation overrides): Rename to
343 MIPS ASE Instruction Generation Overrides (for now).
344 (MIPS floating-point): Rename to MIPS Floating-Point.
345
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3462013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
347
348 * doc/c-mips.texi (MIPS Macros): New section.
349 (MIPS Object): Replace with...
350 (MIPS Small Data): ...this new section.
351
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3522013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
353
354 * doc/c-mips.texi (MIPS symbol sizes): Move section further up file.
355 Capitalize name. Use @kindex instead of @cindex for .set entries.
356
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3572013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
358
359 * doc/c-mips.texi (MIPS Stabs): Remove section.
360
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3612013-06-20 Richard Sandiford <rdsandiford@googlemail.com>
362
363 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS, ISA_SUPPORTS_DSP_ASE)
364 (ISA_SUPPORTS_DSP64_ASE, ISA_SUPPORTS_DSPR2_ASE, ISA_SUPPORTS_EVA_ASE)
365 (ISA_SUPPORTS_MT_ASE, ISA_SUPPORTS_MCU_ASE, ISA_SUPPORTS_VIRT_ASE)
366 (ISA_SUPPORTS_VIRT64_ASE): Delete.
367 (mips_ase): New structure.
368 (mips_ases): New table.
369 (FP64_ASES): New macro.
370 (mips_ase_groups): New array.
371 (mips_isa_rev, mips_ase_mask, mips_check_isa_supports_ase)
372 (mips_check_isa_supports_ases, mips_set_ase, mips_lookup_ase): New
373 functions.
374 (is_opcode_valid): Use mips_ases to get the 64-bit ASE flags.
375 (md_parse_option): Use mips_ases and mips_set_ase instead of
376 separate case statements for each ASE option.
377 (mips_after_parse_args): Use FP64_ASES. Use
378 mips_check_isa_supports_ases to check the ASEs against
379 other options.
380 (s_mipsset): Use mips_ases and mips_set_ase instead of
381 separate if statements for each ASE option. Use
382 mips_check_isa_supports_ases, even when a non-ASE option
383 is specified.
384
63a4bc21
KT
3852013-06-19 Greta Yorsh <Greta.Yorsh@arm.com>
386
387 * config/tc-arm.c (arm_cpus): Add support for Cortex-A12.
388
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3892013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
390
391 * config/tc-mips.c (md_shortopts, options, md_longopts)
392 (md_longopts_size): Move earlier in file.
393
846ef2d0
RS
3942013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
395
396 * config/tc-mips.c (mips_set_options): Replace separate "ase_*" fields
397 with a single "ase" bitmask.
398 (mips_opts): Update accordingly.
399 (file_ase, file_ase_explicit): New variables.
400 (file_ase_mips3d, file_ase_mdmx, file_ase_smartmips, file_ase_dsp)
401 (file_ase_dspr2, file_ase_eva, file_ase_mt, file_ase_virt): Delete.
402 (ISA_HAS_ROR): Adjust for mips_set_options change.
403 (is_opcode_valid): Take the base ase mask directly from mips_opts.
404 (mips_ip): Adjust for mips_set_options change.
405 (md_parse_option): Likewise. Update file_ase_explicit.
406 (mips_after_parse_args): Adjust for mips_set_options change.
407 Use bitmask operations to select the default ASEs. Set file_ase
408 rather than individual per-ASE variables.
409 (s_mipsset): Adjust for mips_set_options change.
410 (mips_elf_final_processing): Test file_ase rather than
411 file_ase_mdmx. Remove commented-out code.
412
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4132013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
414
415 * config/tc-mips.c (mips_cpu_info): Add an "ase" field.
416 (MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, MIPS_CPU_ASE_MT)
417 (MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX, MIPS_CPU_ASE_DSPR2)
418 (MIPS_CPU_ASE_MCU, MIPS_CPU_ASE_VIRT, MIPS_CPU_ASE_EVA): Delete.
419 (mips_after_parse_args): Use the new "ase" field to choose
420 the default ASEs.
421 (mips_cpu_info_table): Move ASEs from the "flags" field to the
422 "ase" field.
423
e83a675f
RE
4242013-06-18 Richard Earnshaw <rearnsha@arm.com>
425
426 * config/tc-arm.c (symbol_preemptible): New function.
427 (relax_branch): Use it.
428
7f3c4072
CM
4292013-06-17 Catherine Moore <clm@codesourcery.com>
430 Maciej W. Rozycki <macro@codesourcery.com>
431 Chao-Ying Fu <fu@mips.com>
432
433 * config/tc-mips.c (mips_set_options): Add ase_eva.
434 (mips_set_options mips_opts): Add ase_eva.
435 (file_ase_eva): Declare.
436 (ISA_SUPPORTS_EVA_ASE): Define.
437 (IS_SEXT_9BIT_NUM): Define.
438 (MIPS_CPU_ASE_EVA): Define.
439 (is_opcode_valid): Add support for ase_eva.
440 (macro_build): Likewise.
441 (macro): Likewise.
442 (validate_mips_insn): Likewise.
443 (validate_micromips_insn): Likewise.
444 (mips_ip): Likewise.
445 (options): Add OPTION_EVA and OPTION_NO_EVA.
446 (md_longopts): Add -meva and -mno-eva.
447 (md_parse_option): Process new options.
448 (mips_after_parse_args): Check for valid EVA combinations.
449 (s_mipsset): Likewise.
450
e410add4
RS
4512013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
452
453 * dwarf2dbg.h (dwarf2_move_insn): Declare.
454 * dwarf2dbg.c (line_subseg): Add pmove_tail.
455 (get_line_subseg): Add create_p argument. Initialize pmove_tail.
456 (dwarf2_gen_line_info_1): Update call accordingly.
457 (dwarf2_move_insn): New function.
458 * config/tc-mips.c (append_insn): Use dwarf2_move_insn.
459
6a50d470
RS
4602013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
461
462 Revert:
463
464 2011-09-05 Richard Sandiford <rdsandiford@googlemail.com>
465
466 PR gas/13024
467 * dwarf2dbg.c (pending_lines, pending_lines_tail): New variables.
468 (dwarf2_gen_line_info_1): Delete.
469 (dwarf2_push_line, dwarf2_flush_pending_lines): New functions.
470 (dwarf2_gen_line_info, dwarf2_emit_label): Use them.
471 (dwarf2_consume_line_info): Call dwarf2_flush_pending_lines.
472 (dwarf2_directive_loc): Push previous .locs instead of generating
473 them immediately.
474
f122319e
CF
4752013-06-13 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
476
477 * config/tc-mips.c (ISA_SUPPORTS_VIRT_ASE): Support micromips.
478 (ISA_SUPPORTS_VIRT64_ASE): Support 64-bit micromips.
479
909c7f9c
NC
4802013-06-13 Nick Clifton <nickc@redhat.com>
481
482 PR gas/15602
483 * config/tc-m68k.h (TC_CHECK_ADJUSTED_BROKEN_DOT_WORD): Define.
484 * config/tc-m68k.c (tc_m68k_check_adjusted_broken_word): New
485 function. Generates an error if the adjusted offset is out of a
486 16-bit range.
487
5d5755a7
SL
4882013-06-12 Sandra Loosemore <sandra@codesourcery.com>
489
490 * config/tc-nios2.c (md_apply_fix): Mask constant
491 BFD_RELOC_NIOS2_HIADJ16 value to 16 bits.
492
3bf0dbfb
MR
4932013-06-10 Maciej W. Rozycki <macro@codesourcery.com>
494
495 * config/tc-mips.c (append_insn): Don't do branch relaxation for
496 MIPS-3D instructions either.
497 (md_convert_frag): Update the COPx branch mask accordingly.
498
499 * config/tc-mips.c (md_show_usage): Document --[no-]relax-branch
500 option.
501 * doc/as.texinfo (Overview): Add --relax-branch and
502 --no-relax-branch.
503 * doc/c-mips.texi (MIPS Opts): Document --relax-branch and
504 --no-relax-branch.
505
9daf7bab
SL
5062013-06-09 Sandra Loosemore <sandra@codesourcery.com>
507
508 * config/tc-nios2.c (nios2_parse_args): Allow trap argument to
509 omitted.
510
d301a56b
RS
5112013-06-08 Catherine Moore <clm@codesourcery.com>
512
513 * config/tc-mips.c (is_opcode_valid): Build ASE mask.
514 (is_opcode_valid_16): Pass ase value to opcode_is_member.
515 (append_insn): Change INSN_xxxx to ASE_xxxx.
516
7bab7634
DC
5172013-06-01 George Thomas <george.thomas@atmel.com>
518
519 * gas/config/tc-avr.c: Change ISA for devices with USB support to
520 AVR_ISA_XMEGAU
521
f60cf82f
L
5222013-05-31 H.J. Lu <hongjiu.lu@intel.com>
523
524 * config/tc-i386.c (md_begin): Don't align text/data/bss sections
525 for ELF.
526
a3f278e2
CM
5272013-05-31 Paul Brook <paul@codesourcery.com>
528
529 gas/
530 * config/tc-mips.c (s_ehword): New.
531
067ec077
CM
5322013-05-30 Paul Brook <paul@codesourcery.com>
533
534 * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH.
535
d6101ac2
MR
5362013-05-29 Maciej W. Rozycki <macro@codesourcery.com>
537
538 * write.c (resolve_reloc_expr_symbols): On REL targets don't
539 convert relocs who have no relocatable field either. Rephrase
540 the conditional so that the PC-relative check is only applied
541 for REL targets.
542
f19ccbda
MR
5432013-05-28 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
544
545 * config/tc-mips.c (macro) <ld>: Don't use $zero for address
546 calculation.
547
418009c2
YZ
5482013-05-28 Yufeng Zhang <yufeng.zhang@arm.com>
549
550 * config/tc-aarch64.c (reloc_table): Update to use
477330fc 551 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of
418009c2
YZ
552 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE.
553 (md_apply_fix): Likewise.
554 (aarch64_force_relocation): Likewise.
555
0a8897c7
KT
5562013-05-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
557
558 * config/tc-arm.c (it_fsm_post_encode): Improve
559 warning messages about deprecated IT block formats.
560
89d2a2a3
MS
5612013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com>
562
563 * config/tc-aarch64.c (md_apply_fix): Move value range checking
564 inside fx_done condition.
565
c77c0862
RS
5662013-05-22 Jürgen Urban <JuergenUrban@gmx.de>
567
568 * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB.
569
c0637f3a
PB
5702013-05-20 Peter Bergner <bergner@vnet.ibm.com>
571
572 * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error
573 and clean up warning when using PRINT_OPCODE_TABLE.
574
5656a981
AM
5752013-05-20 Alan Modra <amodra@gmail.com>
576
577 * config/tc-ppc.c (md_apply_fix): Hoist code common to insn
578 and data fixups performing shift/high adjust/sign extension on
579 fieldval. Sink fx_pcrel handling and checks. Use fixP->fx_size
580 when writing data fixups rather than recalculating size.
581
997b26e8
JBG
5822013-05-16 Jan-Benedict Glaw <jbglaw@lug-owl.de>
583
584 * doc/c-msp430.texi: Fix typo.
585
9f6e76f4
TG
5862013-05-16 Tristan Gingold <gingold@adacore.com>
587
588 * config/tc-ppc.c (ppc_is_toc_sym): Symbols of class XMC_TC
589 are also TOC symbols.
590
638d3803
NC
5912013-05-16 Nick Clifton <nickc@redhat.com>
592
593 * config/tc-msp430.c: Make -mmcu recognise more part numbers.
594 Add -mcpu command to specify core type.
997b26e8 595 * doc/c-msp430.texi: Update documentation.
638d3803 596
b015e599
AP
5972013-05-09 Andrew Pinski <apinski@cavium.com>
598
599 * config/tc-mips.c (struct mips_set_options): New ase_virt field.
600 (mips_opts): Update for the new field.
601 (file_ase_virt): New variable.
602 (ISA_SUPPORTS_VIRT_ASE): New macro.
603 (ISA_SUPPORTS_VIRT64_ASE): New macro.
604 (MIPS_CPU_ASE_VIRT): New define.
605 (is_opcode_valid): Handle ase_virt.
606 (macro_build): Handle "+J".
607 (validate_mips_insn): Likewise.
608 (mips_ip): Likewise.
609 (enum options): Add OPTION_VIRT and OPTION_NO_VIRT.
610 (md_longopts): Add mvirt and mnovirt
611 (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT.
612 (mips_after_parse_args): Handle ase_virt field.
613 (s_mipsset): Handle "virt" and "novirt".
614 (mips_elf_final_processing): Add a comment about virt ASE might need
615 a new flag.
616 (md_show_usage): Print out the usage of -mvirt and mno-virt options.
617 * doc/c-mips.texi: Document -mvirt and -mno-virt.
618 Document ".set virt" and ".set novirt".
619
da8094d7
AM
6202013-05-09 Alan Modra <amodra@gmail.com>
621
622 * config/tc-ppc.c (md_apply_fix): Sign extend fieldval under
623 control of operand flag bits.
624
c5f8c205
AM
6252013-05-07 Alan Modra <amodra@gmail.com>
626
627 * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro.
628 (PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise.
629 (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise.
630 (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise.
631 (md_apply_fix): Set fx_no_overflow for assorted relocations.
632 Shift and sign-extend fieldval for use by some VLE reloc
633 operand->insert functions.
634
b47468a6
CM
6352013-05-06 Paul Brook <paul@codesourcery.com>
636 Catherine Moore <clm@codesourcery.com>
637
c5f8c205
AM
638 * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL.
639 (limited_pcrel_reloc_p): Likewise.
b47468a6
CM
640 (md_apply_fix): Likewise.
641 (tc_gen_reloc): Likewise.
642
2de39019
CM
6432013-05-06 Richard Sandiford <rdsandiford@googlemail.com>
644
645 * config/tc-mips.c (limited_pcrel_reloc_p): New function.
646 (mips_fix_adjustable): Adjust pc-relative check to use
647 limited_pc_reloc_p.
648
754e2bb9
RS
6492013-05-02 Richard Sandiford <rdsandiford@googlemail.com>
650
651 * config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries.
652 (s_mips_stab): Do not restrict to stabn only.
653
13761a11
NC
6542013-05-02 Nick Clifton <nickc@redhat.com>
655
656 * config/tc-msp430.c: Add support for the MSP430X architecture.
657 Add code to insert a NOP instruction after any instruction that
658 might change the interrupt state.
659 Add support for the LARGE memory model.
660 Add code to initialise the .MSP430.attributes section.
661 * config/tc-msp430.h: Add support for the MSP430X architecture.
662 * doc/c-msp430.texi: Document the new -mL and -mN command line
663 options.
664 * NEWS: Mention support for the MSP430X architecture.
665
df26367c
MR
6662013-05-01 Maciej W. Rozycki <macro@codesourcery.com>
667
668 * configure.tgt: Replace alpha*-*-linuxecoff* pattern with
669 alpha*-*-linux*ecoff*.
670
f02d8318
CF
6712013-04-30 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
672
673 * config/tc-mips.c (mips_ip): Add sizelo.
674 For "+C", "+G", and "+H", set sizelo and compare against it.
675
b40bf0a2
NC
6762013-04-29 Nick Clifton <nickc@redhat.com>
677
678 * as.c (Options): Add -gdwarf-sections.
679 (parse_args): Likewise.
680 * as.h (flag_dwarf_sections): Declare.
681 * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes.
682 (process_entries): When -gdwarf-sections is enabled generate
683 fragmentary .debug_line sections.
684 (out_debug_line): Set the section for the .debug_line section end
685 symbol.
686 * doc/as.texinfo: Document -gdwarf-sections.
687 * NEWS: Mention -gdwarf-sections.
688
8eeccb77 6892013-04-26 Christian Groessler <chris@groessler.org>
00a3147e
CG
690
691 * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdline
692 according to the target parameter. Don't call s_segm since s_segm
693 calls bfd_set_arch_mach using stdoutput, but stdoutput isn't
694 initialized yet.
695 (md_begin): Call s_segm according to target parameter from command
696 line.
697
49926cd0
AM
6982013-04-25 Alan Modra <amodra@gmail.com>
699
700 * configure.in: Allow little-endian linux.
701 * configure: Regenerate.
702
e3031850
SL
7032013-04-24 Sandra Loosemore <sandra@codesourcery.com>
704
705 * config/tc-nios2.c (nios2_control_register_arg_p): Rename
706 "fstatus" control register to "eccinj".
707
cb948fc0
KT
7082013-04-19 Kai Tietz <ktietz@redhat.com>
709
710 * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin.
711
4455e9ad
JB
7122013-04-15 Julian Brown <julian@codesourcery.com>
713
714 * expr.c (add_to_result, subtract_from_result): Make global.
715 * expr.h (add_to_result, subtract_from_result): Add prototypes.
716 * config/tc-sh.c (sh_optimize_expr): Use add_to_result,
717 subtract_from_result to handle extra bit of precision for .sleb128
718 directive operands.
719
956a6ba3
JB
7202013-04-10 Julian Brown <julian@codesourcery.com>
721
722 * read.c (convert_to_bignum): Add sign parameter. Use it
723 instead of X_unsigned to determine sign of resulting bignum.
724 (emit_expr): Pass extra argument to convert_to_bignum.
725 (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass
726 X_extrabit to convert_to_bignum.
727 (parse_bitfield_cons): Set X_extrabit.
728 * expr.c (make_expr_symbol, expr_build_uconstant, operand):
729 Initialise X_extrabit field as appropriate.
730 (add_to_result): New.
731 (subtract_from_result): New.
732 (expr): Use above.
733 * expr.h (expressionS): Add X_extrabit field.
734
eb9f3f00
JB
7352013-04-10 Jan Beulich <jbeulich@suse.com>
736
737 * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base
738 register being PC when is_t or writeback, and use distinct
739 diagnostic for the latter case.
740
ccb84d65
JB
7412013-04-10 Jan Beulich <jbeulich@suse.com>
742
743 * gas/config/tc-arm.c (parse_operands): Re-write
744 po_barrier_or_imm().
745 (do_barrier): Remove bogus constraint().
746 (do_t_barrier): Remove.
747
4d13caa0
NC
7482013-04-09 Joerg Wunsch <joerg.wunsch@atmel.com>
749
750 * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2,
751 ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2,
752 ATmega2564RFR2
753 * gas/doc/c-avr.texi (-mmcu documentation): Likewise.
754
16d02dc9
JB
7552013-04-09 Jan Beulich <jbeulich@suse.com>
756
757 * gas/config/tc-arm.c (do_vmrs): Accept all control registers.
758 Use local variable Rt in more places.
759 (do_vmsr): Accept all control registers.
760
05ac0ffb
JB
7612013-04-09 Jan Beulich <jbeulich@suse.com>
762
763 * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
764 if there was none specified for moves between scalar and core
765 register.
766
2d51fb74
JB
7672013-04-09 Jan Beulich <jbeulich@suse.com>
768
769 * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the
770 NEON_ALL_LANES case.
771
94dcf8bf
JB
7722013-04-08 Jan Beulich <jbeulich@suse.com>
773
774 * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for
775 PC-relative VSTR.
776
1472d06f
JB
7772013-04-08 Jan Beulich <jbeulich@suse.com>
778
779 * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq
780 entry to sp_fiq.
781
0c76cae8
AM
7822013-04-03 Alan Modra <amodra@gmail.com>
783
784 * doc/as.texinfo: Add support to generate man options for h8300.
785 * doc/c-h8300.texi: Likewise.
786
92eb40d9
RR
7872013-03-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
788
789 * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and
790 Cortex-A57.
791
51dcdd4d
NC
7922013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com>
793
794 PR binutils/15068
795 * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array.
796
c5d685bf
NC
7972013-03-26 Nick Clifton <nickc@redhat.com>
798
9b978282
NC
799 PR gas/15295
800 * listing.c (rebuffer_line): Rewrite to avoid seeking back to the
801 start of the file each time.
802
c5d685bf
NC
803 PR gas/15178
804 * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for
805 FreeBSD targets.
806
9699c833
TG
8072013-03-26 Douglas B Rupp <rupp@gnat.com>
808
809 * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment
810 after fixup.
811
4755303e
WN
8122013-03-21 Will Newton <will.newton@linaro.org>
813
814 * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all
815 pc-relative str instructions in Thumb mode.
816
81f5558e
NC
8172013-03-21 Michael Schewe <michael.schewe@gmx.net>
818
819 * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
820 @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
821 R_H8_DISP32A16.
822 * config/tc-h8300.h: Remove duplicated defines.
823
71863e73
NC
8242013-03-21 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
825
826 PR gas/15282
827 * tc-avr.c (mcu_has_3_byte_pc): New function.
828 (tc_cfi_frame_initial_instructions): Call it to find return
829 address size.
830
795b8e6b
NC
8312013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com>
832
833 PR gas/15095
834 * config/tc-tic6x.c (tic6x_try_encode): Handle
835 tic6x_coding_dreg_(msb|lsb) field coding types and use it to
836 encode register pair numbers when required.
837
ba86b375
WN
8382013-03-15 Will Newton <will.newton@linaro.org>
839
840 * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register
841 in vstr in Thumb mode for pre-ARMv7 cores.
842
9e6f3811
AS
8432013-03-14 Andreas Schwab <schwab@suse.de>
844
845 * doc/c-arc.texi (ARC Directives): Revert last change and use
846 @itemize instead of @table.
847 * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
848
b10bf8c5
NC
8492013-03-14 Nick Clifton <nickc@redhat.com>
850
851 PR gas/15273
852 * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a
853 NULL message, instead just check ARM_CPU_IS_ANY directly.
854
ba724cfc
NC
8552013-03-14 Nick Clifton <nickc@redhat.com>
856
857 PR gas/15212
9e6f3811 858 * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet
ba724cfc
NC
859 for table format.
860 * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
861 to the @item directives.
862 (ARM-Neon-Alignment): Move to correct place in the document.
863 * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
864 formatting.
865 * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
866 @smallexample.
867
531a94fd
SL
8682013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
869
870 * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'
871 case. Add default BAD_CASE to switch.
872
dad60f8e
SL
8732013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
874
875 * config/tc-nios2.c (nios2_assemble_args_ds): New function.
876 (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
877
dd5181d5
KT
8782013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
879
880 * config/tc-arm.c (crc_ext_armv8): New feature set.
881 (UNPRED_REG): New macro.
882 (do_crc32_1): New function.
883 (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
884 do_crc32ch, do_crc32cw): Likewise.
885 (TUEc): New macro.
886 (insns): Add entries for crc32 mnemonics.
887 (arm_extensions): Add entry for crc.
888
8e723a10
CLT
8892013-03-08 Chung-Lin Tang <cltang@codesourcery.com>
890
891 * write.h (struct fix): Add fx_dot_frag field.
892 (dot_frag): Declare.
893 * write.c (dot_frag): New variable.
894 (fix_new_internal): Set fx_dot_frag field with dot_frag.
895 (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
896 * expr.c (expr): Save value of frag_now in dot_frag when setting
897 dot_value.
898 * read.c (emit_expr): Likewise. Delete comments.
899
be05d201
L
9002013-03-07 H.J. Lu <hongjiu.lu@intel.com>
901
902 * config/tc-i386.c (flag_code_names): Removed.
903 (i386_index_check): Rewrote.
904
62b0d0d5
YZ
9052013-03-05 Yufeng Zhang <yufeng.zhang@arm.com>
906
907 * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
908 add comment.
909 (aarch64_double_precision_fmovable): New function.
910 (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
911 function; handle hexadecimal representation of IEEE754 encoding.
912 (parse_operands): Update the call to parse_aarch64_imm_float.
913
165de32a
L
9142013-02-28 H.J. Lu <hongjiu.lu@intel.com>
915
916 * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
917 (check_hle): Updated.
918 (md_assemble): Likewise.
919 (parse_insn): Likewise.
920
d5de92cf
L
9212013-02-28 H.J. Lu <hongjiu.lu@intel.com>
922
923 * config/tc-i386.c (_i386_insn): Add rep_prefix.
9e6f3811 924 (md_assemble): Check if REP prefix is OK.
d5de92cf
L
925 (parse_insn): Remove expecting_string_instruction. Set
926 i.rep_prefix.
927
e60bb1dd
YZ
9282013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
929
930 * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
931
aeebdd9b
YZ
9322013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
933
934 * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
935 for system registers.
936
4107ae22
DD
9372013-02-27 DJ Delorie <dj@redhat.com>
938
939 * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
940 (rl78_op): Handle %code().
941 (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
942 (tc_gen_reloc): Likwise; convert to a computed reloc.
943 (md_apply_fix): Likewise.
944
151fa98f
NC
9452013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
946
947 * config/rl78-parse.y: Fix encoding of DIVWU insn.
948
70a8bc5b 9492013-02-25 Terry Guo <terry.guo@arm.com>
950
951 * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
952 * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
953 list of accepted CPUs.
954
5c111e37
L
9552013-02-19 H.J. Lu <hongjiu.lu@intel.com>
956
957 PR gas/15159
958 * config/tc-i386.c (cpu_arch): Add ".smap".
959
960 * doc/c-i386.texi: Document smap.
961
8a75745d
MR
9622013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
963
964 * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
965 mips_assembling_insn appropriately.
966 (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
967
79850f26
MR
9682013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
969
cf29fc61 970 * config/tc-mips.c (append_insn): Correct indentation, remove
79850f26
MR
971 extraneous braces.
972
4c261dff
NC
9732013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
974
5c111e37 975 * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
4c261dff 976
ea33f281
NC
9772013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
978
979 * configure.tgt: Add nios2-*-rtems*.
980
a1ccaec9
YZ
9812013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
982
983 * config/tc-aarch64.c (md_begin): Change to check if 'name' is
984 NULL.
985
0aa27725
RS
9862013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
987
988 * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
989 (macro): Use it. Assert that trunc.w.s is not used for r5900.
990
da4339ed
NC
9912013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com>
992
993 * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
994 core.
995
36591ba1 9962013-02-06 Sandra Loosemore <sandra@codesourcery.com>
5c111e37 997 Andrew Jenner <andrew@codesourcery.com>
36591ba1
SL
998
999 Based on patches from Altera Corporation.
1000
1001 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
1002 (TARGET_CPU_HFILES): Add config/tc-nios2.h.
1003 * Makefile.in: Regenerated.
1004 * configure.tgt: Add case for nios2*-linux*.
1005 * config/obj-elf.c: Conditionally include elf/nios2.h.
1006 * config/tc-nios2.c: New file.
1007 * config/tc-nios2.h: New file.
1008 * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
1009 * doc/Makefile.in: Regenerated.
1010 * doc/all.texi: Set NIOSII.
1011 * doc/as.texinfo (Overview): Add Nios II options.
1012 (Machine Dependencies): Include c-nios2.texi.
1013 * doc/c-nios2.texi: New file.
1014 * NEWS: Note Altera Nios II support.
1015
94d4433a
AM
10162013-02-06 Alan Modra <amodra@gmail.com>
1017
1018 PR gas/14255
1019 * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
1020 Don't skip fixups with fx_subsy non-NULL.
1021 * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
1022 with fx_subsy non-NULL.
1023
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L
10242013-02-04 H.J. Lu <hongjiu.lu@intel.com>
1025
1026 * doc/c-metag.texi: Add "@c man" markers.
1027
89d67ed9
AM
10282013-02-04 Alan Modra <amodra@gmail.com>
1029
1030 * write.c (fixup_segment): Return void. Delete seg_reloc_count
1031 related code.
1032 (TC_ADJUST_RELOC_COUNT): Delete.
1033 * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
1034
89072bd6
AM
10352013-02-04 Alan Modra <amodra@gmail.com>
1036
1037 * po/POTFILES.in: Regenerate.
1038
f9b2d544
NC
10392013-01-30 Markos Chandras <markos.chandras@imgtec.com>
1040
1041 * config/tc-metag.c: Make SWAP instruction less permissive with
1042 its operands.
1043
392ca752
DD
10442013-01-29 DJ Delorie <dj@redhat.com>
1045
1046 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
1047 relocs in .word/.etc statements.
1048
427d0db6
RM
10492013-01-29 Roland McGrath <mcgrathr@google.com>
1050
1051 * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
1052 immediate value for 8-bit offset" error so it shows line info.
1053
4faf939a
JM
10542013-01-24 Joseph Myers <joseph@codesourcery.com>
1055
1056 * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
1057 for 64-bit output.
1058
78c8d46c
NC
10592013-01-24 Nick Clifton <nickc@redhat.com>
1060
1061 * config/tc-v850.c: Add support for e3v5 architecture.
1062 * doc/c-v850.texi: Mention new support.
1063
fb5b7503
NC
10642013-01-23 Nick Clifton <nickc@redhat.com>
1065
1066 PR gas/15039
1067 * config/tc-avr.c: Include dwarf2dbg.h.
1068
8ce3d284
L
10692013-01-18 H.J. Lu <hongjiu.lu@intel.com>
1070
1071 * config/tc-i386.c (reloc): Support size relocation only for ELF.
1072 (tc_i386_fix_adjustable): Likewise.
1073 (lex_got): Likewise.
1074 (tc_gen_reloc): Likewise.
1075
f5555712
YZ
10762013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
1077
1078 * config/tc-aarch64.c (output_operand_error_record): Change to output
1079 the out-of-range error message as value-expected message if there is
1080 only one single value in the expected range.
1081 (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
1082 LSL #0 as a programmer-friendly feature.
1083
8fd4256d
L
10842013-01-16 H.J. Lu <hongjiu.lu@intel.com>
1085
1086 * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
1087 (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
1088 BFD_RELOC_64_SIZE relocations.
1089 (lex_got): Support "symbol@SIZE" and don't create GOT symbol
1090 for it.
1091 (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
1092 relocations against local symbols.
1093
a5840dce
AM
10942013-01-16 Alan Modra <amodra@gmail.com>
1095
1096 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
1097 finding some sort of toc syntax error, and break to avoid
1098 compiler uninit warning.
1099
af89796a
L
11002013-01-15 H.J. Lu <hongjiu.lu@intel.com>
1101
1102 PR gas/15019
1103 * config/tc-i386.c (lex_got): Increment length by 1 if the
1104 relocation token is removed.
1105
dd42f060
NC
11062013-01-15 Nick Clifton <nickc@redhat.com>
1107
1108 * config/tc-v850.c (md_assemble): Allow signed values for
1109 V850E_IMMEDIATE.
1110
464e3686
SK
11112013-01-11 Sean Keys <skeys@ipdatasys.com>
1112
1113 * config/tc-xgate.c (md_begin): Fix mistake made when going from
af89796a 1114 git to cvs.
464e3686 1115
5817ffd1
PB
11162013-01-10 Peter Bergner <bergner@vnet.ibm.com>
1117
1118 * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
1119 * doc/c-ppc.texi (PowerPC-Opts): Likewise.
1120 * config/tc-ppc.c (md_show_usage): Likewise.
1121 (ppc_handle_align): Handle power8's group ending nop.
1122
f4b1f6a9
SK
11232013-01-10 Sean Keys <skeys@ipdatasys.com>
1124
1125 * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
af89796a 1126 that the assember exits after the opcodes have been printed.
f4b1f6a9 1127
34bca508
L
11282013-01-10 H.J. Lu <hongjiu.lu@intel.com>
1129
1130 * app.c: Remove trailing white spaces.
1131 * as.c: Likewise.
1132 * as.h: Likewise.
1133 * cond.c: Likewise.
1134 * dw2gencfi.c: Likewise.
1135 * dwarf2dbg.h: Likewise.
1136 * ecoff.c: Likewise.
1137 * input-file.c: Likewise.
1138 * itbl-lex.h: Likewise.
1139 * output-file.c: Likewise.
1140 * read.c: Likewise.
1141 * sb.c: Likewise.
1142 * subsegs.c: Likewise.
1143 * symbols.c: Likewise.
1144 * write.c: Likewise.
1145 * config/tc-i386.c: Likewise.
1146 * doc/Makefile.am: Likewise.
1147 * doc/Makefile.in: Likewise.
1148 * doc/c-aarch64.texi: Likewise.
1149 * doc/c-alpha.texi: Likewise.
1150 * doc/c-arc.texi: Likewise.
1151 * doc/c-arm.texi: Likewise.
1152 * doc/c-avr.texi: Likewise.
1153 * doc/c-bfin.texi: Likewise.
1154 * doc/c-cr16.texi: Likewise.
1155 * doc/c-d10v.texi: Likewise.
1156 * doc/c-d30v.texi: Likewise.
1157 * doc/c-h8300.texi: Likewise.
1158 * doc/c-hppa.texi: Likewise.
1159 * doc/c-i370.texi: Likewise.
1160 * doc/c-i386.texi: Likewise.
1161 * doc/c-i860.texi: Likewise.
1162 * doc/c-m32c.texi: Likewise.
1163 * doc/c-m32r.texi: Likewise.
1164 * doc/c-m68hc11.texi: Likewise.
1165 * doc/c-m68k.texi: Likewise.
1166 * doc/c-microblaze.texi: Likewise.
1167 * doc/c-mips.texi: Likewise.
1168 * doc/c-msp430.texi: Likewise.
1169 * doc/c-mt.texi: Likewise.
1170 * doc/c-s390.texi: Likewise.
1171 * doc/c-score.texi: Likewise.
1172 * doc/c-sh.texi: Likewise.
1173 * doc/c-sh64.texi: Likewise.
1174 * doc/c-tic54x.texi: Likewise.
1175 * doc/c-tic6x.texi: Likewise.
1176 * doc/c-v850.texi: Likewise.
1177 * doc/c-xc16x.texi: Likewise.
1178 * doc/c-xgate.texi: Likewise.
1179 * doc/c-xtensa.texi: Likewise.
1180 * doc/c-z80.texi: Likewise.
1181 * doc/internals.texi: Likewise.
1182
4c665b71
RM
11832013-01-10 Roland McGrath <mcgrathr@google.com>
1184
1185 * hash.c (hash_new_sized): Make it global.
1186 * hash.h: Declare it.
1187 * macro.c (define_macro): Use hash_new_sized instead of hash_new,
1188 pass a small size.
1189
a3c62988
NC
11902013-01-10 Will Newton <will.newton@imgtec.com>
1191
1192 * Makefile.am: Add Meta.
1193 * Makefile.in: Regenerate.
1194 * config/tc-metag.c: New file.
1195 * config/tc-metag.h: New file.
1196 * configure.tgt: Add Meta.
1197 * doc/Makefile.am: Add Meta.
1198 * doc/Makefile.in: Regenerate.
1199 * doc/all.texi: Add Meta.
1200 * doc/as.texiinfo: Document Meta options.
1201 * doc/c-metag.texi: New file.
1202
b37df7c4
SE
12032013-01-09 Steve Ellcey <sellcey@mips.com>
1204
1205 * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
1206 calls.
1207 * config/tc-mips.c (internalError): Remove, replace with abort.
1208
a3251895
YZ
12092013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
1210
1211 * config/tc-aarch64.c (parse_operands): Change to compare the result
1212 of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
1213
8ab8155f
NC
12142013-01-07 Nick Clifton <nickc@redhat.com>
1215
1216 PR gas/14887
1217 * config/tc-arm.c (skip_past_char): Skip whitespace before the
1218 anticipated character.
1219 * config/tc-arm.c (parse_address_main): Delete skip of whitespace
1220 here as it is no longer needed.
1221
a4ac1c42
AS
12222013-01-06 Andreas Schwab <schwab@linux-m68k.org>
1223
1224 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
1225 * doc/c-score.texi (SCORE-Opts): Likewise.
1226 * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
1227
e407c74b
NC
12282013-01-04 Juergen Urban <JuergenUrban@gmx.de>
1229
1230 * config/tc-mips.c: Add support for MIPS r5900.
1231 Add M_LQ_AB and M_SQ_AB to support large values for instructions
1232 lq and sq.
1233 (can_swap_branch_p, get_append_method): Detect some conditional
1234 short loops to fix a bug on the r5900 by NOP in the branch delay
1235 slot.
1236 (M_MUL): Support 3 operands in multu on r5900.
1237 (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
1238 (s_mipsset): Force 32 bit floating point on r5900.
1239 (mips_ip): Check parameter range of instructions mfps and mtps on
1240 r5900.
1241 * configure.in: Detect CPU type when target string contains r5900
1242 (e.g. mips64r5900el-linux-gnu).
1243
62658407
L
12442013-01-02 H.J. Lu <hongjiu.lu@intel.com>
1245
1246 * as.c (parse_args): Update copyright year to 2013.
1247
95830fd1
YZ
12482013-01-02 Yufeng Zhang <yufeng.zhang@arm.com>
1249
1250 * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
1251 and "cortex57".
1252
517bb291 12532013-01-02 Nick Clifton <nickc@redhat.com>
d709e4e6 1254
517bb291
NC
1255 PR gas/14987
1256 * config/tc-arm.c (parse_address_main): Skip whitespace before a
1257 closing bracket.
d709e4e6 1258
517bb291 1259For older changes see ChangeLog-2012
08d56133 1260\f
517bb291 1261Copyright (C) 2013 Free Software Foundation, Inc.
752937aa
NC
1262
1263Copying and distribution of this file, with or without modification,
1264are permitted in any medium without royalty provided the copyright
1265notice and this notice are preserved.
1266
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NC
1267Local Variables:
1268mode: change-log
1269left-margin: 8
1270fill-column: 74
1271version-control: never
1272End: