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2013-09-04 Muhammad Bilal <mbilal@codesourcery.com>
[thirdparty/binutils-gdb.git] / gas / ChangeLog
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12013-08-23 Sandeep Kumar Singh <Sandeep.Singh2@kpitcummins.com>
2
3 * config/rx-parse.y: Rearrange the components of a bison grammar to issue
4 assembler errors at correct position.
5
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62013-08-23 Yuri Chornoivan <yurchor@ukr.net>
7
8 PR binutils/15834
9 * config/tc-ia64.c: Fix typos.
10 * config/tc-sparc.c: Likewise.
11 * config/tc-z80.c: Likewise.
12 * doc/c-i386.texi: Likewise.
13 * doc/c-m32r.texi: Likewise.
14
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152013-08-23 Will Newton <will.newton@linaro.org>
16
9aff4b7a 17 * config/tc-arm.c: (do_neon_ldx_stx): Add extra constraints
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18 for pre-indexed addressing modes.
19
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202013-08-21 Alan Modra <amodra@gmail.com>
21
22 * symbols.c (fb_label_instance_inc, fb_label_instance): Properly
23 range check label number for use with fb_low_counter array.
24
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252013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
26
27 * config/tc-mips.c (mips_check_isa_supports_ase, reg_lookup)
28 (mips_parse_argument_token, validate_micromips_insn, md_begin)
29 (check_regno, match_float_constant, check_completed_insn, append_insn)
30 (match_insn, match_mips16_insn, match_insns, macro_start)
31 (macro_build_ldst_constoffset, load_register, macro, mips_ip)
32 (mips16_ip, mips_set_option_string, md_parse_option)
33 (mips_after_parse_args, mips_after_parse_args, md_pcrel_from)
34 (md_apply_fix, s_align, s_option, s_mipsset, s_tls_rel_directive)
35 (s_gpword, s_gpdword, s_ehword, s_nan, tc_gen_reloc, md_convert_frag)
36 (s_mips_end, s_mips_ent, s_mips_frame, s_mips_mask, mips_parse_cpu):
37 Start error messages with a lower-case letter. Do not end error
38 messages with a period. Wrap long messages to 80 character-lines.
39 Use "cannot" instead of "can't" and "can not".
40
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412013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
42
43 * config/tc-mips.c (imm_expr): Expand comment.
44 (set_at, macro, mips16_macro): Expect imm_expr to be O_constant
45 when populated.
46
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472013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
48
49 * config/tc-mips.c (imm2_expr): Delete.
50 (md_assemble, match_insn, imm2_expr.X_op, mips_ip): Update accordingly.
51
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522013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
53
54 * config/tc-mips.c (report_bad_range, report_bad_field): Delete.
55 (macro): Remove M_DEXT and M_DINS handling.
56
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572013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
58
59 * config/tc-mips.c (mips_arg_info): Replace allow_nonconst and
60 lax_max with lax_match.
61 (match_int_operand): Update accordingly. Don't report an error
62 for !lax_match-only cases.
63 (match_insn): Replace more_alts with lax_match and use it to
64 initialize the mips_arg_info field. Add a complete_p parameter.
65 Handle implicit VU0 suffixes here.
66 (match_invalid_for_isa, match_insns, match_mips16_insns): New
67 functions.
68 (mips_ip, mips16_ip): Use them.
69
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702013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
71
72 * config/tc-mips.c (match_expression): Report uses of registers here.
73 Add a "must be an immediate expression" error. Handle elided offsets
74 here rather than...
75 (match_int_operand): ...here.
76
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772013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
78
79 * config/tc-mips.c (mips_arg_info): Remove soft_match.
80 (match_out_of_range, match_not_constant): New functions.
81 (match_const_int): Remove fallback parameter and check for soft_match.
82 Use match_not_constant.
83 (match_mapped_int_operand, match_addiusp_operand)
84 (match_perf_reg_operand, match_save_restore_list_operand)
85 (match_mdmx_imm_reg_operand): Update accordingly. Use
86 match_out_of_range and set_insn_error* instead of as_bad.
87 (match_int_operand): Likewise. Use match_not_constant in the
88 !allows_nonconst case.
89 (match_float_constant): Report invalid float constants.
90 (match_insn, match_mips16_insn): Remove soft_match code. Rely on
91 match_float_constant to check for invalid constants. Fail the
92 match if match_const_int or match_float_constant return false.
93 (mips_ip): Update accordingly.
94 (mips16_ip): Likewise. Undo null termination of instruction name
95 once lookup is complete.
96
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972013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
98
99 * config/tc-mips.c (mips_insn_error_format): New enum.
100 (mips_insn_error): New struct.
101 (insn_error): Change to a mips_insn_error.
102 (clear_insn_error, set_insn_error_format, set_insn_error)
103 (set_insn_error_i, set_insn_error_ss, report_insn_error): New
104 functions.
105 (mips_parse_argument_token, md_assemble, match_insn)
106 (match_mips16_insn): Use them instead of manipulating insn_error
107 directly.
108 (mips_ip, mips16_ip): Likewise. Simplify control flow.
109
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1102013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
111
112 * config/tc-mips.c (normalize_constant_expr): Move further up file.
113 (normalize_address_expr): Likewise.
114 (match_insn, match_mips16_insn): New functions, split out from...
115 (mips_ip, mips16_ip): ...here.
116
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1172013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
118
119 * config/tc-mips.c (operand_reg_mask, match_operand): Handle
120 OP_OPTIONAL_REG.
121 (mips_ip, mips16_ip): Use mips_optional_operand_p to check
122 for optional operands.
123
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1242013-08-16 Alan Modra <amodra@gmail.com>
125
126 * config/tc-ppc.c (ppc_elf_cons): Allow @l and other reloc
127 modifiers generally.
128
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1292013-08-16 Alan Modra <amodra@gmail.com>
130
131 * config/tc-ppc.c (ppc_elf_lcomm): Use subsection 1.
132
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1332013-08-14 David Edelsohn <dje.gcc@gmail.com>
134
135 * config/tc-ppc.c (ppc_comm): Accept optional fourth .lcomm
136 argument as alignment.
137
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1382013-08-09 Nick Clifton <nickc@redhat.com>
139
140 * config/tc-rl78.c (elf_flags): New variable.
141 (enum options): Add OPTION_G10.
142 (md_longopts): Add mg10.
143 (md_parse_option): Parse -mg10.
144 (rl78_elf_final_processing): New function.
145 * config/tc-rl78.c (tc_final_processing): Define.
146 * doc/c-rl78.texi: Document -mg10 option.
147
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1482013-08-06 Jürgen Urban <JuergenUrban@gmx.de>
149
150 * config/tc-mips.c (match_vu0_suffix_operand): Allow single-channel
151 suffixes to be elided too.
152 (mips_lookup_insn): Don't reject INSN2_VU0_CHANNEL_SUFFIX here.
153 (mips_ip): Assume .xyzw if no VU0 suffix is specified. Allow +N
154 to be omitted too.
155
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1562013-08-05 John Tytgat <john@bass-software.com>
157
158 * po/POTFILES.in: Regenerate.
159
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1602013-08-05 Eric Botcazou <ebotcazou@adacore.com>
161 Konrad Eisele <konrad@gaisler.com>
162
163 * config/tc-sparc.c (sparc_arch_types): Add leon.
164 (sparc_arch): Move sparc4 around and add leon.
165 (sparc_target_format): Document -Aleon.
166 * doc/c-sparc.texi: Likewise.
167
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1682013-08-05 Richard Sandiford <rdsandiford@googlemail.com>
169
170 * config/tc-mips.c (mips_lookup_insn): Make length and opend signed.
171
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1722013-08-04 Jürgen Urban <JuergenUrban@gmx.de>
173 Richard Sandiford <rdsandiford@googlemail.com>
174
175 * config/tc-mips.c (MAX_OPERANDS): Bump to 6.
176 (RWARN): Bump to 0x8000000.
177 (RTYPE_VI, RTYPE_VF, RTYPE_R5900_I, RTYPE_R5900_Q, RTYPE_R5900_R)
178 (RTYPE_R5900_ACC): New register types.
179 (RTYPE_MASK): Include them.
180 (R5900_I_NAMES, R5900_Q_NAMES, R5900_R_NAMES, R5900_ACC_NAMES): New
181 macros.
182 (reg_names): Include them.
183 (mips_parse_register_1): New function, split out from...
184 (mips_parse_register): ...here. Add a channels_ptr parameter.
185 Look for VU0 channel suffixes when nonnull.
186 (reg_lookup): Update the call to mips_parse_register.
187 (mips_parse_vu0_channels): New function.
188 (OT_CHANNELS, OT_DOUBLE_CHAR): New mips_operand_token_types.
189 (mips_operand_token): Add a "channels" field to the union.
190 Extend the comment above "ch" to OT_DOUBLE_CHAR.
191 (mips_parse_base_start): Match -- and ++. Handle channel suffixes.
192 (mips_parse_argument_token): Handle channel suffixes here too.
193 (validate_mips_insn): Handle INSN2_VU0_CHANNEL_SUFFIX.
194 Ignore OP_VU0_MATCH_SUFFIX when calculating the used bits.
195 Handle '#' formats.
196 (md_begin): Register $vfN and $vfI registers.
197 (operand_reg_mask): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX.
198 (convert_reg_type): Handle OP_REG_VI, OP_REG_VF, OP_REG_R5900_I,
199 OP_REG_R5900_Q, OP_REG_R5900_R and OP_REG_R5900_ACC.
200 (match_vu0_suffix_operand): New function.
201 (match_operand): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX.
202 (macro): Use "+7" rather than "E" for LDQ2 and STQ2.
203 (mips_lookup_insn): New function.
204 (mips_ip): Use it. Allow "+K" operands to be elided at the end
205 of an instruction. Handle '#' sequences.
206
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2072013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
208
209 * config/tc-mips.c (macro, mips16_macro): Create an array of operand
210 values and use it instead of sreg, treg, xreg, etc.
211
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2122013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
213
214 * config/tc-mips.c (match_int_operand): Use mips_int_operand_min
215 and mips_int_operand_max.
216 (mips16_immed_operand, mips16_immed_operands, MIPS16_NUM_IMMED):
217 Delete.
218 (mips16_immed_operand, mips16_immed_in_range_p): New functions.
219 (mips16_immed, mips16_extended_frag): Use them. Use mips_int_operand
220 instead of mips16_immed_operand.
221
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2222013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
223
224 * config/tc-mips.c (mips16_macro): Don't use move_register.
225 (mips16_ip): Allow macros to use 'p'.
226
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2272013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
228
229 * config/tc-mips.c (MAX_OPERANDS): New macro.
230 (mips_operand_array): New structure.
231 (mips_operands, mips16_operands, micromips_operands): New arrays.
232 (micromips_to_32_reg_b_map, micromips_to_32_reg_c_map)
233 (micromips_to_32_reg_e_map, micromips_to_32_reg_f_map)
234 (micromips_to_32_reg_g_map, micromips_to_32_reg_l_map)
235 (micromips_to_32_reg_q_map): Delete.
236 (insn_operands, insn_opno, insn_extract_operand): New functions.
237 (validate_mips_insn): Take a mips_operand_array as argument and
238 use it to build up a list of operands. Extend to handle INSN_MACRO
239 and MIPS16.
240 (validate_mips16_insn): New function.
241 (validate_micromips_insn): Take a mips_operand_array as argument.
242 Handle INSN_MACRO.
243 (md_begin): Initialize mips_operands, mips16_operands and
244 micromips_operands. Call validate_mips_insn and
245 validate_micromips_insn for macro instructions too.
246 Call validate_mips16_insn for MIPS16 instructions.
247 (insn_read_mask, insn_write_mask, operand_reg_mask, insn_reg_mask):
248 New functions.
249 (gpr_read_mask, gpr_write_mask, fpr_read_mask, fpr_write_mask): Use
250 them. Handle INSN_UDI.
251 (get_append_method): Use gpr_read_mask.
252
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2532013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
254
255 * config/tc-mips.c (compact_branch_p, uncond_branch_p): Use the same
256 flags for MIPS16 and non-MIPS16 instructions.
257 (gpr_mod_mask): Move the INSN2_MOD_SP case outside the micromips block.
258 (gpr_read_mask): Use INSN2_READ_GPR_31 for MIPS16 instructions too.
259 (gpr_write_mask): Remove MIPS16_INSN_WRITE_SP handling.
260 (can_swap_branch_p, get_append_method): Use the same flags for MIPS16
261 and non-MIPS16 instructions. Fix formatting.
262
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2632013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
264
265 * config/tc-mips.c (reg_needs_delay): Move later in file.
266 Use gpr_write_mask.
267 (insns_between): Use gpr_read_mask instead of EXTRACT_OPERAND.
268
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2692013-07-26 Sergey Guriev <sergey.s.guriev@intel.com>
270 Alexander Ivchenko <alexander.ivchenko@intel.com>
271 Maxim Kuznetsov <maxim.kuznetsov@intel.com>
272 Sergey Lega <sergey.s.lega@intel.com>
273 Anna Tikhonova <anna.tikhonova@intel.com>
274 Ilya Tocar <ilya.tocar@intel.com>
275 Andrey Turetskiy <andrey.turetskiy@intel.com>
276 Ilya Verbin <ilya.verbin@intel.com>
277 Kirill Yukhin <kirill.yukhin@intel.com>
278 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
279
280 * config/tc-i386-intel.c (O_zmmword_ptr): New.
281 (i386_types): Add zmmword.
282 (i386_intel_simplify_register): Allow regzmm.
283 (i386_intel_simplify): Handle zmmwords.
284 (i386_intel_operand): Handle RC/SAE, vector operations and
285 zmmwords.
286 * config/tc-i386.c (ZMMWORD_MNEM_SUFFIX): New.
287 (struct RC_Operation): New.
288 (struct Mask_Operation): New.
289 (struct Broadcast_Operation): New.
290 (vex_prefix): Size of bytes increased to 4 to support EVEX
291 encoding.
292 (enum i386_error): Add new error codes: unsupported_broadcast,
293 broadcast_not_on_src_operand, broadcast_needed,
294 unsupported_masking, mask_not_on_destination, no_default_mask,
295 unsupported_rc_sae, rc_sae_operand_not_last_imm,
296 invalid_register_operand, try_vector_disp8.
297 (struct _i386_insn): Add new fields vrex, need_vrex, mask,
298 rounding, broadcast, memshift.
299 (struct RC_name): New.
300 (RC_NamesTable): New.
301 (evexlig): New.
302 (evexwig): New.
303 (extra_symbol_chars): Add '{'.
304 (cpu_arch): Add AVX512F, AVX512CD, AVX512ER and AVX512PF.
305 (i386_operand_type): Add regzmm, regmask and vec_disp8.
306 (match_mem_size): Handle zmmwords.
307 (operand_type_match): Handle zmm-registers.
308 (mode_from_disp_size): Handle vec_disp8.
309 (fits_in_vec_disp8): New.
310 (md_begin): Handle {} properly.
311 (type_names): Add "rZMM", "Mask reg" and "Vector d8".
312 (build_vex_prefix): Handle vrex.
313 (build_evex_prefix): New.
314 (process_immext): Adjust to properly handle EVEX.
315 (md_assemble): Add EVEX encoding support.
316 (swap_2_operands): Correctly handle operands with masking,
317 broadcasting or RC/SAE.
318 (check_VecOperands): Support EVEX features.
319 (VEX_check_operands): Properly handle 16 upper [xyz]mm registers.
320 (match_template): Support regzmm and handle new error codes.
321 (process_suffix): Handle zmmwords and zmm-registers.
322 (check_byte_reg): Extend to zmm-registers.
323 (process_operands): Extend to zmm-registers.
324 (build_modrm_byte): Handle EVEX.
325 (output_insn): Adjust to properly handle EVEX case.
326 (disp_size): Handle vec_disp8.
327 (output_disp): Support compressed disp8*N evex feature.
328 (output_imm): Handle RC/SAE immediates properly.
329 (check_VecOperations): New.
330 (i386_immediate): Handle EVEX features.
331 (i386_index_check): Handle zmmwords and zmm-registers.
332 (RC_SAE_immediate): New.
333 (i386_att_operand): Handle EVEX features.
334 (parse_real_register): Add a check for ZMM/Mask registers.
335 (OPTION_MEVEXLIG): New.
336 (OPTION_MEVEXWIG): New.
337 (md_longopts): Add mevexlig and mevexwig.
338 (md_parse_option): Handle mevexlig and mevexwig options.
339 (md_show_usage): Add description for mevexlig and mevexwig.
340 * doc/c-i386.texi: Document avx512f/.avx512f, avx512cd/.avx512cd,
341 avx512er/.avx512er, avx512pf/.avx512pf, mevexlig and mevexwig.
342
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3432013-07-25 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
344
345 * config/tc-i386.c (cpu_arch): Add .sha.
346 * doc/c-i386.texi: Document sha/.sha.
347
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3482013-07-24 Anna Tikhonova <anna.tikhonova@intel.com>
349 Kirill Yukhin <kirill.yukhin@intel.com>
350 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
351
352 * config/tc-i386.c (BND_PREFIX): New.
353 (struct _i386_insn): Add new field bnd_prefix.
354 (add_bnd_prefix): New.
355 (cpu_arch): Add MPX.
356 (i386_operand_type): Add regbnd.
357 (md_assemble): Handle BND prefixes.
358 (parse_insn): Likewise.
359 (output_branch): Likewise.
360 (output_jump): Likewise.
361 (build_modrm_byte): Handle regbnd.
362 (OPTION_MADD_BND_PREFIX): New.
363 (md_longopts): Add entry for 'madd-bnd-prefix'.
364 (md_parse_option): Handle madd-bnd-prefix option.
365 (md_show_usage): Add description for madd-bnd-prefix
366 option.
367 * doc/c-i386.texi: Document mpx/.mpx and -madd-bnd-prefix.
368
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3692013-07-24 Tristan Gingold <gingold@adacore.com>
370
371 * config/tc-ppc.c (md_apply_fix): Adjust BFD_RELOC_PPC_B16 on
372 xcoff targets.
373
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3742013-07-24 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
375
376 * config/tc-s390.c (s390_machine): Don't force the .machine
377 argument to lower case.
378
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3792013-07-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
380
381 * config/tc-arm.c (s_arm_arch_extension): Improve error message
382 for invalid extension.
383
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3842013-07-19 Yufeng Zhang <yufeng.zhang@arm.com>
385
386 * config/tc-aarch64.c (enum aarch64_abi_type): New enumeration tag.
387 (AARCH64_ABI_LP64, AARCH64_ABI_ILP32): New enumerators.
388 (aarch64_abi): New variable.
389 (ilp32_p): Change to be a macro.
390 (aarch64_opts): Remove the support for option -milp32 and -mlp64.
391 (struct aarch64_option_abi_value_table): New struct.
392 (aarch64_abis): New table.
393 (aarch64_parse_abi): New function.
394 (aarch64_long_opts): Add entry for -mabi=.
395 * doc/as.texinfo (Target AArch64 options): Document -mabi.
396 * doc/c-aarch64.texi: Likewise.
397
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3982013-07-18 Jim Thomas <thomas@cfht.hawaii.edu>
399
400 * config/tc-i386-intel.c (i386_intel_operand): Fixed signed vs
401 unsigned comparison.
402
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4032013-07-18 Sandeep Kumar Singh <Sandeep.Singh2@kpitcummins.com>
404
cbe02d4f 405 * config/rx-defs.h: Add macros for RX100, RX200, RX600, and
f0c00282 406 RX610.
cbe02d4f 407 * config/rx-parse.y: (rx_check_float_support): Add function to
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408 check floating point operation support for target RX100 and
409 RX200.
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410 * config/tc-rx.c: Add CPU options RX100, RX200, RX600, and RX610.
411 * doc/c-rx.texi: Add -mcpu option to recognize macros for RX100,
412 RX200, RX600, and RX610
f0c00282 413
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4142013-07-18 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
415
416 * config/tc-avr.c (md_show_usage): Add avrxmega2 to help text
417
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4182013-07-18 Vishnu K.S <vishnu.k_s@atmel.com>
419
420 * config/tc-avr.c: Make ata6289's ISA to AVR_ISA_AVR4.
421 * doc/c-avr.texi: Likewise.
422
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4232013-07-15 Richard Sandiford <rdsandiford@googlemail.com>
424
425 * config/tc-mips.c (match_save_restore_list_operand): Avoid -Wformat
426 error with older GCCs.
427 (mips16_macro_build): Dereference args.
428
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4292013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
430
431 * config/tc-mips.c (mips_prefer_vec_regno, mips_parse_register):
432 New functions, split out from...
433 (reg_lookup): ...here. Remove itbl support.
434 (reglist_lookup): Delete.
435 (mips_operand_token_type): New enum.
436 (mips_operand_token): New structure.
437 (mips_operand_tokens): New variable.
438 (mips_add_token, mips_parse_base_start, mips_parse_argument_token)
439 (mips_parse_arguments): New functions.
440 (md_begin): Initialize mips_operand_tokens.
441 (mips_arg_info): Add a token field. Remove optional_reg field.
442 (match_char, match_expression): New functions.
443 (match_const_int): Use match_expression. Remove "s" argument
444 and return a boolean result. Remove O_register handling.
445 (match_regno, match_reg, match_reg_range): New functions.
446 (match_int_operand, match_mapped_int_operand, match_msb_operand)
447 (match_reg_operand, match_reg_pair_operand, match_perf_reg_operand)
448 (match_addiusp_operand, match_clo_clz_dest_operand)
449 (match_lwm_swm_list_operand, match_entry_exit_operand)
450 (match_save_restore_list_operand, match_mdmx_imm_reg_operand)
451 (match_tied_reg_operand): Remove "s" argument and return a boolean
452 result. Match tokens rather than text. Update calls to
453 match_const_int. Rely on match_regno to call check_regno.
454 (match_pcrel_operand, match_pc_operand): Replace "s" argument with
455 "arg" argument. Return a boolean result.
456 (parse_float_constant): Replace with...
457 (match_float_constant): ...this new function.
458 (match_operand): Remove "s" argument and return a boolean result.
459 Update calls to subfunctions.
460 (mips_ip, mips16_ip): Call mips_parse_arguments. Use match routines
461 rather than string-parsing routines. Update handling of optional
462 registers for token scheme.
463
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4642013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
465
466 * config/tc-mips.c (parse_float_constant): Split out from...
467 (mips_ip): ...here.
468
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RS
4692013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
470
471 * config/tc-mips.c (INSERT_BITS, INSERT_OPERAND, MIPS16_INSERT_OPERAND):
472 Delete.
473
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RS
4742013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
475
476 * config/tc-mips.c (mips32_to_16_reg_map): Delete.
477 (match_entry_exit_operand): New function.
478 (match_save_restore_list_operand): Likewise.
479 (match_operand): Use them.
480 (check_absolute_expr): Delete.
481 (mips16_ip): Rewrite main parsing loop to use mips_operands.
482
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RS
4832013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
484
485 * config/tc-mips.c: Enable functions commented out in previous patch.
486 (SKIP_SPACE_TABS): Move further up file.
487 (mips32_to_micromips_reg_b_map, mips32_to_micromips_reg_c_map)
488 (mips32_to_micromips_reg_d_map, mips32_to_micromips_reg_e_map)
489 (ips32_to_micromips_reg_f_map, mips32_to_micromips_reg_g_map)
490 (mips32_to_micromips_reg_l_map, mips32_to_micromips_reg_m_map)
491 (mips32_to_micromips_reg_q_map, mips32_to_micromips_reg_n_map)
492 (micromips_imm_b_map, micromips_imm_c_map): Delete.
493 (mips_lookup_reg_pair): Delete.
494 (macro): Use report_bad_range and report_bad_field.
495 (mips_immed, expr_const_in_range): Delete.
496 (mips_ip): Rewrite main parsing loop to use new functions.
497
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RS
4982013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
499
500 * config/tc-mips.c (mips_oddfpreg_ok): Move further up file.
501 Change return type to bfd_boolean.
502 (report_bad_range, report_bad_field): New functions.
503 (mips_arg_info): New structure.
504 (match_const_int, convert_reg_type, check_regno, match_int_operand)
505 (match_mapped_int_operand, match_msb_operand, match_reg_operand)
506 (match_reg_pair_operand, match_pcrel_operand, match_perf_reg_operand)
507 (match_addiusp_operand, match_clo_clz_dest_operand)
508 (match_lwm_swm_list_operand, match_mdmx_imm_reg_operand)
509 (match_pc_operand, match_tied_reg_operand, match_operand)
510 (check_completed_insn): New functions, commented out for now.
511
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RS
5122013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
513
514 * config/tc-mips.c (insn_insert_operand): New function.
515 (macro_build, mips16_macro_build): Put null character check
516 in the for loop and convert continues to breaks. Use operand
517 structures to handle constant operands.
518
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5192013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
520
521 * config/tc-mips.c (validate_mips_insn): Move further up file.
522 Add insn_bits and decode_operand arguments. Use the mips_operand
523 fields to work out which bits an operand occupies. Detect double
524 definitions.
525 (validate_micromips_insn): Move further up file. Call into
526 validate_mips_insn.
527
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5282013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
529
530 * config/tc-mips.c (mips16_macro_build): Remove 'Y' case.
531
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RS
5322013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
533
534 * config/tc-mips.c (macro_build): Take an int for "C", "k", "\\"
535 and "~".
536 (macro): Update accordingly.
537
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RS
5382013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
539
540 * config/tc-mips.c (imm_expr, imm2_expr, offset_expr): Tweak commentary.
541 (imm_reloc): Delete.
542 (md_assemble): Remove imm_reloc handling.
543 (mips_ip): Update commentary. Use offset_expr and offset_reloc
544 rather than imm_expr and imm_reloc for 'i', 'j' and 'u'.
545 Use a temporary array rather than imm_reloc when parsing
546 constant expressions. Remove imm_reloc initialization.
547 (mips16_ip): Update commentary. Use offset_expr and offset_reloc
548 for the relaxable field. Use a relax_char variable to track the
549 type of this field. Remove imm_reloc initialization.
550
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RS
5512013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
552
553 * config/tc-mips.c (mips16_ip): Handle "I".
554
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MR
5552013-07-12 Maciej W. Rozycki <macro@codesourcery.com>
556
557 * config/tc-mips.c (mips_flag_nan2008): New variable.
558 (options): Add OPTION_NAN enum value.
559 (md_longopts): Handle it.
560 (md_parse_option): Likewise.
561 (s_nan): New function.
562 (mips_elf_final_processing): Handle EF_MIPS_NAN2008.
563 (md_show_usage): Add -mnan.
564
565 * doc/as.texinfo (Overview): Add -mnan.
566 * doc/c-mips.texi (MIPS Opts): Document -mnan.
567 (MIPS NaN Encodings): New node. Document .nan directive.
568 (MIPS-Dependent): List the new node.
569
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TG
5702013-07-09 Tristan Gingold <gingold@adacore.com>
571
572 * configure.com: Define HAVE_SYS_TYPES_H and HAVE_UNISTD_H
573
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RS
5742013-07-08 Richard Sandiford <rdsandiford@googlemail.com>
575
576 * config/tc-mips.c (mips_ip): Unconditionally parse an expression
577 for 'A' and assume that the constant has been elided if the result
578 is an O_register.
579
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5802013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
581
582 * config/tc-mips.c (gprel16_reloc_p): New function.
583 (macro_read_relocs): Assume BFD_RELOC_LO16 if all relocs are
584 BFD_RELOC_UNUSED.
585 (offset_high_part, small_offset_p): New functions.
586 (nacro): Use them. Remove *_OB and *_DOB cases. For single-
587 register load and store macros, handle the 16-bit offset case first.
588 If a 16-bit offset is not suitable for the instruction we're
589 generating, load it into the temporary register using
590 ADDRESS_ADDI_INSN. Make the M_LI_DD code fall through into the
591 M_L_DAB code once the address has been constructed. For double load
592 and store macros, again handle the 16-bit offset case first.
593 If the second register cannot be accessed from the same high
594 part as the first, load it into AT using ADDRESS_ADDI_INSN.
595 Fix the handling of LD in cases where the first register is the
596 same as the base. Also handle the case where the offset is
597 not 16 bits and the second register cannot be accessed from the
598 same high part as the first. For unaligned loads and stores,
599 fuse the offbits == 12 and old "ab" handling. Apply this handling
600 whenever the second offset needs a different high part from the first.
601 Construct the offset using ADDRESS_ADDI_INSN where possible,
602 for offbits == 16 as well as offbits == 12. Use offset_reloc
603 when constructing the individual loads and stores.
604 (mips_ip): Set up imm_expr, imm2_expr, offset_expr, imm_reloc
605 and offset_reloc before matching against a particular opcode.
606 Handle elided 'A' constants. Allow 'A' constants to use
607 relocation operators.
608
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RS
6092013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
610
611 * config/tc-mips.c (validate_mips_insn): Remove "[" and "]" handling.
612 (mips_ip): Likewise. Do not set is_mdmx for INSN_5400 instructions.
613 Check constraints on the VR5400 RZU.OB, SLL.OB and SRL.OB instructions.
614
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RS
6152013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
616
617 * config/tc-mips.c (mips_ip): Preserve the real bit number for "+p".
618 Require the msb to be <= 31 for "+s". Check that the size is <= 31
619 for both "+s" and "+S".
620
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RS
6212013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
622
623 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn):
624 (mips_ip, mips16_ip): Handle "+i".
625
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RS
6262013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
627
628 * config/tc-mips.c (mips32_to_micromips_reg_h_map): Delete.
629 (micromips_to_32_reg_h_map): Rename to...
630 (micromips_to_32_reg_h_map1): ...this.
631 (micromips_to_32_reg_i_map): Rename to...
632 (micromips_to_32_reg_h_map2): ...this.
633 (mips_lookup_reg_pair): New function.
634 (gpr_write_mask, macro): Adjust after above renaming.
635 (validate_micromips_insn): Remove "mi" handling.
636 (mips_ip): Likewise. Parse both registers in a pair for "mh".
637
fa7616a4
RS
6382013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
639
640 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn)
641 (mips_ip): Remove "+D" and "+T" handling.
642
fb798c50
AK
6432013-07-05 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
644
645 * config/tc-s390.c (md_gather_operands, md_apply_fix): Support new
646 relocs.
647
2c0a3565
MS
6482013-07-03 Marcus Shawcroft <marcus.shawcroft@arm.com>
649
4aa2c5e2
MS
650 * config/tc-aarch64.c (reloc_table): Merge got_prel19 into got.
651
6522013-07-02 Marcus Shawcroft <marcus.shawcroft@arm.com>
653
2c0a3565
MS
654 * config/tc-aarch64.c (md_apply_fix): Reorder case values.
655 (aarch64_force_relocation): Likewise.
656
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AM
6572013-07-02 Alan Modra <amodra@gmail.com>
658
659 * config/tc-ppc.c (ppc_elf_adjust_symtab): Don't make .TOC. weak.
660
81566a9b
MR
6612013-06-26 Maciej W. Rozycki <macro@codesourcery.com>
662
663 * doc/as.texinfo (Overview): Remove @samp from MIPS ISA names.
664 * doc/c-mips.texi (MIPS Options): Remove @sc from MIPS ISA names.
665 Replace @sc{mips16} with literal `MIPS16'.
666 (MIPS ISA): Replace @sc{mips3} with literal `MIPS III'.
667
a6bb11b2
YZ
6682013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
669
670 * config/tc-aarch64.c (reloc_table): Replace
671 BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with
672 BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to
673 BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and
674 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC.
675 (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC,
676 BFD_RELOC_AARCH64_LD32_GOT_LO12_NC,
677 BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC,
678 BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC,
679 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and
680 BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC.
681 (aarch64_force_relocation): Likewise.
682
cec5225b
YZ
6832013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
684
685 * config/tc-aarch64.c (ilp32_p): New static variable.
686 (elf64_aarch64_target_format): Return the target according to the
687 value of 'ilp32_p'.
688 (md_begin): Determine 'mach' according to the value of 'ilp32_p'.
689 (aarch64_opts): Add support for options '-milp32' and '-mlp64'.
690 (aarch64_dwarf2_addr_size): New function.
691 * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration.
692 (DWARF2_ADDR_SIZE): New define.
693
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RS
6942013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
695
696 * doc/c-mips.texi: Use ISA instead of @sc{isa}.
697
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RS
6982013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
699
700 * config/tc-mips.c (validate_mips_insn): Use STYPE rather than SHAMT.
701
833794fc
MR
7022013-06-25 Maciej W. Rozycki <macro@codesourcery.com>
703
704 * config/tc-mips.c (mips_set_options): Add insn32 member.
705 (mips_opts): Initialize it.
706 (NOP_INSN, NOP_INSN_SIZE): Handle insn32 mode.
707 (options): Add OPTION_INSN32 and OPTION_NO_INSN32 enum values.
708 (md_longopts): Add "minsn32" and "mno-insn32" options.
709 (is_size_valid): Handle insn32 mode.
710 (md_assemble): Pass instruction string down to macro.
711 (brk_fmt): Add second dimension and insn32 mode initializers.
712 (mfhl_fmt): Likewise.
713 (BRK_FMT, MFHL_FMT): Handle insn32 mode.
714 (macro_build) <'c'>: Handle microMIPS 32-bit BREAK encoding.
715 (macro_build_jalr, move_register): Handle insn32 mode.
716 (macro_build_branch_rs): Likewise.
717 (macro): Handle insn32 mode.
718 <M_JRADDIUSP>, <M_JRC>, <M_MOVEP>: New cases.
719 (mips_ip): Handle insn32 mode.
720 (md_parse_option): Handle OPTION_INSN32 and OPTION_NO_INSN32.
721 (s_mipsset): Handle "insn32" and "noinsn32" pseudo-ops.
722 (mips_handle_align): Handle insn32 mode.
723 (md_show_usage): Add -minsn32 and -mno-insn32.
724
725 * doc/as.texinfo (Target MIPS options): Add -minsn32 and
726 -mno-insn32 options.
727 (-minsn32, -mno-insn32): New options.
728 * doc/c-mips.texi (MIPS Opts): Add -minsn32 and -mno-insn32
729 options.
730 (MIPS assembly options): New node. Document .set insn32 and
731 .set noinsn32.
732 (MIPS-Dependent): List the new node.
733
d1706f38
NC
7342013-06-25 Nick Clifton <nickc@redhat.com>
735
736 * config/tc-msp430.c (msp430_srcoperand): Do not allow the use of
737 the PC in indirect addressing on 430xv2 parts.
738 (msp430_operands): Add version test to hardware bug encoding
739 restrictions.
740
477330fc
RM
7412013-06-24 Roland McGrath <mcgrathr@google.com>
742
d996d970
RM
743 * config/tc-arm.c (parse_reg_list): Use skip_past_char for '}',
744 so it skips whitespace before it.
745 (s_arm_unwind_save_mmxwr, s_arm_unwind_save_mmxwcg): Likewise.
746
477330fc
RM
747 * config/tc-arm.c (arm_symbol_chars): Include '{' and '}'.
748 (arm_reg_parse_multi): Skip whitespace first.
749 (parse_reg_list): Likewise.
750 (parse_vfp_reg_list): Likewise.
751 (s_arm_unwind_save_mmxwcg): Likewise.
752
24382199
NC
7532013-06-24 Nick Clifton <nickc@redhat.com>
754
755 PR gas/15623
756 * config/tc-arm.c (do_t_smc): Mark as ending an IT block.
757
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RS
7582013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
759
760 * config/tc-mips.c (mips_ip): Fix swapped bit numbers in comments.
761
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RS
7622013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
763
764 * config/tc-mips.c: Assert that offsetT and valueT are at least
765 8 bytes in size.
766 (GPR_SMIN, GPR_SMAX): New macros.
767 (macro, mips_ip): Remove code for 4-byte valueT and offsetT.
768
f3ded42a
RS
7692013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
770
771 * config/tc-mips.c: Remove OBJ_ELF, OBJ_MAYBE_ELF and IS_ELF
772 conditions. Remove any code deselected by them.
773 (s_mips_frame, s_mips_mask): Handle ECOFF_DEBUGGING case first.
774
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RS
7752013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
776
777 * NEWS: Note removal of ECOFF support.
778 * doc/as.texinfo (--emulation): Update for the removal of MIPS ECOFF.
779 * Makefile.am (TARG_ENV_HFILES): Remove config/te-lnews.h.
780 (MULTI_CFILES): Remove config/e-mipsecoff.c.
781 * Makefile.in: Regenerate.
782 * configure.in: Remove MIPS ECOFF references.
783 (mips-sony-bsd*, mips-*-bsd*, mips-*-lnews*-ecoff, mips-*-*-ecoff):
784 Delete cases.
785 (mips-*-irix5*-*, mips*-*-linux*-*, mips*-*-freebsd*)
786 (mips*-*-kfreebsd*-gnu, mips-*-*-elf): Fold into...
787 (mips-*-*): ...this single case.
788 (mipsbecoff, mipslecoff, mipsecoff): Remove emulations. Expect
789 MIPS emulations to be e-mipself*.
790 * configure: Regenerate.
791 * configure.tgt (mips-sony-bsd*, mips-*-ultrix*, mips-*-osf*)
792 (mips-*-ecoff*, mips-*-pe*, mips-*-irix*, ips-*-lnews*, mips-*-riscos*)
793 (mips-*-sysv*): Remove coff and ecoff cases.
794 * as.c (mipsbecoff, mipslecoff, mipsecoff): Remove.
795 * ecoff.c: Remove reference to MIPS ECOFF.
796 * config/e-mipsecoff.c, config/te-lnews.h: Delete files.
797 * config/tc-mips.c (ECOFF_LITTLE_FORMAT): Delete.
798 (RDATA_SECTION_NAME, mips_target_form): Remove COFF and ECOFF cases.
799 (mips_hi_fixup): Tweak comment.
800 (append_insn): Require a howto.
801 (mips_after_parse_args): Remove OBJ_MAYBE_ECOFF code.
802
98508b2a
RS
8032013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
804
805 * doc/as.texinfo: Use MIPS rather than @sc{mips} throughout.
806 Use "CPU" instead of "cpu".
807 * doc/c-mips.texi: Likewise.
808 (MIPS Opts): Rename to MIPS Options.
809 (MIPS option stack): Rename to MIPS Option Stack.
810 (MIPS ASE instruction generation overrides): Rename to
811 MIPS ASE Instruction Generation Overrides (for now).
812 (MIPS floating-point): Rename to MIPS Floating-Point.
813
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RS
8142013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
815
816 * doc/c-mips.texi (MIPS Macros): New section.
817 (MIPS Object): Replace with...
818 (MIPS Small Data): ...this new section.
819
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RS
8202013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
821
822 * doc/c-mips.texi (MIPS symbol sizes): Move section further up file.
823 Capitalize name. Use @kindex instead of @cindex for .set entries.
824
a1b86ab7
RS
8252013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
826
827 * doc/c-mips.texi (MIPS Stabs): Remove section.
828
c6278170
RS
8292013-06-20 Richard Sandiford <rdsandiford@googlemail.com>
830
831 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS, ISA_SUPPORTS_DSP_ASE)
832 (ISA_SUPPORTS_DSP64_ASE, ISA_SUPPORTS_DSPR2_ASE, ISA_SUPPORTS_EVA_ASE)
833 (ISA_SUPPORTS_MT_ASE, ISA_SUPPORTS_MCU_ASE, ISA_SUPPORTS_VIRT_ASE)
834 (ISA_SUPPORTS_VIRT64_ASE): Delete.
835 (mips_ase): New structure.
836 (mips_ases): New table.
837 (FP64_ASES): New macro.
838 (mips_ase_groups): New array.
839 (mips_isa_rev, mips_ase_mask, mips_check_isa_supports_ase)
840 (mips_check_isa_supports_ases, mips_set_ase, mips_lookup_ase): New
841 functions.
842 (is_opcode_valid): Use mips_ases to get the 64-bit ASE flags.
843 (md_parse_option): Use mips_ases and mips_set_ase instead of
844 separate case statements for each ASE option.
845 (mips_after_parse_args): Use FP64_ASES. Use
846 mips_check_isa_supports_ases to check the ASEs against
847 other options.
848 (s_mipsset): Use mips_ases and mips_set_ase instead of
849 separate if statements for each ASE option. Use
850 mips_check_isa_supports_ases, even when a non-ASE option
851 is specified.
852
63a4bc21
KT
8532013-06-19 Greta Yorsh <Greta.Yorsh@arm.com>
854
855 * config/tc-arm.c (arm_cpus): Add support for Cortex-A12.
856
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RS
8572013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
858
859 * config/tc-mips.c (md_shortopts, options, md_longopts)
860 (md_longopts_size): Move earlier in file.
861
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RS
8622013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
863
864 * config/tc-mips.c (mips_set_options): Replace separate "ase_*" fields
865 with a single "ase" bitmask.
866 (mips_opts): Update accordingly.
867 (file_ase, file_ase_explicit): New variables.
868 (file_ase_mips3d, file_ase_mdmx, file_ase_smartmips, file_ase_dsp)
869 (file_ase_dspr2, file_ase_eva, file_ase_mt, file_ase_virt): Delete.
870 (ISA_HAS_ROR): Adjust for mips_set_options change.
871 (is_opcode_valid): Take the base ase mask directly from mips_opts.
872 (mips_ip): Adjust for mips_set_options change.
873 (md_parse_option): Likewise. Update file_ase_explicit.
874 (mips_after_parse_args): Adjust for mips_set_options change.
875 Use bitmask operations to select the default ASEs. Set file_ase
876 rather than individual per-ASE variables.
877 (s_mipsset): Adjust for mips_set_options change.
878 (mips_elf_final_processing): Test file_ase rather than
879 file_ase_mdmx. Remove commented-out code.
880
d16afab6
RS
8812013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
882
883 * config/tc-mips.c (mips_cpu_info): Add an "ase" field.
884 (MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, MIPS_CPU_ASE_MT)
885 (MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX, MIPS_CPU_ASE_DSPR2)
886 (MIPS_CPU_ASE_MCU, MIPS_CPU_ASE_VIRT, MIPS_CPU_ASE_EVA): Delete.
887 (mips_after_parse_args): Use the new "ase" field to choose
888 the default ASEs.
889 (mips_cpu_info_table): Move ASEs from the "flags" field to the
890 "ase" field.
891
e83a675f
RE
8922013-06-18 Richard Earnshaw <rearnsha@arm.com>
893
894 * config/tc-arm.c (symbol_preemptible): New function.
895 (relax_branch): Use it.
896
7f3c4072
CM
8972013-06-17 Catherine Moore <clm@codesourcery.com>
898 Maciej W. Rozycki <macro@codesourcery.com>
899 Chao-Ying Fu <fu@mips.com>
900
901 * config/tc-mips.c (mips_set_options): Add ase_eva.
902 (mips_set_options mips_opts): Add ase_eva.
903 (file_ase_eva): Declare.
904 (ISA_SUPPORTS_EVA_ASE): Define.
905 (IS_SEXT_9BIT_NUM): Define.
906 (MIPS_CPU_ASE_EVA): Define.
907 (is_opcode_valid): Add support for ase_eva.
908 (macro_build): Likewise.
909 (macro): Likewise.
910 (validate_mips_insn): Likewise.
911 (validate_micromips_insn): Likewise.
912 (mips_ip): Likewise.
913 (options): Add OPTION_EVA and OPTION_NO_EVA.
914 (md_longopts): Add -meva and -mno-eva.
915 (md_parse_option): Process new options.
916 (mips_after_parse_args): Check for valid EVA combinations.
917 (s_mipsset): Likewise.
918
e410add4
RS
9192013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
920
921 * dwarf2dbg.h (dwarf2_move_insn): Declare.
922 * dwarf2dbg.c (line_subseg): Add pmove_tail.
923 (get_line_subseg): Add create_p argument. Initialize pmove_tail.
924 (dwarf2_gen_line_info_1): Update call accordingly.
925 (dwarf2_move_insn): New function.
926 * config/tc-mips.c (append_insn): Use dwarf2_move_insn.
927
6a50d470
RS
9282013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
929
930 Revert:
931
932 2011-09-05 Richard Sandiford <rdsandiford@googlemail.com>
933
934 PR gas/13024
935 * dwarf2dbg.c (pending_lines, pending_lines_tail): New variables.
936 (dwarf2_gen_line_info_1): Delete.
937 (dwarf2_push_line, dwarf2_flush_pending_lines): New functions.
938 (dwarf2_gen_line_info, dwarf2_emit_label): Use them.
939 (dwarf2_consume_line_info): Call dwarf2_flush_pending_lines.
940 (dwarf2_directive_loc): Push previous .locs instead of generating
941 them immediately.
942
f122319e
CF
9432013-06-13 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
944
945 * config/tc-mips.c (ISA_SUPPORTS_VIRT_ASE): Support micromips.
946 (ISA_SUPPORTS_VIRT64_ASE): Support 64-bit micromips.
947
909c7f9c
NC
9482013-06-13 Nick Clifton <nickc@redhat.com>
949
950 PR gas/15602
951 * config/tc-m68k.h (TC_CHECK_ADJUSTED_BROKEN_DOT_WORD): Define.
952 * config/tc-m68k.c (tc_m68k_check_adjusted_broken_word): New
953 function. Generates an error if the adjusted offset is out of a
954 16-bit range.
955
5d5755a7
SL
9562013-06-12 Sandra Loosemore <sandra@codesourcery.com>
957
958 * config/tc-nios2.c (md_apply_fix): Mask constant
959 BFD_RELOC_NIOS2_HIADJ16 value to 16 bits.
960
3bf0dbfb
MR
9612013-06-10 Maciej W. Rozycki <macro@codesourcery.com>
962
963 * config/tc-mips.c (append_insn): Don't do branch relaxation for
964 MIPS-3D instructions either.
965 (md_convert_frag): Update the COPx branch mask accordingly.
966
967 * config/tc-mips.c (md_show_usage): Document --[no-]relax-branch
968 option.
969 * doc/as.texinfo (Overview): Add --relax-branch and
970 --no-relax-branch.
971 * doc/c-mips.texi (MIPS Opts): Document --relax-branch and
972 --no-relax-branch.
973
9daf7bab
SL
9742013-06-09 Sandra Loosemore <sandra@codesourcery.com>
975
976 * config/tc-nios2.c (nios2_parse_args): Allow trap argument to
977 omitted.
978
d301a56b
RS
9792013-06-08 Catherine Moore <clm@codesourcery.com>
980
981 * config/tc-mips.c (is_opcode_valid): Build ASE mask.
982 (is_opcode_valid_16): Pass ase value to opcode_is_member.
983 (append_insn): Change INSN_xxxx to ASE_xxxx.
984
7bab7634
DC
9852013-06-01 George Thomas <george.thomas@atmel.com>
986
cbe02d4f 987 * gas/config/tc-avr.c: Change ISA for devices with USB support to
7bab7634
DC
988 AVR_ISA_XMEGAU
989
f60cf82f
L
9902013-05-31 H.J. Lu <hongjiu.lu@intel.com>
991
992 * config/tc-i386.c (md_begin): Don't align text/data/bss sections
993 for ELF.
994
a3f278e2
CM
9952013-05-31 Paul Brook <paul@codesourcery.com>
996
a3f278e2
CM
997 * config/tc-mips.c (s_ehword): New.
998
067ec077
CM
9992013-05-30 Paul Brook <paul@codesourcery.com>
1000
1001 * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH.
1002
d6101ac2
MR
10032013-05-29 Maciej W. Rozycki <macro@codesourcery.com>
1004
1005 * write.c (resolve_reloc_expr_symbols): On REL targets don't
1006 convert relocs who have no relocatable field either. Rephrase
1007 the conditional so that the PC-relative check is only applied
1008 for REL targets.
1009
f19ccbda
MR
10102013-05-28 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1011
1012 * config/tc-mips.c (macro) <ld>: Don't use $zero for address
1013 calculation.
1014
418009c2
YZ
10152013-05-28 Yufeng Zhang <yufeng.zhang@arm.com>
1016
1017 * config/tc-aarch64.c (reloc_table): Update to use
477330fc 1018 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of
418009c2
YZ
1019 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE.
1020 (md_apply_fix): Likewise.
1021 (aarch64_force_relocation): Likewise.
1022
0a8897c7
KT
10232013-05-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1024
1025 * config/tc-arm.c (it_fsm_post_encode): Improve
1026 warning messages about deprecated IT block formats.
1027
89d2a2a3
MS
10282013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com>
1029
1030 * config/tc-aarch64.c (md_apply_fix): Move value range checking
1031 inside fx_done condition.
1032
c77c0862
RS
10332013-05-22 Jürgen Urban <JuergenUrban@gmx.de>
1034
1035 * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB.
1036
c0637f3a
PB
10372013-05-20 Peter Bergner <bergner@vnet.ibm.com>
1038
1039 * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error
1040 and clean up warning when using PRINT_OPCODE_TABLE.
1041
5656a981
AM
10422013-05-20 Alan Modra <amodra@gmail.com>
1043
1044 * config/tc-ppc.c (md_apply_fix): Hoist code common to insn
1045 and data fixups performing shift/high adjust/sign extension on
1046 fieldval. Sink fx_pcrel handling and checks. Use fixP->fx_size
1047 when writing data fixups rather than recalculating size.
1048
997b26e8
JBG
10492013-05-16 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1050
1051 * doc/c-msp430.texi: Fix typo.
1052
9f6e76f4
TG
10532013-05-16 Tristan Gingold <gingold@adacore.com>
1054
1055 * config/tc-ppc.c (ppc_is_toc_sym): Symbols of class XMC_TC
1056 are also TOC symbols.
1057
638d3803
NC
10582013-05-16 Nick Clifton <nickc@redhat.com>
1059
1060 * config/tc-msp430.c: Make -mmcu recognise more part numbers.
1061 Add -mcpu command to specify core type.
997b26e8 1062 * doc/c-msp430.texi: Update documentation.
638d3803 1063
b015e599
AP
10642013-05-09 Andrew Pinski <apinski@cavium.com>
1065
1066 * config/tc-mips.c (struct mips_set_options): New ase_virt field.
1067 (mips_opts): Update for the new field.
1068 (file_ase_virt): New variable.
1069 (ISA_SUPPORTS_VIRT_ASE): New macro.
1070 (ISA_SUPPORTS_VIRT64_ASE): New macro.
1071 (MIPS_CPU_ASE_VIRT): New define.
1072 (is_opcode_valid): Handle ase_virt.
1073 (macro_build): Handle "+J".
1074 (validate_mips_insn): Likewise.
1075 (mips_ip): Likewise.
1076 (enum options): Add OPTION_VIRT and OPTION_NO_VIRT.
1077 (md_longopts): Add mvirt and mnovirt
1078 (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT.
1079 (mips_after_parse_args): Handle ase_virt field.
1080 (s_mipsset): Handle "virt" and "novirt".
1081 (mips_elf_final_processing): Add a comment about virt ASE might need
1082 a new flag.
1083 (md_show_usage): Print out the usage of -mvirt and mno-virt options.
1084 * doc/c-mips.texi: Document -mvirt and -mno-virt.
1085 Document ".set virt" and ".set novirt".
1086
da8094d7
AM
10872013-05-09 Alan Modra <amodra@gmail.com>
1088
1089 * config/tc-ppc.c (md_apply_fix): Sign extend fieldval under
1090 control of operand flag bits.
1091
c5f8c205
AM
10922013-05-07 Alan Modra <amodra@gmail.com>
1093
1094 * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro.
1095 (PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise.
1096 (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise.
1097 (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise.
1098 (md_apply_fix): Set fx_no_overflow for assorted relocations.
1099 Shift and sign-extend fieldval for use by some VLE reloc
1100 operand->insert functions.
1101
b47468a6
CM
11022013-05-06 Paul Brook <paul@codesourcery.com>
1103 Catherine Moore <clm@codesourcery.com>
1104
c5f8c205
AM
1105 * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL.
1106 (limited_pcrel_reloc_p): Likewise.
b47468a6
CM
1107 (md_apply_fix): Likewise.
1108 (tc_gen_reloc): Likewise.
1109
2de39019
CM
11102013-05-06 Richard Sandiford <rdsandiford@googlemail.com>
1111
1112 * config/tc-mips.c (limited_pcrel_reloc_p): New function.
1113 (mips_fix_adjustable): Adjust pc-relative check to use
1114 limited_pc_reloc_p.
1115
754e2bb9
RS
11162013-05-02 Richard Sandiford <rdsandiford@googlemail.com>
1117
1118 * config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries.
1119 (s_mips_stab): Do not restrict to stabn only.
1120
13761a11
NC
11212013-05-02 Nick Clifton <nickc@redhat.com>
1122
1123 * config/tc-msp430.c: Add support for the MSP430X architecture.
1124 Add code to insert a NOP instruction after any instruction that
1125 might change the interrupt state.
1126 Add support for the LARGE memory model.
1127 Add code to initialise the .MSP430.attributes section.
1128 * config/tc-msp430.h: Add support for the MSP430X architecture.
1129 * doc/c-msp430.texi: Document the new -mL and -mN command line
1130 options.
1131 * NEWS: Mention support for the MSP430X architecture.
1132
df26367c
MR
11332013-05-01 Maciej W. Rozycki <macro@codesourcery.com>
1134
1135 * configure.tgt: Replace alpha*-*-linuxecoff* pattern with
1136 alpha*-*-linux*ecoff*.
1137
f02d8318
CF
11382013-04-30 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1139
1140 * config/tc-mips.c (mips_ip): Add sizelo.
1141 For "+C", "+G", and "+H", set sizelo and compare against it.
1142
b40bf0a2
NC
11432013-04-29 Nick Clifton <nickc@redhat.com>
1144
1145 * as.c (Options): Add -gdwarf-sections.
1146 (parse_args): Likewise.
1147 * as.h (flag_dwarf_sections): Declare.
1148 * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes.
1149 (process_entries): When -gdwarf-sections is enabled generate
1150 fragmentary .debug_line sections.
1151 (out_debug_line): Set the section for the .debug_line section end
1152 symbol.
1153 * doc/as.texinfo: Document -gdwarf-sections.
1154 * NEWS: Mention -gdwarf-sections.
1155
8eeccb77 11562013-04-26 Christian Groessler <chris@groessler.org>
00a3147e
CG
1157
1158 * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdline
1159 according to the target parameter. Don't call s_segm since s_segm
1160 calls bfd_set_arch_mach using stdoutput, but stdoutput isn't
1161 initialized yet.
1162 (md_begin): Call s_segm according to target parameter from command
1163 line.
1164
49926cd0
AM
11652013-04-25 Alan Modra <amodra@gmail.com>
1166
1167 * configure.in: Allow little-endian linux.
1168 * configure: Regenerate.
1169
e3031850
SL
11702013-04-24 Sandra Loosemore <sandra@codesourcery.com>
1171
1172 * config/tc-nios2.c (nios2_control_register_arg_p): Rename
1173 "fstatus" control register to "eccinj".
1174
cb948fc0
KT
11752013-04-19 Kai Tietz <ktietz@redhat.com>
1176
1177 * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin.
1178
4455e9ad
JB
11792013-04-15 Julian Brown <julian@codesourcery.com>
1180
1181 * expr.c (add_to_result, subtract_from_result): Make global.
1182 * expr.h (add_to_result, subtract_from_result): Add prototypes.
1183 * config/tc-sh.c (sh_optimize_expr): Use add_to_result,
1184 subtract_from_result to handle extra bit of precision for .sleb128
1185 directive operands.
1186
956a6ba3
JB
11872013-04-10 Julian Brown <julian@codesourcery.com>
1188
1189 * read.c (convert_to_bignum): Add sign parameter. Use it
1190 instead of X_unsigned to determine sign of resulting bignum.
1191 (emit_expr): Pass extra argument to convert_to_bignum.
1192 (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass
1193 X_extrabit to convert_to_bignum.
1194 (parse_bitfield_cons): Set X_extrabit.
1195 * expr.c (make_expr_symbol, expr_build_uconstant, operand):
1196 Initialise X_extrabit field as appropriate.
1197 (add_to_result): New.
1198 (subtract_from_result): New.
1199 (expr): Use above.
1200 * expr.h (expressionS): Add X_extrabit field.
1201
eb9f3f00
JB
12022013-04-10 Jan Beulich <jbeulich@suse.com>
1203
1204 * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base
1205 register being PC when is_t or writeback, and use distinct
1206 diagnostic for the latter case.
1207
ccb84d65
JB
12082013-04-10 Jan Beulich <jbeulich@suse.com>
1209
1210 * gas/config/tc-arm.c (parse_operands): Re-write
1211 po_barrier_or_imm().
1212 (do_barrier): Remove bogus constraint().
1213 (do_t_barrier): Remove.
1214
4d13caa0
NC
12152013-04-09 Joerg Wunsch <joerg.wunsch@atmel.com>
1216
1217 * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2,
1218 ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2,
1219 ATmega2564RFR2
1220 * gas/doc/c-avr.texi (-mmcu documentation): Likewise.
1221
16d02dc9
JB
12222013-04-09 Jan Beulich <jbeulich@suse.com>
1223
1224 * gas/config/tc-arm.c (do_vmrs): Accept all control registers.
1225 Use local variable Rt in more places.
1226 (do_vmsr): Accept all control registers.
1227
05ac0ffb
JB
12282013-04-09 Jan Beulich <jbeulich@suse.com>
1229
1230 * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
1231 if there was none specified for moves between scalar and core
1232 register.
1233
2d51fb74
JB
12342013-04-09 Jan Beulich <jbeulich@suse.com>
1235
1236 * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the
1237 NEON_ALL_LANES case.
1238
94dcf8bf
JB
12392013-04-08 Jan Beulich <jbeulich@suse.com>
1240
1241 * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for
1242 PC-relative VSTR.
1243
1472d06f
JB
12442013-04-08 Jan Beulich <jbeulich@suse.com>
1245
1246 * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq
1247 entry to sp_fiq.
1248
0c76cae8
AM
12492013-04-03 Alan Modra <amodra@gmail.com>
1250
1251 * doc/as.texinfo: Add support to generate man options for h8300.
1252 * doc/c-h8300.texi: Likewise.
1253
92eb40d9
RR
12542013-03-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
1255
1256 * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and
1257 Cortex-A57.
1258
51dcdd4d
NC
12592013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com>
1260
1261 PR binutils/15068
1262 * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array.
1263
c5d685bf
NC
12642013-03-26 Nick Clifton <nickc@redhat.com>
1265
9b978282
NC
1266 PR gas/15295
1267 * listing.c (rebuffer_line): Rewrite to avoid seeking back to the
1268 start of the file each time.
1269
c5d685bf
NC
1270 PR gas/15178
1271 * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for
1272 FreeBSD targets.
1273
9699c833
TG
12742013-03-26 Douglas B Rupp <rupp@gnat.com>
1275
1276 * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment
1277 after fixup.
1278
4755303e
WN
12792013-03-21 Will Newton <will.newton@linaro.org>
1280
1281 * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all
1282 pc-relative str instructions in Thumb mode.
1283
81f5558e
NC
12842013-03-21 Michael Schewe <michael.schewe@gmx.net>
1285
1286 * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
1287 @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
1288 R_H8_DISP32A16.
1289 * config/tc-h8300.h: Remove duplicated defines.
1290
71863e73
NC
12912013-03-21 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
1292
1293 PR gas/15282
1294 * tc-avr.c (mcu_has_3_byte_pc): New function.
1295 (tc_cfi_frame_initial_instructions): Call it to find return
1296 address size.
1297
795b8e6b
NC
12982013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com>
1299
1300 PR gas/15095
1301 * config/tc-tic6x.c (tic6x_try_encode): Handle
1302 tic6x_coding_dreg_(msb|lsb) field coding types and use it to
1303 encode register pair numbers when required.
1304
ba86b375
WN
13052013-03-15 Will Newton <will.newton@linaro.org>
1306
1307 * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register
1308 in vstr in Thumb mode for pre-ARMv7 cores.
1309
9e6f3811
AS
13102013-03-14 Andreas Schwab <schwab@suse.de>
1311
1312 * doc/c-arc.texi (ARC Directives): Revert last change and use
1313 @itemize instead of @table.
1314 * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
1315
b10bf8c5
NC
13162013-03-14 Nick Clifton <nickc@redhat.com>
1317
1318 PR gas/15273
1319 * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a
1320 NULL message, instead just check ARM_CPU_IS_ANY directly.
1321
ba724cfc
NC
13222013-03-14 Nick Clifton <nickc@redhat.com>
1323
1324 PR gas/15212
9e6f3811 1325 * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet
ba724cfc
NC
1326 for table format.
1327 * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
1328 to the @item directives.
1329 (ARM-Neon-Alignment): Move to correct place in the document.
1330 * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
1331 formatting.
1332 * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
1333 @smallexample.
1334
531a94fd
SL
13352013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
1336
1337 * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'
1338 case. Add default BAD_CASE to switch.
1339
dad60f8e
SL
13402013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
1341
1342 * config/tc-nios2.c (nios2_assemble_args_ds): New function.
1343 (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
1344
dd5181d5
KT
13452013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1346
1347 * config/tc-arm.c (crc_ext_armv8): New feature set.
1348 (UNPRED_REG): New macro.
1349 (do_crc32_1): New function.
1350 (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
1351 do_crc32ch, do_crc32cw): Likewise.
1352 (TUEc): New macro.
1353 (insns): Add entries for crc32 mnemonics.
1354 (arm_extensions): Add entry for crc.
1355
8e723a10
CLT
13562013-03-08 Chung-Lin Tang <cltang@codesourcery.com>
1357
1358 * write.h (struct fix): Add fx_dot_frag field.
1359 (dot_frag): Declare.
1360 * write.c (dot_frag): New variable.
1361 (fix_new_internal): Set fx_dot_frag field with dot_frag.
1362 (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
1363 * expr.c (expr): Save value of frag_now in dot_frag when setting
1364 dot_value.
1365 * read.c (emit_expr): Likewise. Delete comments.
1366
be05d201
L
13672013-03-07 H.J. Lu <hongjiu.lu@intel.com>
1368
1369 * config/tc-i386.c (flag_code_names): Removed.
1370 (i386_index_check): Rewrote.
1371
62b0d0d5
YZ
13722013-03-05 Yufeng Zhang <yufeng.zhang@arm.com>
1373
1374 * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
1375 add comment.
1376 (aarch64_double_precision_fmovable): New function.
1377 (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
1378 function; handle hexadecimal representation of IEEE754 encoding.
1379 (parse_operands): Update the call to parse_aarch64_imm_float.
1380
165de32a
L
13812013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1382
1383 * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
1384 (check_hle): Updated.
1385 (md_assemble): Likewise.
1386 (parse_insn): Likewise.
1387
d5de92cf
L
13882013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1389
1390 * config/tc-i386.c (_i386_insn): Add rep_prefix.
9e6f3811 1391 (md_assemble): Check if REP prefix is OK.
d5de92cf
L
1392 (parse_insn): Remove expecting_string_instruction. Set
1393 i.rep_prefix.
1394
e60bb1dd
YZ
13952013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1396
1397 * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
1398
aeebdd9b
YZ
13992013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1400
1401 * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
1402 for system registers.
1403
4107ae22
DD
14042013-02-27 DJ Delorie <dj@redhat.com>
1405
1406 * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
1407 (rl78_op): Handle %code().
1408 (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
1409 (tc_gen_reloc): Likwise; convert to a computed reloc.
1410 (md_apply_fix): Likewise.
1411
151fa98f
NC
14122013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
1413
1414 * config/rl78-parse.y: Fix encoding of DIVWU insn.
1415
70a8bc5b 14162013-02-25 Terry Guo <terry.guo@arm.com>
1417
1418 * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
1419 * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
1420 list of accepted CPUs.
1421
5c111e37
L
14222013-02-19 H.J. Lu <hongjiu.lu@intel.com>
1423
1424 PR gas/15159
1425 * config/tc-i386.c (cpu_arch): Add ".smap".
1426
1427 * doc/c-i386.texi: Document smap.
1428
8a75745d
MR
14292013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1430
1431 * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
1432 mips_assembling_insn appropriately.
1433 (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
1434
79850f26
MR
14352013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1436
cf29fc61 1437 * config/tc-mips.c (append_insn): Correct indentation, remove
79850f26
MR
1438 extraneous braces.
1439
4c261dff
NC
14402013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1441
5c111e37 1442 * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
4c261dff 1443
ea33f281
NC
14442013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
1445
1446 * configure.tgt: Add nios2-*-rtems*.
1447
a1ccaec9
YZ
14482013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
1449
1450 * config/tc-aarch64.c (md_begin): Change to check if 'name' is
1451 NULL.
1452
0aa27725
RS
14532013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
1454
1455 * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
1456 (macro): Use it. Assert that trunc.w.s is not used for r5900.
1457
da4339ed
NC
14582013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com>
1459
1460 * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
1461 core.
1462
36591ba1 14632013-02-06 Sandra Loosemore <sandra@codesourcery.com>
5c111e37 1464 Andrew Jenner <andrew@codesourcery.com>
36591ba1
SL
1465
1466 Based on patches from Altera Corporation.
1467
1468 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
1469 (TARGET_CPU_HFILES): Add config/tc-nios2.h.
1470 * Makefile.in: Regenerated.
1471 * configure.tgt: Add case for nios2*-linux*.
1472 * config/obj-elf.c: Conditionally include elf/nios2.h.
1473 * config/tc-nios2.c: New file.
1474 * config/tc-nios2.h: New file.
1475 * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
1476 * doc/Makefile.in: Regenerated.
1477 * doc/all.texi: Set NIOSII.
1478 * doc/as.texinfo (Overview): Add Nios II options.
1479 (Machine Dependencies): Include c-nios2.texi.
1480 * doc/c-nios2.texi: New file.
1481 * NEWS: Note Altera Nios II support.
1482
94d4433a
AM
14832013-02-06 Alan Modra <amodra@gmail.com>
1484
1485 PR gas/14255
1486 * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
1487 Don't skip fixups with fx_subsy non-NULL.
1488 * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
1489 with fx_subsy non-NULL.
1490
ace9af6f
L
14912013-02-04 H.J. Lu <hongjiu.lu@intel.com>
1492
1493 * doc/c-metag.texi: Add "@c man" markers.
1494
89d67ed9
AM
14952013-02-04 Alan Modra <amodra@gmail.com>
1496
1497 * write.c (fixup_segment): Return void. Delete seg_reloc_count
1498 related code.
1499 (TC_ADJUST_RELOC_COUNT): Delete.
1500 * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
1501
89072bd6
AM
15022013-02-04 Alan Modra <amodra@gmail.com>
1503
1504 * po/POTFILES.in: Regenerate.
1505
f9b2d544
NC
15062013-01-30 Markos Chandras <markos.chandras@imgtec.com>
1507
1508 * config/tc-metag.c: Make SWAP instruction less permissive with
1509 its operands.
1510
392ca752
DD
15112013-01-29 DJ Delorie <dj@redhat.com>
1512
1513 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
1514 relocs in .word/.etc statements.
1515
427d0db6
RM
15162013-01-29 Roland McGrath <mcgrathr@google.com>
1517
1518 * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
1519 immediate value for 8-bit offset" error so it shows line info.
1520
4faf939a
JM
15212013-01-24 Joseph Myers <joseph@codesourcery.com>
1522
1523 * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
1524 for 64-bit output.
1525
78c8d46c
NC
15262013-01-24 Nick Clifton <nickc@redhat.com>
1527
1528 * config/tc-v850.c: Add support for e3v5 architecture.
1529 * doc/c-v850.texi: Mention new support.
1530
fb5b7503
NC
15312013-01-23 Nick Clifton <nickc@redhat.com>
1532
1533 PR gas/15039
1534 * config/tc-avr.c: Include dwarf2dbg.h.
1535
8ce3d284
L
15362013-01-18 H.J. Lu <hongjiu.lu@intel.com>
1537
1538 * config/tc-i386.c (reloc): Support size relocation only for ELF.
1539 (tc_i386_fix_adjustable): Likewise.
1540 (lex_got): Likewise.
1541 (tc_gen_reloc): Likewise.
1542
f5555712
YZ
15432013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
1544
1545 * config/tc-aarch64.c (output_operand_error_record): Change to output
1546 the out-of-range error message as value-expected message if there is
1547 only one single value in the expected range.
1548 (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
1549 LSL #0 as a programmer-friendly feature.
1550
8fd4256d
L
15512013-01-16 H.J. Lu <hongjiu.lu@intel.com>
1552
1553 * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
1554 (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
1555 BFD_RELOC_64_SIZE relocations.
1556 (lex_got): Support "symbol@SIZE" and don't create GOT symbol
1557 for it.
1558 (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
1559 relocations against local symbols.
1560
a5840dce
AM
15612013-01-16 Alan Modra <amodra@gmail.com>
1562
1563 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
1564 finding some sort of toc syntax error, and break to avoid
1565 compiler uninit warning.
1566
af89796a
L
15672013-01-15 H.J. Lu <hongjiu.lu@intel.com>
1568
1569 PR gas/15019
1570 * config/tc-i386.c (lex_got): Increment length by 1 if the
1571 relocation token is removed.
1572
dd42f060
NC
15732013-01-15 Nick Clifton <nickc@redhat.com>
1574
1575 * config/tc-v850.c (md_assemble): Allow signed values for
1576 V850E_IMMEDIATE.
1577
464e3686
SK
15782013-01-11 Sean Keys <skeys@ipdatasys.com>
1579
1580 * config/tc-xgate.c (md_begin): Fix mistake made when going from
af89796a 1581 git to cvs.
464e3686 1582
5817ffd1
PB
15832013-01-10 Peter Bergner <bergner@vnet.ibm.com>
1584
1585 * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
1586 * doc/c-ppc.texi (PowerPC-Opts): Likewise.
1587 * config/tc-ppc.c (md_show_usage): Likewise.
1588 (ppc_handle_align): Handle power8's group ending nop.
1589
f4b1f6a9
SK
15902013-01-10 Sean Keys <skeys@ipdatasys.com>
1591
1592 * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
af89796a 1593 that the assember exits after the opcodes have been printed.
f4b1f6a9 1594
34bca508
L
15952013-01-10 H.J. Lu <hongjiu.lu@intel.com>
1596
1597 * app.c: Remove trailing white spaces.
1598 * as.c: Likewise.
1599 * as.h: Likewise.
1600 * cond.c: Likewise.
1601 * dw2gencfi.c: Likewise.
1602 * dwarf2dbg.h: Likewise.
1603 * ecoff.c: Likewise.
1604 * input-file.c: Likewise.
1605 * itbl-lex.h: Likewise.
1606 * output-file.c: Likewise.
1607 * read.c: Likewise.
1608 * sb.c: Likewise.
1609 * subsegs.c: Likewise.
1610 * symbols.c: Likewise.
1611 * write.c: Likewise.
1612 * config/tc-i386.c: Likewise.
1613 * doc/Makefile.am: Likewise.
1614 * doc/Makefile.in: Likewise.
1615 * doc/c-aarch64.texi: Likewise.
1616 * doc/c-alpha.texi: Likewise.
1617 * doc/c-arc.texi: Likewise.
1618 * doc/c-arm.texi: Likewise.
1619 * doc/c-avr.texi: Likewise.
1620 * doc/c-bfin.texi: Likewise.
1621 * doc/c-cr16.texi: Likewise.
1622 * doc/c-d10v.texi: Likewise.
1623 * doc/c-d30v.texi: Likewise.
1624 * doc/c-h8300.texi: Likewise.
1625 * doc/c-hppa.texi: Likewise.
1626 * doc/c-i370.texi: Likewise.
1627 * doc/c-i386.texi: Likewise.
1628 * doc/c-i860.texi: Likewise.
1629 * doc/c-m32c.texi: Likewise.
1630 * doc/c-m32r.texi: Likewise.
1631 * doc/c-m68hc11.texi: Likewise.
1632 * doc/c-m68k.texi: Likewise.
1633 * doc/c-microblaze.texi: Likewise.
1634 * doc/c-mips.texi: Likewise.
1635 * doc/c-msp430.texi: Likewise.
1636 * doc/c-mt.texi: Likewise.
1637 * doc/c-s390.texi: Likewise.
1638 * doc/c-score.texi: Likewise.
1639 * doc/c-sh.texi: Likewise.
1640 * doc/c-sh64.texi: Likewise.
1641 * doc/c-tic54x.texi: Likewise.
1642 * doc/c-tic6x.texi: Likewise.
1643 * doc/c-v850.texi: Likewise.
1644 * doc/c-xc16x.texi: Likewise.
1645 * doc/c-xgate.texi: Likewise.
1646 * doc/c-xtensa.texi: Likewise.
1647 * doc/c-z80.texi: Likewise.
1648 * doc/internals.texi: Likewise.
1649
4c665b71
RM
16502013-01-10 Roland McGrath <mcgrathr@google.com>
1651
1652 * hash.c (hash_new_sized): Make it global.
1653 * hash.h: Declare it.
1654 * macro.c (define_macro): Use hash_new_sized instead of hash_new,
1655 pass a small size.
1656
a3c62988
NC
16572013-01-10 Will Newton <will.newton@imgtec.com>
1658
1659 * Makefile.am: Add Meta.
1660 * Makefile.in: Regenerate.
1661 * config/tc-metag.c: New file.
1662 * config/tc-metag.h: New file.
1663 * configure.tgt: Add Meta.
1664 * doc/Makefile.am: Add Meta.
1665 * doc/Makefile.in: Regenerate.
1666 * doc/all.texi: Add Meta.
1667 * doc/as.texiinfo: Document Meta options.
1668 * doc/c-metag.texi: New file.
1669
b37df7c4
SE
16702013-01-09 Steve Ellcey <sellcey@mips.com>
1671
1672 * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
1673 calls.
1674 * config/tc-mips.c (internalError): Remove, replace with abort.
1675
a3251895
YZ
16762013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
1677
1678 * config/tc-aarch64.c (parse_operands): Change to compare the result
1679 of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
1680
8ab8155f
NC
16812013-01-07 Nick Clifton <nickc@redhat.com>
1682
1683 PR gas/14887
1684 * config/tc-arm.c (skip_past_char): Skip whitespace before the
1685 anticipated character.
1686 * config/tc-arm.c (parse_address_main): Delete skip of whitespace
1687 here as it is no longer needed.
1688
a4ac1c42
AS
16892013-01-06 Andreas Schwab <schwab@linux-m68k.org>
1690
1691 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
1692 * doc/c-score.texi (SCORE-Opts): Likewise.
1693 * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
1694
e407c74b
NC
16952013-01-04 Juergen Urban <JuergenUrban@gmx.de>
1696
1697 * config/tc-mips.c: Add support for MIPS r5900.
1698 Add M_LQ_AB and M_SQ_AB to support large values for instructions
1699 lq and sq.
1700 (can_swap_branch_p, get_append_method): Detect some conditional
1701 short loops to fix a bug on the r5900 by NOP in the branch delay
1702 slot.
1703 (M_MUL): Support 3 operands in multu on r5900.
1704 (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
1705 (s_mipsset): Force 32 bit floating point on r5900.
1706 (mips_ip): Check parameter range of instructions mfps and mtps on
1707 r5900.
1708 * configure.in: Detect CPU type when target string contains r5900
1709 (e.g. mips64r5900el-linux-gnu).
1710
62658407
L
17112013-01-02 H.J. Lu <hongjiu.lu@intel.com>
1712
1713 * as.c (parse_args): Update copyright year to 2013.
1714
95830fd1
YZ
17152013-01-02 Yufeng Zhang <yufeng.zhang@arm.com>
1716
1717 * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
1718 and "cortex57".
1719
517bb291 17202013-01-02 Nick Clifton <nickc@redhat.com>
d709e4e6 1721
517bb291
NC
1722 PR gas/14987
1723 * config/tc-arm.c (parse_address_main): Skip whitespace before a
1724 closing bracket.
d709e4e6 1725
517bb291 1726For older changes see ChangeLog-2012
08d56133 1727\f
517bb291 1728Copyright (C) 2013 Free Software Foundation, Inc.
752937aa
NC
1729
1730Copying and distribution of this file, with or without modification,
1731are permitted in any medium without royalty provided the copyright
1732notice and this notice are preserved.
1733
08d56133
NC
1734Local Variables:
1735mode: change-log
1736left-margin: 8
1737fill-column: 74
1738version-control: never
1739End: