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2c0a3565
MS		 12013-07-03 Marcus Shawcroft <marcus.shawcroft@arm.com>
2
4aa2c5e2
MS		 3 * config/tc-aarch64.c (reloc_table): Merge got_prel19 into got.
4
52013-07-02 Marcus Shawcroft <marcus.shawcroft@arm.com>
6
2c0a3565
MS		 7 * config/tc-aarch64.c (md_apply_fix): Reorder case values.
8 (aarch64_force_relocation): Likewise.
9
f40da81b
AM		 102013-07-02 Alan Modra <amodra@gmail.com>
11
12 * config/tc-ppc.c (ppc_elf_adjust_symtab): Don't make .TOC. weak.
13
81566a9b
MR		 142013-06-26 Maciej W. Rozycki <macro@codesourcery.com>
15
16 * doc/as.texinfo (Overview): Remove @samp from MIPS ISA names.
17 * doc/c-mips.texi (MIPS Options): Remove @sc from MIPS ISA names.
18 Replace @sc{mips16} with literal `MIPS16'.
19 (MIPS ISA): Replace @sc{mips3} with literal `MIPS III'.
20
a6bb11b2
YZ		 212013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
22
23 * config/tc-aarch64.c (reloc_table): Replace
24 BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with
25 BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to
26 BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and
27 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC.
28 (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC,
29 BFD_RELOC_AARCH64_LD32_GOT_LO12_NC,
30 BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC,
31 BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC,
32 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and
33 BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC.
34 (aarch64_force_relocation): Likewise.
35
cec5225b
YZ		 362013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
37
38 * config/tc-aarch64.c (ilp32_p): New static variable.
39 (elf64_aarch64_target_format): Return the target according to the
40 value of 'ilp32_p'.
41 (md_begin): Determine 'mach' according to the value of 'ilp32_p'.
42 (aarch64_opts): Add support for options '-milp32' and '-mlp64'.
43 (aarch64_dwarf2_addr_size): New function.
44 * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration.
45 (DWARF2_ADDR_SIZE): New define.
46
e335d9cb
RS		 472013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
48
49 * doc/c-mips.texi: Use ISA instead of @sc{isa}.
50
18870af7
RS		 512013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
52
53 * config/tc-mips.c (validate_mips_insn): Use STYPE rather than SHAMT.
54
833794fc
MR		 552013-06-25 Maciej W. Rozycki <macro@codesourcery.com>
56
57 * config/tc-mips.c (mips_set_options): Add insn32 member.
58 (mips_opts): Initialize it.
59 (NOP_INSN, NOP_INSN_SIZE): Handle insn32 mode.
60 (options): Add OPTION_INSN32 and OPTION_NO_INSN32 enum values.
61 (md_longopts): Add "minsn32" and "mno-insn32" options.
62 (is_size_valid): Handle insn32 mode.
63 (md_assemble): Pass instruction string down to macro.
64 (brk_fmt): Add second dimension and insn32 mode initializers.
65 (mfhl_fmt): Likewise.
66 (BRK_FMT, MFHL_FMT): Handle insn32 mode.
67 (macro_build) <'c'>: Handle microMIPS 32-bit BREAK encoding.
68 (macro_build_jalr, move_register): Handle insn32 mode.
69 (macro_build_branch_rs): Likewise.
70 (macro): Handle insn32 mode.
71 <M_JRADDIUSP>, <M_JRC>, <M_MOVEP>: New cases.
72 (mips_ip): Handle insn32 mode.
73 (md_parse_option): Handle OPTION_INSN32 and OPTION_NO_INSN32.
74 (s_mipsset): Handle "insn32" and "noinsn32" pseudo-ops.
75 (mips_handle_align): Handle insn32 mode.
76 (md_show_usage): Add -minsn32 and -mno-insn32.
77
78 * doc/as.texinfo (Target MIPS options): Add -minsn32 and
79 -mno-insn32 options.
80 (-minsn32, -mno-insn32): New options.
81 * doc/c-mips.texi (MIPS Opts): Add -minsn32 and -mno-insn32
82 options.
83 (MIPS assembly options): New node. Document .set insn32 and
84 .set noinsn32.
85 (MIPS-Dependent): List the new node.
86
d1706f38
NC		 872013-06-25 Nick Clifton <nickc@redhat.com>
88
89 * config/tc-msp430.c (msp430_srcoperand): Do not allow the use of
90 the PC in indirect addressing on 430xv2 parts.
91 (msp430_operands): Add version test to hardware bug encoding
92 restrictions.
93
477330fc
RM		 942013-06-24 Roland McGrath <mcgrathr@google.com>
95
d996d970
RM		 96 * config/tc-arm.c (parse_reg_list): Use skip_past_char for '}',
97 so it skips whitespace before it.
98 (s_arm_unwind_save_mmxwr, s_arm_unwind_save_mmxwcg): Likewise.
99
477330fc
RM		 100 * config/tc-arm.c (arm_symbol_chars): Include '{' and '}'.
101 (arm_reg_parse_multi): Skip whitespace first.
102 (parse_reg_list): Likewise.
103 (parse_vfp_reg_list): Likewise.
104 (s_arm_unwind_save_mmxwcg): Likewise.
105
24382199
NC		 1062013-06-24 Nick Clifton <nickc@redhat.com>
107
108 PR gas/15623
109 * config/tc-arm.c (do_t_smc): Mark as ending an IT block.
110
c3678916
RS		 1112013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
112
113 * config/tc-mips.c (mips_ip): Fix swapped bit numbers in comments.
114
42429eac
RS		 1152013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
116
117 * config/tc-mips.c: Assert that offsetT and valueT are at least
118 8 bytes in size.
119 (GPR_SMIN, GPR_SMAX): New macros.
120 (macro, mips_ip): Remove code for 4-byte valueT and offsetT.
121
f3ded42a
RS		 1222013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
123
124 * config/tc-mips.c: Remove OBJ_ELF, OBJ_MAYBE_ELF and IS_ELF
125 conditions. Remove any code deselected by them.
126 (s_mips_frame, s_mips_mask): Handle ECOFF_DEBUGGING case first.
127
e8044f35
RS		 1282013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
129
130 * NEWS: Note removal of ECOFF support.
131 * doc/as.texinfo (--emulation): Update for the removal of MIPS ECOFF.
132 * Makefile.am (TARG_ENV_HFILES): Remove config/te-lnews.h.
133 (MULTI_CFILES): Remove config/e-mipsecoff.c.
134 * Makefile.in: Regenerate.
135 * configure.in: Remove MIPS ECOFF references.
136 (mips-sony-bsd*, mips-*-bsd*, mips-*-lnews*-ecoff, mips-*-*-ecoff):
137 Delete cases.
138 (mips-*-irix5*-*, mips*-*-linux*-*, mips*-*-freebsd*)
139 (mips*-*-kfreebsd*-gnu, mips-*-*-elf): Fold into...
140 (mips-*-*): ...this single case.
141 (mipsbecoff, mipslecoff, mipsecoff): Remove emulations. Expect
142 MIPS emulations to be e-mipself*.
143 * configure: Regenerate.
144 * configure.tgt (mips-sony-bsd*, mips-*-ultrix*, mips-*-osf*)
145 (mips-*-ecoff*, mips-*-pe*, mips-*-irix*, ips-*-lnews*, mips-*-riscos*)
146 (mips-*-sysv*): Remove coff and ecoff cases.
147 * as.c (mipsbecoff, mipslecoff, mipsecoff): Remove.
148 * ecoff.c: Remove reference to MIPS ECOFF.
149 * config/e-mipsecoff.c, config/te-lnews.h: Delete files.
150 * config/tc-mips.c (ECOFF_LITTLE_FORMAT): Delete.
151 (RDATA_SECTION_NAME, mips_target_form): Remove COFF and ECOFF cases.
152 (mips_hi_fixup): Tweak comment.
153 (append_insn): Require a howto.
154 (mips_after_parse_args): Remove OBJ_MAYBE_ECOFF code.
155
98508b2a
RS		 1562013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
157
158 * doc/as.texinfo: Use MIPS rather than @sc{mips} throughout.
159 Use "CPU" instead of "cpu".
160 * doc/c-mips.texi: Likewise.
161 (MIPS Opts): Rename to MIPS Options.
162 (MIPS option stack): Rename to MIPS Option Stack.
163 (MIPS ASE instruction generation overrides): Rename to
164 MIPS ASE Instruction Generation Overrides (for now).
165 (MIPS floating-point): Rename to MIPS Floating-Point.
166
fc16f8cc
RS		 1672013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
168
169 * doc/c-mips.texi (MIPS Macros): New section.
170 (MIPS Object): Replace with...
171 (MIPS Small Data): ...this new section.
172
5a7560b5
RS		 1732013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
174
175 * doc/c-mips.texi (MIPS symbol sizes): Move section further up file.
176 Capitalize name. Use @kindex instead of @cindex for .set entries.
177
a1b86ab7
RS		 1782013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
179
180 * doc/c-mips.texi (MIPS Stabs): Remove section.
181
c6278170
RS		 1822013-06-20 Richard Sandiford <rdsandiford@googlemail.com>
183
184 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS, ISA_SUPPORTS_DSP_ASE)
185 (ISA_SUPPORTS_DSP64_ASE, ISA_SUPPORTS_DSPR2_ASE, ISA_SUPPORTS_EVA_ASE)
186 (ISA_SUPPORTS_MT_ASE, ISA_SUPPORTS_MCU_ASE, ISA_SUPPORTS_VIRT_ASE)
187 (ISA_SUPPORTS_VIRT64_ASE): Delete.
188 (mips_ase): New structure.
189 (mips_ases): New table.
190 (FP64_ASES): New macro.
191 (mips_ase_groups): New array.
192 (mips_isa_rev, mips_ase_mask, mips_check_isa_supports_ase)
193 (mips_check_isa_supports_ases, mips_set_ase, mips_lookup_ase): New
194 functions.
195 (is_opcode_valid): Use mips_ases to get the 64-bit ASE flags.
196 (md_parse_option): Use mips_ases and mips_set_ase instead of
197 separate case statements for each ASE option.
198 (mips_after_parse_args): Use FP64_ASES. Use
199 mips_check_isa_supports_ases to check the ASEs against
200 other options.
201 (s_mipsset): Use mips_ases and mips_set_ase instead of
202 separate if statements for each ASE option. Use
203 mips_check_isa_supports_ases, even when a non-ASE option
204 is specified.
205
63a4bc21
KT		 2062013-06-19 Greta Yorsh <Greta.Yorsh@arm.com>
207
208 * config/tc-arm.c (arm_cpus): Add support for Cortex-A12.
209
c31f3936
RS		 2102013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
211
212 * config/tc-mips.c (md_shortopts, options, md_longopts)
213 (md_longopts_size): Move earlier in file.
214
846ef2d0
RS		 2152013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
216
217 * config/tc-mips.c (mips_set_options): Replace separate "ase_*" fields
218 with a single "ase" bitmask.
219 (mips_opts): Update accordingly.
220 (file_ase, file_ase_explicit): New variables.
221 (file_ase_mips3d, file_ase_mdmx, file_ase_smartmips, file_ase_dsp)
222 (file_ase_dspr2, file_ase_eva, file_ase_mt, file_ase_virt): Delete.
223 (ISA_HAS_ROR): Adjust for mips_set_options change.
224 (is_opcode_valid): Take the base ase mask directly from mips_opts.
225 (mips_ip): Adjust for mips_set_options change.
226 (md_parse_option): Likewise. Update file_ase_explicit.
227 (mips_after_parse_args): Adjust for mips_set_options change.
228 Use bitmask operations to select the default ASEs. Set file_ase
229 rather than individual per-ASE variables.
230 (s_mipsset): Adjust for mips_set_options change.
231 (mips_elf_final_processing): Test file_ase rather than
232 file_ase_mdmx. Remove commented-out code.
233
d16afab6
RS		 2342013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
235
236 * config/tc-mips.c (mips_cpu_info): Add an "ase" field.
237 (MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, MIPS_CPU_ASE_MT)
238 (MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX, MIPS_CPU_ASE_DSPR2)
239 (MIPS_CPU_ASE_MCU, MIPS_CPU_ASE_VIRT, MIPS_CPU_ASE_EVA): Delete.
240 (mips_after_parse_args): Use the new "ase" field to choose
241 the default ASEs.
242 (mips_cpu_info_table): Move ASEs from the "flags" field to the
243 "ase" field.
244
e83a675f
RE		 2452013-06-18 Richard Earnshaw <rearnsha@arm.com>
246
247 * config/tc-arm.c (symbol_preemptible): New function.
248 (relax_branch): Use it.
249
7f3c4072
CM		 2502013-06-17 Catherine Moore <clm@codesourcery.com>
251 Maciej W. Rozycki <macro@codesourcery.com>
252 Chao-Ying Fu <fu@mips.com>
253
254 * config/tc-mips.c (mips_set_options): Add ase_eva.
255 (mips_set_options mips_opts): Add ase_eva.
256 (file_ase_eva): Declare.
257 (ISA_SUPPORTS_EVA_ASE): Define.
258 (IS_SEXT_9BIT_NUM): Define.
259 (MIPS_CPU_ASE_EVA): Define.
260 (is_opcode_valid): Add support for ase_eva.
261 (macro_build): Likewise.
262 (macro): Likewise.
263 (validate_mips_insn): Likewise.
264 (validate_micromips_insn): Likewise.
265 (mips_ip): Likewise.
266 (options): Add OPTION_EVA and OPTION_NO_EVA.
267 (md_longopts): Add -meva and -mno-eva.
268 (md_parse_option): Process new options.
269 (mips_after_parse_args): Check for valid EVA combinations.
270 (s_mipsset): Likewise.
271
e410add4
RS		 2722013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
273
274 * dwarf2dbg.h (dwarf2_move_insn): Declare.
275 * dwarf2dbg.c (line_subseg): Add pmove_tail.
276 (get_line_subseg): Add create_p argument. Initialize pmove_tail.
277 (dwarf2_gen_line_info_1): Update call accordingly.
278 (dwarf2_move_insn): New function.
279 * config/tc-mips.c (append_insn): Use dwarf2_move_insn.
280
6a50d470
RS		 2812013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
282
283 Revert:
284
285 2011-09-05 Richard Sandiford <rdsandiford@googlemail.com>
286
287 PR gas/13024
288 * dwarf2dbg.c (pending_lines, pending_lines_tail): New variables.
289 (dwarf2_gen_line_info_1): Delete.
290 (dwarf2_push_line, dwarf2_flush_pending_lines): New functions.
291 (dwarf2_gen_line_info, dwarf2_emit_label): Use them.
292 (dwarf2_consume_line_info): Call dwarf2_flush_pending_lines.
293 (dwarf2_directive_loc): Push previous .locs instead of generating
294 them immediately.
295
f122319e
CF		 2962013-06-13 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
297
298 * config/tc-mips.c (ISA_SUPPORTS_VIRT_ASE): Support micromips.
299 (ISA_SUPPORTS_VIRT64_ASE): Support 64-bit micromips.
300
909c7f9c
NC		 3012013-06-13 Nick Clifton <nickc@redhat.com>
302
303 PR gas/15602
304 * config/tc-m68k.h (TC_CHECK_ADJUSTED_BROKEN_DOT_WORD): Define.
305 * config/tc-m68k.c (tc_m68k_check_adjusted_broken_word): New
306 function. Generates an error if the adjusted offset is out of a
307 16-bit range.
308
5d5755a7
SL		 3092013-06-12 Sandra Loosemore <sandra@codesourcery.com>
310
311 * config/tc-nios2.c (md_apply_fix): Mask constant
312 BFD_RELOC_NIOS2_HIADJ16 value to 16 bits.
313
3bf0dbfb
MR		 3142013-06-10 Maciej W. Rozycki <macro@codesourcery.com>
315
316 * config/tc-mips.c (append_insn): Don't do branch relaxation for
317 MIPS-3D instructions either.
318 (md_convert_frag): Update the COPx branch mask accordingly.
319
320 * config/tc-mips.c (md_show_usage): Document --[no-]relax-branch
321 option.
322 * doc/as.texinfo (Overview): Add --relax-branch and
323 --no-relax-branch.
324 * doc/c-mips.texi (MIPS Opts): Document --relax-branch and
325 --no-relax-branch.
326
9daf7bab
SL		 3272013-06-09 Sandra Loosemore <sandra@codesourcery.com>
328
329 * config/tc-nios2.c (nios2_parse_args): Allow trap argument to
330 omitted.
331
d301a56b
RS		 3322013-06-08 Catherine Moore <clm@codesourcery.com>
333
334 * config/tc-mips.c (is_opcode_valid): Build ASE mask.
335 (is_opcode_valid_16): Pass ase value to opcode_is_member.
336 (append_insn): Change INSN_xxxx to ASE_xxxx.
337
7bab7634
DC		 3382013-06-01 George Thomas <george.thomas@atmel.com>
339
340 * gas/config/tc-avr.c: Change ISA for devices with USB support to
341 AVR_ISA_XMEGAU
342
f60cf82f
L		 3432013-05-31 H.J. Lu <hongjiu.lu@intel.com>
344
345 * config/tc-i386.c (md_begin): Don't align text/data/bss sections
346 for ELF.
347
a3f278e2
CM		 3482013-05-31 Paul Brook <paul@codesourcery.com>
349
350 gas/
351 * config/tc-mips.c (s_ehword): New.
352
067ec077
CM		 3532013-05-30 Paul Brook <paul@codesourcery.com>
354
355 * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH.
356
d6101ac2
MR		 3572013-05-29 Maciej W. Rozycki <macro@codesourcery.com>
358
359 * write.c (resolve_reloc_expr_symbols): On REL targets don't
360 convert relocs who have no relocatable field either. Rephrase
361 the conditional so that the PC-relative check is only applied
362 for REL targets.
363
f19ccbda
MR		 3642013-05-28 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
365
366 * config/tc-mips.c (macro) <ld>: Don't use $zero for address
367 calculation.
368
418009c2
YZ		 3692013-05-28 Yufeng Zhang <yufeng.zhang@arm.com>
370
371 * config/tc-aarch64.c (reloc_table): Update to use
477330fc 372 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of
418009c2
YZ		 373 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE.
374 (md_apply_fix): Likewise.
375 (aarch64_force_relocation): Likewise.
376
0a8897c7
KT		 3772013-05-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
378
379 * config/tc-arm.c (it_fsm_post_encode): Improve
380 warning messages about deprecated IT block formats.
381
89d2a2a3
MS		 3822013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com>
383
384 * config/tc-aarch64.c (md_apply_fix): Move value range checking
385 inside fx_done condition.
386
c77c0862
RS		 3872013-05-22 Jürgen Urban <JuergenUrban@gmx.de>
388
389 * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB.
390
c0637f3a
PB		 3912013-05-20 Peter Bergner <bergner@vnet.ibm.com>
392
393 * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error
394 and clean up warning when using PRINT_OPCODE_TABLE.
395
5656a981
AM		 3962013-05-20 Alan Modra <amodra@gmail.com>
397
398 * config/tc-ppc.c (md_apply_fix): Hoist code common to insn
399 and data fixups performing shift/high adjust/sign extension on
400 fieldval. Sink fx_pcrel handling and checks. Use fixP->fx_size
401 when writing data fixups rather than recalculating size.
402
997b26e8
JBG		 4032013-05-16 Jan-Benedict Glaw <jbglaw@lug-owl.de>
404
405 * doc/c-msp430.texi: Fix typo.
406
9f6e76f4
TG		 4072013-05-16 Tristan Gingold <gingold@adacore.com>
408
409 * config/tc-ppc.c (ppc_is_toc_sym): Symbols of class XMC_TC
410 are also TOC symbols.
411
638d3803
NC		 4122013-05-16 Nick Clifton <nickc@redhat.com>
413
414 * config/tc-msp430.c: Make -mmcu recognise more part numbers.
415 Add -mcpu command to specify core type.
997b26e8 416 * doc/c-msp430.texi: Update documentation.
638d3803 417
b015e599
AP		 4182013-05-09 Andrew Pinski <apinski@cavium.com>
419
420 * config/tc-mips.c (struct mips_set_options): New ase_virt field.
421 (mips_opts): Update for the new field.
422 (file_ase_virt): New variable.
423 (ISA_SUPPORTS_VIRT_ASE): New macro.
424 (ISA_SUPPORTS_VIRT64_ASE): New macro.
425 (MIPS_CPU_ASE_VIRT): New define.
426 (is_opcode_valid): Handle ase_virt.
427 (macro_build): Handle "+J".
428 (validate_mips_insn): Likewise.
429 (mips_ip): Likewise.
430 (enum options): Add OPTION_VIRT and OPTION_NO_VIRT.
431 (md_longopts): Add mvirt and mnovirt
432 (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT.
433 (mips_after_parse_args): Handle ase_virt field.
434 (s_mipsset): Handle "virt" and "novirt".
435 (mips_elf_final_processing): Add a comment about virt ASE might need
436 a new flag.
437 (md_show_usage): Print out the usage of -mvirt and mno-virt options.
438 * doc/c-mips.texi: Document -mvirt and -mno-virt.
439 Document ".set virt" and ".set novirt".
440
da8094d7
AM		 4412013-05-09 Alan Modra <amodra@gmail.com>
442
443 * config/tc-ppc.c (md_apply_fix): Sign extend fieldval under
444 control of operand flag bits.
445
c5f8c205
AM		 4462013-05-07 Alan Modra <amodra@gmail.com>
447
448 * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro.
449 (PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise.
450 (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise.
451 (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise.
452 (md_apply_fix): Set fx_no_overflow for assorted relocations.
453 Shift and sign-extend fieldval for use by some VLE reloc
454 operand->insert functions.
455
b47468a6
CM		 4562013-05-06 Paul Brook <paul@codesourcery.com>
457 Catherine Moore <clm@codesourcery.com>
458
c5f8c205
AM		 459 * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL.
460 (limited_pcrel_reloc_p): Likewise.
b47468a6
CM		 461 (md_apply_fix): Likewise.
462 (tc_gen_reloc): Likewise.
463
2de39019
CM		 4642013-05-06 Richard Sandiford <rdsandiford@googlemail.com>
465
466 * config/tc-mips.c (limited_pcrel_reloc_p): New function.
467 (mips_fix_adjustable): Adjust pc-relative check to use
468 limited_pc_reloc_p.
469
754e2bb9
RS		 4702013-05-02 Richard Sandiford <rdsandiford@googlemail.com>
471
472 * config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries.
473 (s_mips_stab): Do not restrict to stabn only.
474
13761a11
NC		 4752013-05-02 Nick Clifton <nickc@redhat.com>
476
477 * config/tc-msp430.c: Add support for the MSP430X architecture.
478 Add code to insert a NOP instruction after any instruction that
479 might change the interrupt state.
480 Add support for the LARGE memory model.
481 Add code to initialise the .MSP430.attributes section.
482 * config/tc-msp430.h: Add support for the MSP430X architecture.
483 * doc/c-msp430.texi: Document the new -mL and -mN command line
484 options.
485 * NEWS: Mention support for the MSP430X architecture.
486
df26367c
MR		 4872013-05-01 Maciej W. Rozycki <macro@codesourcery.com>
488
489 * configure.tgt: Replace alpha*-*-linuxecoff* pattern with
490 alpha*-*-linux*ecoff*.
491
f02d8318
CF		 4922013-04-30 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
493
494 * config/tc-mips.c (mips_ip): Add sizelo.
495 For "+C", "+G", and "+H", set sizelo and compare against it.
496
b40bf0a2
NC		 4972013-04-29 Nick Clifton <nickc@redhat.com>
498
499 * as.c (Options): Add -gdwarf-sections.
500 (parse_args): Likewise.
501 * as.h (flag_dwarf_sections): Declare.
502 * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes.
503 (process_entries): When -gdwarf-sections is enabled generate
504 fragmentary .debug_line sections.
505 (out_debug_line): Set the section for the .debug_line section end
506 symbol.
507 * doc/as.texinfo: Document -gdwarf-sections.
508 * NEWS: Mention -gdwarf-sections.
509
8eeccb77 5102013-04-26 Christian Groessler <chris@groessler.org>
00a3147e
CG		 511
512 * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdline
513 according to the target parameter. Don't call s_segm since s_segm
514 calls bfd_set_arch_mach using stdoutput, but stdoutput isn't
515 initialized yet.
516 (md_begin): Call s_segm according to target parameter from command
517 line.
518
49926cd0
AM		 5192013-04-25 Alan Modra <amodra@gmail.com>
520
521 * configure.in: Allow little-endian linux.
522 * configure: Regenerate.
523
e3031850
SL		 5242013-04-24 Sandra Loosemore <sandra@codesourcery.com>
525
526 * config/tc-nios2.c (nios2_control_register_arg_p): Rename
527 "fstatus" control register to "eccinj".
528
cb948fc0
KT		 5292013-04-19 Kai Tietz <ktietz@redhat.com>
530
531 * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin.
532
4455e9ad
JB		 5332013-04-15 Julian Brown <julian@codesourcery.com>
534
535 * expr.c (add_to_result, subtract_from_result): Make global.
536 * expr.h (add_to_result, subtract_from_result): Add prototypes.
537 * config/tc-sh.c (sh_optimize_expr): Use add_to_result,
538 subtract_from_result to handle extra bit of precision for .sleb128
539 directive operands.
540
956a6ba3
JB		 5412013-04-10 Julian Brown <julian@codesourcery.com>
542
543 * read.c (convert_to_bignum): Add sign parameter. Use it
544 instead of X_unsigned to determine sign of resulting bignum.
545 (emit_expr): Pass extra argument to convert_to_bignum.
546 (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass
547 X_extrabit to convert_to_bignum.
548 (parse_bitfield_cons): Set X_extrabit.
549 * expr.c (make_expr_symbol, expr_build_uconstant, operand):
550 Initialise X_extrabit field as appropriate.
551 (add_to_result): New.
552 (subtract_from_result): New.
553 (expr): Use above.
554 * expr.h (expressionS): Add X_extrabit field.
555
eb9f3f00
JB		 5562013-04-10 Jan Beulich <jbeulich@suse.com>
557
558 * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base
559 register being PC when is_t or writeback, and use distinct
560 diagnostic for the latter case.
561
ccb84d65
JB		 5622013-04-10 Jan Beulich <jbeulich@suse.com>
563
564 * gas/config/tc-arm.c (parse_operands): Re-write
565 po_barrier_or_imm().
566 (do_barrier): Remove bogus constraint().
567 (do_t_barrier): Remove.
568
4d13caa0
NC		 5692013-04-09 Joerg Wunsch <joerg.wunsch@atmel.com>
570
571 * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2,
572 ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2,
573 ATmega2564RFR2
574 * gas/doc/c-avr.texi (-mmcu documentation): Likewise.
575
16d02dc9
JB		 5762013-04-09 Jan Beulich <jbeulich@suse.com>
577
578 * gas/config/tc-arm.c (do_vmrs): Accept all control registers.
579 Use local variable Rt in more places.
580 (do_vmsr): Accept all control registers.
581
05ac0ffb
JB		 5822013-04-09 Jan Beulich <jbeulich@suse.com>
583
584 * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
585 if there was none specified for moves between scalar and core
586 register.
587
2d51fb74
JB		 5882013-04-09 Jan Beulich <jbeulich@suse.com>
589
590 * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the
591 NEON_ALL_LANES case.
592
94dcf8bf
JB		 5932013-04-08 Jan Beulich <jbeulich@suse.com>
594
595 * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for
596 PC-relative VSTR.
597
1472d06f
JB		 5982013-04-08 Jan Beulich <jbeulich@suse.com>
599
600 * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq
601 entry to sp_fiq.
602
0c76cae8
AM		 6032013-04-03 Alan Modra <amodra@gmail.com>
604
605 * doc/as.texinfo: Add support to generate man options for h8300.
606 * doc/c-h8300.texi: Likewise.
607
92eb40d9
RR		 6082013-03-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
609
610 * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and
611 Cortex-A57.
612
51dcdd4d
NC		 6132013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com>
614
615 PR binutils/15068
616 * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array.
617
c5d685bf
NC		 6182013-03-26 Nick Clifton <nickc@redhat.com>
619
9b978282
NC		 620 PR gas/15295
621 * listing.c (rebuffer_line): Rewrite to avoid seeking back to the
622 start of the file each time.
623
c5d685bf
NC		 624 PR gas/15178
625 * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for
626 FreeBSD targets.
627
9699c833
TG		 6282013-03-26 Douglas B Rupp <rupp@gnat.com>
629
630 * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment
631 after fixup.
632
4755303e
WN		 6332013-03-21 Will Newton <will.newton@linaro.org>
634
635 * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all
636 pc-relative str instructions in Thumb mode.
637
81f5558e
NC		 6382013-03-21 Michael Schewe <michael.schewe@gmx.net>
639
640 * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
641 @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
642 R_H8_DISP32A16.
643 * config/tc-h8300.h: Remove duplicated defines.
644
71863e73
NC		 6452013-03-21 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
646
647 PR gas/15282
648 * tc-avr.c (mcu_has_3_byte_pc): New function.
649 (tc_cfi_frame_initial_instructions): Call it to find return
650 address size.
651
795b8e6b
NC		 6522013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com>
653
654 PR gas/15095
655 * config/tc-tic6x.c (tic6x_try_encode): Handle
656 tic6x_coding_dreg_(msb|lsb) field coding types and use it to
657 encode register pair numbers when required.
658
ba86b375
WN		 6592013-03-15 Will Newton <will.newton@linaro.org>
660
661 * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register
662 in vstr in Thumb mode for pre-ARMv7 cores.
663
9e6f3811
AS		 6642013-03-14 Andreas Schwab <schwab@suse.de>
665
666 * doc/c-arc.texi (ARC Directives): Revert last change and use
667 @itemize instead of @table.
668 * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
669
b10bf8c5
NC		 6702013-03-14 Nick Clifton <nickc@redhat.com>
671
672 PR gas/15273
673 * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a
674 NULL message, instead just check ARM_CPU_IS_ANY directly.
675
ba724cfc
NC		 6762013-03-14 Nick Clifton <nickc@redhat.com>
677
678 PR gas/15212
9e6f3811 679 * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet
ba724cfc
NC		 680 for table format.
681 * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
682 to the @item directives.
683 (ARM-Neon-Alignment): Move to correct place in the document.
684 * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
685 formatting.
686 * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
687 @smallexample.
688
531a94fd
SL		 6892013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
690
691 * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'
692 case. Add default BAD_CASE to switch.
693
dad60f8e
SL		 6942013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
695
696 * config/tc-nios2.c (nios2_assemble_args_ds): New function.
697 (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
698
dd5181d5
KT		 6992013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
700
701 * config/tc-arm.c (crc_ext_armv8): New feature set.
702 (UNPRED_REG): New macro.
703 (do_crc32_1): New function.
704 (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
705 do_crc32ch, do_crc32cw): Likewise.
706 (TUEc): New macro.
707 (insns): Add entries for crc32 mnemonics.
708 (arm_extensions): Add entry for crc.
709
8e723a10
CLT		 7102013-03-08 Chung-Lin Tang <cltang@codesourcery.com>
711
712 * write.h (struct fix): Add fx_dot_frag field.
713 (dot_frag): Declare.
714 * write.c (dot_frag): New variable.
715 (fix_new_internal): Set fx_dot_frag field with dot_frag.
716 (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
717 * expr.c (expr): Save value of frag_now in dot_frag when setting
718 dot_value.
719 * read.c (emit_expr): Likewise. Delete comments.
720
be05d201
L		 7212013-03-07 H.J. Lu <hongjiu.lu@intel.com>
722
723 * config/tc-i386.c (flag_code_names): Removed.
724 (i386_index_check): Rewrote.
725
62b0d0d5
YZ		 7262013-03-05 Yufeng Zhang <yufeng.zhang@arm.com>
727
728 * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
729 add comment.
730 (aarch64_double_precision_fmovable): New function.
731 (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
732 function; handle hexadecimal representation of IEEE754 encoding.
733 (parse_operands): Update the call to parse_aarch64_imm_float.
734
165de32a
L		 7352013-02-28 H.J. Lu <hongjiu.lu@intel.com>
736
737 * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
738 (check_hle): Updated.
739 (md_assemble): Likewise.
740 (parse_insn): Likewise.
741
d5de92cf
L		 7422013-02-28 H.J. Lu <hongjiu.lu@intel.com>
743
744 * config/tc-i386.c (_i386_insn): Add rep_prefix.
9e6f3811 745 (md_assemble): Check if REP prefix is OK.
d5de92cf
L		 746 (parse_insn): Remove expecting_string_instruction. Set
747 i.rep_prefix.
748
e60bb1dd
YZ		 7492013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
750
751 * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
752
aeebdd9b
YZ		 7532013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
754
755 * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
756 for system registers.
757
4107ae22
DD		 7582013-02-27 DJ Delorie <dj@redhat.com>
759
760 * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
761 (rl78_op): Handle %code().
762 (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
763 (tc_gen_reloc): Likwise; convert to a computed reloc.
764 (md_apply_fix): Likewise.
765
151fa98f
NC		 7662013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
767
768 * config/rl78-parse.y: Fix encoding of DIVWU insn.
769
70a8bc5b 7702013-02-25 Terry Guo <terry.guo@arm.com>
771
772 * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
773 * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
774 list of accepted CPUs.
775
5c111e37
L		 7762013-02-19 H.J. Lu <hongjiu.lu@intel.com>
777
778 PR gas/15159
779 * config/tc-i386.c (cpu_arch): Add ".smap".
780
781 * doc/c-i386.texi: Document smap.
782
8a75745d
MR		 7832013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
784
785 * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
786 mips_assembling_insn appropriately.
787 (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
788
79850f26
MR		 7892013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
790
cf29fc61 791 * config/tc-mips.c (append_insn): Correct indentation, remove
79850f26
MR		 792 extraneous braces.
793
4c261dff
NC		 7942013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
795
5c111e37 796 * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
4c261dff 797
ea33f281
NC		 7982013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
799
800 * configure.tgt: Add nios2-*-rtems*.
801
a1ccaec9
YZ		 8022013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
803
804 * config/tc-aarch64.c (md_begin): Change to check if 'name' is
805 NULL.
806
0aa27725
RS		 8072013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
808
809 * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
810 (macro): Use it. Assert that trunc.w.s is not used for r5900.
811
da4339ed
NC		 8122013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com>
813
814 * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
815 core.
816
36591ba1 8172013-02-06 Sandra Loosemore <sandra@codesourcery.com>
5c111e37 818 Andrew Jenner <andrew@codesourcery.com>
36591ba1
SL		 819
820 Based on patches from Altera Corporation.
821
822 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
823 (TARGET_CPU_HFILES): Add config/tc-nios2.h.
824 * Makefile.in: Regenerated.
825 * configure.tgt: Add case for nios2*-linux*.
826 * config/obj-elf.c: Conditionally include elf/nios2.h.
827 * config/tc-nios2.c: New file.
828 * config/tc-nios2.h: New file.
829 * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
830 * doc/Makefile.in: Regenerated.
831 * doc/all.texi: Set NIOSII.
832 * doc/as.texinfo (Overview): Add Nios II options.
833 (Machine Dependencies): Include c-nios2.texi.
834 * doc/c-nios2.texi: New file.
835 * NEWS: Note Altera Nios II support.
836
94d4433a
AM		 8372013-02-06 Alan Modra <amodra@gmail.com>
838
839 PR gas/14255
840 * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
841 Don't skip fixups with fx_subsy non-NULL.
842 * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
843 with fx_subsy non-NULL.
844
ace9af6f
L		 8452013-02-04 H.J. Lu <hongjiu.lu@intel.com>
846
847 * doc/c-metag.texi: Add "@c man" markers.
848
89d67ed9
AM		 8492013-02-04 Alan Modra <amodra@gmail.com>
850
851 * write.c (fixup_segment): Return void. Delete seg_reloc_count
852 related code.
853 (TC_ADJUST_RELOC_COUNT): Delete.
854 * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
855
89072bd6
AM		 8562013-02-04 Alan Modra <amodra@gmail.com>
857
858 * po/POTFILES.in: Regenerate.
859
f9b2d544
NC		 8602013-01-30 Markos Chandras <markos.chandras@imgtec.com>
861
862 * config/tc-metag.c: Make SWAP instruction less permissive with
863 its operands.
864
392ca752
DD		 8652013-01-29 DJ Delorie <dj@redhat.com>
866
867 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
868 relocs in .word/.etc statements.
869
427d0db6
RM		 8702013-01-29 Roland McGrath <mcgrathr@google.com>
871
872 * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
873 immediate value for 8-bit offset" error so it shows line info.
874
4faf939a
JM		 8752013-01-24 Joseph Myers <joseph@codesourcery.com>
876
877 * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
878 for 64-bit output.
879
78c8d46c
NC		 8802013-01-24 Nick Clifton <nickc@redhat.com>
881
882 * config/tc-v850.c: Add support for e3v5 architecture.
883 * doc/c-v850.texi: Mention new support.
884
fb5b7503
NC		 8852013-01-23 Nick Clifton <nickc@redhat.com>
886
887 PR gas/15039
888 * config/tc-avr.c: Include dwarf2dbg.h.
889
8ce3d284
L		 8902013-01-18 H.J. Lu <hongjiu.lu@intel.com>
891
892 * config/tc-i386.c (reloc): Support size relocation only for ELF.
893 (tc_i386_fix_adjustable): Likewise.
894 (lex_got): Likewise.
895 (tc_gen_reloc): Likewise.
896
f5555712
YZ		 8972013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
898
899 * config/tc-aarch64.c (output_operand_error_record): Change to output
900 the out-of-range error message as value-expected message if there is
901 only one single value in the expected range.
902 (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
903 LSL #0 as a programmer-friendly feature.
904
8fd4256d
L		 9052013-01-16 H.J. Lu <hongjiu.lu@intel.com>
906
907 * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
908 (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
909 BFD_RELOC_64_SIZE relocations.
910 (lex_got): Support "symbol@SIZE" and don't create GOT symbol
911 for it.
912 (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
913 relocations against local symbols.
914
a5840dce
AM		 9152013-01-16 Alan Modra <amodra@gmail.com>
916
917 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
918 finding some sort of toc syntax error, and break to avoid
919 compiler uninit warning.
920
af89796a
L		 9212013-01-15 H.J. Lu <hongjiu.lu@intel.com>
922
923 PR gas/15019
924 * config/tc-i386.c (lex_got): Increment length by 1 if the
925 relocation token is removed.
926
dd42f060
NC		 9272013-01-15 Nick Clifton <nickc@redhat.com>
928
929 * config/tc-v850.c (md_assemble): Allow signed values for
930 V850E_IMMEDIATE.
931
464e3686
SK		 9322013-01-11 Sean Keys <skeys@ipdatasys.com>
933
934 * config/tc-xgate.c (md_begin): Fix mistake made when going from
af89796a 935 git to cvs.
464e3686 936
5817ffd1
PB		 9372013-01-10 Peter Bergner <bergner@vnet.ibm.com>
938
939 * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
940 * doc/c-ppc.texi (PowerPC-Opts): Likewise.
941 * config/tc-ppc.c (md_show_usage): Likewise.
942 (ppc_handle_align): Handle power8's group ending nop.
943
f4b1f6a9
SK		 9442013-01-10 Sean Keys <skeys@ipdatasys.com>
945
946 * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
af89796a 947 that the assember exits after the opcodes have been printed.
f4b1f6a9 948
34bca508
L		 9492013-01-10 H.J. Lu <hongjiu.lu@intel.com>
950
951 * app.c: Remove trailing white spaces.
952 * as.c: Likewise.
953 * as.h: Likewise.
954 * cond.c: Likewise.
955 * dw2gencfi.c: Likewise.
956 * dwarf2dbg.h: Likewise.
957 * ecoff.c: Likewise.
958 * input-file.c: Likewise.
959 * itbl-lex.h: Likewise.
960 * output-file.c: Likewise.
961 * read.c: Likewise.
962 * sb.c: Likewise.
963 * subsegs.c: Likewise.
964 * symbols.c: Likewise.
965 * write.c: Likewise.
966 * config/tc-i386.c: Likewise.
967 * doc/Makefile.am: Likewise.
968 * doc/Makefile.in: Likewise.
969 * doc/c-aarch64.texi: Likewise.
970 * doc/c-alpha.texi: Likewise.
971 * doc/c-arc.texi: Likewise.
972 * doc/c-arm.texi: Likewise.
973 * doc/c-avr.texi: Likewise.
974 * doc/c-bfin.texi: Likewise.
975 * doc/c-cr16.texi: Likewise.
976 * doc/c-d10v.texi: Likewise.
977 * doc/c-d30v.texi: Likewise.
978 * doc/c-h8300.texi: Likewise.
979 * doc/c-hppa.texi: Likewise.
980 * doc/c-i370.texi: Likewise.
981 * doc/c-i386.texi: Likewise.
982 * doc/c-i860.texi: Likewise.
983 * doc/c-m32c.texi: Likewise.
984 * doc/c-m32r.texi: Likewise.
985 * doc/c-m68hc11.texi: Likewise.
986 * doc/c-m68k.texi: Likewise.
987 * doc/c-microblaze.texi: Likewise.
988 * doc/c-mips.texi: Likewise.
989 * doc/c-msp430.texi: Likewise.
990 * doc/c-mt.texi: Likewise.
991 * doc/c-s390.texi: Likewise.
992 * doc/c-score.texi: Likewise.
993 * doc/c-sh.texi: Likewise.
994 * doc/c-sh64.texi: Likewise.
995 * doc/c-tic54x.texi: Likewise.
996 * doc/c-tic6x.texi: Likewise.
997 * doc/c-v850.texi: Likewise.
998 * doc/c-xc16x.texi: Likewise.
999 * doc/c-xgate.texi: Likewise.
1000 * doc/c-xtensa.texi: Likewise.
1001 * doc/c-z80.texi: Likewise.
1002 * doc/internals.texi: Likewise.
1003
4c665b71
RM		 10042013-01-10 Roland McGrath <mcgrathr@google.com>
1005
1006 * hash.c (hash_new_sized): Make it global.
1007 * hash.h: Declare it.
1008 * macro.c (define_macro): Use hash_new_sized instead of hash_new,
1009 pass a small size.
1010
a3c62988
NC		 10112013-01-10 Will Newton <will.newton@imgtec.com>
1012
1013 * Makefile.am: Add Meta.
1014 * Makefile.in: Regenerate.
1015 * config/tc-metag.c: New file.
1016 * config/tc-metag.h: New file.
1017 * configure.tgt: Add Meta.
1018 * doc/Makefile.am: Add Meta.
1019 * doc/Makefile.in: Regenerate.
1020 * doc/all.texi: Add Meta.
1021 * doc/as.texiinfo: Document Meta options.
1022 * doc/c-metag.texi: New file.
1023
b37df7c4
SE		 10242013-01-09 Steve Ellcey <sellcey@mips.com>
1025
1026 * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
1027 calls.
1028 * config/tc-mips.c (internalError): Remove, replace with abort.
1029
a3251895
YZ		 10302013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
1031
1032 * config/tc-aarch64.c (parse_operands): Change to compare the result
1033 of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
1034
8ab8155f
NC		 10352013-01-07 Nick Clifton <nickc@redhat.com>
1036
1037 PR gas/14887
1038 * config/tc-arm.c (skip_past_char): Skip whitespace before the
1039 anticipated character.
1040 * config/tc-arm.c (parse_address_main): Delete skip of whitespace
1041 here as it is no longer needed.
1042
a4ac1c42
AS		 10432013-01-06 Andreas Schwab <schwab@linux-m68k.org>
1044
1045 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
1046 * doc/c-score.texi (SCORE-Opts): Likewise.
1047 * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
1048
e407c74b
NC		 10492013-01-04 Juergen Urban <JuergenUrban@gmx.de>
1050
1051 * config/tc-mips.c: Add support for MIPS r5900.
1052 Add M_LQ_AB and M_SQ_AB to support large values for instructions
1053 lq and sq.
1054 (can_swap_branch_p, get_append_method): Detect some conditional
1055 short loops to fix a bug on the r5900 by NOP in the branch delay
1056 slot.
1057 (M_MUL): Support 3 operands in multu on r5900.
1058 (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
1059 (s_mipsset): Force 32 bit floating point on r5900.
1060 (mips_ip): Check parameter range of instructions mfps and mtps on
1061 r5900.
1062 * configure.in: Detect CPU type when target string contains r5900
1063 (e.g. mips64r5900el-linux-gnu).
1064
62658407
L		 10652013-01-02 H.J. Lu <hongjiu.lu@intel.com>
1066
1067 * as.c (parse_args): Update copyright year to 2013.
1068
95830fd1
YZ		 10692013-01-02 Yufeng Zhang <yufeng.zhang@arm.com>
1070
1071 * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
1072 and "cortex57".
1073
517bb291 10742013-01-02 Nick Clifton <nickc@redhat.com>
d709e4e6 1075
517bb291
NC		 1076 PR gas/14987
1077 * config/tc-arm.c (parse_address_main): Skip whitespace before a
1078 closing bracket.
d709e4e6 1079
517bb291 1080For older changes see ChangeLog-2012
08d56133 1081\f
517bb291 1082Copyright (C) 2013 Free Software Foundation, Inc.
752937aa
NC		 1083
1084Copying and distribution of this file, with or without modification,
1085are permitted in any medium without royalty provided the copyright
1086notice and this notice are preserved.
1087
08d56133
NC		 1088Local Variables:
1089mode: change-log
1090left-margin: 8
1091fill-column: 74
1092version-control: never
1093End:
A mirror of the official binutils-gdb repository