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5d5755a7
SL
12013-06-12 Sandra Loosemore <sandra@codesourcery.com>
2
3 * config/tc-nios2.c (md_apply_fix): Mask constant
4 BFD_RELOC_NIOS2_HIADJ16 value to 16 bits.
5
3bf0dbfb
MR
62013-06-10 Maciej W. Rozycki <macro@codesourcery.com>
7
8 * config/tc-mips.c (append_insn): Don't do branch relaxation for
9 MIPS-3D instructions either.
10 (md_convert_frag): Update the COPx branch mask accordingly.
11
12 * config/tc-mips.c (md_show_usage): Document --[no-]relax-branch
13 option.
14 * doc/as.texinfo (Overview): Add --relax-branch and
15 --no-relax-branch.
16 * doc/c-mips.texi (MIPS Opts): Document --relax-branch and
17 --no-relax-branch.
18
9daf7bab
SL
192013-06-09 Sandra Loosemore <sandra@codesourcery.com>
20
21 * config/tc-nios2.c (nios2_parse_args): Allow trap argument to
22 omitted.
23
d301a56b
RS
242013-06-08 Catherine Moore <clm@codesourcery.com>
25
26 * config/tc-mips.c (is_opcode_valid): Build ASE mask.
27 (is_opcode_valid_16): Pass ase value to opcode_is_member.
28 (append_insn): Change INSN_xxxx to ASE_xxxx.
29
7bab7634
DC
302013-06-01 George Thomas <george.thomas@atmel.com>
31
32 * gas/config/tc-avr.c: Change ISA for devices with USB support to
33 AVR_ISA_XMEGAU
34
f60cf82f
L
352013-05-31 H.J. Lu <hongjiu.lu@intel.com>
36
37 * config/tc-i386.c (md_begin): Don't align text/data/bss sections
38 for ELF.
39
a3f278e2
CM
402013-05-31 Paul Brook <paul@codesourcery.com>
41
42 gas/
43 * config/tc-mips.c (s_ehword): New.
44
067ec077
CM
452013-05-30 Paul Brook <paul@codesourcery.com>
46
47 * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH.
48
d6101ac2
MR
492013-05-29 Maciej W. Rozycki <macro@codesourcery.com>
50
51 * write.c (resolve_reloc_expr_symbols): On REL targets don't
52 convert relocs who have no relocatable field either. Rephrase
53 the conditional so that the PC-relative check is only applied
54 for REL targets.
55
f19ccbda
MR
562013-05-28 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
57
58 * config/tc-mips.c (macro) <ld>: Don't use $zero for address
59 calculation.
60
418009c2
YZ
612013-05-28 Yufeng Zhang <yufeng.zhang@arm.com>
62
63 * config/tc-aarch64.c (reloc_table): Update to use
64 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of
65 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE.
66 (md_apply_fix): Likewise.
67 (aarch64_force_relocation): Likewise.
68
0a8897c7
KT
692013-05-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
70
71 * config/tc-arm.c (it_fsm_post_encode): Improve
72 warning messages about deprecated IT block formats.
73
89d2a2a3
MS
742013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com>
75
76 * config/tc-aarch64.c (md_apply_fix): Move value range checking
77 inside fx_done condition.
78
c77c0862
RS
792013-05-22 Jürgen Urban <JuergenUrban@gmx.de>
80
81 * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB.
82
c0637f3a
PB
832013-05-20 Peter Bergner <bergner@vnet.ibm.com>
84
85 * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error
86 and clean up warning when using PRINT_OPCODE_TABLE.
87
5656a981
AM
882013-05-20 Alan Modra <amodra@gmail.com>
89
90 * config/tc-ppc.c (md_apply_fix): Hoist code common to insn
91 and data fixups performing shift/high adjust/sign extension on
92 fieldval. Sink fx_pcrel handling and checks. Use fixP->fx_size
93 when writing data fixups rather than recalculating size.
94
997b26e8
JBG
952013-05-16 Jan-Benedict Glaw <jbglaw@lug-owl.de>
96
97 * doc/c-msp430.texi: Fix typo.
98
9f6e76f4
TG
992013-05-16 Tristan Gingold <gingold@adacore.com>
100
101 * config/tc-ppc.c (ppc_is_toc_sym): Symbols of class XMC_TC
102 are also TOC symbols.
103
638d3803
NC
1042013-05-16 Nick Clifton <nickc@redhat.com>
105
106 * config/tc-msp430.c: Make -mmcu recognise more part numbers.
107 Add -mcpu command to specify core type.
997b26e8 108 * doc/c-msp430.texi: Update documentation.
638d3803 109
b015e599
AP
1102013-05-09 Andrew Pinski <apinski@cavium.com>
111
112 * config/tc-mips.c (struct mips_set_options): New ase_virt field.
113 (mips_opts): Update for the new field.
114 (file_ase_virt): New variable.
115 (ISA_SUPPORTS_VIRT_ASE): New macro.
116 (ISA_SUPPORTS_VIRT64_ASE): New macro.
117 (MIPS_CPU_ASE_VIRT): New define.
118 (is_opcode_valid): Handle ase_virt.
119 (macro_build): Handle "+J".
120 (validate_mips_insn): Likewise.
121 (mips_ip): Likewise.
122 (enum options): Add OPTION_VIRT and OPTION_NO_VIRT.
123 (md_longopts): Add mvirt and mnovirt
124 (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT.
125 (mips_after_parse_args): Handle ase_virt field.
126 (s_mipsset): Handle "virt" and "novirt".
127 (mips_elf_final_processing): Add a comment about virt ASE might need
128 a new flag.
129 (md_show_usage): Print out the usage of -mvirt and mno-virt options.
130 * doc/c-mips.texi: Document -mvirt and -mno-virt.
131 Document ".set virt" and ".set novirt".
132
da8094d7
AM
1332013-05-09 Alan Modra <amodra@gmail.com>
134
135 * config/tc-ppc.c (md_apply_fix): Sign extend fieldval under
136 control of operand flag bits.
137
c5f8c205
AM
1382013-05-07 Alan Modra <amodra@gmail.com>
139
140 * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro.
141 (PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise.
142 (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise.
143 (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise.
144 (md_apply_fix): Set fx_no_overflow for assorted relocations.
145 Shift and sign-extend fieldval for use by some VLE reloc
146 operand->insert functions.
147
b47468a6
CM
1482013-05-06 Paul Brook <paul@codesourcery.com>
149 Catherine Moore <clm@codesourcery.com>
150
c5f8c205
AM
151 * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL.
152 (limited_pcrel_reloc_p): Likewise.
b47468a6
CM
153 (md_apply_fix): Likewise.
154 (tc_gen_reloc): Likewise.
155
2de39019
CM
1562013-05-06 Richard Sandiford <rdsandiford@googlemail.com>
157
158 * config/tc-mips.c (limited_pcrel_reloc_p): New function.
159 (mips_fix_adjustable): Adjust pc-relative check to use
160 limited_pc_reloc_p.
161
754e2bb9
RS
1622013-05-02 Richard Sandiford <rdsandiford@googlemail.com>
163
164 * config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries.
165 (s_mips_stab): Do not restrict to stabn only.
166
13761a11
NC
1672013-05-02 Nick Clifton <nickc@redhat.com>
168
169 * config/tc-msp430.c: Add support for the MSP430X architecture.
170 Add code to insert a NOP instruction after any instruction that
171 might change the interrupt state.
172 Add support for the LARGE memory model.
173 Add code to initialise the .MSP430.attributes section.
174 * config/tc-msp430.h: Add support for the MSP430X architecture.
175 * doc/c-msp430.texi: Document the new -mL and -mN command line
176 options.
177 * NEWS: Mention support for the MSP430X architecture.
178
df26367c
MR
1792013-05-01 Maciej W. Rozycki <macro@codesourcery.com>
180
181 * configure.tgt: Replace alpha*-*-linuxecoff* pattern with
182 alpha*-*-linux*ecoff*.
183
f02d8318
CF
1842013-04-30 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
185
186 * config/tc-mips.c (mips_ip): Add sizelo.
187 For "+C", "+G", and "+H", set sizelo and compare against it.
188
b40bf0a2
NC
1892013-04-29 Nick Clifton <nickc@redhat.com>
190
191 * as.c (Options): Add -gdwarf-sections.
192 (parse_args): Likewise.
193 * as.h (flag_dwarf_sections): Declare.
194 * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes.
195 (process_entries): When -gdwarf-sections is enabled generate
196 fragmentary .debug_line sections.
197 (out_debug_line): Set the section for the .debug_line section end
198 symbol.
199 * doc/as.texinfo: Document -gdwarf-sections.
200 * NEWS: Mention -gdwarf-sections.
201
8eeccb77 2022013-04-26 Christian Groessler <chris@groessler.org>
00a3147e
CG
203
204 * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdline
205 according to the target parameter. Don't call s_segm since s_segm
206 calls bfd_set_arch_mach using stdoutput, but stdoutput isn't
207 initialized yet.
208 (md_begin): Call s_segm according to target parameter from command
209 line.
210
49926cd0
AM
2112013-04-25 Alan Modra <amodra@gmail.com>
212
213 * configure.in: Allow little-endian linux.
214 * configure: Regenerate.
215
e3031850
SL
2162013-04-24 Sandra Loosemore <sandra@codesourcery.com>
217
218 * config/tc-nios2.c (nios2_control_register_arg_p): Rename
219 "fstatus" control register to "eccinj".
220
cb948fc0
KT
2212013-04-19 Kai Tietz <ktietz@redhat.com>
222
223 * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin.
224
4455e9ad
JB
2252013-04-15 Julian Brown <julian@codesourcery.com>
226
227 * expr.c (add_to_result, subtract_from_result): Make global.
228 * expr.h (add_to_result, subtract_from_result): Add prototypes.
229 * config/tc-sh.c (sh_optimize_expr): Use add_to_result,
230 subtract_from_result to handle extra bit of precision for .sleb128
231 directive operands.
232
956a6ba3
JB
2332013-04-10 Julian Brown <julian@codesourcery.com>
234
235 * read.c (convert_to_bignum): Add sign parameter. Use it
236 instead of X_unsigned to determine sign of resulting bignum.
237 (emit_expr): Pass extra argument to convert_to_bignum.
238 (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass
239 X_extrabit to convert_to_bignum.
240 (parse_bitfield_cons): Set X_extrabit.
241 * expr.c (make_expr_symbol, expr_build_uconstant, operand):
242 Initialise X_extrabit field as appropriate.
243 (add_to_result): New.
244 (subtract_from_result): New.
245 (expr): Use above.
246 * expr.h (expressionS): Add X_extrabit field.
247
eb9f3f00
JB
2482013-04-10 Jan Beulich <jbeulich@suse.com>
249
250 * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base
251 register being PC when is_t or writeback, and use distinct
252 diagnostic for the latter case.
253
ccb84d65
JB
2542013-04-10 Jan Beulich <jbeulich@suse.com>
255
256 * gas/config/tc-arm.c (parse_operands): Re-write
257 po_barrier_or_imm().
258 (do_barrier): Remove bogus constraint().
259 (do_t_barrier): Remove.
260
4d13caa0
NC
2612013-04-09 Joerg Wunsch <joerg.wunsch@atmel.com>
262
263 * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2,
264 ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2,
265 ATmega2564RFR2
266 * gas/doc/c-avr.texi (-mmcu documentation): Likewise.
267
16d02dc9
JB
2682013-04-09 Jan Beulich <jbeulich@suse.com>
269
270 * gas/config/tc-arm.c (do_vmrs): Accept all control registers.
271 Use local variable Rt in more places.
272 (do_vmsr): Accept all control registers.
273
05ac0ffb
JB
2742013-04-09 Jan Beulich <jbeulich@suse.com>
275
276 * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
277 if there was none specified for moves between scalar and core
278 register.
279
2d51fb74
JB
2802013-04-09 Jan Beulich <jbeulich@suse.com>
281
282 * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the
283 NEON_ALL_LANES case.
284
94dcf8bf
JB
2852013-04-08 Jan Beulich <jbeulich@suse.com>
286
287 * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for
288 PC-relative VSTR.
289
1472d06f
JB
2902013-04-08 Jan Beulich <jbeulich@suse.com>
291
292 * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq
293 entry to sp_fiq.
294
0c76cae8
AM
2952013-04-03 Alan Modra <amodra@gmail.com>
296
297 * doc/as.texinfo: Add support to generate man options for h8300.
298 * doc/c-h8300.texi: Likewise.
299
92eb40d9
RR
3002013-03-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
301
302 * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and
303 Cortex-A57.
304
51dcdd4d
NC
3052013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com>
306
307 PR binutils/15068
308 * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array.
309
c5d685bf
NC
3102013-03-26 Nick Clifton <nickc@redhat.com>
311
9b978282
NC
312 PR gas/15295
313 * listing.c (rebuffer_line): Rewrite to avoid seeking back to the
314 start of the file each time.
315
c5d685bf
NC
316 PR gas/15178
317 * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for
318 FreeBSD targets.
319
9699c833
TG
3202013-03-26 Douglas B Rupp <rupp@gnat.com>
321
322 * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment
323 after fixup.
324
4755303e
WN
3252013-03-21 Will Newton <will.newton@linaro.org>
326
327 * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all
328 pc-relative str instructions in Thumb mode.
329
81f5558e
NC
3302013-03-21 Michael Schewe <michael.schewe@gmx.net>
331
332 * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
333 @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
334 R_H8_DISP32A16.
335 * config/tc-h8300.h: Remove duplicated defines.
336
71863e73
NC
3372013-03-21 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
338
339 PR gas/15282
340 * tc-avr.c (mcu_has_3_byte_pc): New function.
341 (tc_cfi_frame_initial_instructions): Call it to find return
342 address size.
343
795b8e6b
NC
3442013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com>
345
346 PR gas/15095
347 * config/tc-tic6x.c (tic6x_try_encode): Handle
348 tic6x_coding_dreg_(msb|lsb) field coding types and use it to
349 encode register pair numbers when required.
350
ba86b375
WN
3512013-03-15 Will Newton <will.newton@linaro.org>
352
353 * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register
354 in vstr in Thumb mode for pre-ARMv7 cores.
355
9e6f3811
AS
3562013-03-14 Andreas Schwab <schwab@suse.de>
357
358 * doc/c-arc.texi (ARC Directives): Revert last change and use
359 @itemize instead of @table.
360 * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
361
b10bf8c5
NC
3622013-03-14 Nick Clifton <nickc@redhat.com>
363
364 PR gas/15273
365 * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a
366 NULL message, instead just check ARM_CPU_IS_ANY directly.
367
ba724cfc
NC
3682013-03-14 Nick Clifton <nickc@redhat.com>
369
370 PR gas/15212
9e6f3811 371 * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet
ba724cfc
NC
372 for table format.
373 * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
374 to the @item directives.
375 (ARM-Neon-Alignment): Move to correct place in the document.
376 * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
377 formatting.
378 * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
379 @smallexample.
380
531a94fd
SL
3812013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
382
383 * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'
384 case. Add default BAD_CASE to switch.
385
dad60f8e
SL
3862013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
387
388 * config/tc-nios2.c (nios2_assemble_args_ds): New function.
389 (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
390
dd5181d5
KT
3912013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
392
393 * config/tc-arm.c (crc_ext_armv8): New feature set.
394 (UNPRED_REG): New macro.
395 (do_crc32_1): New function.
396 (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
397 do_crc32ch, do_crc32cw): Likewise.
398 (TUEc): New macro.
399 (insns): Add entries for crc32 mnemonics.
400 (arm_extensions): Add entry for crc.
401
8e723a10
CLT
4022013-03-08 Chung-Lin Tang <cltang@codesourcery.com>
403
404 * write.h (struct fix): Add fx_dot_frag field.
405 (dot_frag): Declare.
406 * write.c (dot_frag): New variable.
407 (fix_new_internal): Set fx_dot_frag field with dot_frag.
408 (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
409 * expr.c (expr): Save value of frag_now in dot_frag when setting
410 dot_value.
411 * read.c (emit_expr): Likewise. Delete comments.
412
be05d201
L
4132013-03-07 H.J. Lu <hongjiu.lu@intel.com>
414
415 * config/tc-i386.c (flag_code_names): Removed.
416 (i386_index_check): Rewrote.
417
62b0d0d5
YZ
4182013-03-05 Yufeng Zhang <yufeng.zhang@arm.com>
419
420 * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
421 add comment.
422 (aarch64_double_precision_fmovable): New function.
423 (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
424 function; handle hexadecimal representation of IEEE754 encoding.
425 (parse_operands): Update the call to parse_aarch64_imm_float.
426
165de32a
L
4272013-02-28 H.J. Lu <hongjiu.lu@intel.com>
428
429 * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
430 (check_hle): Updated.
431 (md_assemble): Likewise.
432 (parse_insn): Likewise.
433
d5de92cf
L
4342013-02-28 H.J. Lu <hongjiu.lu@intel.com>
435
436 * config/tc-i386.c (_i386_insn): Add rep_prefix.
9e6f3811 437 (md_assemble): Check if REP prefix is OK.
d5de92cf
L
438 (parse_insn): Remove expecting_string_instruction. Set
439 i.rep_prefix.
440
e60bb1dd
YZ
4412013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
442
443 * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
444
aeebdd9b
YZ
4452013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
446
447 * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
448 for system registers.
449
4107ae22
DD
4502013-02-27 DJ Delorie <dj@redhat.com>
451
452 * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
453 (rl78_op): Handle %code().
454 (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
455 (tc_gen_reloc): Likwise; convert to a computed reloc.
456 (md_apply_fix): Likewise.
457
151fa98f
NC
4582013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
459
460 * config/rl78-parse.y: Fix encoding of DIVWU insn.
461
70a8bc5b 4622013-02-25 Terry Guo <terry.guo@arm.com>
463
464 * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
465 * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
466 list of accepted CPUs.
467
5c111e37
L
4682013-02-19 H.J. Lu <hongjiu.lu@intel.com>
469
470 PR gas/15159
471 * config/tc-i386.c (cpu_arch): Add ".smap".
472
473 * doc/c-i386.texi: Document smap.
474
8a75745d
MR
4752013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
476
477 * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
478 mips_assembling_insn appropriately.
479 (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
480
79850f26
MR
4812013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
482
cf29fc61 483 * config/tc-mips.c (append_insn): Correct indentation, remove
79850f26
MR
484 extraneous braces.
485
4c261dff
NC
4862013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
487
5c111e37 488 * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
4c261dff 489
ea33f281
NC
4902013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
491
492 * configure.tgt: Add nios2-*-rtems*.
493
a1ccaec9
YZ
4942013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
495
496 * config/tc-aarch64.c (md_begin): Change to check if 'name' is
497 NULL.
498
0aa27725
RS
4992013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
500
501 * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
502 (macro): Use it. Assert that trunc.w.s is not used for r5900.
503
da4339ed
NC
5042013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com>
505
506 * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
507 core.
508
36591ba1 5092013-02-06 Sandra Loosemore <sandra@codesourcery.com>
5c111e37 510 Andrew Jenner <andrew@codesourcery.com>
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511
512 Based on patches from Altera Corporation.
513
514 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
515 (TARGET_CPU_HFILES): Add config/tc-nios2.h.
516 * Makefile.in: Regenerated.
517 * configure.tgt: Add case for nios2*-linux*.
518 * config/obj-elf.c: Conditionally include elf/nios2.h.
519 * config/tc-nios2.c: New file.
520 * config/tc-nios2.h: New file.
521 * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
522 * doc/Makefile.in: Regenerated.
523 * doc/all.texi: Set NIOSII.
524 * doc/as.texinfo (Overview): Add Nios II options.
525 (Machine Dependencies): Include c-nios2.texi.
526 * doc/c-nios2.texi: New file.
527 * NEWS: Note Altera Nios II support.
528
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5292013-02-06 Alan Modra <amodra@gmail.com>
530
531 PR gas/14255
532 * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
533 Don't skip fixups with fx_subsy non-NULL.
534 * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
535 with fx_subsy non-NULL.
536
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5372013-02-04 H.J. Lu <hongjiu.lu@intel.com>
538
539 * doc/c-metag.texi: Add "@c man" markers.
540
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5412013-02-04 Alan Modra <amodra@gmail.com>
542
543 * write.c (fixup_segment): Return void. Delete seg_reloc_count
544 related code.
545 (TC_ADJUST_RELOC_COUNT): Delete.
546 * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
547
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5482013-02-04 Alan Modra <amodra@gmail.com>
549
550 * po/POTFILES.in: Regenerate.
551
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5522013-01-30 Markos Chandras <markos.chandras@imgtec.com>
553
554 * config/tc-metag.c: Make SWAP instruction less permissive with
555 its operands.
556
392ca752
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5572013-01-29 DJ Delorie <dj@redhat.com>
558
559 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
560 relocs in .word/.etc statements.
561
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5622013-01-29 Roland McGrath <mcgrathr@google.com>
563
564 * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
565 immediate value for 8-bit offset" error so it shows line info.
566
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5672013-01-24 Joseph Myers <joseph@codesourcery.com>
568
569 * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
570 for 64-bit output.
571
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5722013-01-24 Nick Clifton <nickc@redhat.com>
573
574 * config/tc-v850.c: Add support for e3v5 architecture.
575 * doc/c-v850.texi: Mention new support.
576
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5772013-01-23 Nick Clifton <nickc@redhat.com>
578
579 PR gas/15039
580 * config/tc-avr.c: Include dwarf2dbg.h.
581
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5822013-01-18 H.J. Lu <hongjiu.lu@intel.com>
583
584 * config/tc-i386.c (reloc): Support size relocation only for ELF.
585 (tc_i386_fix_adjustable): Likewise.
586 (lex_got): Likewise.
587 (tc_gen_reloc): Likewise.
588
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5892013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
590
591 * config/tc-aarch64.c (output_operand_error_record): Change to output
592 the out-of-range error message as value-expected message if there is
593 only one single value in the expected range.
594 (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
595 LSL #0 as a programmer-friendly feature.
596
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5972013-01-16 H.J. Lu <hongjiu.lu@intel.com>
598
599 * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
600 (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
601 BFD_RELOC_64_SIZE relocations.
602 (lex_got): Support "symbol@SIZE" and don't create GOT symbol
603 for it.
604 (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
605 relocations against local symbols.
606
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6072013-01-16 Alan Modra <amodra@gmail.com>
608
609 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
610 finding some sort of toc syntax error, and break to avoid
611 compiler uninit warning.
612
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6132013-01-15 H.J. Lu <hongjiu.lu@intel.com>
614
615 PR gas/15019
616 * config/tc-i386.c (lex_got): Increment length by 1 if the
617 relocation token is removed.
618
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6192013-01-15 Nick Clifton <nickc@redhat.com>
620
621 * config/tc-v850.c (md_assemble): Allow signed values for
622 V850E_IMMEDIATE.
623
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6242013-01-11 Sean Keys <skeys@ipdatasys.com>
625
626 * config/tc-xgate.c (md_begin): Fix mistake made when going from
af89796a 627 git to cvs.
464e3686 628
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6292013-01-10 Peter Bergner <bergner@vnet.ibm.com>
630
631 * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
632 * doc/c-ppc.texi (PowerPC-Opts): Likewise.
633 * config/tc-ppc.c (md_show_usage): Likewise.
634 (ppc_handle_align): Handle power8's group ending nop.
635
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6362013-01-10 Sean Keys <skeys@ipdatasys.com>
637
638 * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
af89796a 639 that the assember exits after the opcodes have been printed.
f4b1f6a9 640
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6412013-01-10 H.J. Lu <hongjiu.lu@intel.com>
642
643 * app.c: Remove trailing white spaces.
644 * as.c: Likewise.
645 * as.h: Likewise.
646 * cond.c: Likewise.
647 * dw2gencfi.c: Likewise.
648 * dwarf2dbg.h: Likewise.
649 * ecoff.c: Likewise.
650 * input-file.c: Likewise.
651 * itbl-lex.h: Likewise.
652 * output-file.c: Likewise.
653 * read.c: Likewise.
654 * sb.c: Likewise.
655 * subsegs.c: Likewise.
656 * symbols.c: Likewise.
657 * write.c: Likewise.
658 * config/tc-i386.c: Likewise.
659 * doc/Makefile.am: Likewise.
660 * doc/Makefile.in: Likewise.
661 * doc/c-aarch64.texi: Likewise.
662 * doc/c-alpha.texi: Likewise.
663 * doc/c-arc.texi: Likewise.
664 * doc/c-arm.texi: Likewise.
665 * doc/c-avr.texi: Likewise.
666 * doc/c-bfin.texi: Likewise.
667 * doc/c-cr16.texi: Likewise.
668 * doc/c-d10v.texi: Likewise.
669 * doc/c-d30v.texi: Likewise.
670 * doc/c-h8300.texi: Likewise.
671 * doc/c-hppa.texi: Likewise.
672 * doc/c-i370.texi: Likewise.
673 * doc/c-i386.texi: Likewise.
674 * doc/c-i860.texi: Likewise.
675 * doc/c-m32c.texi: Likewise.
676 * doc/c-m32r.texi: Likewise.
677 * doc/c-m68hc11.texi: Likewise.
678 * doc/c-m68k.texi: Likewise.
679 * doc/c-microblaze.texi: Likewise.
680 * doc/c-mips.texi: Likewise.
681 * doc/c-msp430.texi: Likewise.
682 * doc/c-mt.texi: Likewise.
683 * doc/c-s390.texi: Likewise.
684 * doc/c-score.texi: Likewise.
685 * doc/c-sh.texi: Likewise.
686 * doc/c-sh64.texi: Likewise.
687 * doc/c-tic54x.texi: Likewise.
688 * doc/c-tic6x.texi: Likewise.
689 * doc/c-v850.texi: Likewise.
690 * doc/c-xc16x.texi: Likewise.
691 * doc/c-xgate.texi: Likewise.
692 * doc/c-xtensa.texi: Likewise.
693 * doc/c-z80.texi: Likewise.
694 * doc/internals.texi: Likewise.
695
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6962013-01-10 Roland McGrath <mcgrathr@google.com>
697
698 * hash.c (hash_new_sized): Make it global.
699 * hash.h: Declare it.
700 * macro.c (define_macro): Use hash_new_sized instead of hash_new,
701 pass a small size.
702
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7032013-01-10 Will Newton <will.newton@imgtec.com>
704
705 * Makefile.am: Add Meta.
706 * Makefile.in: Regenerate.
707 * config/tc-metag.c: New file.
708 * config/tc-metag.h: New file.
709 * configure.tgt: Add Meta.
710 * doc/Makefile.am: Add Meta.
711 * doc/Makefile.in: Regenerate.
712 * doc/all.texi: Add Meta.
713 * doc/as.texiinfo: Document Meta options.
714 * doc/c-metag.texi: New file.
715
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7162013-01-09 Steve Ellcey <sellcey@mips.com>
717
718 * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
719 calls.
720 * config/tc-mips.c (internalError): Remove, replace with abort.
721
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7222013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
723
724 * config/tc-aarch64.c (parse_operands): Change to compare the result
725 of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
726
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7272013-01-07 Nick Clifton <nickc@redhat.com>
728
729 PR gas/14887
730 * config/tc-arm.c (skip_past_char): Skip whitespace before the
731 anticipated character.
732 * config/tc-arm.c (parse_address_main): Delete skip of whitespace
733 here as it is no longer needed.
734
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7352013-01-06 Andreas Schwab <schwab@linux-m68k.org>
736
737 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
738 * doc/c-score.texi (SCORE-Opts): Likewise.
739 * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
740
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7412013-01-04 Juergen Urban <JuergenUrban@gmx.de>
742
743 * config/tc-mips.c: Add support for MIPS r5900.
744 Add M_LQ_AB and M_SQ_AB to support large values for instructions
745 lq and sq.
746 (can_swap_branch_p, get_append_method): Detect some conditional
747 short loops to fix a bug on the r5900 by NOP in the branch delay
748 slot.
749 (M_MUL): Support 3 operands in multu on r5900.
750 (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
751 (s_mipsset): Force 32 bit floating point on r5900.
752 (mips_ip): Check parameter range of instructions mfps and mtps on
753 r5900.
754 * configure.in: Detect CPU type when target string contains r5900
755 (e.g. mips64r5900el-linux-gnu).
756
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7572013-01-02 H.J. Lu <hongjiu.lu@intel.com>
758
759 * as.c (parse_args): Update copyright year to 2013.
760
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7612013-01-02 Yufeng Zhang <yufeng.zhang@arm.com>
762
763 * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
764 and "cortex57".
765
517bb291 7662013-01-02 Nick Clifton <nickc@redhat.com>
d709e4e6 767
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768 PR gas/14987
769 * config/tc-arm.c (parse_address_main): Skip whitespace before a
770 closing bracket.
d709e4e6 771
517bb291 772For older changes see ChangeLog-2012
08d56133 773\f
517bb291 774Copyright (C) 2013 Free Software Foundation, Inc.
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775
776Copying and distribution of this file, with or without modification,
777are permitted in any medium without royalty provided the copyright
778notice and this notice are preserved.
779
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780Local Variables:
781mode: change-log
782left-margin: 8
783fill-column: 74
784version-control: never
785End: