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5a7560b5
RS
12013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
2
3 * doc/c-mips.texi (MIPS symbol sizes): Move section further up file.
4 Capitalize name. Use @kindex instead of @cindex for .set entries.
5
a1b86ab7
RS
62013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
7
8 * doc/c-mips.texi (MIPS Stabs): Remove section.
9
c6278170
RS
102013-06-20 Richard Sandiford <rdsandiford@googlemail.com>
11
12 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS, ISA_SUPPORTS_DSP_ASE)
13 (ISA_SUPPORTS_DSP64_ASE, ISA_SUPPORTS_DSPR2_ASE, ISA_SUPPORTS_EVA_ASE)
14 (ISA_SUPPORTS_MT_ASE, ISA_SUPPORTS_MCU_ASE, ISA_SUPPORTS_VIRT_ASE)
15 (ISA_SUPPORTS_VIRT64_ASE): Delete.
16 (mips_ase): New structure.
17 (mips_ases): New table.
18 (FP64_ASES): New macro.
19 (mips_ase_groups): New array.
20 (mips_isa_rev, mips_ase_mask, mips_check_isa_supports_ase)
21 (mips_check_isa_supports_ases, mips_set_ase, mips_lookup_ase): New
22 functions.
23 (is_opcode_valid): Use mips_ases to get the 64-bit ASE flags.
24 (md_parse_option): Use mips_ases and mips_set_ase instead of
25 separate case statements for each ASE option.
26 (mips_after_parse_args): Use FP64_ASES. Use
27 mips_check_isa_supports_ases to check the ASEs against
28 other options.
29 (s_mipsset): Use mips_ases and mips_set_ase instead of
30 separate if statements for each ASE option. Use
31 mips_check_isa_supports_ases, even when a non-ASE option
32 is specified.
33
63a4bc21
KT
342013-06-19 Greta Yorsh <Greta.Yorsh@arm.com>
35
36 * config/tc-arm.c (arm_cpus): Add support for Cortex-A12.
37
c31f3936
RS
382013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
39
40 * config/tc-mips.c (md_shortopts, options, md_longopts)
41 (md_longopts_size): Move earlier in file.
42
846ef2d0
RS
432013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
44
45 * config/tc-mips.c (mips_set_options): Replace separate "ase_*" fields
46 with a single "ase" bitmask.
47 (mips_opts): Update accordingly.
48 (file_ase, file_ase_explicit): New variables.
49 (file_ase_mips3d, file_ase_mdmx, file_ase_smartmips, file_ase_dsp)
50 (file_ase_dspr2, file_ase_eva, file_ase_mt, file_ase_virt): Delete.
51 (ISA_HAS_ROR): Adjust for mips_set_options change.
52 (is_opcode_valid): Take the base ase mask directly from mips_opts.
53 (mips_ip): Adjust for mips_set_options change.
54 (md_parse_option): Likewise. Update file_ase_explicit.
55 (mips_after_parse_args): Adjust for mips_set_options change.
56 Use bitmask operations to select the default ASEs. Set file_ase
57 rather than individual per-ASE variables.
58 (s_mipsset): Adjust for mips_set_options change.
59 (mips_elf_final_processing): Test file_ase rather than
60 file_ase_mdmx. Remove commented-out code.
61
d16afab6
RS
622013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
63
64 * config/tc-mips.c (mips_cpu_info): Add an "ase" field.
65 (MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, MIPS_CPU_ASE_MT)
66 (MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX, MIPS_CPU_ASE_DSPR2)
67 (MIPS_CPU_ASE_MCU, MIPS_CPU_ASE_VIRT, MIPS_CPU_ASE_EVA): Delete.
68 (mips_after_parse_args): Use the new "ase" field to choose
69 the default ASEs.
70 (mips_cpu_info_table): Move ASEs from the "flags" field to the
71 "ase" field.
72
e83a675f
RE
732013-06-18 Richard Earnshaw <rearnsha@arm.com>
74
75 * config/tc-arm.c (symbol_preemptible): New function.
76 (relax_branch): Use it.
77
7f3c4072
CM
782013-06-17 Catherine Moore <clm@codesourcery.com>
79 Maciej W. Rozycki <macro@codesourcery.com>
80 Chao-Ying Fu <fu@mips.com>
81
82 * config/tc-mips.c (mips_set_options): Add ase_eva.
83 (mips_set_options mips_opts): Add ase_eva.
84 (file_ase_eva): Declare.
85 (ISA_SUPPORTS_EVA_ASE): Define.
86 (IS_SEXT_9BIT_NUM): Define.
87 (MIPS_CPU_ASE_EVA): Define.
88 (is_opcode_valid): Add support for ase_eva.
89 (macro_build): Likewise.
90 (macro): Likewise.
91 (validate_mips_insn): Likewise.
92 (validate_micromips_insn): Likewise.
93 (mips_ip): Likewise.
94 (options): Add OPTION_EVA and OPTION_NO_EVA.
95 (md_longopts): Add -meva and -mno-eva.
96 (md_parse_option): Process new options.
97 (mips_after_parse_args): Check for valid EVA combinations.
98 (s_mipsset): Likewise.
99
e410add4
RS
1002013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
101
102 * dwarf2dbg.h (dwarf2_move_insn): Declare.
103 * dwarf2dbg.c (line_subseg): Add pmove_tail.
104 (get_line_subseg): Add create_p argument. Initialize pmove_tail.
105 (dwarf2_gen_line_info_1): Update call accordingly.
106 (dwarf2_move_insn): New function.
107 * config/tc-mips.c (append_insn): Use dwarf2_move_insn.
108
6a50d470
RS
1092013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
110
111 Revert:
112
113 2011-09-05 Richard Sandiford <rdsandiford@googlemail.com>
114
115 PR gas/13024
116 * dwarf2dbg.c (pending_lines, pending_lines_tail): New variables.
117 (dwarf2_gen_line_info_1): Delete.
118 (dwarf2_push_line, dwarf2_flush_pending_lines): New functions.
119 (dwarf2_gen_line_info, dwarf2_emit_label): Use them.
120 (dwarf2_consume_line_info): Call dwarf2_flush_pending_lines.
121 (dwarf2_directive_loc): Push previous .locs instead of generating
122 them immediately.
123
f122319e
CF
1242013-06-13 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
125
126 * config/tc-mips.c (ISA_SUPPORTS_VIRT_ASE): Support micromips.
127 (ISA_SUPPORTS_VIRT64_ASE): Support 64-bit micromips.
128
909c7f9c
NC
1292013-06-13 Nick Clifton <nickc@redhat.com>
130
131 PR gas/15602
132 * config/tc-m68k.h (TC_CHECK_ADJUSTED_BROKEN_DOT_WORD): Define.
133 * config/tc-m68k.c (tc_m68k_check_adjusted_broken_word): New
134 function. Generates an error if the adjusted offset is out of a
135 16-bit range.
136
5d5755a7
SL
1372013-06-12 Sandra Loosemore <sandra@codesourcery.com>
138
139 * config/tc-nios2.c (md_apply_fix): Mask constant
140 BFD_RELOC_NIOS2_HIADJ16 value to 16 bits.
141
3bf0dbfb
MR
1422013-06-10 Maciej W. Rozycki <macro@codesourcery.com>
143
144 * config/tc-mips.c (append_insn): Don't do branch relaxation for
145 MIPS-3D instructions either.
146 (md_convert_frag): Update the COPx branch mask accordingly.
147
148 * config/tc-mips.c (md_show_usage): Document --[no-]relax-branch
149 option.
150 * doc/as.texinfo (Overview): Add --relax-branch and
151 --no-relax-branch.
152 * doc/c-mips.texi (MIPS Opts): Document --relax-branch and
153 --no-relax-branch.
154
9daf7bab
SL
1552013-06-09 Sandra Loosemore <sandra@codesourcery.com>
156
157 * config/tc-nios2.c (nios2_parse_args): Allow trap argument to
158 omitted.
159
d301a56b
RS
1602013-06-08 Catherine Moore <clm@codesourcery.com>
161
162 * config/tc-mips.c (is_opcode_valid): Build ASE mask.
163 (is_opcode_valid_16): Pass ase value to opcode_is_member.
164 (append_insn): Change INSN_xxxx to ASE_xxxx.
165
7bab7634
DC
1662013-06-01 George Thomas <george.thomas@atmel.com>
167
168 * gas/config/tc-avr.c: Change ISA for devices with USB support to
169 AVR_ISA_XMEGAU
170
f60cf82f
L
1712013-05-31 H.J. Lu <hongjiu.lu@intel.com>
172
173 * config/tc-i386.c (md_begin): Don't align text/data/bss sections
174 for ELF.
175
a3f278e2
CM
1762013-05-31 Paul Brook <paul@codesourcery.com>
177
178 gas/
179 * config/tc-mips.c (s_ehword): New.
180
067ec077
CM
1812013-05-30 Paul Brook <paul@codesourcery.com>
182
183 * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH.
184
d6101ac2
MR
1852013-05-29 Maciej W. Rozycki <macro@codesourcery.com>
186
187 * write.c (resolve_reloc_expr_symbols): On REL targets don't
188 convert relocs who have no relocatable field either. Rephrase
189 the conditional so that the PC-relative check is only applied
190 for REL targets.
191
f19ccbda
MR
1922013-05-28 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
193
194 * config/tc-mips.c (macro) <ld>: Don't use $zero for address
195 calculation.
196
418009c2
YZ
1972013-05-28 Yufeng Zhang <yufeng.zhang@arm.com>
198
199 * config/tc-aarch64.c (reloc_table): Update to use
200 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of
201 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE.
202 (md_apply_fix): Likewise.
203 (aarch64_force_relocation): Likewise.
204
0a8897c7
KT
2052013-05-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
206
207 * config/tc-arm.c (it_fsm_post_encode): Improve
208 warning messages about deprecated IT block formats.
209
89d2a2a3
MS
2102013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com>
211
212 * config/tc-aarch64.c (md_apply_fix): Move value range checking
213 inside fx_done condition.
214
c77c0862
RS
2152013-05-22 Jürgen Urban <JuergenUrban@gmx.de>
216
217 * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB.
218
c0637f3a
PB
2192013-05-20 Peter Bergner <bergner@vnet.ibm.com>
220
221 * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error
222 and clean up warning when using PRINT_OPCODE_TABLE.
223
5656a981
AM
2242013-05-20 Alan Modra <amodra@gmail.com>
225
226 * config/tc-ppc.c (md_apply_fix): Hoist code common to insn
227 and data fixups performing shift/high adjust/sign extension on
228 fieldval. Sink fx_pcrel handling and checks. Use fixP->fx_size
229 when writing data fixups rather than recalculating size.
230
997b26e8
JBG
2312013-05-16 Jan-Benedict Glaw <jbglaw@lug-owl.de>
232
233 * doc/c-msp430.texi: Fix typo.
234
9f6e76f4
TG
2352013-05-16 Tristan Gingold <gingold@adacore.com>
236
237 * config/tc-ppc.c (ppc_is_toc_sym): Symbols of class XMC_TC
238 are also TOC symbols.
239
638d3803
NC
2402013-05-16 Nick Clifton <nickc@redhat.com>
241
242 * config/tc-msp430.c: Make -mmcu recognise more part numbers.
243 Add -mcpu command to specify core type.
997b26e8 244 * doc/c-msp430.texi: Update documentation.
638d3803 245
b015e599
AP
2462013-05-09 Andrew Pinski <apinski@cavium.com>
247
248 * config/tc-mips.c (struct mips_set_options): New ase_virt field.
249 (mips_opts): Update for the new field.
250 (file_ase_virt): New variable.
251 (ISA_SUPPORTS_VIRT_ASE): New macro.
252 (ISA_SUPPORTS_VIRT64_ASE): New macro.
253 (MIPS_CPU_ASE_VIRT): New define.
254 (is_opcode_valid): Handle ase_virt.
255 (macro_build): Handle "+J".
256 (validate_mips_insn): Likewise.
257 (mips_ip): Likewise.
258 (enum options): Add OPTION_VIRT and OPTION_NO_VIRT.
259 (md_longopts): Add mvirt and mnovirt
260 (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT.
261 (mips_after_parse_args): Handle ase_virt field.
262 (s_mipsset): Handle "virt" and "novirt".
263 (mips_elf_final_processing): Add a comment about virt ASE might need
264 a new flag.
265 (md_show_usage): Print out the usage of -mvirt and mno-virt options.
266 * doc/c-mips.texi: Document -mvirt and -mno-virt.
267 Document ".set virt" and ".set novirt".
268
da8094d7
AM
2692013-05-09 Alan Modra <amodra@gmail.com>
270
271 * config/tc-ppc.c (md_apply_fix): Sign extend fieldval under
272 control of operand flag bits.
273
c5f8c205
AM
2742013-05-07 Alan Modra <amodra@gmail.com>
275
276 * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro.
277 (PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise.
278 (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise.
279 (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise.
280 (md_apply_fix): Set fx_no_overflow for assorted relocations.
281 Shift and sign-extend fieldval for use by some VLE reloc
282 operand->insert functions.
283
b47468a6
CM
2842013-05-06 Paul Brook <paul@codesourcery.com>
285 Catherine Moore <clm@codesourcery.com>
286
c5f8c205
AM
287 * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL.
288 (limited_pcrel_reloc_p): Likewise.
b47468a6
CM
289 (md_apply_fix): Likewise.
290 (tc_gen_reloc): Likewise.
291
2de39019
CM
2922013-05-06 Richard Sandiford <rdsandiford@googlemail.com>
293
294 * config/tc-mips.c (limited_pcrel_reloc_p): New function.
295 (mips_fix_adjustable): Adjust pc-relative check to use
296 limited_pc_reloc_p.
297
754e2bb9
RS
2982013-05-02 Richard Sandiford <rdsandiford@googlemail.com>
299
300 * config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries.
301 (s_mips_stab): Do not restrict to stabn only.
302
13761a11
NC
3032013-05-02 Nick Clifton <nickc@redhat.com>
304
305 * config/tc-msp430.c: Add support for the MSP430X architecture.
306 Add code to insert a NOP instruction after any instruction that
307 might change the interrupt state.
308 Add support for the LARGE memory model.
309 Add code to initialise the .MSP430.attributes section.
310 * config/tc-msp430.h: Add support for the MSP430X architecture.
311 * doc/c-msp430.texi: Document the new -mL and -mN command line
312 options.
313 * NEWS: Mention support for the MSP430X architecture.
314
df26367c
MR
3152013-05-01 Maciej W. Rozycki <macro@codesourcery.com>
316
317 * configure.tgt: Replace alpha*-*-linuxecoff* pattern with
318 alpha*-*-linux*ecoff*.
319
f02d8318
CF
3202013-04-30 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
321
322 * config/tc-mips.c (mips_ip): Add sizelo.
323 For "+C", "+G", and "+H", set sizelo and compare against it.
324
b40bf0a2
NC
3252013-04-29 Nick Clifton <nickc@redhat.com>
326
327 * as.c (Options): Add -gdwarf-sections.
328 (parse_args): Likewise.
329 * as.h (flag_dwarf_sections): Declare.
330 * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes.
331 (process_entries): When -gdwarf-sections is enabled generate
332 fragmentary .debug_line sections.
333 (out_debug_line): Set the section for the .debug_line section end
334 symbol.
335 * doc/as.texinfo: Document -gdwarf-sections.
336 * NEWS: Mention -gdwarf-sections.
337
8eeccb77 3382013-04-26 Christian Groessler <chris@groessler.org>
00a3147e
CG
339
340 * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdline
341 according to the target parameter. Don't call s_segm since s_segm
342 calls bfd_set_arch_mach using stdoutput, but stdoutput isn't
343 initialized yet.
344 (md_begin): Call s_segm according to target parameter from command
345 line.
346
49926cd0
AM
3472013-04-25 Alan Modra <amodra@gmail.com>
348
349 * configure.in: Allow little-endian linux.
350 * configure: Regenerate.
351
e3031850
SL
3522013-04-24 Sandra Loosemore <sandra@codesourcery.com>
353
354 * config/tc-nios2.c (nios2_control_register_arg_p): Rename
355 "fstatus" control register to "eccinj".
356
cb948fc0
KT
3572013-04-19 Kai Tietz <ktietz@redhat.com>
358
359 * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin.
360
4455e9ad
JB
3612013-04-15 Julian Brown <julian@codesourcery.com>
362
363 * expr.c (add_to_result, subtract_from_result): Make global.
364 * expr.h (add_to_result, subtract_from_result): Add prototypes.
365 * config/tc-sh.c (sh_optimize_expr): Use add_to_result,
366 subtract_from_result to handle extra bit of precision for .sleb128
367 directive operands.
368
956a6ba3
JB
3692013-04-10 Julian Brown <julian@codesourcery.com>
370
371 * read.c (convert_to_bignum): Add sign parameter. Use it
372 instead of X_unsigned to determine sign of resulting bignum.
373 (emit_expr): Pass extra argument to convert_to_bignum.
374 (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass
375 X_extrabit to convert_to_bignum.
376 (parse_bitfield_cons): Set X_extrabit.
377 * expr.c (make_expr_symbol, expr_build_uconstant, operand):
378 Initialise X_extrabit field as appropriate.
379 (add_to_result): New.
380 (subtract_from_result): New.
381 (expr): Use above.
382 * expr.h (expressionS): Add X_extrabit field.
383
eb9f3f00
JB
3842013-04-10 Jan Beulich <jbeulich@suse.com>
385
386 * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base
387 register being PC when is_t or writeback, and use distinct
388 diagnostic for the latter case.
389
ccb84d65
JB
3902013-04-10 Jan Beulich <jbeulich@suse.com>
391
392 * gas/config/tc-arm.c (parse_operands): Re-write
393 po_barrier_or_imm().
394 (do_barrier): Remove bogus constraint().
395 (do_t_barrier): Remove.
396
4d13caa0
NC
3972013-04-09 Joerg Wunsch <joerg.wunsch@atmel.com>
398
399 * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2,
400 ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2,
401 ATmega2564RFR2
402 * gas/doc/c-avr.texi (-mmcu documentation): Likewise.
403
16d02dc9
JB
4042013-04-09 Jan Beulich <jbeulich@suse.com>
405
406 * gas/config/tc-arm.c (do_vmrs): Accept all control registers.
407 Use local variable Rt in more places.
408 (do_vmsr): Accept all control registers.
409
05ac0ffb
JB
4102013-04-09 Jan Beulich <jbeulich@suse.com>
411
412 * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
413 if there was none specified for moves between scalar and core
414 register.
415
2d51fb74
JB
4162013-04-09 Jan Beulich <jbeulich@suse.com>
417
418 * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the
419 NEON_ALL_LANES case.
420
94dcf8bf
JB
4212013-04-08 Jan Beulich <jbeulich@suse.com>
422
423 * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for
424 PC-relative VSTR.
425
1472d06f
JB
4262013-04-08 Jan Beulich <jbeulich@suse.com>
427
428 * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq
429 entry to sp_fiq.
430
0c76cae8
AM
4312013-04-03 Alan Modra <amodra@gmail.com>
432
433 * doc/as.texinfo: Add support to generate man options for h8300.
434 * doc/c-h8300.texi: Likewise.
435
92eb40d9
RR
4362013-03-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
437
438 * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and
439 Cortex-A57.
440
51dcdd4d
NC
4412013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com>
442
443 PR binutils/15068
444 * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array.
445
c5d685bf
NC
4462013-03-26 Nick Clifton <nickc@redhat.com>
447
9b978282
NC
448 PR gas/15295
449 * listing.c (rebuffer_line): Rewrite to avoid seeking back to the
450 start of the file each time.
451
c5d685bf
NC
452 PR gas/15178
453 * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for
454 FreeBSD targets.
455
9699c833
TG
4562013-03-26 Douglas B Rupp <rupp@gnat.com>
457
458 * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment
459 after fixup.
460
4755303e
WN
4612013-03-21 Will Newton <will.newton@linaro.org>
462
463 * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all
464 pc-relative str instructions in Thumb mode.
465
81f5558e
NC
4662013-03-21 Michael Schewe <michael.schewe@gmx.net>
467
468 * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
469 @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
470 R_H8_DISP32A16.
471 * config/tc-h8300.h: Remove duplicated defines.
472
71863e73
NC
4732013-03-21 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
474
475 PR gas/15282
476 * tc-avr.c (mcu_has_3_byte_pc): New function.
477 (tc_cfi_frame_initial_instructions): Call it to find return
478 address size.
479
795b8e6b
NC
4802013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com>
481
482 PR gas/15095
483 * config/tc-tic6x.c (tic6x_try_encode): Handle
484 tic6x_coding_dreg_(msb|lsb) field coding types and use it to
485 encode register pair numbers when required.
486
ba86b375
WN
4872013-03-15 Will Newton <will.newton@linaro.org>
488
489 * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register
490 in vstr in Thumb mode for pre-ARMv7 cores.
491
9e6f3811
AS
4922013-03-14 Andreas Schwab <schwab@suse.de>
493
494 * doc/c-arc.texi (ARC Directives): Revert last change and use
495 @itemize instead of @table.
496 * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
497
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4982013-03-14 Nick Clifton <nickc@redhat.com>
499
500 PR gas/15273
501 * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a
502 NULL message, instead just check ARM_CPU_IS_ANY directly.
503
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5042013-03-14 Nick Clifton <nickc@redhat.com>
505
506 PR gas/15212
9e6f3811 507 * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet
ba724cfc
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508 for table format.
509 * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
510 to the @item directives.
511 (ARM-Neon-Alignment): Move to correct place in the document.
512 * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
513 formatting.
514 * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
515 @smallexample.
516
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SL
5172013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
518
519 * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'
520 case. Add default BAD_CASE to switch.
521
dad60f8e
SL
5222013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
523
524 * config/tc-nios2.c (nios2_assemble_args_ds): New function.
525 (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
526
dd5181d5
KT
5272013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
528
529 * config/tc-arm.c (crc_ext_armv8): New feature set.
530 (UNPRED_REG): New macro.
531 (do_crc32_1): New function.
532 (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
533 do_crc32ch, do_crc32cw): Likewise.
534 (TUEc): New macro.
535 (insns): Add entries for crc32 mnemonics.
536 (arm_extensions): Add entry for crc.
537
8e723a10
CLT
5382013-03-08 Chung-Lin Tang <cltang@codesourcery.com>
539
540 * write.h (struct fix): Add fx_dot_frag field.
541 (dot_frag): Declare.
542 * write.c (dot_frag): New variable.
543 (fix_new_internal): Set fx_dot_frag field with dot_frag.
544 (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
545 * expr.c (expr): Save value of frag_now in dot_frag when setting
546 dot_value.
547 * read.c (emit_expr): Likewise. Delete comments.
548
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5492013-03-07 H.J. Lu <hongjiu.lu@intel.com>
550
551 * config/tc-i386.c (flag_code_names): Removed.
552 (i386_index_check): Rewrote.
553
62b0d0d5
YZ
5542013-03-05 Yufeng Zhang <yufeng.zhang@arm.com>
555
556 * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
557 add comment.
558 (aarch64_double_precision_fmovable): New function.
559 (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
560 function; handle hexadecimal representation of IEEE754 encoding.
561 (parse_operands): Update the call to parse_aarch64_imm_float.
562
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5632013-02-28 H.J. Lu <hongjiu.lu@intel.com>
564
565 * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
566 (check_hle): Updated.
567 (md_assemble): Likewise.
568 (parse_insn): Likewise.
569
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5702013-02-28 H.J. Lu <hongjiu.lu@intel.com>
571
572 * config/tc-i386.c (_i386_insn): Add rep_prefix.
9e6f3811 573 (md_assemble): Check if REP prefix is OK.
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574 (parse_insn): Remove expecting_string_instruction. Set
575 i.rep_prefix.
576
e60bb1dd
YZ
5772013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
578
579 * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
580
aeebdd9b
YZ
5812013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
582
583 * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
584 for system registers.
585
4107ae22
DD
5862013-02-27 DJ Delorie <dj@redhat.com>
587
588 * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
589 (rl78_op): Handle %code().
590 (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
591 (tc_gen_reloc): Likwise; convert to a computed reloc.
592 (md_apply_fix): Likewise.
593
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5942013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
595
596 * config/rl78-parse.y: Fix encoding of DIVWU insn.
597
70a8bc5b 5982013-02-25 Terry Guo <terry.guo@arm.com>
599
600 * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
601 * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
602 list of accepted CPUs.
603
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6042013-02-19 H.J. Lu <hongjiu.lu@intel.com>
605
606 PR gas/15159
607 * config/tc-i386.c (cpu_arch): Add ".smap".
608
609 * doc/c-i386.texi: Document smap.
610
8a75745d
MR
6112013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
612
613 * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
614 mips_assembling_insn appropriately.
615 (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
616
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MR
6172013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
618
cf29fc61 619 * config/tc-mips.c (append_insn): Correct indentation, remove
79850f26
MR
620 extraneous braces.
621
4c261dff
NC
6222013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
623
5c111e37 624 * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
4c261dff 625
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NC
6262013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
627
628 * configure.tgt: Add nios2-*-rtems*.
629
a1ccaec9
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6302013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
631
632 * config/tc-aarch64.c (md_begin): Change to check if 'name' is
633 NULL.
634
0aa27725
RS
6352013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
636
637 * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
638 (macro): Use it. Assert that trunc.w.s is not used for r5900.
639
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6402013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com>
641
642 * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
643 core.
644
36591ba1 6452013-02-06 Sandra Loosemore <sandra@codesourcery.com>
5c111e37 646 Andrew Jenner <andrew@codesourcery.com>
36591ba1
SL
647
648 Based on patches from Altera Corporation.
649
650 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
651 (TARGET_CPU_HFILES): Add config/tc-nios2.h.
652 * Makefile.in: Regenerated.
653 * configure.tgt: Add case for nios2*-linux*.
654 * config/obj-elf.c: Conditionally include elf/nios2.h.
655 * config/tc-nios2.c: New file.
656 * config/tc-nios2.h: New file.
657 * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
658 * doc/Makefile.in: Regenerated.
659 * doc/all.texi: Set NIOSII.
660 * doc/as.texinfo (Overview): Add Nios II options.
661 (Machine Dependencies): Include c-nios2.texi.
662 * doc/c-nios2.texi: New file.
663 * NEWS: Note Altera Nios II support.
664
94d4433a
AM
6652013-02-06 Alan Modra <amodra@gmail.com>
666
667 PR gas/14255
668 * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
669 Don't skip fixups with fx_subsy non-NULL.
670 * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
671 with fx_subsy non-NULL.
672
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6732013-02-04 H.J. Lu <hongjiu.lu@intel.com>
674
675 * doc/c-metag.texi: Add "@c man" markers.
676
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AM
6772013-02-04 Alan Modra <amodra@gmail.com>
678
679 * write.c (fixup_segment): Return void. Delete seg_reloc_count
680 related code.
681 (TC_ADJUST_RELOC_COUNT): Delete.
682 * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
683
89072bd6
AM
6842013-02-04 Alan Modra <amodra@gmail.com>
685
686 * po/POTFILES.in: Regenerate.
687
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NC
6882013-01-30 Markos Chandras <markos.chandras@imgtec.com>
689
690 * config/tc-metag.c: Make SWAP instruction less permissive with
691 its operands.
692
392ca752
DD
6932013-01-29 DJ Delorie <dj@redhat.com>
694
695 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
696 relocs in .word/.etc statements.
697
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RM
6982013-01-29 Roland McGrath <mcgrathr@google.com>
699
700 * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
701 immediate value for 8-bit offset" error so it shows line info.
702
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JM
7032013-01-24 Joseph Myers <joseph@codesourcery.com>
704
705 * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
706 for 64-bit output.
707
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7082013-01-24 Nick Clifton <nickc@redhat.com>
709
710 * config/tc-v850.c: Add support for e3v5 architecture.
711 * doc/c-v850.texi: Mention new support.
712
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7132013-01-23 Nick Clifton <nickc@redhat.com>
714
715 PR gas/15039
716 * config/tc-avr.c: Include dwarf2dbg.h.
717
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7182013-01-18 H.J. Lu <hongjiu.lu@intel.com>
719
720 * config/tc-i386.c (reloc): Support size relocation only for ELF.
721 (tc_i386_fix_adjustable): Likewise.
722 (lex_got): Likewise.
723 (tc_gen_reloc): Likewise.
724
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YZ
7252013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
726
727 * config/tc-aarch64.c (output_operand_error_record): Change to output
728 the out-of-range error message as value-expected message if there is
729 only one single value in the expected range.
730 (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
731 LSL #0 as a programmer-friendly feature.
732
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7332013-01-16 H.J. Lu <hongjiu.lu@intel.com>
734
735 * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
736 (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
737 BFD_RELOC_64_SIZE relocations.
738 (lex_got): Support "symbol@SIZE" and don't create GOT symbol
739 for it.
740 (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
741 relocations against local symbols.
742
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AM
7432013-01-16 Alan Modra <amodra@gmail.com>
744
745 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
746 finding some sort of toc syntax error, and break to avoid
747 compiler uninit warning.
748
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7492013-01-15 H.J. Lu <hongjiu.lu@intel.com>
750
751 PR gas/15019
752 * config/tc-i386.c (lex_got): Increment length by 1 if the
753 relocation token is removed.
754
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7552013-01-15 Nick Clifton <nickc@redhat.com>
756
757 * config/tc-v850.c (md_assemble): Allow signed values for
758 V850E_IMMEDIATE.
759
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SK
7602013-01-11 Sean Keys <skeys@ipdatasys.com>
761
762 * config/tc-xgate.c (md_begin): Fix mistake made when going from
af89796a 763 git to cvs.
464e3686 764
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7652013-01-10 Peter Bergner <bergner@vnet.ibm.com>
766
767 * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
768 * doc/c-ppc.texi (PowerPC-Opts): Likewise.
769 * config/tc-ppc.c (md_show_usage): Likewise.
770 (ppc_handle_align): Handle power8's group ending nop.
771
f4b1f6a9
SK
7722013-01-10 Sean Keys <skeys@ipdatasys.com>
773
774 * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
af89796a 775 that the assember exits after the opcodes have been printed.
f4b1f6a9 776
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7772013-01-10 H.J. Lu <hongjiu.lu@intel.com>
778
779 * app.c: Remove trailing white spaces.
780 * as.c: Likewise.
781 * as.h: Likewise.
782 * cond.c: Likewise.
783 * dw2gencfi.c: Likewise.
784 * dwarf2dbg.h: Likewise.
785 * ecoff.c: Likewise.
786 * input-file.c: Likewise.
787 * itbl-lex.h: Likewise.
788 * output-file.c: Likewise.
789 * read.c: Likewise.
790 * sb.c: Likewise.
791 * subsegs.c: Likewise.
792 * symbols.c: Likewise.
793 * write.c: Likewise.
794 * config/tc-i386.c: Likewise.
795 * doc/Makefile.am: Likewise.
796 * doc/Makefile.in: Likewise.
797 * doc/c-aarch64.texi: Likewise.
798 * doc/c-alpha.texi: Likewise.
799 * doc/c-arc.texi: Likewise.
800 * doc/c-arm.texi: Likewise.
801 * doc/c-avr.texi: Likewise.
802 * doc/c-bfin.texi: Likewise.
803 * doc/c-cr16.texi: Likewise.
804 * doc/c-d10v.texi: Likewise.
805 * doc/c-d30v.texi: Likewise.
806 * doc/c-h8300.texi: Likewise.
807 * doc/c-hppa.texi: Likewise.
808 * doc/c-i370.texi: Likewise.
809 * doc/c-i386.texi: Likewise.
810 * doc/c-i860.texi: Likewise.
811 * doc/c-m32c.texi: Likewise.
812 * doc/c-m32r.texi: Likewise.
813 * doc/c-m68hc11.texi: Likewise.
814 * doc/c-m68k.texi: Likewise.
815 * doc/c-microblaze.texi: Likewise.
816 * doc/c-mips.texi: Likewise.
817 * doc/c-msp430.texi: Likewise.
818 * doc/c-mt.texi: Likewise.
819 * doc/c-s390.texi: Likewise.
820 * doc/c-score.texi: Likewise.
821 * doc/c-sh.texi: Likewise.
822 * doc/c-sh64.texi: Likewise.
823 * doc/c-tic54x.texi: Likewise.
824 * doc/c-tic6x.texi: Likewise.
825 * doc/c-v850.texi: Likewise.
826 * doc/c-xc16x.texi: Likewise.
827 * doc/c-xgate.texi: Likewise.
828 * doc/c-xtensa.texi: Likewise.
829 * doc/c-z80.texi: Likewise.
830 * doc/internals.texi: Likewise.
831
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8322013-01-10 Roland McGrath <mcgrathr@google.com>
833
834 * hash.c (hash_new_sized): Make it global.
835 * hash.h: Declare it.
836 * macro.c (define_macro): Use hash_new_sized instead of hash_new,
837 pass a small size.
838
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8392013-01-10 Will Newton <will.newton@imgtec.com>
840
841 * Makefile.am: Add Meta.
842 * Makefile.in: Regenerate.
843 * config/tc-metag.c: New file.
844 * config/tc-metag.h: New file.
845 * configure.tgt: Add Meta.
846 * doc/Makefile.am: Add Meta.
847 * doc/Makefile.in: Regenerate.
848 * doc/all.texi: Add Meta.
849 * doc/as.texiinfo: Document Meta options.
850 * doc/c-metag.texi: New file.
851
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SE
8522013-01-09 Steve Ellcey <sellcey@mips.com>
853
854 * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
855 calls.
856 * config/tc-mips.c (internalError): Remove, replace with abort.
857
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8582013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
859
860 * config/tc-aarch64.c (parse_operands): Change to compare the result
861 of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
862
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8632013-01-07 Nick Clifton <nickc@redhat.com>
864
865 PR gas/14887
866 * config/tc-arm.c (skip_past_char): Skip whitespace before the
867 anticipated character.
868 * config/tc-arm.c (parse_address_main): Delete skip of whitespace
869 here as it is no longer needed.
870
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AS
8712013-01-06 Andreas Schwab <schwab@linux-m68k.org>
872
873 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
874 * doc/c-score.texi (SCORE-Opts): Likewise.
875 * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
876
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8772013-01-04 Juergen Urban <JuergenUrban@gmx.de>
878
879 * config/tc-mips.c: Add support for MIPS r5900.
880 Add M_LQ_AB and M_SQ_AB to support large values for instructions
881 lq and sq.
882 (can_swap_branch_p, get_append_method): Detect some conditional
883 short loops to fix a bug on the r5900 by NOP in the branch delay
884 slot.
885 (M_MUL): Support 3 operands in multu on r5900.
886 (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
887 (s_mipsset): Force 32 bit floating point on r5900.
888 (mips_ip): Check parameter range of instructions mfps and mtps on
889 r5900.
890 * configure.in: Detect CPU type when target string contains r5900
891 (e.g. mips64r5900el-linux-gnu).
892
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8932013-01-02 H.J. Lu <hongjiu.lu@intel.com>
894
895 * as.c (parse_args): Update copyright year to 2013.
896
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8972013-01-02 Yufeng Zhang <yufeng.zhang@arm.com>
898
899 * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
900 and "cortex57".
901
517bb291 9022013-01-02 Nick Clifton <nickc@redhat.com>
d709e4e6 903
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904 PR gas/14987
905 * config/tc-arm.c (parse_address_main): Skip whitespace before a
906 closing bracket.
d709e4e6 907
517bb291 908For older changes see ChangeLog-2012
08d56133 909\f
517bb291 910Copyright (C) 2013 Free Software Foundation, Inc.
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911
912Copying and distribution of this file, with or without modification,
913are permitted in any medium without royalty provided the copyright
914notice and this notice are preserved.
915
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916Local Variables:
917mode: change-log
918left-margin: 8
919fill-column: 74
920version-control: never
921End: