]> git.ipfire.org Git - thirdparty/binutils-gdb.git/blame - gas/ChangeLog
2013-09-17 Doug Gilmore <Doug.Gilmore@imgtec.com>
[thirdparty/binutils-gdb.git] / gas / ChangeLog
CommitLineData
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12013-09-16 Will Newton <will.newton@linaro.org>
2
3 * config/tc-arm.c (do_neon_ld_st_interleave): Add constraint
4 disallowing element size 64 with interleave other than 1.
5
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62013-09-12 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
7
8 * config/tc-mips.c (match_insn): Set error when $31 is used for
9 bltzal* and bgezal*.
10
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112013-09-04 Tristan Gingold <gingold@adacore.com>
12
13 * config/tc-ppc.c (md_apply_fix): Handle defined after use toc
14 symbols.
15
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162013-09-04 Roland McGrath <mcgrathr@google.com>
17
18 PR gas/15914
19 * config/tc-arm.c (T16_32_TAB): Add _udf.
20 (do_t_udf): New function.
21 (insns): Add "udf".
22
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232013-08-23 Sandeep Kumar Singh <Sandeep.Singh2@kpitcummins.com>
24
25 * config/rx-parse.y: Rearrange the components of a bison grammar to issue
26 assembler errors at correct position.
27
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282013-08-23 Yuri Chornoivan <yurchor@ukr.net>
29
30 PR binutils/15834
31 * config/tc-ia64.c: Fix typos.
32 * config/tc-sparc.c: Likewise.
33 * config/tc-z80.c: Likewise.
34 * doc/c-i386.texi: Likewise.
35 * doc/c-m32r.texi: Likewise.
36
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372013-08-23 Will Newton <will.newton@linaro.org>
38
9aff4b7a 39 * config/tc-arm.c: (do_neon_ldx_stx): Add extra constraints
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40 for pre-indexed addressing modes.
41
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422013-08-21 Alan Modra <amodra@gmail.com>
43
44 * symbols.c (fb_label_instance_inc, fb_label_instance): Properly
45 range check label number for use with fb_low_counter array.
46
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472013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
48
49 * config/tc-mips.c (mips_check_isa_supports_ase, reg_lookup)
50 (mips_parse_argument_token, validate_micromips_insn, md_begin)
51 (check_regno, match_float_constant, check_completed_insn, append_insn)
52 (match_insn, match_mips16_insn, match_insns, macro_start)
53 (macro_build_ldst_constoffset, load_register, macro, mips_ip)
54 (mips16_ip, mips_set_option_string, md_parse_option)
55 (mips_after_parse_args, mips_after_parse_args, md_pcrel_from)
56 (md_apply_fix, s_align, s_option, s_mipsset, s_tls_rel_directive)
57 (s_gpword, s_gpdword, s_ehword, s_nan, tc_gen_reloc, md_convert_frag)
58 (s_mips_end, s_mips_ent, s_mips_frame, s_mips_mask, mips_parse_cpu):
59 Start error messages with a lower-case letter. Do not end error
60 messages with a period. Wrap long messages to 80 character-lines.
61 Use "cannot" instead of "can't" and "can not".
62
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632013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
64
65 * config/tc-mips.c (imm_expr): Expand comment.
66 (set_at, macro, mips16_macro): Expect imm_expr to be O_constant
67 when populated.
68
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692013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
70
71 * config/tc-mips.c (imm2_expr): Delete.
72 (md_assemble, match_insn, imm2_expr.X_op, mips_ip): Update accordingly.
73
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742013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
75
76 * config/tc-mips.c (report_bad_range, report_bad_field): Delete.
77 (macro): Remove M_DEXT and M_DINS handling.
78
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792013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
80
81 * config/tc-mips.c (mips_arg_info): Replace allow_nonconst and
82 lax_max with lax_match.
83 (match_int_operand): Update accordingly. Don't report an error
84 for !lax_match-only cases.
85 (match_insn): Replace more_alts with lax_match and use it to
86 initialize the mips_arg_info field. Add a complete_p parameter.
87 Handle implicit VU0 suffixes here.
88 (match_invalid_for_isa, match_insns, match_mips16_insns): New
89 functions.
90 (mips_ip, mips16_ip): Use them.
91
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922013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
93
94 * config/tc-mips.c (match_expression): Report uses of registers here.
95 Add a "must be an immediate expression" error. Handle elided offsets
96 here rather than...
97 (match_int_operand): ...here.
98
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992013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
100
101 * config/tc-mips.c (mips_arg_info): Remove soft_match.
102 (match_out_of_range, match_not_constant): New functions.
103 (match_const_int): Remove fallback parameter and check for soft_match.
104 Use match_not_constant.
105 (match_mapped_int_operand, match_addiusp_operand)
106 (match_perf_reg_operand, match_save_restore_list_operand)
107 (match_mdmx_imm_reg_operand): Update accordingly. Use
108 match_out_of_range and set_insn_error* instead of as_bad.
109 (match_int_operand): Likewise. Use match_not_constant in the
110 !allows_nonconst case.
111 (match_float_constant): Report invalid float constants.
112 (match_insn, match_mips16_insn): Remove soft_match code. Rely on
113 match_float_constant to check for invalid constants. Fail the
114 match if match_const_int or match_float_constant return false.
115 (mips_ip): Update accordingly.
116 (mips16_ip): Likewise. Undo null termination of instruction name
117 once lookup is complete.
118
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1192013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
120
121 * config/tc-mips.c (mips_insn_error_format): New enum.
122 (mips_insn_error): New struct.
123 (insn_error): Change to a mips_insn_error.
124 (clear_insn_error, set_insn_error_format, set_insn_error)
125 (set_insn_error_i, set_insn_error_ss, report_insn_error): New
126 functions.
127 (mips_parse_argument_token, md_assemble, match_insn)
128 (match_mips16_insn): Use them instead of manipulating insn_error
129 directly.
130 (mips_ip, mips16_ip): Likewise. Simplify control flow.
131
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1322013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
133
134 * config/tc-mips.c (normalize_constant_expr): Move further up file.
135 (normalize_address_expr): Likewise.
136 (match_insn, match_mips16_insn): New functions, split out from...
137 (mips_ip, mips16_ip): ...here.
138
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1392013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
140
141 * config/tc-mips.c (operand_reg_mask, match_operand): Handle
142 OP_OPTIONAL_REG.
143 (mips_ip, mips16_ip): Use mips_optional_operand_p to check
144 for optional operands.
145
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1462013-08-16 Alan Modra <amodra@gmail.com>
147
148 * config/tc-ppc.c (ppc_elf_cons): Allow @l and other reloc
149 modifiers generally.
150
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1512013-08-16 Alan Modra <amodra@gmail.com>
152
153 * config/tc-ppc.c (ppc_elf_lcomm): Use subsection 1.
154
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1552013-08-14 David Edelsohn <dje.gcc@gmail.com>
156
157 * config/tc-ppc.c (ppc_comm): Accept optional fourth .lcomm
158 argument as alignment.
159
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1602013-08-09 Nick Clifton <nickc@redhat.com>
161
162 * config/tc-rl78.c (elf_flags): New variable.
163 (enum options): Add OPTION_G10.
164 (md_longopts): Add mg10.
165 (md_parse_option): Parse -mg10.
166 (rl78_elf_final_processing): New function.
167 * config/tc-rl78.c (tc_final_processing): Define.
168 * doc/c-rl78.texi: Document -mg10 option.
169
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1702013-08-06 Jürgen Urban <JuergenUrban@gmx.de>
171
172 * config/tc-mips.c (match_vu0_suffix_operand): Allow single-channel
173 suffixes to be elided too.
174 (mips_lookup_insn): Don't reject INSN2_VU0_CHANNEL_SUFFIX here.
175 (mips_ip): Assume .xyzw if no VU0 suffix is specified. Allow +N
176 to be omitted too.
177
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1782013-08-05 John Tytgat <john@bass-software.com>
179
180 * po/POTFILES.in: Regenerate.
181
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1822013-08-05 Eric Botcazou <ebotcazou@adacore.com>
183 Konrad Eisele <konrad@gaisler.com>
184
185 * config/tc-sparc.c (sparc_arch_types): Add leon.
186 (sparc_arch): Move sparc4 around and add leon.
187 (sparc_target_format): Document -Aleon.
188 * doc/c-sparc.texi: Likewise.
189
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1902013-08-05 Richard Sandiford <rdsandiford@googlemail.com>
191
192 * config/tc-mips.c (mips_lookup_insn): Make length and opend signed.
193
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1942013-08-04 Jürgen Urban <JuergenUrban@gmx.de>
195 Richard Sandiford <rdsandiford@googlemail.com>
196
197 * config/tc-mips.c (MAX_OPERANDS): Bump to 6.
198 (RWARN): Bump to 0x8000000.
199 (RTYPE_VI, RTYPE_VF, RTYPE_R5900_I, RTYPE_R5900_Q, RTYPE_R5900_R)
200 (RTYPE_R5900_ACC): New register types.
201 (RTYPE_MASK): Include them.
202 (R5900_I_NAMES, R5900_Q_NAMES, R5900_R_NAMES, R5900_ACC_NAMES): New
203 macros.
204 (reg_names): Include them.
205 (mips_parse_register_1): New function, split out from...
206 (mips_parse_register): ...here. Add a channels_ptr parameter.
207 Look for VU0 channel suffixes when nonnull.
208 (reg_lookup): Update the call to mips_parse_register.
209 (mips_parse_vu0_channels): New function.
210 (OT_CHANNELS, OT_DOUBLE_CHAR): New mips_operand_token_types.
211 (mips_operand_token): Add a "channels" field to the union.
212 Extend the comment above "ch" to OT_DOUBLE_CHAR.
213 (mips_parse_base_start): Match -- and ++. Handle channel suffixes.
214 (mips_parse_argument_token): Handle channel suffixes here too.
215 (validate_mips_insn): Handle INSN2_VU0_CHANNEL_SUFFIX.
216 Ignore OP_VU0_MATCH_SUFFIX when calculating the used bits.
217 Handle '#' formats.
218 (md_begin): Register $vfN and $vfI registers.
219 (operand_reg_mask): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX.
220 (convert_reg_type): Handle OP_REG_VI, OP_REG_VF, OP_REG_R5900_I,
221 OP_REG_R5900_Q, OP_REG_R5900_R and OP_REG_R5900_ACC.
222 (match_vu0_suffix_operand): New function.
223 (match_operand): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX.
224 (macro): Use "+7" rather than "E" for LDQ2 and STQ2.
225 (mips_lookup_insn): New function.
226 (mips_ip): Use it. Allow "+K" operands to be elided at the end
227 of an instruction. Handle '#' sequences.
228
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2292013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
230
231 * config/tc-mips.c (macro, mips16_macro): Create an array of operand
232 values and use it instead of sreg, treg, xreg, etc.
233
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2342013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
235
236 * config/tc-mips.c (match_int_operand): Use mips_int_operand_min
237 and mips_int_operand_max.
238 (mips16_immed_operand, mips16_immed_operands, MIPS16_NUM_IMMED):
239 Delete.
240 (mips16_immed_operand, mips16_immed_in_range_p): New functions.
241 (mips16_immed, mips16_extended_frag): Use them. Use mips_int_operand
242 instead of mips16_immed_operand.
243
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2442013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
245
246 * config/tc-mips.c (mips16_macro): Don't use move_register.
247 (mips16_ip): Allow macros to use 'p'.
248
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2492013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
250
251 * config/tc-mips.c (MAX_OPERANDS): New macro.
252 (mips_operand_array): New structure.
253 (mips_operands, mips16_operands, micromips_operands): New arrays.
254 (micromips_to_32_reg_b_map, micromips_to_32_reg_c_map)
255 (micromips_to_32_reg_e_map, micromips_to_32_reg_f_map)
256 (micromips_to_32_reg_g_map, micromips_to_32_reg_l_map)
257 (micromips_to_32_reg_q_map): Delete.
258 (insn_operands, insn_opno, insn_extract_operand): New functions.
259 (validate_mips_insn): Take a mips_operand_array as argument and
260 use it to build up a list of operands. Extend to handle INSN_MACRO
261 and MIPS16.
262 (validate_mips16_insn): New function.
263 (validate_micromips_insn): Take a mips_operand_array as argument.
264 Handle INSN_MACRO.
265 (md_begin): Initialize mips_operands, mips16_operands and
266 micromips_operands. Call validate_mips_insn and
267 validate_micromips_insn for macro instructions too.
268 Call validate_mips16_insn for MIPS16 instructions.
269 (insn_read_mask, insn_write_mask, operand_reg_mask, insn_reg_mask):
270 New functions.
271 (gpr_read_mask, gpr_write_mask, fpr_read_mask, fpr_write_mask): Use
272 them. Handle INSN_UDI.
273 (get_append_method): Use gpr_read_mask.
274
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2752013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
276
277 * config/tc-mips.c (compact_branch_p, uncond_branch_p): Use the same
278 flags for MIPS16 and non-MIPS16 instructions.
279 (gpr_mod_mask): Move the INSN2_MOD_SP case outside the micromips block.
280 (gpr_read_mask): Use INSN2_READ_GPR_31 for MIPS16 instructions too.
281 (gpr_write_mask): Remove MIPS16_INSN_WRITE_SP handling.
282 (can_swap_branch_p, get_append_method): Use the same flags for MIPS16
283 and non-MIPS16 instructions. Fix formatting.
284
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2852013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
286
287 * config/tc-mips.c (reg_needs_delay): Move later in file.
288 Use gpr_write_mask.
289 (insns_between): Use gpr_read_mask instead of EXTRACT_OPERAND.
290
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2912013-07-26 Sergey Guriev <sergey.s.guriev@intel.com>
292 Alexander Ivchenko <alexander.ivchenko@intel.com>
293 Maxim Kuznetsov <maxim.kuznetsov@intel.com>
294 Sergey Lega <sergey.s.lega@intel.com>
295 Anna Tikhonova <anna.tikhonova@intel.com>
296 Ilya Tocar <ilya.tocar@intel.com>
297 Andrey Turetskiy <andrey.turetskiy@intel.com>
298 Ilya Verbin <ilya.verbin@intel.com>
299 Kirill Yukhin <kirill.yukhin@intel.com>
300 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
301
302 * config/tc-i386-intel.c (O_zmmword_ptr): New.
303 (i386_types): Add zmmword.
304 (i386_intel_simplify_register): Allow regzmm.
305 (i386_intel_simplify): Handle zmmwords.
306 (i386_intel_operand): Handle RC/SAE, vector operations and
307 zmmwords.
308 * config/tc-i386.c (ZMMWORD_MNEM_SUFFIX): New.
309 (struct RC_Operation): New.
310 (struct Mask_Operation): New.
311 (struct Broadcast_Operation): New.
312 (vex_prefix): Size of bytes increased to 4 to support EVEX
313 encoding.
314 (enum i386_error): Add new error codes: unsupported_broadcast,
315 broadcast_not_on_src_operand, broadcast_needed,
316 unsupported_masking, mask_not_on_destination, no_default_mask,
317 unsupported_rc_sae, rc_sae_operand_not_last_imm,
318 invalid_register_operand, try_vector_disp8.
319 (struct _i386_insn): Add new fields vrex, need_vrex, mask,
320 rounding, broadcast, memshift.
321 (struct RC_name): New.
322 (RC_NamesTable): New.
323 (evexlig): New.
324 (evexwig): New.
325 (extra_symbol_chars): Add '{'.
326 (cpu_arch): Add AVX512F, AVX512CD, AVX512ER and AVX512PF.
327 (i386_operand_type): Add regzmm, regmask and vec_disp8.
328 (match_mem_size): Handle zmmwords.
329 (operand_type_match): Handle zmm-registers.
330 (mode_from_disp_size): Handle vec_disp8.
331 (fits_in_vec_disp8): New.
332 (md_begin): Handle {} properly.
333 (type_names): Add "rZMM", "Mask reg" and "Vector d8".
334 (build_vex_prefix): Handle vrex.
335 (build_evex_prefix): New.
336 (process_immext): Adjust to properly handle EVEX.
337 (md_assemble): Add EVEX encoding support.
338 (swap_2_operands): Correctly handle operands with masking,
339 broadcasting or RC/SAE.
340 (check_VecOperands): Support EVEX features.
341 (VEX_check_operands): Properly handle 16 upper [xyz]mm registers.
342 (match_template): Support regzmm and handle new error codes.
343 (process_suffix): Handle zmmwords and zmm-registers.
344 (check_byte_reg): Extend to zmm-registers.
345 (process_operands): Extend to zmm-registers.
346 (build_modrm_byte): Handle EVEX.
347 (output_insn): Adjust to properly handle EVEX case.
348 (disp_size): Handle vec_disp8.
349 (output_disp): Support compressed disp8*N evex feature.
350 (output_imm): Handle RC/SAE immediates properly.
351 (check_VecOperations): New.
352 (i386_immediate): Handle EVEX features.
353 (i386_index_check): Handle zmmwords and zmm-registers.
354 (RC_SAE_immediate): New.
355 (i386_att_operand): Handle EVEX features.
356 (parse_real_register): Add a check for ZMM/Mask registers.
357 (OPTION_MEVEXLIG): New.
358 (OPTION_MEVEXWIG): New.
359 (md_longopts): Add mevexlig and mevexwig.
360 (md_parse_option): Handle mevexlig and mevexwig options.
361 (md_show_usage): Add description for mevexlig and mevexwig.
362 * doc/c-i386.texi: Document avx512f/.avx512f, avx512cd/.avx512cd,
363 avx512er/.avx512er, avx512pf/.avx512pf, mevexlig and mevexwig.
364
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3652013-07-25 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
366
367 * config/tc-i386.c (cpu_arch): Add .sha.
368 * doc/c-i386.texi: Document sha/.sha.
369
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3702013-07-24 Anna Tikhonova <anna.tikhonova@intel.com>
371 Kirill Yukhin <kirill.yukhin@intel.com>
372 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
373
374 * config/tc-i386.c (BND_PREFIX): New.
375 (struct _i386_insn): Add new field bnd_prefix.
376 (add_bnd_prefix): New.
377 (cpu_arch): Add MPX.
378 (i386_operand_type): Add regbnd.
379 (md_assemble): Handle BND prefixes.
380 (parse_insn): Likewise.
381 (output_branch): Likewise.
382 (output_jump): Likewise.
383 (build_modrm_byte): Handle regbnd.
384 (OPTION_MADD_BND_PREFIX): New.
385 (md_longopts): Add entry for 'madd-bnd-prefix'.
386 (md_parse_option): Handle madd-bnd-prefix option.
387 (md_show_usage): Add description for madd-bnd-prefix
388 option.
389 * doc/c-i386.texi: Document mpx/.mpx and -madd-bnd-prefix.
390
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3912013-07-24 Tristan Gingold <gingold@adacore.com>
392
393 * config/tc-ppc.c (md_apply_fix): Adjust BFD_RELOC_PPC_B16 on
394 xcoff targets.
395
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3962013-07-24 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
397
398 * config/tc-s390.c (s390_machine): Don't force the .machine
399 argument to lower case.
400
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4012013-07-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
402
403 * config/tc-arm.c (s_arm_arch_extension): Improve error message
404 for invalid extension.
405
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4062013-07-19 Yufeng Zhang <yufeng.zhang@arm.com>
407
408 * config/tc-aarch64.c (enum aarch64_abi_type): New enumeration tag.
409 (AARCH64_ABI_LP64, AARCH64_ABI_ILP32): New enumerators.
410 (aarch64_abi): New variable.
411 (ilp32_p): Change to be a macro.
412 (aarch64_opts): Remove the support for option -milp32 and -mlp64.
413 (struct aarch64_option_abi_value_table): New struct.
414 (aarch64_abis): New table.
415 (aarch64_parse_abi): New function.
416 (aarch64_long_opts): Add entry for -mabi=.
417 * doc/as.texinfo (Target AArch64 options): Document -mabi.
418 * doc/c-aarch64.texi: Likewise.
419
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4202013-07-18 Jim Thomas <thomas@cfht.hawaii.edu>
421
422 * config/tc-i386-intel.c (i386_intel_operand): Fixed signed vs
423 unsigned comparison.
424
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4252013-07-18 Sandeep Kumar Singh <Sandeep.Singh2@kpitcummins.com>
426
cbe02d4f 427 * config/rx-defs.h: Add macros for RX100, RX200, RX600, and
f0c00282 428 RX610.
cbe02d4f 429 * config/rx-parse.y: (rx_check_float_support): Add function to
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430 check floating point operation support for target RX100 and
431 RX200.
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432 * config/tc-rx.c: Add CPU options RX100, RX200, RX600, and RX610.
433 * doc/c-rx.texi: Add -mcpu option to recognize macros for RX100,
434 RX200, RX600, and RX610
f0c00282 435
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4362013-07-18 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
437
438 * config/tc-avr.c (md_show_usage): Add avrxmega2 to help text
439
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4402013-07-18 Vishnu K.S <vishnu.k_s@atmel.com>
441
442 * config/tc-avr.c: Make ata6289's ISA to AVR_ISA_AVR4.
443 * doc/c-avr.texi: Likewise.
444
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4452013-07-15 Richard Sandiford <rdsandiford@googlemail.com>
446
447 * config/tc-mips.c (match_save_restore_list_operand): Avoid -Wformat
448 error with older GCCs.
449 (mips16_macro_build): Dereference args.
450
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4512013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
452
453 * config/tc-mips.c (mips_prefer_vec_regno, mips_parse_register):
454 New functions, split out from...
455 (reg_lookup): ...here. Remove itbl support.
456 (reglist_lookup): Delete.
457 (mips_operand_token_type): New enum.
458 (mips_operand_token): New structure.
459 (mips_operand_tokens): New variable.
460 (mips_add_token, mips_parse_base_start, mips_parse_argument_token)
461 (mips_parse_arguments): New functions.
462 (md_begin): Initialize mips_operand_tokens.
463 (mips_arg_info): Add a token field. Remove optional_reg field.
464 (match_char, match_expression): New functions.
465 (match_const_int): Use match_expression. Remove "s" argument
466 and return a boolean result. Remove O_register handling.
467 (match_regno, match_reg, match_reg_range): New functions.
468 (match_int_operand, match_mapped_int_operand, match_msb_operand)
469 (match_reg_operand, match_reg_pair_operand, match_perf_reg_operand)
470 (match_addiusp_operand, match_clo_clz_dest_operand)
471 (match_lwm_swm_list_operand, match_entry_exit_operand)
472 (match_save_restore_list_operand, match_mdmx_imm_reg_operand)
473 (match_tied_reg_operand): Remove "s" argument and return a boolean
474 result. Match tokens rather than text. Update calls to
475 match_const_int. Rely on match_regno to call check_regno.
476 (match_pcrel_operand, match_pc_operand): Replace "s" argument with
477 "arg" argument. Return a boolean result.
478 (parse_float_constant): Replace with...
479 (match_float_constant): ...this new function.
480 (match_operand): Remove "s" argument and return a boolean result.
481 Update calls to subfunctions.
482 (mips_ip, mips16_ip): Call mips_parse_arguments. Use match routines
483 rather than string-parsing routines. Update handling of optional
484 registers for token scheme.
485
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4862013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
487
488 * config/tc-mips.c (parse_float_constant): Split out from...
489 (mips_ip): ...here.
490
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RS
4912013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
492
493 * config/tc-mips.c (INSERT_BITS, INSERT_OPERAND, MIPS16_INSERT_OPERAND):
494 Delete.
495
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RS
4962013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
497
498 * config/tc-mips.c (mips32_to_16_reg_map): Delete.
499 (match_entry_exit_operand): New function.
500 (match_save_restore_list_operand): Likewise.
501 (match_operand): Use them.
502 (check_absolute_expr): Delete.
503 (mips16_ip): Rewrite main parsing loop to use mips_operands.
504
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RS
5052013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
506
507 * config/tc-mips.c: Enable functions commented out in previous patch.
508 (SKIP_SPACE_TABS): Move further up file.
509 (mips32_to_micromips_reg_b_map, mips32_to_micromips_reg_c_map)
510 (mips32_to_micromips_reg_d_map, mips32_to_micromips_reg_e_map)
511 (ips32_to_micromips_reg_f_map, mips32_to_micromips_reg_g_map)
512 (mips32_to_micromips_reg_l_map, mips32_to_micromips_reg_m_map)
513 (mips32_to_micromips_reg_q_map, mips32_to_micromips_reg_n_map)
514 (micromips_imm_b_map, micromips_imm_c_map): Delete.
515 (mips_lookup_reg_pair): Delete.
516 (macro): Use report_bad_range and report_bad_field.
517 (mips_immed, expr_const_in_range): Delete.
518 (mips_ip): Rewrite main parsing loop to use new functions.
519
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RS
5202013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
521
522 * config/tc-mips.c (mips_oddfpreg_ok): Move further up file.
523 Change return type to bfd_boolean.
524 (report_bad_range, report_bad_field): New functions.
525 (mips_arg_info): New structure.
526 (match_const_int, convert_reg_type, check_regno, match_int_operand)
527 (match_mapped_int_operand, match_msb_operand, match_reg_operand)
528 (match_reg_pair_operand, match_pcrel_operand, match_perf_reg_operand)
529 (match_addiusp_operand, match_clo_clz_dest_operand)
530 (match_lwm_swm_list_operand, match_mdmx_imm_reg_operand)
531 (match_pc_operand, match_tied_reg_operand, match_operand)
532 (check_completed_insn): New functions, commented out for now.
533
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RS
5342013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
535
536 * config/tc-mips.c (insn_insert_operand): New function.
537 (macro_build, mips16_macro_build): Put null character check
538 in the for loop and convert continues to breaks. Use operand
539 structures to handle constant operands.
540
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5412013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
542
543 * config/tc-mips.c (validate_mips_insn): Move further up file.
544 Add insn_bits and decode_operand arguments. Use the mips_operand
545 fields to work out which bits an operand occupies. Detect double
546 definitions.
547 (validate_micromips_insn): Move further up file. Call into
548 validate_mips_insn.
549
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5502013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
551
552 * config/tc-mips.c (mips16_macro_build): Remove 'Y' case.
553
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RS
5542013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
555
556 * config/tc-mips.c (macro_build): Take an int for "C", "k", "\\"
557 and "~".
558 (macro): Update accordingly.
559
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RS
5602013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
561
562 * config/tc-mips.c (imm_expr, imm2_expr, offset_expr): Tweak commentary.
563 (imm_reloc): Delete.
564 (md_assemble): Remove imm_reloc handling.
565 (mips_ip): Update commentary. Use offset_expr and offset_reloc
566 rather than imm_expr and imm_reloc for 'i', 'j' and 'u'.
567 Use a temporary array rather than imm_reloc when parsing
568 constant expressions. Remove imm_reloc initialization.
569 (mips16_ip): Update commentary. Use offset_expr and offset_reloc
570 for the relaxable field. Use a relax_char variable to track the
571 type of this field. Remove imm_reloc initialization.
572
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5732013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
574
575 * config/tc-mips.c (mips16_ip): Handle "I".
576
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MR
5772013-07-12 Maciej W. Rozycki <macro@codesourcery.com>
578
579 * config/tc-mips.c (mips_flag_nan2008): New variable.
580 (options): Add OPTION_NAN enum value.
581 (md_longopts): Handle it.
582 (md_parse_option): Likewise.
583 (s_nan): New function.
584 (mips_elf_final_processing): Handle EF_MIPS_NAN2008.
585 (md_show_usage): Add -mnan.
586
587 * doc/as.texinfo (Overview): Add -mnan.
588 * doc/c-mips.texi (MIPS Opts): Document -mnan.
589 (MIPS NaN Encodings): New node. Document .nan directive.
590 (MIPS-Dependent): List the new node.
591
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TG
5922013-07-09 Tristan Gingold <gingold@adacore.com>
593
594 * configure.com: Define HAVE_SYS_TYPES_H and HAVE_UNISTD_H
595
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RS
5962013-07-08 Richard Sandiford <rdsandiford@googlemail.com>
597
598 * config/tc-mips.c (mips_ip): Unconditionally parse an expression
599 for 'A' and assume that the constant has been elided if the result
600 is an O_register.
601
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RS
6022013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
603
604 * config/tc-mips.c (gprel16_reloc_p): New function.
605 (macro_read_relocs): Assume BFD_RELOC_LO16 if all relocs are
606 BFD_RELOC_UNUSED.
607 (offset_high_part, small_offset_p): New functions.
608 (nacro): Use them. Remove *_OB and *_DOB cases. For single-
609 register load and store macros, handle the 16-bit offset case first.
610 If a 16-bit offset is not suitable for the instruction we're
611 generating, load it into the temporary register using
612 ADDRESS_ADDI_INSN. Make the M_LI_DD code fall through into the
613 M_L_DAB code once the address has been constructed. For double load
614 and store macros, again handle the 16-bit offset case first.
615 If the second register cannot be accessed from the same high
616 part as the first, load it into AT using ADDRESS_ADDI_INSN.
617 Fix the handling of LD in cases where the first register is the
618 same as the base. Also handle the case where the offset is
619 not 16 bits and the second register cannot be accessed from the
620 same high part as the first. For unaligned loads and stores,
621 fuse the offbits == 12 and old "ab" handling. Apply this handling
622 whenever the second offset needs a different high part from the first.
623 Construct the offset using ADDRESS_ADDI_INSN where possible,
624 for offbits == 16 as well as offbits == 12. Use offset_reloc
625 when constructing the individual loads and stores.
626 (mips_ip): Set up imm_expr, imm2_expr, offset_expr, imm_reloc
627 and offset_reloc before matching against a particular opcode.
628 Handle elided 'A' constants. Allow 'A' constants to use
629 relocation operators.
630
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RS
6312013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
632
633 * config/tc-mips.c (validate_mips_insn): Remove "[" and "]" handling.
634 (mips_ip): Likewise. Do not set is_mdmx for INSN_5400 instructions.
635 Check constraints on the VR5400 RZU.OB, SLL.OB and SRL.OB instructions.
636
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RS
6372013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
638
639 * config/tc-mips.c (mips_ip): Preserve the real bit number for "+p".
640 Require the msb to be <= 31 for "+s". Check that the size is <= 31
641 for both "+s" and "+S".
642
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RS
6432013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
644
645 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn):
646 (mips_ip, mips16_ip): Handle "+i".
647
e76ff5ab
RS
6482013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
649
650 * config/tc-mips.c (mips32_to_micromips_reg_h_map): Delete.
651 (micromips_to_32_reg_h_map): Rename to...
652 (micromips_to_32_reg_h_map1): ...this.
653 (micromips_to_32_reg_i_map): Rename to...
654 (micromips_to_32_reg_h_map2): ...this.
655 (mips_lookup_reg_pair): New function.
656 (gpr_write_mask, macro): Adjust after above renaming.
657 (validate_micromips_insn): Remove "mi" handling.
658 (mips_ip): Likewise. Parse both registers in a pair for "mh".
659
fa7616a4
RS
6602013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
661
662 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn)
663 (mips_ip): Remove "+D" and "+T" handling.
664
fb798c50
AK
6652013-07-05 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
666
667 * config/tc-s390.c (md_gather_operands, md_apply_fix): Support new
668 relocs.
669
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MS
6702013-07-03 Marcus Shawcroft <marcus.shawcroft@arm.com>
671
4aa2c5e2
MS
672 * config/tc-aarch64.c (reloc_table): Merge got_prel19 into got.
673
6742013-07-02 Marcus Shawcroft <marcus.shawcroft@arm.com>
675
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MS
676 * config/tc-aarch64.c (md_apply_fix): Reorder case values.
677 (aarch64_force_relocation): Likewise.
678
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AM
6792013-07-02 Alan Modra <amodra@gmail.com>
680
681 * config/tc-ppc.c (ppc_elf_adjust_symtab): Don't make .TOC. weak.
682
81566a9b
MR
6832013-06-26 Maciej W. Rozycki <macro@codesourcery.com>
684
685 * doc/as.texinfo (Overview): Remove @samp from MIPS ISA names.
686 * doc/c-mips.texi (MIPS Options): Remove @sc from MIPS ISA names.
687 Replace @sc{mips16} with literal `MIPS16'.
688 (MIPS ISA): Replace @sc{mips3} with literal `MIPS III'.
689
a6bb11b2
YZ
6902013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
691
692 * config/tc-aarch64.c (reloc_table): Replace
693 BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with
694 BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to
695 BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and
696 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC.
697 (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC,
698 BFD_RELOC_AARCH64_LD32_GOT_LO12_NC,
699 BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC,
700 BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC,
701 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and
702 BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC.
703 (aarch64_force_relocation): Likewise.
704
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YZ
7052013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
706
707 * config/tc-aarch64.c (ilp32_p): New static variable.
708 (elf64_aarch64_target_format): Return the target according to the
709 value of 'ilp32_p'.
710 (md_begin): Determine 'mach' according to the value of 'ilp32_p'.
711 (aarch64_opts): Add support for options '-milp32' and '-mlp64'.
712 (aarch64_dwarf2_addr_size): New function.
713 * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration.
714 (DWARF2_ADDR_SIZE): New define.
715
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7162013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
717
718 * doc/c-mips.texi: Use ISA instead of @sc{isa}.
719
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RS
7202013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
721
722 * config/tc-mips.c (validate_mips_insn): Use STYPE rather than SHAMT.
723
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MR
7242013-06-25 Maciej W. Rozycki <macro@codesourcery.com>
725
726 * config/tc-mips.c (mips_set_options): Add insn32 member.
727 (mips_opts): Initialize it.
728 (NOP_INSN, NOP_INSN_SIZE): Handle insn32 mode.
729 (options): Add OPTION_INSN32 and OPTION_NO_INSN32 enum values.
730 (md_longopts): Add "minsn32" and "mno-insn32" options.
731 (is_size_valid): Handle insn32 mode.
732 (md_assemble): Pass instruction string down to macro.
733 (brk_fmt): Add second dimension and insn32 mode initializers.
734 (mfhl_fmt): Likewise.
735 (BRK_FMT, MFHL_FMT): Handle insn32 mode.
736 (macro_build) <'c'>: Handle microMIPS 32-bit BREAK encoding.
737 (macro_build_jalr, move_register): Handle insn32 mode.
738 (macro_build_branch_rs): Likewise.
739 (macro): Handle insn32 mode.
740 <M_JRADDIUSP>, <M_JRC>, <M_MOVEP>: New cases.
741 (mips_ip): Handle insn32 mode.
742 (md_parse_option): Handle OPTION_INSN32 and OPTION_NO_INSN32.
743 (s_mipsset): Handle "insn32" and "noinsn32" pseudo-ops.
744 (mips_handle_align): Handle insn32 mode.
745 (md_show_usage): Add -minsn32 and -mno-insn32.
746
747 * doc/as.texinfo (Target MIPS options): Add -minsn32 and
748 -mno-insn32 options.
749 (-minsn32, -mno-insn32): New options.
750 * doc/c-mips.texi (MIPS Opts): Add -minsn32 and -mno-insn32
751 options.
752 (MIPS assembly options): New node. Document .set insn32 and
753 .set noinsn32.
754 (MIPS-Dependent): List the new node.
755
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NC
7562013-06-25 Nick Clifton <nickc@redhat.com>
757
758 * config/tc-msp430.c (msp430_srcoperand): Do not allow the use of
759 the PC in indirect addressing on 430xv2 parts.
760 (msp430_operands): Add version test to hardware bug encoding
761 restrictions.
762
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RM
7632013-06-24 Roland McGrath <mcgrathr@google.com>
764
d996d970
RM
765 * config/tc-arm.c (parse_reg_list): Use skip_past_char for '}',
766 so it skips whitespace before it.
767 (s_arm_unwind_save_mmxwr, s_arm_unwind_save_mmxwcg): Likewise.
768
477330fc
RM
769 * config/tc-arm.c (arm_symbol_chars): Include '{' and '}'.
770 (arm_reg_parse_multi): Skip whitespace first.
771 (parse_reg_list): Likewise.
772 (parse_vfp_reg_list): Likewise.
773 (s_arm_unwind_save_mmxwcg): Likewise.
774
24382199
NC
7752013-06-24 Nick Clifton <nickc@redhat.com>
776
777 PR gas/15623
778 * config/tc-arm.c (do_t_smc): Mark as ending an IT block.
779
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RS
7802013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
781
782 * config/tc-mips.c (mips_ip): Fix swapped bit numbers in comments.
783
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RS
7842013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
785
786 * config/tc-mips.c: Assert that offsetT and valueT are at least
787 8 bytes in size.
788 (GPR_SMIN, GPR_SMAX): New macros.
789 (macro, mips_ip): Remove code for 4-byte valueT and offsetT.
790
f3ded42a
RS
7912013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
792
793 * config/tc-mips.c: Remove OBJ_ELF, OBJ_MAYBE_ELF and IS_ELF
794 conditions. Remove any code deselected by them.
795 (s_mips_frame, s_mips_mask): Handle ECOFF_DEBUGGING case first.
796
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RS
7972013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
798
799 * NEWS: Note removal of ECOFF support.
800 * doc/as.texinfo (--emulation): Update for the removal of MIPS ECOFF.
801 * Makefile.am (TARG_ENV_HFILES): Remove config/te-lnews.h.
802 (MULTI_CFILES): Remove config/e-mipsecoff.c.
803 * Makefile.in: Regenerate.
804 * configure.in: Remove MIPS ECOFF references.
805 (mips-sony-bsd*, mips-*-bsd*, mips-*-lnews*-ecoff, mips-*-*-ecoff):
806 Delete cases.
807 (mips-*-irix5*-*, mips*-*-linux*-*, mips*-*-freebsd*)
808 (mips*-*-kfreebsd*-gnu, mips-*-*-elf): Fold into...
809 (mips-*-*): ...this single case.
810 (mipsbecoff, mipslecoff, mipsecoff): Remove emulations. Expect
811 MIPS emulations to be e-mipself*.
812 * configure: Regenerate.
813 * configure.tgt (mips-sony-bsd*, mips-*-ultrix*, mips-*-osf*)
814 (mips-*-ecoff*, mips-*-pe*, mips-*-irix*, ips-*-lnews*, mips-*-riscos*)
815 (mips-*-sysv*): Remove coff and ecoff cases.
816 * as.c (mipsbecoff, mipslecoff, mipsecoff): Remove.
817 * ecoff.c: Remove reference to MIPS ECOFF.
818 * config/e-mipsecoff.c, config/te-lnews.h: Delete files.
819 * config/tc-mips.c (ECOFF_LITTLE_FORMAT): Delete.
820 (RDATA_SECTION_NAME, mips_target_form): Remove COFF and ECOFF cases.
821 (mips_hi_fixup): Tweak comment.
822 (append_insn): Require a howto.
823 (mips_after_parse_args): Remove OBJ_MAYBE_ECOFF code.
824
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RS
8252013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
826
827 * doc/as.texinfo: Use MIPS rather than @sc{mips} throughout.
828 Use "CPU" instead of "cpu".
829 * doc/c-mips.texi: Likewise.
830 (MIPS Opts): Rename to MIPS Options.
831 (MIPS option stack): Rename to MIPS Option Stack.
832 (MIPS ASE instruction generation overrides): Rename to
833 MIPS ASE Instruction Generation Overrides (for now).
834 (MIPS floating-point): Rename to MIPS Floating-Point.
835
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RS
8362013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
837
838 * doc/c-mips.texi (MIPS Macros): New section.
839 (MIPS Object): Replace with...
840 (MIPS Small Data): ...this new section.
841
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RS
8422013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
843
844 * doc/c-mips.texi (MIPS symbol sizes): Move section further up file.
845 Capitalize name. Use @kindex instead of @cindex for .set entries.
846
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RS
8472013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
848
849 * doc/c-mips.texi (MIPS Stabs): Remove section.
850
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RS
8512013-06-20 Richard Sandiford <rdsandiford@googlemail.com>
852
853 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS, ISA_SUPPORTS_DSP_ASE)
854 (ISA_SUPPORTS_DSP64_ASE, ISA_SUPPORTS_DSPR2_ASE, ISA_SUPPORTS_EVA_ASE)
855 (ISA_SUPPORTS_MT_ASE, ISA_SUPPORTS_MCU_ASE, ISA_SUPPORTS_VIRT_ASE)
856 (ISA_SUPPORTS_VIRT64_ASE): Delete.
857 (mips_ase): New structure.
858 (mips_ases): New table.
859 (FP64_ASES): New macro.
860 (mips_ase_groups): New array.
861 (mips_isa_rev, mips_ase_mask, mips_check_isa_supports_ase)
862 (mips_check_isa_supports_ases, mips_set_ase, mips_lookup_ase): New
863 functions.
864 (is_opcode_valid): Use mips_ases to get the 64-bit ASE flags.
865 (md_parse_option): Use mips_ases and mips_set_ase instead of
866 separate case statements for each ASE option.
867 (mips_after_parse_args): Use FP64_ASES. Use
868 mips_check_isa_supports_ases to check the ASEs against
869 other options.
870 (s_mipsset): Use mips_ases and mips_set_ase instead of
871 separate if statements for each ASE option. Use
872 mips_check_isa_supports_ases, even when a non-ASE option
873 is specified.
874
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KT
8752013-06-19 Greta Yorsh <Greta.Yorsh@arm.com>
876
877 * config/tc-arm.c (arm_cpus): Add support for Cortex-A12.
878
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RS
8792013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
880
881 * config/tc-mips.c (md_shortopts, options, md_longopts)
882 (md_longopts_size): Move earlier in file.
883
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RS
8842013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
885
886 * config/tc-mips.c (mips_set_options): Replace separate "ase_*" fields
887 with a single "ase" bitmask.
888 (mips_opts): Update accordingly.
889 (file_ase, file_ase_explicit): New variables.
890 (file_ase_mips3d, file_ase_mdmx, file_ase_smartmips, file_ase_dsp)
891 (file_ase_dspr2, file_ase_eva, file_ase_mt, file_ase_virt): Delete.
892 (ISA_HAS_ROR): Adjust for mips_set_options change.
893 (is_opcode_valid): Take the base ase mask directly from mips_opts.
894 (mips_ip): Adjust for mips_set_options change.
895 (md_parse_option): Likewise. Update file_ase_explicit.
896 (mips_after_parse_args): Adjust for mips_set_options change.
897 Use bitmask operations to select the default ASEs. Set file_ase
898 rather than individual per-ASE variables.
899 (s_mipsset): Adjust for mips_set_options change.
900 (mips_elf_final_processing): Test file_ase rather than
901 file_ase_mdmx. Remove commented-out code.
902
d16afab6
RS
9032013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
904
905 * config/tc-mips.c (mips_cpu_info): Add an "ase" field.
906 (MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, MIPS_CPU_ASE_MT)
907 (MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX, MIPS_CPU_ASE_DSPR2)
908 (MIPS_CPU_ASE_MCU, MIPS_CPU_ASE_VIRT, MIPS_CPU_ASE_EVA): Delete.
909 (mips_after_parse_args): Use the new "ase" field to choose
910 the default ASEs.
911 (mips_cpu_info_table): Move ASEs from the "flags" field to the
912 "ase" field.
913
e83a675f
RE
9142013-06-18 Richard Earnshaw <rearnsha@arm.com>
915
916 * config/tc-arm.c (symbol_preemptible): New function.
917 (relax_branch): Use it.
918
7f3c4072
CM
9192013-06-17 Catherine Moore <clm@codesourcery.com>
920 Maciej W. Rozycki <macro@codesourcery.com>
921 Chao-Ying Fu <fu@mips.com>
922
923 * config/tc-mips.c (mips_set_options): Add ase_eva.
924 (mips_set_options mips_opts): Add ase_eva.
925 (file_ase_eva): Declare.
926 (ISA_SUPPORTS_EVA_ASE): Define.
927 (IS_SEXT_9BIT_NUM): Define.
928 (MIPS_CPU_ASE_EVA): Define.
929 (is_opcode_valid): Add support for ase_eva.
930 (macro_build): Likewise.
931 (macro): Likewise.
932 (validate_mips_insn): Likewise.
933 (validate_micromips_insn): Likewise.
934 (mips_ip): Likewise.
935 (options): Add OPTION_EVA and OPTION_NO_EVA.
936 (md_longopts): Add -meva and -mno-eva.
937 (md_parse_option): Process new options.
938 (mips_after_parse_args): Check for valid EVA combinations.
939 (s_mipsset): Likewise.
940
e410add4
RS
9412013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
942
943 * dwarf2dbg.h (dwarf2_move_insn): Declare.
944 * dwarf2dbg.c (line_subseg): Add pmove_tail.
945 (get_line_subseg): Add create_p argument. Initialize pmove_tail.
946 (dwarf2_gen_line_info_1): Update call accordingly.
947 (dwarf2_move_insn): New function.
948 * config/tc-mips.c (append_insn): Use dwarf2_move_insn.
949
6a50d470
RS
9502013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
951
952 Revert:
953
954 2011-09-05 Richard Sandiford <rdsandiford@googlemail.com>
955
956 PR gas/13024
957 * dwarf2dbg.c (pending_lines, pending_lines_tail): New variables.
958 (dwarf2_gen_line_info_1): Delete.
959 (dwarf2_push_line, dwarf2_flush_pending_lines): New functions.
960 (dwarf2_gen_line_info, dwarf2_emit_label): Use them.
961 (dwarf2_consume_line_info): Call dwarf2_flush_pending_lines.
962 (dwarf2_directive_loc): Push previous .locs instead of generating
963 them immediately.
964
f122319e
CF
9652013-06-13 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
966
967 * config/tc-mips.c (ISA_SUPPORTS_VIRT_ASE): Support micromips.
968 (ISA_SUPPORTS_VIRT64_ASE): Support 64-bit micromips.
969
909c7f9c
NC
9702013-06-13 Nick Clifton <nickc@redhat.com>
971
972 PR gas/15602
973 * config/tc-m68k.h (TC_CHECK_ADJUSTED_BROKEN_DOT_WORD): Define.
974 * config/tc-m68k.c (tc_m68k_check_adjusted_broken_word): New
975 function. Generates an error if the adjusted offset is out of a
976 16-bit range.
977
5d5755a7
SL
9782013-06-12 Sandra Loosemore <sandra@codesourcery.com>
979
980 * config/tc-nios2.c (md_apply_fix): Mask constant
981 BFD_RELOC_NIOS2_HIADJ16 value to 16 bits.
982
3bf0dbfb
MR
9832013-06-10 Maciej W. Rozycki <macro@codesourcery.com>
984
985 * config/tc-mips.c (append_insn): Don't do branch relaxation for
986 MIPS-3D instructions either.
987 (md_convert_frag): Update the COPx branch mask accordingly.
988
989 * config/tc-mips.c (md_show_usage): Document --[no-]relax-branch
990 option.
991 * doc/as.texinfo (Overview): Add --relax-branch and
992 --no-relax-branch.
993 * doc/c-mips.texi (MIPS Opts): Document --relax-branch and
994 --no-relax-branch.
995
9daf7bab
SL
9962013-06-09 Sandra Loosemore <sandra@codesourcery.com>
997
998 * config/tc-nios2.c (nios2_parse_args): Allow trap argument to
999 omitted.
1000
d301a56b
RS
10012013-06-08 Catherine Moore <clm@codesourcery.com>
1002
1003 * config/tc-mips.c (is_opcode_valid): Build ASE mask.
1004 (is_opcode_valid_16): Pass ase value to opcode_is_member.
1005 (append_insn): Change INSN_xxxx to ASE_xxxx.
1006
7bab7634
DC
10072013-06-01 George Thomas <george.thomas@atmel.com>
1008
cbe02d4f 1009 * gas/config/tc-avr.c: Change ISA for devices with USB support to
7bab7634
DC
1010 AVR_ISA_XMEGAU
1011
f60cf82f
L
10122013-05-31 H.J. Lu <hongjiu.lu@intel.com>
1013
1014 * config/tc-i386.c (md_begin): Don't align text/data/bss sections
1015 for ELF.
1016
a3f278e2
CM
10172013-05-31 Paul Brook <paul@codesourcery.com>
1018
a3f278e2
CM
1019 * config/tc-mips.c (s_ehword): New.
1020
067ec077
CM
10212013-05-30 Paul Brook <paul@codesourcery.com>
1022
1023 * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH.
1024
d6101ac2
MR
10252013-05-29 Maciej W. Rozycki <macro@codesourcery.com>
1026
1027 * write.c (resolve_reloc_expr_symbols): On REL targets don't
1028 convert relocs who have no relocatable field either. Rephrase
1029 the conditional so that the PC-relative check is only applied
1030 for REL targets.
1031
f19ccbda
MR
10322013-05-28 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1033
1034 * config/tc-mips.c (macro) <ld>: Don't use $zero for address
1035 calculation.
1036
418009c2
YZ
10372013-05-28 Yufeng Zhang <yufeng.zhang@arm.com>
1038
1039 * config/tc-aarch64.c (reloc_table): Update to use
477330fc 1040 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of
418009c2
YZ
1041 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE.
1042 (md_apply_fix): Likewise.
1043 (aarch64_force_relocation): Likewise.
1044
0a8897c7
KT
10452013-05-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1046
1047 * config/tc-arm.c (it_fsm_post_encode): Improve
1048 warning messages about deprecated IT block formats.
1049
89d2a2a3
MS
10502013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com>
1051
1052 * config/tc-aarch64.c (md_apply_fix): Move value range checking
1053 inside fx_done condition.
1054
c77c0862
RS
10552013-05-22 Jürgen Urban <JuergenUrban@gmx.de>
1056
1057 * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB.
1058
c0637f3a
PB
10592013-05-20 Peter Bergner <bergner@vnet.ibm.com>
1060
1061 * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error
1062 and clean up warning when using PRINT_OPCODE_TABLE.
1063
5656a981
AM
10642013-05-20 Alan Modra <amodra@gmail.com>
1065
1066 * config/tc-ppc.c (md_apply_fix): Hoist code common to insn
1067 and data fixups performing shift/high adjust/sign extension on
1068 fieldval. Sink fx_pcrel handling and checks. Use fixP->fx_size
1069 when writing data fixups rather than recalculating size.
1070
997b26e8
JBG
10712013-05-16 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1072
1073 * doc/c-msp430.texi: Fix typo.
1074
9f6e76f4
TG
10752013-05-16 Tristan Gingold <gingold@adacore.com>
1076
1077 * config/tc-ppc.c (ppc_is_toc_sym): Symbols of class XMC_TC
1078 are also TOC symbols.
1079
638d3803
NC
10802013-05-16 Nick Clifton <nickc@redhat.com>
1081
1082 * config/tc-msp430.c: Make -mmcu recognise more part numbers.
1083 Add -mcpu command to specify core type.
997b26e8 1084 * doc/c-msp430.texi: Update documentation.
638d3803 1085
b015e599
AP
10862013-05-09 Andrew Pinski <apinski@cavium.com>
1087
1088 * config/tc-mips.c (struct mips_set_options): New ase_virt field.
1089 (mips_opts): Update for the new field.
1090 (file_ase_virt): New variable.
1091 (ISA_SUPPORTS_VIRT_ASE): New macro.
1092 (ISA_SUPPORTS_VIRT64_ASE): New macro.
1093 (MIPS_CPU_ASE_VIRT): New define.
1094 (is_opcode_valid): Handle ase_virt.
1095 (macro_build): Handle "+J".
1096 (validate_mips_insn): Likewise.
1097 (mips_ip): Likewise.
1098 (enum options): Add OPTION_VIRT and OPTION_NO_VIRT.
1099 (md_longopts): Add mvirt and mnovirt
1100 (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT.
1101 (mips_after_parse_args): Handle ase_virt field.
1102 (s_mipsset): Handle "virt" and "novirt".
1103 (mips_elf_final_processing): Add a comment about virt ASE might need
1104 a new flag.
1105 (md_show_usage): Print out the usage of -mvirt and mno-virt options.
1106 * doc/c-mips.texi: Document -mvirt and -mno-virt.
1107 Document ".set virt" and ".set novirt".
1108
da8094d7
AM
11092013-05-09 Alan Modra <amodra@gmail.com>
1110
1111 * config/tc-ppc.c (md_apply_fix): Sign extend fieldval under
1112 control of operand flag bits.
1113
c5f8c205
AM
11142013-05-07 Alan Modra <amodra@gmail.com>
1115
1116 * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro.
1117 (PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise.
1118 (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise.
1119 (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise.
1120 (md_apply_fix): Set fx_no_overflow for assorted relocations.
1121 Shift and sign-extend fieldval for use by some VLE reloc
1122 operand->insert functions.
1123
b47468a6
CM
11242013-05-06 Paul Brook <paul@codesourcery.com>
1125 Catherine Moore <clm@codesourcery.com>
1126
c5f8c205
AM
1127 * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL.
1128 (limited_pcrel_reloc_p): Likewise.
b47468a6
CM
1129 (md_apply_fix): Likewise.
1130 (tc_gen_reloc): Likewise.
1131
2de39019
CM
11322013-05-06 Richard Sandiford <rdsandiford@googlemail.com>
1133
1134 * config/tc-mips.c (limited_pcrel_reloc_p): New function.
1135 (mips_fix_adjustable): Adjust pc-relative check to use
1136 limited_pc_reloc_p.
1137
754e2bb9
RS
11382013-05-02 Richard Sandiford <rdsandiford@googlemail.com>
1139
1140 * config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries.
1141 (s_mips_stab): Do not restrict to stabn only.
1142
13761a11
NC
11432013-05-02 Nick Clifton <nickc@redhat.com>
1144
1145 * config/tc-msp430.c: Add support for the MSP430X architecture.
1146 Add code to insert a NOP instruction after any instruction that
1147 might change the interrupt state.
1148 Add support for the LARGE memory model.
1149 Add code to initialise the .MSP430.attributes section.
1150 * config/tc-msp430.h: Add support for the MSP430X architecture.
1151 * doc/c-msp430.texi: Document the new -mL and -mN command line
1152 options.
1153 * NEWS: Mention support for the MSP430X architecture.
1154
df26367c
MR
11552013-05-01 Maciej W. Rozycki <macro@codesourcery.com>
1156
1157 * configure.tgt: Replace alpha*-*-linuxecoff* pattern with
1158 alpha*-*-linux*ecoff*.
1159
f02d8318
CF
11602013-04-30 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1161
1162 * config/tc-mips.c (mips_ip): Add sizelo.
1163 For "+C", "+G", and "+H", set sizelo and compare against it.
1164
b40bf0a2
NC
11652013-04-29 Nick Clifton <nickc@redhat.com>
1166
1167 * as.c (Options): Add -gdwarf-sections.
1168 (parse_args): Likewise.
1169 * as.h (flag_dwarf_sections): Declare.
1170 * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes.
1171 (process_entries): When -gdwarf-sections is enabled generate
1172 fragmentary .debug_line sections.
1173 (out_debug_line): Set the section for the .debug_line section end
1174 symbol.
1175 * doc/as.texinfo: Document -gdwarf-sections.
1176 * NEWS: Mention -gdwarf-sections.
1177
8eeccb77 11782013-04-26 Christian Groessler <chris@groessler.org>
00a3147e
CG
1179
1180 * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdline
1181 according to the target parameter. Don't call s_segm since s_segm
1182 calls bfd_set_arch_mach using stdoutput, but stdoutput isn't
1183 initialized yet.
1184 (md_begin): Call s_segm according to target parameter from command
1185 line.
1186
49926cd0
AM
11872013-04-25 Alan Modra <amodra@gmail.com>
1188
1189 * configure.in: Allow little-endian linux.
1190 * configure: Regenerate.
1191
e3031850
SL
11922013-04-24 Sandra Loosemore <sandra@codesourcery.com>
1193
1194 * config/tc-nios2.c (nios2_control_register_arg_p): Rename
1195 "fstatus" control register to "eccinj".
1196
cb948fc0
KT
11972013-04-19 Kai Tietz <ktietz@redhat.com>
1198
1199 * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin.
1200
4455e9ad
JB
12012013-04-15 Julian Brown <julian@codesourcery.com>
1202
1203 * expr.c (add_to_result, subtract_from_result): Make global.
1204 * expr.h (add_to_result, subtract_from_result): Add prototypes.
1205 * config/tc-sh.c (sh_optimize_expr): Use add_to_result,
1206 subtract_from_result to handle extra bit of precision for .sleb128
1207 directive operands.
1208
956a6ba3
JB
12092013-04-10 Julian Brown <julian@codesourcery.com>
1210
1211 * read.c (convert_to_bignum): Add sign parameter. Use it
1212 instead of X_unsigned to determine sign of resulting bignum.
1213 (emit_expr): Pass extra argument to convert_to_bignum.
1214 (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass
1215 X_extrabit to convert_to_bignum.
1216 (parse_bitfield_cons): Set X_extrabit.
1217 * expr.c (make_expr_symbol, expr_build_uconstant, operand):
1218 Initialise X_extrabit field as appropriate.
1219 (add_to_result): New.
1220 (subtract_from_result): New.
1221 (expr): Use above.
1222 * expr.h (expressionS): Add X_extrabit field.
1223
eb9f3f00
JB
12242013-04-10 Jan Beulich <jbeulich@suse.com>
1225
1226 * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base
1227 register being PC when is_t or writeback, and use distinct
1228 diagnostic for the latter case.
1229
ccb84d65
JB
12302013-04-10 Jan Beulich <jbeulich@suse.com>
1231
1232 * gas/config/tc-arm.c (parse_operands): Re-write
1233 po_barrier_or_imm().
1234 (do_barrier): Remove bogus constraint().
1235 (do_t_barrier): Remove.
1236
4d13caa0
NC
12372013-04-09 Joerg Wunsch <joerg.wunsch@atmel.com>
1238
1239 * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2,
1240 ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2,
1241 ATmega2564RFR2
1242 * gas/doc/c-avr.texi (-mmcu documentation): Likewise.
1243
16d02dc9
JB
12442013-04-09 Jan Beulich <jbeulich@suse.com>
1245
1246 * gas/config/tc-arm.c (do_vmrs): Accept all control registers.
1247 Use local variable Rt in more places.
1248 (do_vmsr): Accept all control registers.
1249
05ac0ffb
JB
12502013-04-09 Jan Beulich <jbeulich@suse.com>
1251
1252 * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
1253 if there was none specified for moves between scalar and core
1254 register.
1255
2d51fb74
JB
12562013-04-09 Jan Beulich <jbeulich@suse.com>
1257
1258 * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the
1259 NEON_ALL_LANES case.
1260
94dcf8bf
JB
12612013-04-08 Jan Beulich <jbeulich@suse.com>
1262
1263 * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for
1264 PC-relative VSTR.
1265
1472d06f
JB
12662013-04-08 Jan Beulich <jbeulich@suse.com>
1267
1268 * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq
1269 entry to sp_fiq.
1270
0c76cae8
AM
12712013-04-03 Alan Modra <amodra@gmail.com>
1272
1273 * doc/as.texinfo: Add support to generate man options for h8300.
1274 * doc/c-h8300.texi: Likewise.
1275
92eb40d9
RR
12762013-03-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
1277
1278 * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and
1279 Cortex-A57.
1280
51dcdd4d
NC
12812013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com>
1282
1283 PR binutils/15068
1284 * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array.
1285
c5d685bf
NC
12862013-03-26 Nick Clifton <nickc@redhat.com>
1287
9b978282
NC
1288 PR gas/15295
1289 * listing.c (rebuffer_line): Rewrite to avoid seeking back to the
1290 start of the file each time.
1291
c5d685bf
NC
1292 PR gas/15178
1293 * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for
1294 FreeBSD targets.
1295
9699c833
TG
12962013-03-26 Douglas B Rupp <rupp@gnat.com>
1297
1298 * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment
1299 after fixup.
1300
4755303e
WN
13012013-03-21 Will Newton <will.newton@linaro.org>
1302
1303 * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all
1304 pc-relative str instructions in Thumb mode.
1305
81f5558e
NC
13062013-03-21 Michael Schewe <michael.schewe@gmx.net>
1307
1308 * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
1309 @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
1310 R_H8_DISP32A16.
1311 * config/tc-h8300.h: Remove duplicated defines.
1312
71863e73
NC
13132013-03-21 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
1314
1315 PR gas/15282
1316 * tc-avr.c (mcu_has_3_byte_pc): New function.
1317 (tc_cfi_frame_initial_instructions): Call it to find return
1318 address size.
1319
795b8e6b
NC
13202013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com>
1321
1322 PR gas/15095
1323 * config/tc-tic6x.c (tic6x_try_encode): Handle
1324 tic6x_coding_dreg_(msb|lsb) field coding types and use it to
1325 encode register pair numbers when required.
1326
ba86b375
WN
13272013-03-15 Will Newton <will.newton@linaro.org>
1328
1329 * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register
1330 in vstr in Thumb mode for pre-ARMv7 cores.
1331
9e6f3811
AS
13322013-03-14 Andreas Schwab <schwab@suse.de>
1333
1334 * doc/c-arc.texi (ARC Directives): Revert last change and use
1335 @itemize instead of @table.
1336 * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
1337
b10bf8c5
NC
13382013-03-14 Nick Clifton <nickc@redhat.com>
1339
1340 PR gas/15273
1341 * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a
1342 NULL message, instead just check ARM_CPU_IS_ANY directly.
1343
ba724cfc
NC
13442013-03-14 Nick Clifton <nickc@redhat.com>
1345
1346 PR gas/15212
9e6f3811 1347 * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet
ba724cfc
NC
1348 for table format.
1349 * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
1350 to the @item directives.
1351 (ARM-Neon-Alignment): Move to correct place in the document.
1352 * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
1353 formatting.
1354 * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
1355 @smallexample.
1356
531a94fd
SL
13572013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
1358
1359 * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'
1360 case. Add default BAD_CASE to switch.
1361
dad60f8e
SL
13622013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
1363
1364 * config/tc-nios2.c (nios2_assemble_args_ds): New function.
1365 (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
1366
dd5181d5
KT
13672013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1368
1369 * config/tc-arm.c (crc_ext_armv8): New feature set.
1370 (UNPRED_REG): New macro.
1371 (do_crc32_1): New function.
1372 (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
1373 do_crc32ch, do_crc32cw): Likewise.
1374 (TUEc): New macro.
1375 (insns): Add entries for crc32 mnemonics.
1376 (arm_extensions): Add entry for crc.
1377
8e723a10
CLT
13782013-03-08 Chung-Lin Tang <cltang@codesourcery.com>
1379
1380 * write.h (struct fix): Add fx_dot_frag field.
1381 (dot_frag): Declare.
1382 * write.c (dot_frag): New variable.
1383 (fix_new_internal): Set fx_dot_frag field with dot_frag.
1384 (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
1385 * expr.c (expr): Save value of frag_now in dot_frag when setting
1386 dot_value.
1387 * read.c (emit_expr): Likewise. Delete comments.
1388
be05d201
L
13892013-03-07 H.J. Lu <hongjiu.lu@intel.com>
1390
1391 * config/tc-i386.c (flag_code_names): Removed.
1392 (i386_index_check): Rewrote.
1393
62b0d0d5
YZ
13942013-03-05 Yufeng Zhang <yufeng.zhang@arm.com>
1395
1396 * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
1397 add comment.
1398 (aarch64_double_precision_fmovable): New function.
1399 (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
1400 function; handle hexadecimal representation of IEEE754 encoding.
1401 (parse_operands): Update the call to parse_aarch64_imm_float.
1402
165de32a
L
14032013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1404
1405 * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
1406 (check_hle): Updated.
1407 (md_assemble): Likewise.
1408 (parse_insn): Likewise.
1409
d5de92cf
L
14102013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1411
1412 * config/tc-i386.c (_i386_insn): Add rep_prefix.
9e6f3811 1413 (md_assemble): Check if REP prefix is OK.
d5de92cf
L
1414 (parse_insn): Remove expecting_string_instruction. Set
1415 i.rep_prefix.
1416
e60bb1dd
YZ
14172013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1418
1419 * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
1420
aeebdd9b
YZ
14212013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1422
1423 * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
1424 for system registers.
1425
4107ae22
DD
14262013-02-27 DJ Delorie <dj@redhat.com>
1427
1428 * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
1429 (rl78_op): Handle %code().
1430 (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
1431 (tc_gen_reloc): Likwise; convert to a computed reloc.
1432 (md_apply_fix): Likewise.
1433
151fa98f
NC
14342013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
1435
1436 * config/rl78-parse.y: Fix encoding of DIVWU insn.
1437
70a8bc5b 14382013-02-25 Terry Guo <terry.guo@arm.com>
1439
1440 * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
1441 * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
1442 list of accepted CPUs.
1443
5c111e37
L
14442013-02-19 H.J. Lu <hongjiu.lu@intel.com>
1445
1446 PR gas/15159
1447 * config/tc-i386.c (cpu_arch): Add ".smap".
1448
1449 * doc/c-i386.texi: Document smap.
1450
8a75745d
MR
14512013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1452
1453 * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
1454 mips_assembling_insn appropriately.
1455 (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
1456
79850f26
MR
14572013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1458
cf29fc61 1459 * config/tc-mips.c (append_insn): Correct indentation, remove
79850f26
MR
1460 extraneous braces.
1461
4c261dff
NC
14622013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1463
5c111e37 1464 * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
4c261dff 1465
ea33f281
NC
14662013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
1467
1468 * configure.tgt: Add nios2-*-rtems*.
1469
a1ccaec9
YZ
14702013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
1471
1472 * config/tc-aarch64.c (md_begin): Change to check if 'name' is
1473 NULL.
1474
0aa27725
RS
14752013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
1476
1477 * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
1478 (macro): Use it. Assert that trunc.w.s is not used for r5900.
1479
da4339ed
NC
14802013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com>
1481
1482 * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
1483 core.
1484
36591ba1 14852013-02-06 Sandra Loosemore <sandra@codesourcery.com>
5c111e37 1486 Andrew Jenner <andrew@codesourcery.com>
36591ba1
SL
1487
1488 Based on patches from Altera Corporation.
1489
1490 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
1491 (TARGET_CPU_HFILES): Add config/tc-nios2.h.
1492 * Makefile.in: Regenerated.
1493 * configure.tgt: Add case for nios2*-linux*.
1494 * config/obj-elf.c: Conditionally include elf/nios2.h.
1495 * config/tc-nios2.c: New file.
1496 * config/tc-nios2.h: New file.
1497 * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
1498 * doc/Makefile.in: Regenerated.
1499 * doc/all.texi: Set NIOSII.
1500 * doc/as.texinfo (Overview): Add Nios II options.
1501 (Machine Dependencies): Include c-nios2.texi.
1502 * doc/c-nios2.texi: New file.
1503 * NEWS: Note Altera Nios II support.
1504
94d4433a
AM
15052013-02-06 Alan Modra <amodra@gmail.com>
1506
1507 PR gas/14255
1508 * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
1509 Don't skip fixups with fx_subsy non-NULL.
1510 * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
1511 with fx_subsy non-NULL.
1512
ace9af6f
L
15132013-02-04 H.J. Lu <hongjiu.lu@intel.com>
1514
1515 * doc/c-metag.texi: Add "@c man" markers.
1516
89d67ed9
AM
15172013-02-04 Alan Modra <amodra@gmail.com>
1518
1519 * write.c (fixup_segment): Return void. Delete seg_reloc_count
1520 related code.
1521 (TC_ADJUST_RELOC_COUNT): Delete.
1522 * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
1523
89072bd6
AM
15242013-02-04 Alan Modra <amodra@gmail.com>
1525
1526 * po/POTFILES.in: Regenerate.
1527
f9b2d544
NC
15282013-01-30 Markos Chandras <markos.chandras@imgtec.com>
1529
1530 * config/tc-metag.c: Make SWAP instruction less permissive with
1531 its operands.
1532
392ca752
DD
15332013-01-29 DJ Delorie <dj@redhat.com>
1534
1535 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
1536 relocs in .word/.etc statements.
1537
427d0db6
RM
15382013-01-29 Roland McGrath <mcgrathr@google.com>
1539
1540 * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
1541 immediate value for 8-bit offset" error so it shows line info.
1542
4faf939a
JM
15432013-01-24 Joseph Myers <joseph@codesourcery.com>
1544
1545 * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
1546 for 64-bit output.
1547
78c8d46c
NC
15482013-01-24 Nick Clifton <nickc@redhat.com>
1549
1550 * config/tc-v850.c: Add support for e3v5 architecture.
1551 * doc/c-v850.texi: Mention new support.
1552
fb5b7503
NC
15532013-01-23 Nick Clifton <nickc@redhat.com>
1554
1555 PR gas/15039
1556 * config/tc-avr.c: Include dwarf2dbg.h.
1557
8ce3d284
L
15582013-01-18 H.J. Lu <hongjiu.lu@intel.com>
1559
1560 * config/tc-i386.c (reloc): Support size relocation only for ELF.
1561 (tc_i386_fix_adjustable): Likewise.
1562 (lex_got): Likewise.
1563 (tc_gen_reloc): Likewise.
1564
f5555712
YZ
15652013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
1566
1567 * config/tc-aarch64.c (output_operand_error_record): Change to output
1568 the out-of-range error message as value-expected message if there is
1569 only one single value in the expected range.
1570 (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
1571 LSL #0 as a programmer-friendly feature.
1572
8fd4256d
L
15732013-01-16 H.J. Lu <hongjiu.lu@intel.com>
1574
1575 * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
1576 (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
1577 BFD_RELOC_64_SIZE relocations.
1578 (lex_got): Support "symbol@SIZE" and don't create GOT symbol
1579 for it.
1580 (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
1581 relocations against local symbols.
1582
a5840dce
AM
15832013-01-16 Alan Modra <amodra@gmail.com>
1584
1585 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
1586 finding some sort of toc syntax error, and break to avoid
1587 compiler uninit warning.
1588
af89796a
L
15892013-01-15 H.J. Lu <hongjiu.lu@intel.com>
1590
1591 PR gas/15019
1592 * config/tc-i386.c (lex_got): Increment length by 1 if the
1593 relocation token is removed.
1594
dd42f060
NC
15952013-01-15 Nick Clifton <nickc@redhat.com>
1596
1597 * config/tc-v850.c (md_assemble): Allow signed values for
1598 V850E_IMMEDIATE.
1599
464e3686
SK
16002013-01-11 Sean Keys <skeys@ipdatasys.com>
1601
1602 * config/tc-xgate.c (md_begin): Fix mistake made when going from
af89796a 1603 git to cvs.
464e3686 1604
5817ffd1
PB
16052013-01-10 Peter Bergner <bergner@vnet.ibm.com>
1606
1607 * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
1608 * doc/c-ppc.texi (PowerPC-Opts): Likewise.
1609 * config/tc-ppc.c (md_show_usage): Likewise.
1610 (ppc_handle_align): Handle power8's group ending nop.
1611
f4b1f6a9
SK
16122013-01-10 Sean Keys <skeys@ipdatasys.com>
1613
1614 * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
af89796a 1615 that the assember exits after the opcodes have been printed.
f4b1f6a9 1616
34bca508
L
16172013-01-10 H.J. Lu <hongjiu.lu@intel.com>
1618
1619 * app.c: Remove trailing white spaces.
1620 * as.c: Likewise.
1621 * as.h: Likewise.
1622 * cond.c: Likewise.
1623 * dw2gencfi.c: Likewise.
1624 * dwarf2dbg.h: Likewise.
1625 * ecoff.c: Likewise.
1626 * input-file.c: Likewise.
1627 * itbl-lex.h: Likewise.
1628 * output-file.c: Likewise.
1629 * read.c: Likewise.
1630 * sb.c: Likewise.
1631 * subsegs.c: Likewise.
1632 * symbols.c: Likewise.
1633 * write.c: Likewise.
1634 * config/tc-i386.c: Likewise.
1635 * doc/Makefile.am: Likewise.
1636 * doc/Makefile.in: Likewise.
1637 * doc/c-aarch64.texi: Likewise.
1638 * doc/c-alpha.texi: Likewise.
1639 * doc/c-arc.texi: Likewise.
1640 * doc/c-arm.texi: Likewise.
1641 * doc/c-avr.texi: Likewise.
1642 * doc/c-bfin.texi: Likewise.
1643 * doc/c-cr16.texi: Likewise.
1644 * doc/c-d10v.texi: Likewise.
1645 * doc/c-d30v.texi: Likewise.
1646 * doc/c-h8300.texi: Likewise.
1647 * doc/c-hppa.texi: Likewise.
1648 * doc/c-i370.texi: Likewise.
1649 * doc/c-i386.texi: Likewise.
1650 * doc/c-i860.texi: Likewise.
1651 * doc/c-m32c.texi: Likewise.
1652 * doc/c-m32r.texi: Likewise.
1653 * doc/c-m68hc11.texi: Likewise.
1654 * doc/c-m68k.texi: Likewise.
1655 * doc/c-microblaze.texi: Likewise.
1656 * doc/c-mips.texi: Likewise.
1657 * doc/c-msp430.texi: Likewise.
1658 * doc/c-mt.texi: Likewise.
1659 * doc/c-s390.texi: Likewise.
1660 * doc/c-score.texi: Likewise.
1661 * doc/c-sh.texi: Likewise.
1662 * doc/c-sh64.texi: Likewise.
1663 * doc/c-tic54x.texi: Likewise.
1664 * doc/c-tic6x.texi: Likewise.
1665 * doc/c-v850.texi: Likewise.
1666 * doc/c-xc16x.texi: Likewise.
1667 * doc/c-xgate.texi: Likewise.
1668 * doc/c-xtensa.texi: Likewise.
1669 * doc/c-z80.texi: Likewise.
1670 * doc/internals.texi: Likewise.
1671
4c665b71
RM
16722013-01-10 Roland McGrath <mcgrathr@google.com>
1673
1674 * hash.c (hash_new_sized): Make it global.
1675 * hash.h: Declare it.
1676 * macro.c (define_macro): Use hash_new_sized instead of hash_new,
1677 pass a small size.
1678
a3c62988
NC
16792013-01-10 Will Newton <will.newton@imgtec.com>
1680
1681 * Makefile.am: Add Meta.
1682 * Makefile.in: Regenerate.
1683 * config/tc-metag.c: New file.
1684 * config/tc-metag.h: New file.
1685 * configure.tgt: Add Meta.
1686 * doc/Makefile.am: Add Meta.
1687 * doc/Makefile.in: Regenerate.
1688 * doc/all.texi: Add Meta.
1689 * doc/as.texiinfo: Document Meta options.
1690 * doc/c-metag.texi: New file.
1691
b37df7c4
SE
16922013-01-09 Steve Ellcey <sellcey@mips.com>
1693
1694 * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
1695 calls.
1696 * config/tc-mips.c (internalError): Remove, replace with abort.
1697
a3251895
YZ
16982013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
1699
1700 * config/tc-aarch64.c (parse_operands): Change to compare the result
1701 of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
1702
8ab8155f
NC
17032013-01-07 Nick Clifton <nickc@redhat.com>
1704
1705 PR gas/14887
1706 * config/tc-arm.c (skip_past_char): Skip whitespace before the
1707 anticipated character.
1708 * config/tc-arm.c (parse_address_main): Delete skip of whitespace
1709 here as it is no longer needed.
1710
a4ac1c42
AS
17112013-01-06 Andreas Schwab <schwab@linux-m68k.org>
1712
1713 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
1714 * doc/c-score.texi (SCORE-Opts): Likewise.
1715 * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
1716
e407c74b
NC
17172013-01-04 Juergen Urban <JuergenUrban@gmx.de>
1718
1719 * config/tc-mips.c: Add support for MIPS r5900.
1720 Add M_LQ_AB and M_SQ_AB to support large values for instructions
1721 lq and sq.
1722 (can_swap_branch_p, get_append_method): Detect some conditional
1723 short loops to fix a bug on the r5900 by NOP in the branch delay
1724 slot.
1725 (M_MUL): Support 3 operands in multu on r5900.
1726 (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
1727 (s_mipsset): Force 32 bit floating point on r5900.
1728 (mips_ip): Check parameter range of instructions mfps and mtps on
1729 r5900.
1730 * configure.in: Detect CPU type when target string contains r5900
1731 (e.g. mips64r5900el-linux-gnu).
1732
62658407
L
17332013-01-02 H.J. Lu <hongjiu.lu@intel.com>
1734
1735 * as.c (parse_args): Update copyright year to 2013.
1736
95830fd1
YZ
17372013-01-02 Yufeng Zhang <yufeng.zhang@arm.com>
1738
1739 * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
1740 and "cortex57".
1741
517bb291 17422013-01-02 Nick Clifton <nickc@redhat.com>
d709e4e6 1743
517bb291
NC
1744 PR gas/14987
1745 * config/tc-arm.c (parse_address_main): Skip whitespace before a
1746 closing bracket.
d709e4e6 1747
517bb291 1748For older changes see ChangeLog-2012
08d56133 1749\f
517bb291 1750Copyright (C) 2013 Free Software Foundation, Inc.
752937aa
NC
1751
1752Copying and distribution of this file, with or without modification,
1753are permitted in any medium without royalty provided the copyright
1754notice and this notice are preserved.
1755
08d56133
NC
1756Local Variables:
1757mode: change-log
1758left-margin: 8
1759fill-column: 74
1760version-control: never
1761End: