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12013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
2
3 * config/tc-mips.c (report_bad_range, report_bad_field): Delete.
4 (macro): Remove M_DEXT and M_DINS handling.
5
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62013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
7
8 * config/tc-mips.c (mips_arg_info): Replace allow_nonconst and
9 lax_max with lax_match.
10 (match_int_operand): Update accordingly. Don't report an error
11 for !lax_match-only cases.
12 (match_insn): Replace more_alts with lax_match and use it to
13 initialize the mips_arg_info field. Add a complete_p parameter.
14 Handle implicit VU0 suffixes here.
15 (match_invalid_for_isa, match_insns, match_mips16_insns): New
16 functions.
17 (mips_ip, mips16_ip): Use them.
18
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192013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
20
21 * config/tc-mips.c (match_expression): Report uses of registers here.
22 Add a "must be an immediate expression" error. Handle elided offsets
23 here rather than...
24 (match_int_operand): ...here.
25
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262013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
27
28 * config/tc-mips.c (mips_arg_info): Remove soft_match.
29 (match_out_of_range, match_not_constant): New functions.
30 (match_const_int): Remove fallback parameter and check for soft_match.
31 Use match_not_constant.
32 (match_mapped_int_operand, match_addiusp_operand)
33 (match_perf_reg_operand, match_save_restore_list_operand)
34 (match_mdmx_imm_reg_operand): Update accordingly. Use
35 match_out_of_range and set_insn_error* instead of as_bad.
36 (match_int_operand): Likewise. Use match_not_constant in the
37 !allows_nonconst case.
38 (match_float_constant): Report invalid float constants.
39 (match_insn, match_mips16_insn): Remove soft_match code. Rely on
40 match_float_constant to check for invalid constants. Fail the
41 match if match_const_int or match_float_constant return false.
42 (mips_ip): Update accordingly.
43 (mips16_ip): Likewise. Undo null termination of instruction name
44 once lookup is complete.
45
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462013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
47
48 * config/tc-mips.c (mips_insn_error_format): New enum.
49 (mips_insn_error): New struct.
50 (insn_error): Change to a mips_insn_error.
51 (clear_insn_error, set_insn_error_format, set_insn_error)
52 (set_insn_error_i, set_insn_error_ss, report_insn_error): New
53 functions.
54 (mips_parse_argument_token, md_assemble, match_insn)
55 (match_mips16_insn): Use them instead of manipulating insn_error
56 directly.
57 (mips_ip, mips16_ip): Likewise. Simplify control flow.
58
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592013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
60
61 * config/tc-mips.c (normalize_constant_expr): Move further up file.
62 (normalize_address_expr): Likewise.
63 (match_insn, match_mips16_insn): New functions, split out from...
64 (mips_ip, mips16_ip): ...here.
65
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662013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
67
68 * config/tc-mips.c (operand_reg_mask, match_operand): Handle
69 OP_OPTIONAL_REG.
70 (mips_ip, mips16_ip): Use mips_optional_operand_p to check
71 for optional operands.
72
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732013-08-16 Alan Modra <amodra@gmail.com>
74
75 * config/tc-ppc.c (ppc_elf_cons): Allow @l and other reloc
76 modifiers generally.
77
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782013-08-16 Alan Modra <amodra@gmail.com>
79
80 * config/tc-ppc.c (ppc_elf_lcomm): Use subsection 1.
81
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822013-08-14 David Edelsohn <dje.gcc@gmail.com>
83
84 * config/tc-ppc.c (ppc_comm): Accept optional fourth .lcomm
85 argument as alignment.
86
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872013-08-09 Nick Clifton <nickc@redhat.com>
88
89 * config/tc-rl78.c (elf_flags): New variable.
90 (enum options): Add OPTION_G10.
91 (md_longopts): Add mg10.
92 (md_parse_option): Parse -mg10.
93 (rl78_elf_final_processing): New function.
94 * config/tc-rl78.c (tc_final_processing): Define.
95 * doc/c-rl78.texi: Document -mg10 option.
96
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972013-08-06 Jürgen Urban <JuergenUrban@gmx.de>
98
99 * config/tc-mips.c (match_vu0_suffix_operand): Allow single-channel
100 suffixes to be elided too.
101 (mips_lookup_insn): Don't reject INSN2_VU0_CHANNEL_SUFFIX here.
102 (mips_ip): Assume .xyzw if no VU0 suffix is specified. Allow +N
103 to be omitted too.
104
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1052013-08-05 John Tytgat <john@bass-software.com>
106
107 * po/POTFILES.in: Regenerate.
108
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1092013-08-05 Eric Botcazou <ebotcazou@adacore.com>
110 Konrad Eisele <konrad@gaisler.com>
111
112 * config/tc-sparc.c (sparc_arch_types): Add leon.
113 (sparc_arch): Move sparc4 around and add leon.
114 (sparc_target_format): Document -Aleon.
115 * doc/c-sparc.texi: Likewise.
116
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1172013-08-05 Richard Sandiford <rdsandiford@googlemail.com>
118
119 * config/tc-mips.c (mips_lookup_insn): Make length and opend signed.
120
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1212013-08-04 Jürgen Urban <JuergenUrban@gmx.de>
122 Richard Sandiford <rdsandiford@googlemail.com>
123
124 * config/tc-mips.c (MAX_OPERANDS): Bump to 6.
125 (RWARN): Bump to 0x8000000.
126 (RTYPE_VI, RTYPE_VF, RTYPE_R5900_I, RTYPE_R5900_Q, RTYPE_R5900_R)
127 (RTYPE_R5900_ACC): New register types.
128 (RTYPE_MASK): Include them.
129 (R5900_I_NAMES, R5900_Q_NAMES, R5900_R_NAMES, R5900_ACC_NAMES): New
130 macros.
131 (reg_names): Include them.
132 (mips_parse_register_1): New function, split out from...
133 (mips_parse_register): ...here. Add a channels_ptr parameter.
134 Look for VU0 channel suffixes when nonnull.
135 (reg_lookup): Update the call to mips_parse_register.
136 (mips_parse_vu0_channels): New function.
137 (OT_CHANNELS, OT_DOUBLE_CHAR): New mips_operand_token_types.
138 (mips_operand_token): Add a "channels" field to the union.
139 Extend the comment above "ch" to OT_DOUBLE_CHAR.
140 (mips_parse_base_start): Match -- and ++. Handle channel suffixes.
141 (mips_parse_argument_token): Handle channel suffixes here too.
142 (validate_mips_insn): Handle INSN2_VU0_CHANNEL_SUFFIX.
143 Ignore OP_VU0_MATCH_SUFFIX when calculating the used bits.
144 Handle '#' formats.
145 (md_begin): Register $vfN and $vfI registers.
146 (operand_reg_mask): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX.
147 (convert_reg_type): Handle OP_REG_VI, OP_REG_VF, OP_REG_R5900_I,
148 OP_REG_R5900_Q, OP_REG_R5900_R and OP_REG_R5900_ACC.
149 (match_vu0_suffix_operand): New function.
150 (match_operand): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX.
151 (macro): Use "+7" rather than "E" for LDQ2 and STQ2.
152 (mips_lookup_insn): New function.
153 (mips_ip): Use it. Allow "+K" operands to be elided at the end
154 of an instruction. Handle '#' sequences.
155
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1562013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
157
158 * config/tc-mips.c (macro, mips16_macro): Create an array of operand
159 values and use it instead of sreg, treg, xreg, etc.
160
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1612013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
162
163 * config/tc-mips.c (match_int_operand): Use mips_int_operand_min
164 and mips_int_operand_max.
165 (mips16_immed_operand, mips16_immed_operands, MIPS16_NUM_IMMED):
166 Delete.
167 (mips16_immed_operand, mips16_immed_in_range_p): New functions.
168 (mips16_immed, mips16_extended_frag): Use them. Use mips_int_operand
169 instead of mips16_immed_operand.
170
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1712013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
172
173 * config/tc-mips.c (mips16_macro): Don't use move_register.
174 (mips16_ip): Allow macros to use 'p'.
175
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1762013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
177
178 * config/tc-mips.c (MAX_OPERANDS): New macro.
179 (mips_operand_array): New structure.
180 (mips_operands, mips16_operands, micromips_operands): New arrays.
181 (micromips_to_32_reg_b_map, micromips_to_32_reg_c_map)
182 (micromips_to_32_reg_e_map, micromips_to_32_reg_f_map)
183 (micromips_to_32_reg_g_map, micromips_to_32_reg_l_map)
184 (micromips_to_32_reg_q_map): Delete.
185 (insn_operands, insn_opno, insn_extract_operand): New functions.
186 (validate_mips_insn): Take a mips_operand_array as argument and
187 use it to build up a list of operands. Extend to handle INSN_MACRO
188 and MIPS16.
189 (validate_mips16_insn): New function.
190 (validate_micromips_insn): Take a mips_operand_array as argument.
191 Handle INSN_MACRO.
192 (md_begin): Initialize mips_operands, mips16_operands and
193 micromips_operands. Call validate_mips_insn and
194 validate_micromips_insn for macro instructions too.
195 Call validate_mips16_insn for MIPS16 instructions.
196 (insn_read_mask, insn_write_mask, operand_reg_mask, insn_reg_mask):
197 New functions.
198 (gpr_read_mask, gpr_write_mask, fpr_read_mask, fpr_write_mask): Use
199 them. Handle INSN_UDI.
200 (get_append_method): Use gpr_read_mask.
201
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2022013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
203
204 * config/tc-mips.c (compact_branch_p, uncond_branch_p): Use the same
205 flags for MIPS16 and non-MIPS16 instructions.
206 (gpr_mod_mask): Move the INSN2_MOD_SP case outside the micromips block.
207 (gpr_read_mask): Use INSN2_READ_GPR_31 for MIPS16 instructions too.
208 (gpr_write_mask): Remove MIPS16_INSN_WRITE_SP handling.
209 (can_swap_branch_p, get_append_method): Use the same flags for MIPS16
210 and non-MIPS16 instructions. Fix formatting.
211
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2122013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
213
214 * config/tc-mips.c (reg_needs_delay): Move later in file.
215 Use gpr_write_mask.
216 (insns_between): Use gpr_read_mask instead of EXTRACT_OPERAND.
217
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2182013-07-26 Sergey Guriev <sergey.s.guriev@intel.com>
219 Alexander Ivchenko <alexander.ivchenko@intel.com>
220 Maxim Kuznetsov <maxim.kuznetsov@intel.com>
221 Sergey Lega <sergey.s.lega@intel.com>
222 Anna Tikhonova <anna.tikhonova@intel.com>
223 Ilya Tocar <ilya.tocar@intel.com>
224 Andrey Turetskiy <andrey.turetskiy@intel.com>
225 Ilya Verbin <ilya.verbin@intel.com>
226 Kirill Yukhin <kirill.yukhin@intel.com>
227 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
228
229 * config/tc-i386-intel.c (O_zmmword_ptr): New.
230 (i386_types): Add zmmword.
231 (i386_intel_simplify_register): Allow regzmm.
232 (i386_intel_simplify): Handle zmmwords.
233 (i386_intel_operand): Handle RC/SAE, vector operations and
234 zmmwords.
235 * config/tc-i386.c (ZMMWORD_MNEM_SUFFIX): New.
236 (struct RC_Operation): New.
237 (struct Mask_Operation): New.
238 (struct Broadcast_Operation): New.
239 (vex_prefix): Size of bytes increased to 4 to support EVEX
240 encoding.
241 (enum i386_error): Add new error codes: unsupported_broadcast,
242 broadcast_not_on_src_operand, broadcast_needed,
243 unsupported_masking, mask_not_on_destination, no_default_mask,
244 unsupported_rc_sae, rc_sae_operand_not_last_imm,
245 invalid_register_operand, try_vector_disp8.
246 (struct _i386_insn): Add new fields vrex, need_vrex, mask,
247 rounding, broadcast, memshift.
248 (struct RC_name): New.
249 (RC_NamesTable): New.
250 (evexlig): New.
251 (evexwig): New.
252 (extra_symbol_chars): Add '{'.
253 (cpu_arch): Add AVX512F, AVX512CD, AVX512ER and AVX512PF.
254 (i386_operand_type): Add regzmm, regmask and vec_disp8.
255 (match_mem_size): Handle zmmwords.
256 (operand_type_match): Handle zmm-registers.
257 (mode_from_disp_size): Handle vec_disp8.
258 (fits_in_vec_disp8): New.
259 (md_begin): Handle {} properly.
260 (type_names): Add "rZMM", "Mask reg" and "Vector d8".
261 (build_vex_prefix): Handle vrex.
262 (build_evex_prefix): New.
263 (process_immext): Adjust to properly handle EVEX.
264 (md_assemble): Add EVEX encoding support.
265 (swap_2_operands): Correctly handle operands with masking,
266 broadcasting or RC/SAE.
267 (check_VecOperands): Support EVEX features.
268 (VEX_check_operands): Properly handle 16 upper [xyz]mm registers.
269 (match_template): Support regzmm and handle new error codes.
270 (process_suffix): Handle zmmwords and zmm-registers.
271 (check_byte_reg): Extend to zmm-registers.
272 (process_operands): Extend to zmm-registers.
273 (build_modrm_byte): Handle EVEX.
274 (output_insn): Adjust to properly handle EVEX case.
275 (disp_size): Handle vec_disp8.
276 (output_disp): Support compressed disp8*N evex feature.
277 (output_imm): Handle RC/SAE immediates properly.
278 (check_VecOperations): New.
279 (i386_immediate): Handle EVEX features.
280 (i386_index_check): Handle zmmwords and zmm-registers.
281 (RC_SAE_immediate): New.
282 (i386_att_operand): Handle EVEX features.
283 (parse_real_register): Add a check for ZMM/Mask registers.
284 (OPTION_MEVEXLIG): New.
285 (OPTION_MEVEXWIG): New.
286 (md_longopts): Add mevexlig and mevexwig.
287 (md_parse_option): Handle mevexlig and mevexwig options.
288 (md_show_usage): Add description for mevexlig and mevexwig.
289 * doc/c-i386.texi: Document avx512f/.avx512f, avx512cd/.avx512cd,
290 avx512er/.avx512er, avx512pf/.avx512pf, mevexlig and mevexwig.
291
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2922013-07-25 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
293
294 * config/tc-i386.c (cpu_arch): Add .sha.
295 * doc/c-i386.texi: Document sha/.sha.
296
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2972013-07-24 Anna Tikhonova <anna.tikhonova@intel.com>
298 Kirill Yukhin <kirill.yukhin@intel.com>
299 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
300
301 * config/tc-i386.c (BND_PREFIX): New.
302 (struct _i386_insn): Add new field bnd_prefix.
303 (add_bnd_prefix): New.
304 (cpu_arch): Add MPX.
305 (i386_operand_type): Add regbnd.
306 (md_assemble): Handle BND prefixes.
307 (parse_insn): Likewise.
308 (output_branch): Likewise.
309 (output_jump): Likewise.
310 (build_modrm_byte): Handle regbnd.
311 (OPTION_MADD_BND_PREFIX): New.
312 (md_longopts): Add entry for 'madd-bnd-prefix'.
313 (md_parse_option): Handle madd-bnd-prefix option.
314 (md_show_usage): Add description for madd-bnd-prefix
315 option.
316 * doc/c-i386.texi: Document mpx/.mpx and -madd-bnd-prefix.
317
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3182013-07-24 Tristan Gingold <gingold@adacore.com>
319
320 * config/tc-ppc.c (md_apply_fix): Adjust BFD_RELOC_PPC_B16 on
321 xcoff targets.
322
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3232013-07-24 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
324
325 * config/tc-s390.c (s390_machine): Don't force the .machine
326 argument to lower case.
327
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3282013-07-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
329
330 * config/tc-arm.c (s_arm_arch_extension): Improve error message
331 for invalid extension.
332
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3332013-07-19 Yufeng Zhang <yufeng.zhang@arm.com>
334
335 * config/tc-aarch64.c (enum aarch64_abi_type): New enumeration tag.
336 (AARCH64_ABI_LP64, AARCH64_ABI_ILP32): New enumerators.
337 (aarch64_abi): New variable.
338 (ilp32_p): Change to be a macro.
339 (aarch64_opts): Remove the support for option -milp32 and -mlp64.
340 (struct aarch64_option_abi_value_table): New struct.
341 (aarch64_abis): New table.
342 (aarch64_parse_abi): New function.
343 (aarch64_long_opts): Add entry for -mabi=.
344 * doc/as.texinfo (Target AArch64 options): Document -mabi.
345 * doc/c-aarch64.texi: Likewise.
346
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3472013-07-18 Jim Thomas <thomas@cfht.hawaii.edu>
348
349 * config/tc-i386-intel.c (i386_intel_operand): Fixed signed vs
350 unsigned comparison.
351
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3522013-07-18 Sandeep Kumar Singh <Sandeep.Singh2@kpitcummins.com>
353
cbe02d4f 354 * config/rx-defs.h: Add macros for RX100, RX200, RX600, and
f0c00282 355 RX610.
cbe02d4f 356 * config/rx-parse.y: (rx_check_float_support): Add function to
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357 check floating point operation support for target RX100 and
358 RX200.
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359 * config/tc-rx.c: Add CPU options RX100, RX200, RX600, and RX610.
360 * doc/c-rx.texi: Add -mcpu option to recognize macros for RX100,
361 RX200, RX600, and RX610
f0c00282 362
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3632013-07-18 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
364
365 * config/tc-avr.c (md_show_usage): Add avrxmega2 to help text
366
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3672013-07-18 Vishnu K.S <vishnu.k_s@atmel.com>
368
369 * config/tc-avr.c: Make ata6289's ISA to AVR_ISA_AVR4.
370 * doc/c-avr.texi: Likewise.
371
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3722013-07-15 Richard Sandiford <rdsandiford@googlemail.com>
373
374 * config/tc-mips.c (match_save_restore_list_operand): Avoid -Wformat
375 error with older GCCs.
376 (mips16_macro_build): Dereference args.
377
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3782013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
379
380 * config/tc-mips.c (mips_prefer_vec_regno, mips_parse_register):
381 New functions, split out from...
382 (reg_lookup): ...here. Remove itbl support.
383 (reglist_lookup): Delete.
384 (mips_operand_token_type): New enum.
385 (mips_operand_token): New structure.
386 (mips_operand_tokens): New variable.
387 (mips_add_token, mips_parse_base_start, mips_parse_argument_token)
388 (mips_parse_arguments): New functions.
389 (md_begin): Initialize mips_operand_tokens.
390 (mips_arg_info): Add a token field. Remove optional_reg field.
391 (match_char, match_expression): New functions.
392 (match_const_int): Use match_expression. Remove "s" argument
393 and return a boolean result. Remove O_register handling.
394 (match_regno, match_reg, match_reg_range): New functions.
395 (match_int_operand, match_mapped_int_operand, match_msb_operand)
396 (match_reg_operand, match_reg_pair_operand, match_perf_reg_operand)
397 (match_addiusp_operand, match_clo_clz_dest_operand)
398 (match_lwm_swm_list_operand, match_entry_exit_operand)
399 (match_save_restore_list_operand, match_mdmx_imm_reg_operand)
400 (match_tied_reg_operand): Remove "s" argument and return a boolean
401 result. Match tokens rather than text. Update calls to
402 match_const_int. Rely on match_regno to call check_regno.
403 (match_pcrel_operand, match_pc_operand): Replace "s" argument with
404 "arg" argument. Return a boolean result.
405 (parse_float_constant): Replace with...
406 (match_float_constant): ...this new function.
407 (match_operand): Remove "s" argument and return a boolean result.
408 Update calls to subfunctions.
409 (mips_ip, mips16_ip): Call mips_parse_arguments. Use match routines
410 rather than string-parsing routines. Update handling of optional
411 registers for token scheme.
412
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4132013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
414
415 * config/tc-mips.c (parse_float_constant): Split out from...
416 (mips_ip): ...here.
417
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4182013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
419
420 * config/tc-mips.c (INSERT_BITS, INSERT_OPERAND, MIPS16_INSERT_OPERAND):
421 Delete.
422
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4232013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
424
425 * config/tc-mips.c (mips32_to_16_reg_map): Delete.
426 (match_entry_exit_operand): New function.
427 (match_save_restore_list_operand): Likewise.
428 (match_operand): Use them.
429 (check_absolute_expr): Delete.
430 (mips16_ip): Rewrite main parsing loop to use mips_operands.
431
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4322013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
433
434 * config/tc-mips.c: Enable functions commented out in previous patch.
435 (SKIP_SPACE_TABS): Move further up file.
436 (mips32_to_micromips_reg_b_map, mips32_to_micromips_reg_c_map)
437 (mips32_to_micromips_reg_d_map, mips32_to_micromips_reg_e_map)
438 (ips32_to_micromips_reg_f_map, mips32_to_micromips_reg_g_map)
439 (mips32_to_micromips_reg_l_map, mips32_to_micromips_reg_m_map)
440 (mips32_to_micromips_reg_q_map, mips32_to_micromips_reg_n_map)
441 (micromips_imm_b_map, micromips_imm_c_map): Delete.
442 (mips_lookup_reg_pair): Delete.
443 (macro): Use report_bad_range and report_bad_field.
444 (mips_immed, expr_const_in_range): Delete.
445 (mips_ip): Rewrite main parsing loop to use new functions.
446
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4472013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
448
449 * config/tc-mips.c (mips_oddfpreg_ok): Move further up file.
450 Change return type to bfd_boolean.
451 (report_bad_range, report_bad_field): New functions.
452 (mips_arg_info): New structure.
453 (match_const_int, convert_reg_type, check_regno, match_int_operand)
454 (match_mapped_int_operand, match_msb_operand, match_reg_operand)
455 (match_reg_pair_operand, match_pcrel_operand, match_perf_reg_operand)
456 (match_addiusp_operand, match_clo_clz_dest_operand)
457 (match_lwm_swm_list_operand, match_mdmx_imm_reg_operand)
458 (match_pc_operand, match_tied_reg_operand, match_operand)
459 (check_completed_insn): New functions, commented out for now.
460
e077a1c8
RS
4612013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
462
463 * config/tc-mips.c (insn_insert_operand): New function.
464 (macro_build, mips16_macro_build): Put null character check
465 in the for loop and convert continues to breaks. Use operand
466 structures to handle constant operands.
467
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RS
4682013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
469
470 * config/tc-mips.c (validate_mips_insn): Move further up file.
471 Add insn_bits and decode_operand arguments. Use the mips_operand
472 fields to work out which bits an operand occupies. Detect double
473 definitions.
474 (validate_micromips_insn): Move further up file. Call into
475 validate_mips_insn.
476
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RS
4772013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
478
479 * config/tc-mips.c (mips16_macro_build): Remove 'Y' case.
480
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RS
4812013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
482
483 * config/tc-mips.c (macro_build): Take an int for "C", "k", "\\"
484 and "~".
485 (macro): Update accordingly.
486
77bd4346
RS
4872013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
488
489 * config/tc-mips.c (imm_expr, imm2_expr, offset_expr): Tweak commentary.
490 (imm_reloc): Delete.
491 (md_assemble): Remove imm_reloc handling.
492 (mips_ip): Update commentary. Use offset_expr and offset_reloc
493 rather than imm_expr and imm_reloc for 'i', 'j' and 'u'.
494 Use a temporary array rather than imm_reloc when parsing
495 constant expressions. Remove imm_reloc initialization.
496 (mips16_ip): Update commentary. Use offset_expr and offset_reloc
497 for the relaxable field. Use a relax_char variable to track the
498 type of this field. Remove imm_reloc initialization.
499
cc537e56
RS
5002013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
501
502 * config/tc-mips.c (mips16_ip): Handle "I".
503
ba92f887
MR
5042013-07-12 Maciej W. Rozycki <macro@codesourcery.com>
505
506 * config/tc-mips.c (mips_flag_nan2008): New variable.
507 (options): Add OPTION_NAN enum value.
508 (md_longopts): Handle it.
509 (md_parse_option): Likewise.
510 (s_nan): New function.
511 (mips_elf_final_processing): Handle EF_MIPS_NAN2008.
512 (md_show_usage): Add -mnan.
513
514 * doc/as.texinfo (Overview): Add -mnan.
515 * doc/c-mips.texi (MIPS Opts): Document -mnan.
516 (MIPS NaN Encodings): New node. Document .nan directive.
517 (MIPS-Dependent): List the new node.
518
c1094734
TG
5192013-07-09 Tristan Gingold <gingold@adacore.com>
520
521 * configure.com: Define HAVE_SYS_TYPES_H and HAVE_UNISTD_H
522
0cbbe1b8
RS
5232013-07-08 Richard Sandiford <rdsandiford@googlemail.com>
524
525 * config/tc-mips.c (mips_ip): Unconditionally parse an expression
526 for 'A' and assume that the constant has been elided if the result
527 is an O_register.
528
f2ae14a1
RS
5292013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
530
531 * config/tc-mips.c (gprel16_reloc_p): New function.
532 (macro_read_relocs): Assume BFD_RELOC_LO16 if all relocs are
533 BFD_RELOC_UNUSED.
534 (offset_high_part, small_offset_p): New functions.
535 (nacro): Use them. Remove *_OB and *_DOB cases. For single-
536 register load and store macros, handle the 16-bit offset case first.
537 If a 16-bit offset is not suitable for the instruction we're
538 generating, load it into the temporary register using
539 ADDRESS_ADDI_INSN. Make the M_LI_DD code fall through into the
540 M_L_DAB code once the address has been constructed. For double load
541 and store macros, again handle the 16-bit offset case first.
542 If the second register cannot be accessed from the same high
543 part as the first, load it into AT using ADDRESS_ADDI_INSN.
544 Fix the handling of LD in cases where the first register is the
545 same as the base. Also handle the case where the offset is
546 not 16 bits and the second register cannot be accessed from the
547 same high part as the first. For unaligned loads and stores,
548 fuse the offbits == 12 and old "ab" handling. Apply this handling
549 whenever the second offset needs a different high part from the first.
550 Construct the offset using ADDRESS_ADDI_INSN where possible,
551 for offbits == 16 as well as offbits == 12. Use offset_reloc
552 when constructing the individual loads and stores.
553 (mips_ip): Set up imm_expr, imm2_expr, offset_expr, imm_reloc
554 and offset_reloc before matching against a particular opcode.
555 Handle elided 'A' constants. Allow 'A' constants to use
556 relocation operators.
557
5c324c16
RS
5582013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
559
560 * config/tc-mips.c (validate_mips_insn): Remove "[" and "]" handling.
561 (mips_ip): Likewise. Do not set is_mdmx for INSN_5400 instructions.
562 Check constraints on the VR5400 RZU.OB, SLL.OB and SRL.OB instructions.
563
23e69e47
RS
5642013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
565
566 * config/tc-mips.c (mips_ip): Preserve the real bit number for "+p".
567 Require the msb to be <= 31 for "+s". Check that the size is <= 31
568 for both "+s" and "+S".
569
27c5c572
RS
5702013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
571
572 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn):
573 (mips_ip, mips16_ip): Handle "+i".
574
e76ff5ab
RS
5752013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
576
577 * config/tc-mips.c (mips32_to_micromips_reg_h_map): Delete.
578 (micromips_to_32_reg_h_map): Rename to...
579 (micromips_to_32_reg_h_map1): ...this.
580 (micromips_to_32_reg_i_map): Rename to...
581 (micromips_to_32_reg_h_map2): ...this.
582 (mips_lookup_reg_pair): New function.
583 (gpr_write_mask, macro): Adjust after above renaming.
584 (validate_micromips_insn): Remove "mi" handling.
585 (mips_ip): Likewise. Parse both registers in a pair for "mh".
586
fa7616a4
RS
5872013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
588
589 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn)
590 (mips_ip): Remove "+D" and "+T" handling.
591
fb798c50
AK
5922013-07-05 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
593
594 * config/tc-s390.c (md_gather_operands, md_apply_fix): Support new
595 relocs.
596
2c0a3565
MS
5972013-07-03 Marcus Shawcroft <marcus.shawcroft@arm.com>
598
4aa2c5e2
MS
599 * config/tc-aarch64.c (reloc_table): Merge got_prel19 into got.
600
6012013-07-02 Marcus Shawcroft <marcus.shawcroft@arm.com>
602
2c0a3565
MS
603 * config/tc-aarch64.c (md_apply_fix): Reorder case values.
604 (aarch64_force_relocation): Likewise.
605
f40da81b
AM
6062013-07-02 Alan Modra <amodra@gmail.com>
607
608 * config/tc-ppc.c (ppc_elf_adjust_symtab): Don't make .TOC. weak.
609
81566a9b
MR
6102013-06-26 Maciej W. Rozycki <macro@codesourcery.com>
611
612 * doc/as.texinfo (Overview): Remove @samp from MIPS ISA names.
613 * doc/c-mips.texi (MIPS Options): Remove @sc from MIPS ISA names.
614 Replace @sc{mips16} with literal `MIPS16'.
615 (MIPS ISA): Replace @sc{mips3} with literal `MIPS III'.
616
a6bb11b2
YZ
6172013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
618
619 * config/tc-aarch64.c (reloc_table): Replace
620 BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with
621 BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to
622 BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and
623 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC.
624 (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC,
625 BFD_RELOC_AARCH64_LD32_GOT_LO12_NC,
626 BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC,
627 BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC,
628 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and
629 BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC.
630 (aarch64_force_relocation): Likewise.
631
cec5225b
YZ
6322013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
633
634 * config/tc-aarch64.c (ilp32_p): New static variable.
635 (elf64_aarch64_target_format): Return the target according to the
636 value of 'ilp32_p'.
637 (md_begin): Determine 'mach' according to the value of 'ilp32_p'.
638 (aarch64_opts): Add support for options '-milp32' and '-mlp64'.
639 (aarch64_dwarf2_addr_size): New function.
640 * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration.
641 (DWARF2_ADDR_SIZE): New define.
642
e335d9cb
RS
6432013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
644
645 * doc/c-mips.texi: Use ISA instead of @sc{isa}.
646
18870af7
RS
6472013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
648
649 * config/tc-mips.c (validate_mips_insn): Use STYPE rather than SHAMT.
650
833794fc
MR
6512013-06-25 Maciej W. Rozycki <macro@codesourcery.com>
652
653 * config/tc-mips.c (mips_set_options): Add insn32 member.
654 (mips_opts): Initialize it.
655 (NOP_INSN, NOP_INSN_SIZE): Handle insn32 mode.
656 (options): Add OPTION_INSN32 and OPTION_NO_INSN32 enum values.
657 (md_longopts): Add "minsn32" and "mno-insn32" options.
658 (is_size_valid): Handle insn32 mode.
659 (md_assemble): Pass instruction string down to macro.
660 (brk_fmt): Add second dimension and insn32 mode initializers.
661 (mfhl_fmt): Likewise.
662 (BRK_FMT, MFHL_FMT): Handle insn32 mode.
663 (macro_build) <'c'>: Handle microMIPS 32-bit BREAK encoding.
664 (macro_build_jalr, move_register): Handle insn32 mode.
665 (macro_build_branch_rs): Likewise.
666 (macro): Handle insn32 mode.
667 <M_JRADDIUSP>, <M_JRC>, <M_MOVEP>: New cases.
668 (mips_ip): Handle insn32 mode.
669 (md_parse_option): Handle OPTION_INSN32 and OPTION_NO_INSN32.
670 (s_mipsset): Handle "insn32" and "noinsn32" pseudo-ops.
671 (mips_handle_align): Handle insn32 mode.
672 (md_show_usage): Add -minsn32 and -mno-insn32.
673
674 * doc/as.texinfo (Target MIPS options): Add -minsn32 and
675 -mno-insn32 options.
676 (-minsn32, -mno-insn32): New options.
677 * doc/c-mips.texi (MIPS Opts): Add -minsn32 and -mno-insn32
678 options.
679 (MIPS assembly options): New node. Document .set insn32 and
680 .set noinsn32.
681 (MIPS-Dependent): List the new node.
682
d1706f38
NC
6832013-06-25 Nick Clifton <nickc@redhat.com>
684
685 * config/tc-msp430.c (msp430_srcoperand): Do not allow the use of
686 the PC in indirect addressing on 430xv2 parts.
687 (msp430_operands): Add version test to hardware bug encoding
688 restrictions.
689
477330fc
RM
6902013-06-24 Roland McGrath <mcgrathr@google.com>
691
d996d970
RM
692 * config/tc-arm.c (parse_reg_list): Use skip_past_char for '}',
693 so it skips whitespace before it.
694 (s_arm_unwind_save_mmxwr, s_arm_unwind_save_mmxwcg): Likewise.
695
477330fc
RM
696 * config/tc-arm.c (arm_symbol_chars): Include '{' and '}'.
697 (arm_reg_parse_multi): Skip whitespace first.
698 (parse_reg_list): Likewise.
699 (parse_vfp_reg_list): Likewise.
700 (s_arm_unwind_save_mmxwcg): Likewise.
701
24382199
NC
7022013-06-24 Nick Clifton <nickc@redhat.com>
703
704 PR gas/15623
705 * config/tc-arm.c (do_t_smc): Mark as ending an IT block.
706
c3678916
RS
7072013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
708
709 * config/tc-mips.c (mips_ip): Fix swapped bit numbers in comments.
710
42429eac
RS
7112013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
712
713 * config/tc-mips.c: Assert that offsetT and valueT are at least
714 8 bytes in size.
715 (GPR_SMIN, GPR_SMAX): New macros.
716 (macro, mips_ip): Remove code for 4-byte valueT and offsetT.
717
f3ded42a
RS
7182013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
719
720 * config/tc-mips.c: Remove OBJ_ELF, OBJ_MAYBE_ELF and IS_ELF
721 conditions. Remove any code deselected by them.
722 (s_mips_frame, s_mips_mask): Handle ECOFF_DEBUGGING case first.
723
e8044f35
RS
7242013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
725
726 * NEWS: Note removal of ECOFF support.
727 * doc/as.texinfo (--emulation): Update for the removal of MIPS ECOFF.
728 * Makefile.am (TARG_ENV_HFILES): Remove config/te-lnews.h.
729 (MULTI_CFILES): Remove config/e-mipsecoff.c.
730 * Makefile.in: Regenerate.
731 * configure.in: Remove MIPS ECOFF references.
732 (mips-sony-bsd*, mips-*-bsd*, mips-*-lnews*-ecoff, mips-*-*-ecoff):
733 Delete cases.
734 (mips-*-irix5*-*, mips*-*-linux*-*, mips*-*-freebsd*)
735 (mips*-*-kfreebsd*-gnu, mips-*-*-elf): Fold into...
736 (mips-*-*): ...this single case.
737 (mipsbecoff, mipslecoff, mipsecoff): Remove emulations. Expect
738 MIPS emulations to be e-mipself*.
739 * configure: Regenerate.
740 * configure.tgt (mips-sony-bsd*, mips-*-ultrix*, mips-*-osf*)
741 (mips-*-ecoff*, mips-*-pe*, mips-*-irix*, ips-*-lnews*, mips-*-riscos*)
742 (mips-*-sysv*): Remove coff and ecoff cases.
743 * as.c (mipsbecoff, mipslecoff, mipsecoff): Remove.
744 * ecoff.c: Remove reference to MIPS ECOFF.
745 * config/e-mipsecoff.c, config/te-lnews.h: Delete files.
746 * config/tc-mips.c (ECOFF_LITTLE_FORMAT): Delete.
747 (RDATA_SECTION_NAME, mips_target_form): Remove COFF and ECOFF cases.
748 (mips_hi_fixup): Tweak comment.
749 (append_insn): Require a howto.
750 (mips_after_parse_args): Remove OBJ_MAYBE_ECOFF code.
751
98508b2a
RS
7522013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
753
754 * doc/as.texinfo: Use MIPS rather than @sc{mips} throughout.
755 Use "CPU" instead of "cpu".
756 * doc/c-mips.texi: Likewise.
757 (MIPS Opts): Rename to MIPS Options.
758 (MIPS option stack): Rename to MIPS Option Stack.
759 (MIPS ASE instruction generation overrides): Rename to
760 MIPS ASE Instruction Generation Overrides (for now).
761 (MIPS floating-point): Rename to MIPS Floating-Point.
762
fc16f8cc
RS
7632013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
764
765 * doc/c-mips.texi (MIPS Macros): New section.
766 (MIPS Object): Replace with...
767 (MIPS Small Data): ...this new section.
768
5a7560b5
RS
7692013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
770
771 * doc/c-mips.texi (MIPS symbol sizes): Move section further up file.
772 Capitalize name. Use @kindex instead of @cindex for .set entries.
773
a1b86ab7
RS
7742013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
775
776 * doc/c-mips.texi (MIPS Stabs): Remove section.
777
c6278170
RS
7782013-06-20 Richard Sandiford <rdsandiford@googlemail.com>
779
780 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS, ISA_SUPPORTS_DSP_ASE)
781 (ISA_SUPPORTS_DSP64_ASE, ISA_SUPPORTS_DSPR2_ASE, ISA_SUPPORTS_EVA_ASE)
782 (ISA_SUPPORTS_MT_ASE, ISA_SUPPORTS_MCU_ASE, ISA_SUPPORTS_VIRT_ASE)
783 (ISA_SUPPORTS_VIRT64_ASE): Delete.
784 (mips_ase): New structure.
785 (mips_ases): New table.
786 (FP64_ASES): New macro.
787 (mips_ase_groups): New array.
788 (mips_isa_rev, mips_ase_mask, mips_check_isa_supports_ase)
789 (mips_check_isa_supports_ases, mips_set_ase, mips_lookup_ase): New
790 functions.
791 (is_opcode_valid): Use mips_ases to get the 64-bit ASE flags.
792 (md_parse_option): Use mips_ases and mips_set_ase instead of
793 separate case statements for each ASE option.
794 (mips_after_parse_args): Use FP64_ASES. Use
795 mips_check_isa_supports_ases to check the ASEs against
796 other options.
797 (s_mipsset): Use mips_ases and mips_set_ase instead of
798 separate if statements for each ASE option. Use
799 mips_check_isa_supports_ases, even when a non-ASE option
800 is specified.
801
63a4bc21
KT
8022013-06-19 Greta Yorsh <Greta.Yorsh@arm.com>
803
804 * config/tc-arm.c (arm_cpus): Add support for Cortex-A12.
805
c31f3936
RS
8062013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
807
808 * config/tc-mips.c (md_shortopts, options, md_longopts)
809 (md_longopts_size): Move earlier in file.
810
846ef2d0
RS
8112013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
812
813 * config/tc-mips.c (mips_set_options): Replace separate "ase_*" fields
814 with a single "ase" bitmask.
815 (mips_opts): Update accordingly.
816 (file_ase, file_ase_explicit): New variables.
817 (file_ase_mips3d, file_ase_mdmx, file_ase_smartmips, file_ase_dsp)
818 (file_ase_dspr2, file_ase_eva, file_ase_mt, file_ase_virt): Delete.
819 (ISA_HAS_ROR): Adjust for mips_set_options change.
820 (is_opcode_valid): Take the base ase mask directly from mips_opts.
821 (mips_ip): Adjust for mips_set_options change.
822 (md_parse_option): Likewise. Update file_ase_explicit.
823 (mips_after_parse_args): Adjust for mips_set_options change.
824 Use bitmask operations to select the default ASEs. Set file_ase
825 rather than individual per-ASE variables.
826 (s_mipsset): Adjust for mips_set_options change.
827 (mips_elf_final_processing): Test file_ase rather than
828 file_ase_mdmx. Remove commented-out code.
829
d16afab6
RS
8302013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
831
832 * config/tc-mips.c (mips_cpu_info): Add an "ase" field.
833 (MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, MIPS_CPU_ASE_MT)
834 (MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX, MIPS_CPU_ASE_DSPR2)
835 (MIPS_CPU_ASE_MCU, MIPS_CPU_ASE_VIRT, MIPS_CPU_ASE_EVA): Delete.
836 (mips_after_parse_args): Use the new "ase" field to choose
837 the default ASEs.
838 (mips_cpu_info_table): Move ASEs from the "flags" field to the
839 "ase" field.
840
e83a675f
RE
8412013-06-18 Richard Earnshaw <rearnsha@arm.com>
842
843 * config/tc-arm.c (symbol_preemptible): New function.
844 (relax_branch): Use it.
845
7f3c4072
CM
8462013-06-17 Catherine Moore <clm@codesourcery.com>
847 Maciej W. Rozycki <macro@codesourcery.com>
848 Chao-Ying Fu <fu@mips.com>
849
850 * config/tc-mips.c (mips_set_options): Add ase_eva.
851 (mips_set_options mips_opts): Add ase_eva.
852 (file_ase_eva): Declare.
853 (ISA_SUPPORTS_EVA_ASE): Define.
854 (IS_SEXT_9BIT_NUM): Define.
855 (MIPS_CPU_ASE_EVA): Define.
856 (is_opcode_valid): Add support for ase_eva.
857 (macro_build): Likewise.
858 (macro): Likewise.
859 (validate_mips_insn): Likewise.
860 (validate_micromips_insn): Likewise.
861 (mips_ip): Likewise.
862 (options): Add OPTION_EVA and OPTION_NO_EVA.
863 (md_longopts): Add -meva and -mno-eva.
864 (md_parse_option): Process new options.
865 (mips_after_parse_args): Check for valid EVA combinations.
866 (s_mipsset): Likewise.
867
e410add4
RS
8682013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
869
870 * dwarf2dbg.h (dwarf2_move_insn): Declare.
871 * dwarf2dbg.c (line_subseg): Add pmove_tail.
872 (get_line_subseg): Add create_p argument. Initialize pmove_tail.
873 (dwarf2_gen_line_info_1): Update call accordingly.
874 (dwarf2_move_insn): New function.
875 * config/tc-mips.c (append_insn): Use dwarf2_move_insn.
876
6a50d470
RS
8772013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
878
879 Revert:
880
881 2011-09-05 Richard Sandiford <rdsandiford@googlemail.com>
882
883 PR gas/13024
884 * dwarf2dbg.c (pending_lines, pending_lines_tail): New variables.
885 (dwarf2_gen_line_info_1): Delete.
886 (dwarf2_push_line, dwarf2_flush_pending_lines): New functions.
887 (dwarf2_gen_line_info, dwarf2_emit_label): Use them.
888 (dwarf2_consume_line_info): Call dwarf2_flush_pending_lines.
889 (dwarf2_directive_loc): Push previous .locs instead of generating
890 them immediately.
891
f122319e
CF
8922013-06-13 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
893
894 * config/tc-mips.c (ISA_SUPPORTS_VIRT_ASE): Support micromips.
895 (ISA_SUPPORTS_VIRT64_ASE): Support 64-bit micromips.
896
909c7f9c
NC
8972013-06-13 Nick Clifton <nickc@redhat.com>
898
899 PR gas/15602
900 * config/tc-m68k.h (TC_CHECK_ADJUSTED_BROKEN_DOT_WORD): Define.
901 * config/tc-m68k.c (tc_m68k_check_adjusted_broken_word): New
902 function. Generates an error if the adjusted offset is out of a
903 16-bit range.
904
5d5755a7
SL
9052013-06-12 Sandra Loosemore <sandra@codesourcery.com>
906
907 * config/tc-nios2.c (md_apply_fix): Mask constant
908 BFD_RELOC_NIOS2_HIADJ16 value to 16 bits.
909
3bf0dbfb
MR
9102013-06-10 Maciej W. Rozycki <macro@codesourcery.com>
911
912 * config/tc-mips.c (append_insn): Don't do branch relaxation for
913 MIPS-3D instructions either.
914 (md_convert_frag): Update the COPx branch mask accordingly.
915
916 * config/tc-mips.c (md_show_usage): Document --[no-]relax-branch
917 option.
918 * doc/as.texinfo (Overview): Add --relax-branch and
919 --no-relax-branch.
920 * doc/c-mips.texi (MIPS Opts): Document --relax-branch and
921 --no-relax-branch.
922
9daf7bab
SL
9232013-06-09 Sandra Loosemore <sandra@codesourcery.com>
924
925 * config/tc-nios2.c (nios2_parse_args): Allow trap argument to
926 omitted.
927
d301a56b
RS
9282013-06-08 Catherine Moore <clm@codesourcery.com>
929
930 * config/tc-mips.c (is_opcode_valid): Build ASE mask.
931 (is_opcode_valid_16): Pass ase value to opcode_is_member.
932 (append_insn): Change INSN_xxxx to ASE_xxxx.
933
7bab7634
DC
9342013-06-01 George Thomas <george.thomas@atmel.com>
935
cbe02d4f 936 * gas/config/tc-avr.c: Change ISA for devices with USB support to
7bab7634
DC
937 AVR_ISA_XMEGAU
938
f60cf82f
L
9392013-05-31 H.J. Lu <hongjiu.lu@intel.com>
940
941 * config/tc-i386.c (md_begin): Don't align text/data/bss sections
942 for ELF.
943
a3f278e2
CM
9442013-05-31 Paul Brook <paul@codesourcery.com>
945
a3f278e2
CM
946 * config/tc-mips.c (s_ehword): New.
947
067ec077
CM
9482013-05-30 Paul Brook <paul@codesourcery.com>
949
950 * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH.
951
d6101ac2
MR
9522013-05-29 Maciej W. Rozycki <macro@codesourcery.com>
953
954 * write.c (resolve_reloc_expr_symbols): On REL targets don't
955 convert relocs who have no relocatable field either. Rephrase
956 the conditional so that the PC-relative check is only applied
957 for REL targets.
958
f19ccbda
MR
9592013-05-28 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
960
961 * config/tc-mips.c (macro) <ld>: Don't use $zero for address
962 calculation.
963
418009c2
YZ
9642013-05-28 Yufeng Zhang <yufeng.zhang@arm.com>
965
966 * config/tc-aarch64.c (reloc_table): Update to use
477330fc 967 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of
418009c2
YZ
968 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE.
969 (md_apply_fix): Likewise.
970 (aarch64_force_relocation): Likewise.
971
0a8897c7
KT
9722013-05-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
973
974 * config/tc-arm.c (it_fsm_post_encode): Improve
975 warning messages about deprecated IT block formats.
976
89d2a2a3
MS
9772013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com>
978
979 * config/tc-aarch64.c (md_apply_fix): Move value range checking
980 inside fx_done condition.
981
c77c0862
RS
9822013-05-22 Jürgen Urban <JuergenUrban@gmx.de>
983
984 * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB.
985
c0637f3a
PB
9862013-05-20 Peter Bergner <bergner@vnet.ibm.com>
987
988 * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error
989 and clean up warning when using PRINT_OPCODE_TABLE.
990
5656a981
AM
9912013-05-20 Alan Modra <amodra@gmail.com>
992
993 * config/tc-ppc.c (md_apply_fix): Hoist code common to insn
994 and data fixups performing shift/high adjust/sign extension on
995 fieldval. Sink fx_pcrel handling and checks. Use fixP->fx_size
996 when writing data fixups rather than recalculating size.
997
997b26e8
JBG
9982013-05-16 Jan-Benedict Glaw <jbglaw@lug-owl.de>
999
1000 * doc/c-msp430.texi: Fix typo.
1001
9f6e76f4
TG
10022013-05-16 Tristan Gingold <gingold@adacore.com>
1003
1004 * config/tc-ppc.c (ppc_is_toc_sym): Symbols of class XMC_TC
1005 are also TOC symbols.
1006
638d3803
NC
10072013-05-16 Nick Clifton <nickc@redhat.com>
1008
1009 * config/tc-msp430.c: Make -mmcu recognise more part numbers.
1010 Add -mcpu command to specify core type.
997b26e8 1011 * doc/c-msp430.texi: Update documentation.
638d3803 1012
b015e599
AP
10132013-05-09 Andrew Pinski <apinski@cavium.com>
1014
1015 * config/tc-mips.c (struct mips_set_options): New ase_virt field.
1016 (mips_opts): Update for the new field.
1017 (file_ase_virt): New variable.
1018 (ISA_SUPPORTS_VIRT_ASE): New macro.
1019 (ISA_SUPPORTS_VIRT64_ASE): New macro.
1020 (MIPS_CPU_ASE_VIRT): New define.
1021 (is_opcode_valid): Handle ase_virt.
1022 (macro_build): Handle "+J".
1023 (validate_mips_insn): Likewise.
1024 (mips_ip): Likewise.
1025 (enum options): Add OPTION_VIRT and OPTION_NO_VIRT.
1026 (md_longopts): Add mvirt and mnovirt
1027 (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT.
1028 (mips_after_parse_args): Handle ase_virt field.
1029 (s_mipsset): Handle "virt" and "novirt".
1030 (mips_elf_final_processing): Add a comment about virt ASE might need
1031 a new flag.
1032 (md_show_usage): Print out the usage of -mvirt and mno-virt options.
1033 * doc/c-mips.texi: Document -mvirt and -mno-virt.
1034 Document ".set virt" and ".set novirt".
1035
da8094d7
AM
10362013-05-09 Alan Modra <amodra@gmail.com>
1037
1038 * config/tc-ppc.c (md_apply_fix): Sign extend fieldval under
1039 control of operand flag bits.
1040
c5f8c205
AM
10412013-05-07 Alan Modra <amodra@gmail.com>
1042
1043 * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro.
1044 (PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise.
1045 (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise.
1046 (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise.
1047 (md_apply_fix): Set fx_no_overflow for assorted relocations.
1048 Shift and sign-extend fieldval for use by some VLE reloc
1049 operand->insert functions.
1050
b47468a6
CM
10512013-05-06 Paul Brook <paul@codesourcery.com>
1052 Catherine Moore <clm@codesourcery.com>
1053
c5f8c205
AM
1054 * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL.
1055 (limited_pcrel_reloc_p): Likewise.
b47468a6
CM
1056 (md_apply_fix): Likewise.
1057 (tc_gen_reloc): Likewise.
1058
2de39019
CM
10592013-05-06 Richard Sandiford <rdsandiford@googlemail.com>
1060
1061 * config/tc-mips.c (limited_pcrel_reloc_p): New function.
1062 (mips_fix_adjustable): Adjust pc-relative check to use
1063 limited_pc_reloc_p.
1064
754e2bb9
RS
10652013-05-02 Richard Sandiford <rdsandiford@googlemail.com>
1066
1067 * config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries.
1068 (s_mips_stab): Do not restrict to stabn only.
1069
13761a11
NC
10702013-05-02 Nick Clifton <nickc@redhat.com>
1071
1072 * config/tc-msp430.c: Add support for the MSP430X architecture.
1073 Add code to insert a NOP instruction after any instruction that
1074 might change the interrupt state.
1075 Add support for the LARGE memory model.
1076 Add code to initialise the .MSP430.attributes section.
1077 * config/tc-msp430.h: Add support for the MSP430X architecture.
1078 * doc/c-msp430.texi: Document the new -mL and -mN command line
1079 options.
1080 * NEWS: Mention support for the MSP430X architecture.
1081
df26367c
MR
10822013-05-01 Maciej W. Rozycki <macro@codesourcery.com>
1083
1084 * configure.tgt: Replace alpha*-*-linuxecoff* pattern with
1085 alpha*-*-linux*ecoff*.
1086
f02d8318
CF
10872013-04-30 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1088
1089 * config/tc-mips.c (mips_ip): Add sizelo.
1090 For "+C", "+G", and "+H", set sizelo and compare against it.
1091
b40bf0a2
NC
10922013-04-29 Nick Clifton <nickc@redhat.com>
1093
1094 * as.c (Options): Add -gdwarf-sections.
1095 (parse_args): Likewise.
1096 * as.h (flag_dwarf_sections): Declare.
1097 * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes.
1098 (process_entries): When -gdwarf-sections is enabled generate
1099 fragmentary .debug_line sections.
1100 (out_debug_line): Set the section for the .debug_line section end
1101 symbol.
1102 * doc/as.texinfo: Document -gdwarf-sections.
1103 * NEWS: Mention -gdwarf-sections.
1104
8eeccb77 11052013-04-26 Christian Groessler <chris@groessler.org>
00a3147e
CG
1106
1107 * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdline
1108 according to the target parameter. Don't call s_segm since s_segm
1109 calls bfd_set_arch_mach using stdoutput, but stdoutput isn't
1110 initialized yet.
1111 (md_begin): Call s_segm according to target parameter from command
1112 line.
1113
49926cd0
AM
11142013-04-25 Alan Modra <amodra@gmail.com>
1115
1116 * configure.in: Allow little-endian linux.
1117 * configure: Regenerate.
1118
e3031850
SL
11192013-04-24 Sandra Loosemore <sandra@codesourcery.com>
1120
1121 * config/tc-nios2.c (nios2_control_register_arg_p): Rename
1122 "fstatus" control register to "eccinj".
1123
cb948fc0
KT
11242013-04-19 Kai Tietz <ktietz@redhat.com>
1125
1126 * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin.
1127
4455e9ad
JB
11282013-04-15 Julian Brown <julian@codesourcery.com>
1129
1130 * expr.c (add_to_result, subtract_from_result): Make global.
1131 * expr.h (add_to_result, subtract_from_result): Add prototypes.
1132 * config/tc-sh.c (sh_optimize_expr): Use add_to_result,
1133 subtract_from_result to handle extra bit of precision for .sleb128
1134 directive operands.
1135
956a6ba3
JB
11362013-04-10 Julian Brown <julian@codesourcery.com>
1137
1138 * read.c (convert_to_bignum): Add sign parameter. Use it
1139 instead of X_unsigned to determine sign of resulting bignum.
1140 (emit_expr): Pass extra argument to convert_to_bignum.
1141 (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass
1142 X_extrabit to convert_to_bignum.
1143 (parse_bitfield_cons): Set X_extrabit.
1144 * expr.c (make_expr_symbol, expr_build_uconstant, operand):
1145 Initialise X_extrabit field as appropriate.
1146 (add_to_result): New.
1147 (subtract_from_result): New.
1148 (expr): Use above.
1149 * expr.h (expressionS): Add X_extrabit field.
1150
eb9f3f00
JB
11512013-04-10 Jan Beulich <jbeulich@suse.com>
1152
1153 * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base
1154 register being PC when is_t or writeback, and use distinct
1155 diagnostic for the latter case.
1156
ccb84d65
JB
11572013-04-10 Jan Beulich <jbeulich@suse.com>
1158
1159 * gas/config/tc-arm.c (parse_operands): Re-write
1160 po_barrier_or_imm().
1161 (do_barrier): Remove bogus constraint().
1162 (do_t_barrier): Remove.
1163
4d13caa0
NC
11642013-04-09 Joerg Wunsch <joerg.wunsch@atmel.com>
1165
1166 * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2,
1167 ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2,
1168 ATmega2564RFR2
1169 * gas/doc/c-avr.texi (-mmcu documentation): Likewise.
1170
16d02dc9
JB
11712013-04-09 Jan Beulich <jbeulich@suse.com>
1172
1173 * gas/config/tc-arm.c (do_vmrs): Accept all control registers.
1174 Use local variable Rt in more places.
1175 (do_vmsr): Accept all control registers.
1176
05ac0ffb
JB
11772013-04-09 Jan Beulich <jbeulich@suse.com>
1178
1179 * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
1180 if there was none specified for moves between scalar and core
1181 register.
1182
2d51fb74
JB
11832013-04-09 Jan Beulich <jbeulich@suse.com>
1184
1185 * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the
1186 NEON_ALL_LANES case.
1187
94dcf8bf
JB
11882013-04-08 Jan Beulich <jbeulich@suse.com>
1189
1190 * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for
1191 PC-relative VSTR.
1192
1472d06f
JB
11932013-04-08 Jan Beulich <jbeulich@suse.com>
1194
1195 * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq
1196 entry to sp_fiq.
1197
0c76cae8
AM
11982013-04-03 Alan Modra <amodra@gmail.com>
1199
1200 * doc/as.texinfo: Add support to generate man options for h8300.
1201 * doc/c-h8300.texi: Likewise.
1202
92eb40d9
RR
12032013-03-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
1204
1205 * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and
1206 Cortex-A57.
1207
51dcdd4d
NC
12082013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com>
1209
1210 PR binutils/15068
1211 * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array.
1212
c5d685bf
NC
12132013-03-26 Nick Clifton <nickc@redhat.com>
1214
9b978282
NC
1215 PR gas/15295
1216 * listing.c (rebuffer_line): Rewrite to avoid seeking back to the
1217 start of the file each time.
1218
c5d685bf
NC
1219 PR gas/15178
1220 * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for
1221 FreeBSD targets.
1222
9699c833
TG
12232013-03-26 Douglas B Rupp <rupp@gnat.com>
1224
1225 * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment
1226 after fixup.
1227
4755303e
WN
12282013-03-21 Will Newton <will.newton@linaro.org>
1229
1230 * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all
1231 pc-relative str instructions in Thumb mode.
1232
81f5558e
NC
12332013-03-21 Michael Schewe <michael.schewe@gmx.net>
1234
1235 * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
1236 @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
1237 R_H8_DISP32A16.
1238 * config/tc-h8300.h: Remove duplicated defines.
1239
71863e73
NC
12402013-03-21 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
1241
1242 PR gas/15282
1243 * tc-avr.c (mcu_has_3_byte_pc): New function.
1244 (tc_cfi_frame_initial_instructions): Call it to find return
1245 address size.
1246
795b8e6b
NC
12472013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com>
1248
1249 PR gas/15095
1250 * config/tc-tic6x.c (tic6x_try_encode): Handle
1251 tic6x_coding_dreg_(msb|lsb) field coding types and use it to
1252 encode register pair numbers when required.
1253
ba86b375
WN
12542013-03-15 Will Newton <will.newton@linaro.org>
1255
1256 * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register
1257 in vstr in Thumb mode for pre-ARMv7 cores.
1258
9e6f3811
AS
12592013-03-14 Andreas Schwab <schwab@suse.de>
1260
1261 * doc/c-arc.texi (ARC Directives): Revert last change and use
1262 @itemize instead of @table.
1263 * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
1264
b10bf8c5
NC
12652013-03-14 Nick Clifton <nickc@redhat.com>
1266
1267 PR gas/15273
1268 * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a
1269 NULL message, instead just check ARM_CPU_IS_ANY directly.
1270
ba724cfc
NC
12712013-03-14 Nick Clifton <nickc@redhat.com>
1272
1273 PR gas/15212
9e6f3811 1274 * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet
ba724cfc
NC
1275 for table format.
1276 * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
1277 to the @item directives.
1278 (ARM-Neon-Alignment): Move to correct place in the document.
1279 * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
1280 formatting.
1281 * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
1282 @smallexample.
1283
531a94fd
SL
12842013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
1285
1286 * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'
1287 case. Add default BAD_CASE to switch.
1288
dad60f8e
SL
12892013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
1290
1291 * config/tc-nios2.c (nios2_assemble_args_ds): New function.
1292 (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
1293
dd5181d5
KT
12942013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1295
1296 * config/tc-arm.c (crc_ext_armv8): New feature set.
1297 (UNPRED_REG): New macro.
1298 (do_crc32_1): New function.
1299 (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
1300 do_crc32ch, do_crc32cw): Likewise.
1301 (TUEc): New macro.
1302 (insns): Add entries for crc32 mnemonics.
1303 (arm_extensions): Add entry for crc.
1304
8e723a10
CLT
13052013-03-08 Chung-Lin Tang <cltang@codesourcery.com>
1306
1307 * write.h (struct fix): Add fx_dot_frag field.
1308 (dot_frag): Declare.
1309 * write.c (dot_frag): New variable.
1310 (fix_new_internal): Set fx_dot_frag field with dot_frag.
1311 (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
1312 * expr.c (expr): Save value of frag_now in dot_frag when setting
1313 dot_value.
1314 * read.c (emit_expr): Likewise. Delete comments.
1315
be05d201
L
13162013-03-07 H.J. Lu <hongjiu.lu@intel.com>
1317
1318 * config/tc-i386.c (flag_code_names): Removed.
1319 (i386_index_check): Rewrote.
1320
62b0d0d5
YZ
13212013-03-05 Yufeng Zhang <yufeng.zhang@arm.com>
1322
1323 * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
1324 add comment.
1325 (aarch64_double_precision_fmovable): New function.
1326 (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
1327 function; handle hexadecimal representation of IEEE754 encoding.
1328 (parse_operands): Update the call to parse_aarch64_imm_float.
1329
165de32a
L
13302013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1331
1332 * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
1333 (check_hle): Updated.
1334 (md_assemble): Likewise.
1335 (parse_insn): Likewise.
1336
d5de92cf
L
13372013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1338
1339 * config/tc-i386.c (_i386_insn): Add rep_prefix.
9e6f3811 1340 (md_assemble): Check if REP prefix is OK.
d5de92cf
L
1341 (parse_insn): Remove expecting_string_instruction. Set
1342 i.rep_prefix.
1343
e60bb1dd
YZ
13442013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1345
1346 * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
1347
aeebdd9b
YZ
13482013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1349
1350 * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
1351 for system registers.
1352
4107ae22
DD
13532013-02-27 DJ Delorie <dj@redhat.com>
1354
1355 * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
1356 (rl78_op): Handle %code().
1357 (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
1358 (tc_gen_reloc): Likwise; convert to a computed reloc.
1359 (md_apply_fix): Likewise.
1360
151fa98f
NC
13612013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
1362
1363 * config/rl78-parse.y: Fix encoding of DIVWU insn.
1364
70a8bc5b 13652013-02-25 Terry Guo <terry.guo@arm.com>
1366
1367 * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
1368 * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
1369 list of accepted CPUs.
1370
5c111e37
L
13712013-02-19 H.J. Lu <hongjiu.lu@intel.com>
1372
1373 PR gas/15159
1374 * config/tc-i386.c (cpu_arch): Add ".smap".
1375
1376 * doc/c-i386.texi: Document smap.
1377
8a75745d
MR
13782013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1379
1380 * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
1381 mips_assembling_insn appropriately.
1382 (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
1383
79850f26
MR
13842013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1385
cf29fc61 1386 * config/tc-mips.c (append_insn): Correct indentation, remove
79850f26
MR
1387 extraneous braces.
1388
4c261dff
NC
13892013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1390
5c111e37 1391 * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
4c261dff 1392
ea33f281
NC
13932013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
1394
1395 * configure.tgt: Add nios2-*-rtems*.
1396
a1ccaec9
YZ
13972013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
1398
1399 * config/tc-aarch64.c (md_begin): Change to check if 'name' is
1400 NULL.
1401
0aa27725
RS
14022013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
1403
1404 * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
1405 (macro): Use it. Assert that trunc.w.s is not used for r5900.
1406
da4339ed
NC
14072013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com>
1408
1409 * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
1410 core.
1411
36591ba1 14122013-02-06 Sandra Loosemore <sandra@codesourcery.com>
5c111e37 1413 Andrew Jenner <andrew@codesourcery.com>
36591ba1
SL
1414
1415 Based on patches from Altera Corporation.
1416
1417 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
1418 (TARGET_CPU_HFILES): Add config/tc-nios2.h.
1419 * Makefile.in: Regenerated.
1420 * configure.tgt: Add case for nios2*-linux*.
1421 * config/obj-elf.c: Conditionally include elf/nios2.h.
1422 * config/tc-nios2.c: New file.
1423 * config/tc-nios2.h: New file.
1424 * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
1425 * doc/Makefile.in: Regenerated.
1426 * doc/all.texi: Set NIOSII.
1427 * doc/as.texinfo (Overview): Add Nios II options.
1428 (Machine Dependencies): Include c-nios2.texi.
1429 * doc/c-nios2.texi: New file.
1430 * NEWS: Note Altera Nios II support.
1431
94d4433a
AM
14322013-02-06 Alan Modra <amodra@gmail.com>
1433
1434 PR gas/14255
1435 * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
1436 Don't skip fixups with fx_subsy non-NULL.
1437 * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
1438 with fx_subsy non-NULL.
1439
ace9af6f
L
14402013-02-04 H.J. Lu <hongjiu.lu@intel.com>
1441
1442 * doc/c-metag.texi: Add "@c man" markers.
1443
89d67ed9
AM
14442013-02-04 Alan Modra <amodra@gmail.com>
1445
1446 * write.c (fixup_segment): Return void. Delete seg_reloc_count
1447 related code.
1448 (TC_ADJUST_RELOC_COUNT): Delete.
1449 * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
1450
89072bd6
AM
14512013-02-04 Alan Modra <amodra@gmail.com>
1452
1453 * po/POTFILES.in: Regenerate.
1454
f9b2d544
NC
14552013-01-30 Markos Chandras <markos.chandras@imgtec.com>
1456
1457 * config/tc-metag.c: Make SWAP instruction less permissive with
1458 its operands.
1459
392ca752
DD
14602013-01-29 DJ Delorie <dj@redhat.com>
1461
1462 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
1463 relocs in .word/.etc statements.
1464
427d0db6
RM
14652013-01-29 Roland McGrath <mcgrathr@google.com>
1466
1467 * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
1468 immediate value for 8-bit offset" error so it shows line info.
1469
4faf939a
JM
14702013-01-24 Joseph Myers <joseph@codesourcery.com>
1471
1472 * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
1473 for 64-bit output.
1474
78c8d46c
NC
14752013-01-24 Nick Clifton <nickc@redhat.com>
1476
1477 * config/tc-v850.c: Add support for e3v5 architecture.
1478 * doc/c-v850.texi: Mention new support.
1479
fb5b7503
NC
14802013-01-23 Nick Clifton <nickc@redhat.com>
1481
1482 PR gas/15039
1483 * config/tc-avr.c: Include dwarf2dbg.h.
1484
8ce3d284
L
14852013-01-18 H.J. Lu <hongjiu.lu@intel.com>
1486
1487 * config/tc-i386.c (reloc): Support size relocation only for ELF.
1488 (tc_i386_fix_adjustable): Likewise.
1489 (lex_got): Likewise.
1490 (tc_gen_reloc): Likewise.
1491
f5555712
YZ
14922013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
1493
1494 * config/tc-aarch64.c (output_operand_error_record): Change to output
1495 the out-of-range error message as value-expected message if there is
1496 only one single value in the expected range.
1497 (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
1498 LSL #0 as a programmer-friendly feature.
1499
8fd4256d
L
15002013-01-16 H.J. Lu <hongjiu.lu@intel.com>
1501
1502 * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
1503 (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
1504 BFD_RELOC_64_SIZE relocations.
1505 (lex_got): Support "symbol@SIZE" and don't create GOT symbol
1506 for it.
1507 (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
1508 relocations against local symbols.
1509
a5840dce
AM
15102013-01-16 Alan Modra <amodra@gmail.com>
1511
1512 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
1513 finding some sort of toc syntax error, and break to avoid
1514 compiler uninit warning.
1515
af89796a
L
15162013-01-15 H.J. Lu <hongjiu.lu@intel.com>
1517
1518 PR gas/15019
1519 * config/tc-i386.c (lex_got): Increment length by 1 if the
1520 relocation token is removed.
1521
dd42f060
NC
15222013-01-15 Nick Clifton <nickc@redhat.com>
1523
1524 * config/tc-v850.c (md_assemble): Allow signed values for
1525 V850E_IMMEDIATE.
1526
464e3686
SK
15272013-01-11 Sean Keys <skeys@ipdatasys.com>
1528
1529 * config/tc-xgate.c (md_begin): Fix mistake made when going from
af89796a 1530 git to cvs.
464e3686 1531
5817ffd1
PB
15322013-01-10 Peter Bergner <bergner@vnet.ibm.com>
1533
1534 * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
1535 * doc/c-ppc.texi (PowerPC-Opts): Likewise.
1536 * config/tc-ppc.c (md_show_usage): Likewise.
1537 (ppc_handle_align): Handle power8's group ending nop.
1538
f4b1f6a9
SK
15392013-01-10 Sean Keys <skeys@ipdatasys.com>
1540
1541 * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
af89796a 1542 that the assember exits after the opcodes have been printed.
f4b1f6a9 1543
34bca508
L
15442013-01-10 H.J. Lu <hongjiu.lu@intel.com>
1545
1546 * app.c: Remove trailing white spaces.
1547 * as.c: Likewise.
1548 * as.h: Likewise.
1549 * cond.c: Likewise.
1550 * dw2gencfi.c: Likewise.
1551 * dwarf2dbg.h: Likewise.
1552 * ecoff.c: Likewise.
1553 * input-file.c: Likewise.
1554 * itbl-lex.h: Likewise.
1555 * output-file.c: Likewise.
1556 * read.c: Likewise.
1557 * sb.c: Likewise.
1558 * subsegs.c: Likewise.
1559 * symbols.c: Likewise.
1560 * write.c: Likewise.
1561 * config/tc-i386.c: Likewise.
1562 * doc/Makefile.am: Likewise.
1563 * doc/Makefile.in: Likewise.
1564 * doc/c-aarch64.texi: Likewise.
1565 * doc/c-alpha.texi: Likewise.
1566 * doc/c-arc.texi: Likewise.
1567 * doc/c-arm.texi: Likewise.
1568 * doc/c-avr.texi: Likewise.
1569 * doc/c-bfin.texi: Likewise.
1570 * doc/c-cr16.texi: Likewise.
1571 * doc/c-d10v.texi: Likewise.
1572 * doc/c-d30v.texi: Likewise.
1573 * doc/c-h8300.texi: Likewise.
1574 * doc/c-hppa.texi: Likewise.
1575 * doc/c-i370.texi: Likewise.
1576 * doc/c-i386.texi: Likewise.
1577 * doc/c-i860.texi: Likewise.
1578 * doc/c-m32c.texi: Likewise.
1579 * doc/c-m32r.texi: Likewise.
1580 * doc/c-m68hc11.texi: Likewise.
1581 * doc/c-m68k.texi: Likewise.
1582 * doc/c-microblaze.texi: Likewise.
1583 * doc/c-mips.texi: Likewise.
1584 * doc/c-msp430.texi: Likewise.
1585 * doc/c-mt.texi: Likewise.
1586 * doc/c-s390.texi: Likewise.
1587 * doc/c-score.texi: Likewise.
1588 * doc/c-sh.texi: Likewise.
1589 * doc/c-sh64.texi: Likewise.
1590 * doc/c-tic54x.texi: Likewise.
1591 * doc/c-tic6x.texi: Likewise.
1592 * doc/c-v850.texi: Likewise.
1593 * doc/c-xc16x.texi: Likewise.
1594 * doc/c-xgate.texi: Likewise.
1595 * doc/c-xtensa.texi: Likewise.
1596 * doc/c-z80.texi: Likewise.
1597 * doc/internals.texi: Likewise.
1598
4c665b71
RM
15992013-01-10 Roland McGrath <mcgrathr@google.com>
1600
1601 * hash.c (hash_new_sized): Make it global.
1602 * hash.h: Declare it.
1603 * macro.c (define_macro): Use hash_new_sized instead of hash_new,
1604 pass a small size.
1605
a3c62988
NC
16062013-01-10 Will Newton <will.newton@imgtec.com>
1607
1608 * Makefile.am: Add Meta.
1609 * Makefile.in: Regenerate.
1610 * config/tc-metag.c: New file.
1611 * config/tc-metag.h: New file.
1612 * configure.tgt: Add Meta.
1613 * doc/Makefile.am: Add Meta.
1614 * doc/Makefile.in: Regenerate.
1615 * doc/all.texi: Add Meta.
1616 * doc/as.texiinfo: Document Meta options.
1617 * doc/c-metag.texi: New file.
1618
b37df7c4
SE
16192013-01-09 Steve Ellcey <sellcey@mips.com>
1620
1621 * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
1622 calls.
1623 * config/tc-mips.c (internalError): Remove, replace with abort.
1624
a3251895
YZ
16252013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
1626
1627 * config/tc-aarch64.c (parse_operands): Change to compare the result
1628 of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
1629
8ab8155f
NC
16302013-01-07 Nick Clifton <nickc@redhat.com>
1631
1632 PR gas/14887
1633 * config/tc-arm.c (skip_past_char): Skip whitespace before the
1634 anticipated character.
1635 * config/tc-arm.c (parse_address_main): Delete skip of whitespace
1636 here as it is no longer needed.
1637
a4ac1c42
AS
16382013-01-06 Andreas Schwab <schwab@linux-m68k.org>
1639
1640 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
1641 * doc/c-score.texi (SCORE-Opts): Likewise.
1642 * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
1643
e407c74b
NC
16442013-01-04 Juergen Urban <JuergenUrban@gmx.de>
1645
1646 * config/tc-mips.c: Add support for MIPS r5900.
1647 Add M_LQ_AB and M_SQ_AB to support large values for instructions
1648 lq and sq.
1649 (can_swap_branch_p, get_append_method): Detect some conditional
1650 short loops to fix a bug on the r5900 by NOP in the branch delay
1651 slot.
1652 (M_MUL): Support 3 operands in multu on r5900.
1653 (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
1654 (s_mipsset): Force 32 bit floating point on r5900.
1655 (mips_ip): Check parameter range of instructions mfps and mtps on
1656 r5900.
1657 * configure.in: Detect CPU type when target string contains r5900
1658 (e.g. mips64r5900el-linux-gnu).
1659
62658407
L
16602013-01-02 H.J. Lu <hongjiu.lu@intel.com>
1661
1662 * as.c (parse_args): Update copyright year to 2013.
1663
95830fd1
YZ
16642013-01-02 Yufeng Zhang <yufeng.zhang@arm.com>
1665
1666 * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
1667 and "cortex57".
1668
517bb291 16692013-01-02 Nick Clifton <nickc@redhat.com>
d709e4e6 1670
517bb291
NC
1671 PR gas/14987
1672 * config/tc-arm.c (parse_address_main): Skip whitespace before a
1673 closing bracket.
d709e4e6 1674
517bb291 1675For older changes see ChangeLog-2012
08d56133 1676\f
517bb291 1677Copyright (C) 2013 Free Software Foundation, Inc.
752937aa
NC
1678
1679Copying and distribution of this file, with or without modification,
1680are permitted in any medium without royalty provided the copyright
1681notice and this notice are preserved.
1682
08d56133
NC
1683Local Variables:
1684mode: change-log
1685left-margin: 8
1686fill-column: 74
1687version-control: never
1688End: