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12013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
2
3 * config/tc-mips.c (mips_arg_info): Replace allow_nonconst and
4 lax_max with lax_match.
5 (match_int_operand): Update accordingly. Don't report an error
6 for !lax_match-only cases.
7 (match_insn): Replace more_alts with lax_match and use it to
8 initialize the mips_arg_info field. Add a complete_p parameter.
9 Handle implicit VU0 suffixes here.
10 (match_invalid_for_isa, match_insns, match_mips16_insns): New
11 functions.
12 (mips_ip, mips16_ip): Use them.
13
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142013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
15
16 * config/tc-mips.c (match_expression): Report uses of registers here.
17 Add a "must be an immediate expression" error. Handle elided offsets
18 here rather than...
19 (match_int_operand): ...here.
20
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212013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
22
23 * config/tc-mips.c (mips_arg_info): Remove soft_match.
24 (match_out_of_range, match_not_constant): New functions.
25 (match_const_int): Remove fallback parameter and check for soft_match.
26 Use match_not_constant.
27 (match_mapped_int_operand, match_addiusp_operand)
28 (match_perf_reg_operand, match_save_restore_list_operand)
29 (match_mdmx_imm_reg_operand): Update accordingly. Use
30 match_out_of_range and set_insn_error* instead of as_bad.
31 (match_int_operand): Likewise. Use match_not_constant in the
32 !allows_nonconst case.
33 (match_float_constant): Report invalid float constants.
34 (match_insn, match_mips16_insn): Remove soft_match code. Rely on
35 match_float_constant to check for invalid constants. Fail the
36 match if match_const_int or match_float_constant return false.
37 (mips_ip): Update accordingly.
38 (mips16_ip): Likewise. Undo null termination of instruction name
39 once lookup is complete.
40
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412013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
42
43 * config/tc-mips.c (mips_insn_error_format): New enum.
44 (mips_insn_error): New struct.
45 (insn_error): Change to a mips_insn_error.
46 (clear_insn_error, set_insn_error_format, set_insn_error)
47 (set_insn_error_i, set_insn_error_ss, report_insn_error): New
48 functions.
49 (mips_parse_argument_token, md_assemble, match_insn)
50 (match_mips16_insn): Use them instead of manipulating insn_error
51 directly.
52 (mips_ip, mips16_ip): Likewise. Simplify control flow.
53
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542013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
55
56 * config/tc-mips.c (normalize_constant_expr): Move further up file.
57 (normalize_address_expr): Likewise.
58 (match_insn, match_mips16_insn): New functions, split out from...
59 (mips_ip, mips16_ip): ...here.
60
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612013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
62
63 * config/tc-mips.c (operand_reg_mask, match_operand): Handle
64 OP_OPTIONAL_REG.
65 (mips_ip, mips16_ip): Use mips_optional_operand_p to check
66 for optional operands.
67
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682013-08-16 Alan Modra <amodra@gmail.com>
69
70 * config/tc-ppc.c (ppc_elf_cons): Allow @l and other reloc
71 modifiers generally.
72
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732013-08-16 Alan Modra <amodra@gmail.com>
74
75 * config/tc-ppc.c (ppc_elf_lcomm): Use subsection 1.
76
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772013-08-14 David Edelsohn <dje.gcc@gmail.com>
78
79 * config/tc-ppc.c (ppc_comm): Accept optional fourth .lcomm
80 argument as alignment.
81
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822013-08-09 Nick Clifton <nickc@redhat.com>
83
84 * config/tc-rl78.c (elf_flags): New variable.
85 (enum options): Add OPTION_G10.
86 (md_longopts): Add mg10.
87 (md_parse_option): Parse -mg10.
88 (rl78_elf_final_processing): New function.
89 * config/tc-rl78.c (tc_final_processing): Define.
90 * doc/c-rl78.texi: Document -mg10 option.
91
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922013-08-06 Jürgen Urban <JuergenUrban@gmx.de>
93
94 * config/tc-mips.c (match_vu0_suffix_operand): Allow single-channel
95 suffixes to be elided too.
96 (mips_lookup_insn): Don't reject INSN2_VU0_CHANNEL_SUFFIX here.
97 (mips_ip): Assume .xyzw if no VU0 suffix is specified. Allow +N
98 to be omitted too.
99
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1002013-08-05 John Tytgat <john@bass-software.com>
101
102 * po/POTFILES.in: Regenerate.
103
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1042013-08-05 Eric Botcazou <ebotcazou@adacore.com>
105 Konrad Eisele <konrad@gaisler.com>
106
107 * config/tc-sparc.c (sparc_arch_types): Add leon.
108 (sparc_arch): Move sparc4 around and add leon.
109 (sparc_target_format): Document -Aleon.
110 * doc/c-sparc.texi: Likewise.
111
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1122013-08-05 Richard Sandiford <rdsandiford@googlemail.com>
113
114 * config/tc-mips.c (mips_lookup_insn): Make length and opend signed.
115
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1162013-08-04 Jürgen Urban <JuergenUrban@gmx.de>
117 Richard Sandiford <rdsandiford@googlemail.com>
118
119 * config/tc-mips.c (MAX_OPERANDS): Bump to 6.
120 (RWARN): Bump to 0x8000000.
121 (RTYPE_VI, RTYPE_VF, RTYPE_R5900_I, RTYPE_R5900_Q, RTYPE_R5900_R)
122 (RTYPE_R5900_ACC): New register types.
123 (RTYPE_MASK): Include them.
124 (R5900_I_NAMES, R5900_Q_NAMES, R5900_R_NAMES, R5900_ACC_NAMES): New
125 macros.
126 (reg_names): Include them.
127 (mips_parse_register_1): New function, split out from...
128 (mips_parse_register): ...here. Add a channels_ptr parameter.
129 Look for VU0 channel suffixes when nonnull.
130 (reg_lookup): Update the call to mips_parse_register.
131 (mips_parse_vu0_channels): New function.
132 (OT_CHANNELS, OT_DOUBLE_CHAR): New mips_operand_token_types.
133 (mips_operand_token): Add a "channels" field to the union.
134 Extend the comment above "ch" to OT_DOUBLE_CHAR.
135 (mips_parse_base_start): Match -- and ++. Handle channel suffixes.
136 (mips_parse_argument_token): Handle channel suffixes here too.
137 (validate_mips_insn): Handle INSN2_VU0_CHANNEL_SUFFIX.
138 Ignore OP_VU0_MATCH_SUFFIX when calculating the used bits.
139 Handle '#' formats.
140 (md_begin): Register $vfN and $vfI registers.
141 (operand_reg_mask): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX.
142 (convert_reg_type): Handle OP_REG_VI, OP_REG_VF, OP_REG_R5900_I,
143 OP_REG_R5900_Q, OP_REG_R5900_R and OP_REG_R5900_ACC.
144 (match_vu0_suffix_operand): New function.
145 (match_operand): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX.
146 (macro): Use "+7" rather than "E" for LDQ2 and STQ2.
147 (mips_lookup_insn): New function.
148 (mips_ip): Use it. Allow "+K" operands to be elided at the end
149 of an instruction. Handle '#' sequences.
150
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1512013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
152
153 * config/tc-mips.c (macro, mips16_macro): Create an array of operand
154 values and use it instead of sreg, treg, xreg, etc.
155
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1562013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
157
158 * config/tc-mips.c (match_int_operand): Use mips_int_operand_min
159 and mips_int_operand_max.
160 (mips16_immed_operand, mips16_immed_operands, MIPS16_NUM_IMMED):
161 Delete.
162 (mips16_immed_operand, mips16_immed_in_range_p): New functions.
163 (mips16_immed, mips16_extended_frag): Use them. Use mips_int_operand
164 instead of mips16_immed_operand.
165
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1662013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
167
168 * config/tc-mips.c (mips16_macro): Don't use move_register.
169 (mips16_ip): Allow macros to use 'p'.
170
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1712013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
172
173 * config/tc-mips.c (MAX_OPERANDS): New macro.
174 (mips_operand_array): New structure.
175 (mips_operands, mips16_operands, micromips_operands): New arrays.
176 (micromips_to_32_reg_b_map, micromips_to_32_reg_c_map)
177 (micromips_to_32_reg_e_map, micromips_to_32_reg_f_map)
178 (micromips_to_32_reg_g_map, micromips_to_32_reg_l_map)
179 (micromips_to_32_reg_q_map): Delete.
180 (insn_operands, insn_opno, insn_extract_operand): New functions.
181 (validate_mips_insn): Take a mips_operand_array as argument and
182 use it to build up a list of operands. Extend to handle INSN_MACRO
183 and MIPS16.
184 (validate_mips16_insn): New function.
185 (validate_micromips_insn): Take a mips_operand_array as argument.
186 Handle INSN_MACRO.
187 (md_begin): Initialize mips_operands, mips16_operands and
188 micromips_operands. Call validate_mips_insn and
189 validate_micromips_insn for macro instructions too.
190 Call validate_mips16_insn for MIPS16 instructions.
191 (insn_read_mask, insn_write_mask, operand_reg_mask, insn_reg_mask):
192 New functions.
193 (gpr_read_mask, gpr_write_mask, fpr_read_mask, fpr_write_mask): Use
194 them. Handle INSN_UDI.
195 (get_append_method): Use gpr_read_mask.
196
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1972013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
198
199 * config/tc-mips.c (compact_branch_p, uncond_branch_p): Use the same
200 flags for MIPS16 and non-MIPS16 instructions.
201 (gpr_mod_mask): Move the INSN2_MOD_SP case outside the micromips block.
202 (gpr_read_mask): Use INSN2_READ_GPR_31 for MIPS16 instructions too.
203 (gpr_write_mask): Remove MIPS16_INSN_WRITE_SP handling.
204 (can_swap_branch_p, get_append_method): Use the same flags for MIPS16
205 and non-MIPS16 instructions. Fix formatting.
206
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2072013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
208
209 * config/tc-mips.c (reg_needs_delay): Move later in file.
210 Use gpr_write_mask.
211 (insns_between): Use gpr_read_mask instead of EXTRACT_OPERAND.
212
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2132013-07-26 Sergey Guriev <sergey.s.guriev@intel.com>
214 Alexander Ivchenko <alexander.ivchenko@intel.com>
215 Maxim Kuznetsov <maxim.kuznetsov@intel.com>
216 Sergey Lega <sergey.s.lega@intel.com>
217 Anna Tikhonova <anna.tikhonova@intel.com>
218 Ilya Tocar <ilya.tocar@intel.com>
219 Andrey Turetskiy <andrey.turetskiy@intel.com>
220 Ilya Verbin <ilya.verbin@intel.com>
221 Kirill Yukhin <kirill.yukhin@intel.com>
222 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
223
224 * config/tc-i386-intel.c (O_zmmword_ptr): New.
225 (i386_types): Add zmmword.
226 (i386_intel_simplify_register): Allow regzmm.
227 (i386_intel_simplify): Handle zmmwords.
228 (i386_intel_operand): Handle RC/SAE, vector operations and
229 zmmwords.
230 * config/tc-i386.c (ZMMWORD_MNEM_SUFFIX): New.
231 (struct RC_Operation): New.
232 (struct Mask_Operation): New.
233 (struct Broadcast_Operation): New.
234 (vex_prefix): Size of bytes increased to 4 to support EVEX
235 encoding.
236 (enum i386_error): Add new error codes: unsupported_broadcast,
237 broadcast_not_on_src_operand, broadcast_needed,
238 unsupported_masking, mask_not_on_destination, no_default_mask,
239 unsupported_rc_sae, rc_sae_operand_not_last_imm,
240 invalid_register_operand, try_vector_disp8.
241 (struct _i386_insn): Add new fields vrex, need_vrex, mask,
242 rounding, broadcast, memshift.
243 (struct RC_name): New.
244 (RC_NamesTable): New.
245 (evexlig): New.
246 (evexwig): New.
247 (extra_symbol_chars): Add '{'.
248 (cpu_arch): Add AVX512F, AVX512CD, AVX512ER and AVX512PF.
249 (i386_operand_type): Add regzmm, regmask and vec_disp8.
250 (match_mem_size): Handle zmmwords.
251 (operand_type_match): Handle zmm-registers.
252 (mode_from_disp_size): Handle vec_disp8.
253 (fits_in_vec_disp8): New.
254 (md_begin): Handle {} properly.
255 (type_names): Add "rZMM", "Mask reg" and "Vector d8".
256 (build_vex_prefix): Handle vrex.
257 (build_evex_prefix): New.
258 (process_immext): Adjust to properly handle EVEX.
259 (md_assemble): Add EVEX encoding support.
260 (swap_2_operands): Correctly handle operands with masking,
261 broadcasting or RC/SAE.
262 (check_VecOperands): Support EVEX features.
263 (VEX_check_operands): Properly handle 16 upper [xyz]mm registers.
264 (match_template): Support regzmm and handle new error codes.
265 (process_suffix): Handle zmmwords and zmm-registers.
266 (check_byte_reg): Extend to zmm-registers.
267 (process_operands): Extend to zmm-registers.
268 (build_modrm_byte): Handle EVEX.
269 (output_insn): Adjust to properly handle EVEX case.
270 (disp_size): Handle vec_disp8.
271 (output_disp): Support compressed disp8*N evex feature.
272 (output_imm): Handle RC/SAE immediates properly.
273 (check_VecOperations): New.
274 (i386_immediate): Handle EVEX features.
275 (i386_index_check): Handle zmmwords and zmm-registers.
276 (RC_SAE_immediate): New.
277 (i386_att_operand): Handle EVEX features.
278 (parse_real_register): Add a check for ZMM/Mask registers.
279 (OPTION_MEVEXLIG): New.
280 (OPTION_MEVEXWIG): New.
281 (md_longopts): Add mevexlig and mevexwig.
282 (md_parse_option): Handle mevexlig and mevexwig options.
283 (md_show_usage): Add description for mevexlig and mevexwig.
284 * doc/c-i386.texi: Document avx512f/.avx512f, avx512cd/.avx512cd,
285 avx512er/.avx512er, avx512pf/.avx512pf, mevexlig and mevexwig.
286
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2872013-07-25 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
288
289 * config/tc-i386.c (cpu_arch): Add .sha.
290 * doc/c-i386.texi: Document sha/.sha.
291
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2922013-07-24 Anna Tikhonova <anna.tikhonova@intel.com>
293 Kirill Yukhin <kirill.yukhin@intel.com>
294 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
295
296 * config/tc-i386.c (BND_PREFIX): New.
297 (struct _i386_insn): Add new field bnd_prefix.
298 (add_bnd_prefix): New.
299 (cpu_arch): Add MPX.
300 (i386_operand_type): Add regbnd.
301 (md_assemble): Handle BND prefixes.
302 (parse_insn): Likewise.
303 (output_branch): Likewise.
304 (output_jump): Likewise.
305 (build_modrm_byte): Handle regbnd.
306 (OPTION_MADD_BND_PREFIX): New.
307 (md_longopts): Add entry for 'madd-bnd-prefix'.
308 (md_parse_option): Handle madd-bnd-prefix option.
309 (md_show_usage): Add description for madd-bnd-prefix
310 option.
311 * doc/c-i386.texi: Document mpx/.mpx and -madd-bnd-prefix.
312
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3132013-07-24 Tristan Gingold <gingold@adacore.com>
314
315 * config/tc-ppc.c (md_apply_fix): Adjust BFD_RELOC_PPC_B16 on
316 xcoff targets.
317
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3182013-07-24 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
319
320 * config/tc-s390.c (s390_machine): Don't force the .machine
321 argument to lower case.
322
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3232013-07-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
324
325 * config/tc-arm.c (s_arm_arch_extension): Improve error message
326 for invalid extension.
327
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3282013-07-19 Yufeng Zhang <yufeng.zhang@arm.com>
329
330 * config/tc-aarch64.c (enum aarch64_abi_type): New enumeration tag.
331 (AARCH64_ABI_LP64, AARCH64_ABI_ILP32): New enumerators.
332 (aarch64_abi): New variable.
333 (ilp32_p): Change to be a macro.
334 (aarch64_opts): Remove the support for option -milp32 and -mlp64.
335 (struct aarch64_option_abi_value_table): New struct.
336 (aarch64_abis): New table.
337 (aarch64_parse_abi): New function.
338 (aarch64_long_opts): Add entry for -mabi=.
339 * doc/as.texinfo (Target AArch64 options): Document -mabi.
340 * doc/c-aarch64.texi: Likewise.
341
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3422013-07-18 Jim Thomas <thomas@cfht.hawaii.edu>
343
344 * config/tc-i386-intel.c (i386_intel_operand): Fixed signed vs
345 unsigned comparison.
346
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3472013-07-18 Sandeep Kumar Singh <Sandeep.Singh2@kpitcummins.com>
348
cbe02d4f 349 * config/rx-defs.h: Add macros for RX100, RX200, RX600, and
f0c00282 350 RX610.
cbe02d4f 351 * config/rx-parse.y: (rx_check_float_support): Add function to
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352 check floating point operation support for target RX100 and
353 RX200.
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354 * config/tc-rx.c: Add CPU options RX100, RX200, RX600, and RX610.
355 * doc/c-rx.texi: Add -mcpu option to recognize macros for RX100,
356 RX200, RX600, and RX610
f0c00282 357
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3582013-07-18 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
359
360 * config/tc-avr.c (md_show_usage): Add avrxmega2 to help text
361
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3622013-07-18 Vishnu K.S <vishnu.k_s@atmel.com>
363
364 * config/tc-avr.c: Make ata6289's ISA to AVR_ISA_AVR4.
365 * doc/c-avr.texi: Likewise.
366
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3672013-07-15 Richard Sandiford <rdsandiford@googlemail.com>
368
369 * config/tc-mips.c (match_save_restore_list_operand): Avoid -Wformat
370 error with older GCCs.
371 (mips16_macro_build): Dereference args.
372
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3732013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
374
375 * config/tc-mips.c (mips_prefer_vec_regno, mips_parse_register):
376 New functions, split out from...
377 (reg_lookup): ...here. Remove itbl support.
378 (reglist_lookup): Delete.
379 (mips_operand_token_type): New enum.
380 (mips_operand_token): New structure.
381 (mips_operand_tokens): New variable.
382 (mips_add_token, mips_parse_base_start, mips_parse_argument_token)
383 (mips_parse_arguments): New functions.
384 (md_begin): Initialize mips_operand_tokens.
385 (mips_arg_info): Add a token field. Remove optional_reg field.
386 (match_char, match_expression): New functions.
387 (match_const_int): Use match_expression. Remove "s" argument
388 and return a boolean result. Remove O_register handling.
389 (match_regno, match_reg, match_reg_range): New functions.
390 (match_int_operand, match_mapped_int_operand, match_msb_operand)
391 (match_reg_operand, match_reg_pair_operand, match_perf_reg_operand)
392 (match_addiusp_operand, match_clo_clz_dest_operand)
393 (match_lwm_swm_list_operand, match_entry_exit_operand)
394 (match_save_restore_list_operand, match_mdmx_imm_reg_operand)
395 (match_tied_reg_operand): Remove "s" argument and return a boolean
396 result. Match tokens rather than text. Update calls to
397 match_const_int. Rely on match_regno to call check_regno.
398 (match_pcrel_operand, match_pc_operand): Replace "s" argument with
399 "arg" argument. Return a boolean result.
400 (parse_float_constant): Replace with...
401 (match_float_constant): ...this new function.
402 (match_operand): Remove "s" argument and return a boolean result.
403 Update calls to subfunctions.
404 (mips_ip, mips16_ip): Call mips_parse_arguments. Use match routines
405 rather than string-parsing routines. Update handling of optional
406 registers for token scheme.
407
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4082013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
409
410 * config/tc-mips.c (parse_float_constant): Split out from...
411 (mips_ip): ...here.
412
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4132013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
414
415 * config/tc-mips.c (INSERT_BITS, INSERT_OPERAND, MIPS16_INSERT_OPERAND):
416 Delete.
417
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4182013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
419
420 * config/tc-mips.c (mips32_to_16_reg_map): Delete.
421 (match_entry_exit_operand): New function.
422 (match_save_restore_list_operand): Likewise.
423 (match_operand): Use them.
424 (check_absolute_expr): Delete.
425 (mips16_ip): Rewrite main parsing loop to use mips_operands.
426
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4272013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
428
429 * config/tc-mips.c: Enable functions commented out in previous patch.
430 (SKIP_SPACE_TABS): Move further up file.
431 (mips32_to_micromips_reg_b_map, mips32_to_micromips_reg_c_map)
432 (mips32_to_micromips_reg_d_map, mips32_to_micromips_reg_e_map)
433 (ips32_to_micromips_reg_f_map, mips32_to_micromips_reg_g_map)
434 (mips32_to_micromips_reg_l_map, mips32_to_micromips_reg_m_map)
435 (mips32_to_micromips_reg_q_map, mips32_to_micromips_reg_n_map)
436 (micromips_imm_b_map, micromips_imm_c_map): Delete.
437 (mips_lookup_reg_pair): Delete.
438 (macro): Use report_bad_range and report_bad_field.
439 (mips_immed, expr_const_in_range): Delete.
440 (mips_ip): Rewrite main parsing loop to use new functions.
441
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4422013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
443
444 * config/tc-mips.c (mips_oddfpreg_ok): Move further up file.
445 Change return type to bfd_boolean.
446 (report_bad_range, report_bad_field): New functions.
447 (mips_arg_info): New structure.
448 (match_const_int, convert_reg_type, check_regno, match_int_operand)
449 (match_mapped_int_operand, match_msb_operand, match_reg_operand)
450 (match_reg_pair_operand, match_pcrel_operand, match_perf_reg_operand)
451 (match_addiusp_operand, match_clo_clz_dest_operand)
452 (match_lwm_swm_list_operand, match_mdmx_imm_reg_operand)
453 (match_pc_operand, match_tied_reg_operand, match_operand)
454 (check_completed_insn): New functions, commented out for now.
455
e077a1c8
RS
4562013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
457
458 * config/tc-mips.c (insn_insert_operand): New function.
459 (macro_build, mips16_macro_build): Put null character check
460 in the for loop and convert continues to breaks. Use operand
461 structures to handle constant operands.
462
ab902481
RS
4632013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
464
465 * config/tc-mips.c (validate_mips_insn): Move further up file.
466 Add insn_bits and decode_operand arguments. Use the mips_operand
467 fields to work out which bits an operand occupies. Detect double
468 definitions.
469 (validate_micromips_insn): Move further up file. Call into
470 validate_mips_insn.
471
2f8b73cc
RS
4722013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
473
474 * config/tc-mips.c (mips16_macro_build): Remove 'Y' case.
475
c8276761
RS
4762013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
477
478 * config/tc-mips.c (macro_build): Take an int for "C", "k", "\\"
479 and "~".
480 (macro): Update accordingly.
481
77bd4346
RS
4822013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
483
484 * config/tc-mips.c (imm_expr, imm2_expr, offset_expr): Tweak commentary.
485 (imm_reloc): Delete.
486 (md_assemble): Remove imm_reloc handling.
487 (mips_ip): Update commentary. Use offset_expr and offset_reloc
488 rather than imm_expr and imm_reloc for 'i', 'j' and 'u'.
489 Use a temporary array rather than imm_reloc when parsing
490 constant expressions. Remove imm_reloc initialization.
491 (mips16_ip): Update commentary. Use offset_expr and offset_reloc
492 for the relaxable field. Use a relax_char variable to track the
493 type of this field. Remove imm_reloc initialization.
494
cc537e56
RS
4952013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
496
497 * config/tc-mips.c (mips16_ip): Handle "I".
498
ba92f887
MR
4992013-07-12 Maciej W. Rozycki <macro@codesourcery.com>
500
501 * config/tc-mips.c (mips_flag_nan2008): New variable.
502 (options): Add OPTION_NAN enum value.
503 (md_longopts): Handle it.
504 (md_parse_option): Likewise.
505 (s_nan): New function.
506 (mips_elf_final_processing): Handle EF_MIPS_NAN2008.
507 (md_show_usage): Add -mnan.
508
509 * doc/as.texinfo (Overview): Add -mnan.
510 * doc/c-mips.texi (MIPS Opts): Document -mnan.
511 (MIPS NaN Encodings): New node. Document .nan directive.
512 (MIPS-Dependent): List the new node.
513
c1094734
TG
5142013-07-09 Tristan Gingold <gingold@adacore.com>
515
516 * configure.com: Define HAVE_SYS_TYPES_H and HAVE_UNISTD_H
517
0cbbe1b8
RS
5182013-07-08 Richard Sandiford <rdsandiford@googlemail.com>
519
520 * config/tc-mips.c (mips_ip): Unconditionally parse an expression
521 for 'A' and assume that the constant has been elided if the result
522 is an O_register.
523
f2ae14a1
RS
5242013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
525
526 * config/tc-mips.c (gprel16_reloc_p): New function.
527 (macro_read_relocs): Assume BFD_RELOC_LO16 if all relocs are
528 BFD_RELOC_UNUSED.
529 (offset_high_part, small_offset_p): New functions.
530 (nacro): Use them. Remove *_OB and *_DOB cases. For single-
531 register load and store macros, handle the 16-bit offset case first.
532 If a 16-bit offset is not suitable for the instruction we're
533 generating, load it into the temporary register using
534 ADDRESS_ADDI_INSN. Make the M_LI_DD code fall through into the
535 M_L_DAB code once the address has been constructed. For double load
536 and store macros, again handle the 16-bit offset case first.
537 If the second register cannot be accessed from the same high
538 part as the first, load it into AT using ADDRESS_ADDI_INSN.
539 Fix the handling of LD in cases where the first register is the
540 same as the base. Also handle the case where the offset is
541 not 16 bits and the second register cannot be accessed from the
542 same high part as the first. For unaligned loads and stores,
543 fuse the offbits == 12 and old "ab" handling. Apply this handling
544 whenever the second offset needs a different high part from the first.
545 Construct the offset using ADDRESS_ADDI_INSN where possible,
546 for offbits == 16 as well as offbits == 12. Use offset_reloc
547 when constructing the individual loads and stores.
548 (mips_ip): Set up imm_expr, imm2_expr, offset_expr, imm_reloc
549 and offset_reloc before matching against a particular opcode.
550 Handle elided 'A' constants. Allow 'A' constants to use
551 relocation operators.
552
5c324c16
RS
5532013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
554
555 * config/tc-mips.c (validate_mips_insn): Remove "[" and "]" handling.
556 (mips_ip): Likewise. Do not set is_mdmx for INSN_5400 instructions.
557 Check constraints on the VR5400 RZU.OB, SLL.OB and SRL.OB instructions.
558
23e69e47
RS
5592013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
560
561 * config/tc-mips.c (mips_ip): Preserve the real bit number for "+p".
562 Require the msb to be <= 31 for "+s". Check that the size is <= 31
563 for both "+s" and "+S".
564
27c5c572
RS
5652013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
566
567 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn):
568 (mips_ip, mips16_ip): Handle "+i".
569
e76ff5ab
RS
5702013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
571
572 * config/tc-mips.c (mips32_to_micromips_reg_h_map): Delete.
573 (micromips_to_32_reg_h_map): Rename to...
574 (micromips_to_32_reg_h_map1): ...this.
575 (micromips_to_32_reg_i_map): Rename to...
576 (micromips_to_32_reg_h_map2): ...this.
577 (mips_lookup_reg_pair): New function.
578 (gpr_write_mask, macro): Adjust after above renaming.
579 (validate_micromips_insn): Remove "mi" handling.
580 (mips_ip): Likewise. Parse both registers in a pair for "mh".
581
fa7616a4
RS
5822013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
583
584 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn)
585 (mips_ip): Remove "+D" and "+T" handling.
586
fb798c50
AK
5872013-07-05 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
588
589 * config/tc-s390.c (md_gather_operands, md_apply_fix): Support new
590 relocs.
591
2c0a3565
MS
5922013-07-03 Marcus Shawcroft <marcus.shawcroft@arm.com>
593
4aa2c5e2
MS
594 * config/tc-aarch64.c (reloc_table): Merge got_prel19 into got.
595
5962013-07-02 Marcus Shawcroft <marcus.shawcroft@arm.com>
597
2c0a3565
MS
598 * config/tc-aarch64.c (md_apply_fix): Reorder case values.
599 (aarch64_force_relocation): Likewise.
600
f40da81b
AM
6012013-07-02 Alan Modra <amodra@gmail.com>
602
603 * config/tc-ppc.c (ppc_elf_adjust_symtab): Don't make .TOC. weak.
604
81566a9b
MR
6052013-06-26 Maciej W. Rozycki <macro@codesourcery.com>
606
607 * doc/as.texinfo (Overview): Remove @samp from MIPS ISA names.
608 * doc/c-mips.texi (MIPS Options): Remove @sc from MIPS ISA names.
609 Replace @sc{mips16} with literal `MIPS16'.
610 (MIPS ISA): Replace @sc{mips3} with literal `MIPS III'.
611
a6bb11b2
YZ
6122013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
613
614 * config/tc-aarch64.c (reloc_table): Replace
615 BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with
616 BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to
617 BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and
618 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC.
619 (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC,
620 BFD_RELOC_AARCH64_LD32_GOT_LO12_NC,
621 BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC,
622 BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC,
623 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and
624 BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC.
625 (aarch64_force_relocation): Likewise.
626
cec5225b
YZ
6272013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
628
629 * config/tc-aarch64.c (ilp32_p): New static variable.
630 (elf64_aarch64_target_format): Return the target according to the
631 value of 'ilp32_p'.
632 (md_begin): Determine 'mach' according to the value of 'ilp32_p'.
633 (aarch64_opts): Add support for options '-milp32' and '-mlp64'.
634 (aarch64_dwarf2_addr_size): New function.
635 * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration.
636 (DWARF2_ADDR_SIZE): New define.
637
e335d9cb
RS
6382013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
639
640 * doc/c-mips.texi: Use ISA instead of @sc{isa}.
641
18870af7
RS
6422013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
643
644 * config/tc-mips.c (validate_mips_insn): Use STYPE rather than SHAMT.
645
833794fc
MR
6462013-06-25 Maciej W. Rozycki <macro@codesourcery.com>
647
648 * config/tc-mips.c (mips_set_options): Add insn32 member.
649 (mips_opts): Initialize it.
650 (NOP_INSN, NOP_INSN_SIZE): Handle insn32 mode.
651 (options): Add OPTION_INSN32 and OPTION_NO_INSN32 enum values.
652 (md_longopts): Add "minsn32" and "mno-insn32" options.
653 (is_size_valid): Handle insn32 mode.
654 (md_assemble): Pass instruction string down to macro.
655 (brk_fmt): Add second dimension and insn32 mode initializers.
656 (mfhl_fmt): Likewise.
657 (BRK_FMT, MFHL_FMT): Handle insn32 mode.
658 (macro_build) <'c'>: Handle microMIPS 32-bit BREAK encoding.
659 (macro_build_jalr, move_register): Handle insn32 mode.
660 (macro_build_branch_rs): Likewise.
661 (macro): Handle insn32 mode.
662 <M_JRADDIUSP>, <M_JRC>, <M_MOVEP>: New cases.
663 (mips_ip): Handle insn32 mode.
664 (md_parse_option): Handle OPTION_INSN32 and OPTION_NO_INSN32.
665 (s_mipsset): Handle "insn32" and "noinsn32" pseudo-ops.
666 (mips_handle_align): Handle insn32 mode.
667 (md_show_usage): Add -minsn32 and -mno-insn32.
668
669 * doc/as.texinfo (Target MIPS options): Add -minsn32 and
670 -mno-insn32 options.
671 (-minsn32, -mno-insn32): New options.
672 * doc/c-mips.texi (MIPS Opts): Add -minsn32 and -mno-insn32
673 options.
674 (MIPS assembly options): New node. Document .set insn32 and
675 .set noinsn32.
676 (MIPS-Dependent): List the new node.
677
d1706f38
NC
6782013-06-25 Nick Clifton <nickc@redhat.com>
679
680 * config/tc-msp430.c (msp430_srcoperand): Do not allow the use of
681 the PC in indirect addressing on 430xv2 parts.
682 (msp430_operands): Add version test to hardware bug encoding
683 restrictions.
684
477330fc
RM
6852013-06-24 Roland McGrath <mcgrathr@google.com>
686
d996d970
RM
687 * config/tc-arm.c (parse_reg_list): Use skip_past_char for '}',
688 so it skips whitespace before it.
689 (s_arm_unwind_save_mmxwr, s_arm_unwind_save_mmxwcg): Likewise.
690
477330fc
RM
691 * config/tc-arm.c (arm_symbol_chars): Include '{' and '}'.
692 (arm_reg_parse_multi): Skip whitespace first.
693 (parse_reg_list): Likewise.
694 (parse_vfp_reg_list): Likewise.
695 (s_arm_unwind_save_mmxwcg): Likewise.
696
24382199
NC
6972013-06-24 Nick Clifton <nickc@redhat.com>
698
699 PR gas/15623
700 * config/tc-arm.c (do_t_smc): Mark as ending an IT block.
701
c3678916
RS
7022013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
703
704 * config/tc-mips.c (mips_ip): Fix swapped bit numbers in comments.
705
42429eac
RS
7062013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
707
708 * config/tc-mips.c: Assert that offsetT and valueT are at least
709 8 bytes in size.
710 (GPR_SMIN, GPR_SMAX): New macros.
711 (macro, mips_ip): Remove code for 4-byte valueT and offsetT.
712
f3ded42a
RS
7132013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
714
715 * config/tc-mips.c: Remove OBJ_ELF, OBJ_MAYBE_ELF and IS_ELF
716 conditions. Remove any code deselected by them.
717 (s_mips_frame, s_mips_mask): Handle ECOFF_DEBUGGING case first.
718
e8044f35
RS
7192013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
720
721 * NEWS: Note removal of ECOFF support.
722 * doc/as.texinfo (--emulation): Update for the removal of MIPS ECOFF.
723 * Makefile.am (TARG_ENV_HFILES): Remove config/te-lnews.h.
724 (MULTI_CFILES): Remove config/e-mipsecoff.c.
725 * Makefile.in: Regenerate.
726 * configure.in: Remove MIPS ECOFF references.
727 (mips-sony-bsd*, mips-*-bsd*, mips-*-lnews*-ecoff, mips-*-*-ecoff):
728 Delete cases.
729 (mips-*-irix5*-*, mips*-*-linux*-*, mips*-*-freebsd*)
730 (mips*-*-kfreebsd*-gnu, mips-*-*-elf): Fold into...
731 (mips-*-*): ...this single case.
732 (mipsbecoff, mipslecoff, mipsecoff): Remove emulations. Expect
733 MIPS emulations to be e-mipself*.
734 * configure: Regenerate.
735 * configure.tgt (mips-sony-bsd*, mips-*-ultrix*, mips-*-osf*)
736 (mips-*-ecoff*, mips-*-pe*, mips-*-irix*, ips-*-lnews*, mips-*-riscos*)
737 (mips-*-sysv*): Remove coff and ecoff cases.
738 * as.c (mipsbecoff, mipslecoff, mipsecoff): Remove.
739 * ecoff.c: Remove reference to MIPS ECOFF.
740 * config/e-mipsecoff.c, config/te-lnews.h: Delete files.
741 * config/tc-mips.c (ECOFF_LITTLE_FORMAT): Delete.
742 (RDATA_SECTION_NAME, mips_target_form): Remove COFF and ECOFF cases.
743 (mips_hi_fixup): Tweak comment.
744 (append_insn): Require a howto.
745 (mips_after_parse_args): Remove OBJ_MAYBE_ECOFF code.
746
98508b2a
RS
7472013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
748
749 * doc/as.texinfo: Use MIPS rather than @sc{mips} throughout.
750 Use "CPU" instead of "cpu".
751 * doc/c-mips.texi: Likewise.
752 (MIPS Opts): Rename to MIPS Options.
753 (MIPS option stack): Rename to MIPS Option Stack.
754 (MIPS ASE instruction generation overrides): Rename to
755 MIPS ASE Instruction Generation Overrides (for now).
756 (MIPS floating-point): Rename to MIPS Floating-Point.
757
fc16f8cc
RS
7582013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
759
760 * doc/c-mips.texi (MIPS Macros): New section.
761 (MIPS Object): Replace with...
762 (MIPS Small Data): ...this new section.
763
5a7560b5
RS
7642013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
765
766 * doc/c-mips.texi (MIPS symbol sizes): Move section further up file.
767 Capitalize name. Use @kindex instead of @cindex for .set entries.
768
a1b86ab7
RS
7692013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
770
771 * doc/c-mips.texi (MIPS Stabs): Remove section.
772
c6278170
RS
7732013-06-20 Richard Sandiford <rdsandiford@googlemail.com>
774
775 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS, ISA_SUPPORTS_DSP_ASE)
776 (ISA_SUPPORTS_DSP64_ASE, ISA_SUPPORTS_DSPR2_ASE, ISA_SUPPORTS_EVA_ASE)
777 (ISA_SUPPORTS_MT_ASE, ISA_SUPPORTS_MCU_ASE, ISA_SUPPORTS_VIRT_ASE)
778 (ISA_SUPPORTS_VIRT64_ASE): Delete.
779 (mips_ase): New structure.
780 (mips_ases): New table.
781 (FP64_ASES): New macro.
782 (mips_ase_groups): New array.
783 (mips_isa_rev, mips_ase_mask, mips_check_isa_supports_ase)
784 (mips_check_isa_supports_ases, mips_set_ase, mips_lookup_ase): New
785 functions.
786 (is_opcode_valid): Use mips_ases to get the 64-bit ASE flags.
787 (md_parse_option): Use mips_ases and mips_set_ase instead of
788 separate case statements for each ASE option.
789 (mips_after_parse_args): Use FP64_ASES. Use
790 mips_check_isa_supports_ases to check the ASEs against
791 other options.
792 (s_mipsset): Use mips_ases and mips_set_ase instead of
793 separate if statements for each ASE option. Use
794 mips_check_isa_supports_ases, even when a non-ASE option
795 is specified.
796
63a4bc21
KT
7972013-06-19 Greta Yorsh <Greta.Yorsh@arm.com>
798
799 * config/tc-arm.c (arm_cpus): Add support for Cortex-A12.
800
c31f3936
RS
8012013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
802
803 * config/tc-mips.c (md_shortopts, options, md_longopts)
804 (md_longopts_size): Move earlier in file.
805
846ef2d0
RS
8062013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
807
808 * config/tc-mips.c (mips_set_options): Replace separate "ase_*" fields
809 with a single "ase" bitmask.
810 (mips_opts): Update accordingly.
811 (file_ase, file_ase_explicit): New variables.
812 (file_ase_mips3d, file_ase_mdmx, file_ase_smartmips, file_ase_dsp)
813 (file_ase_dspr2, file_ase_eva, file_ase_mt, file_ase_virt): Delete.
814 (ISA_HAS_ROR): Adjust for mips_set_options change.
815 (is_opcode_valid): Take the base ase mask directly from mips_opts.
816 (mips_ip): Adjust for mips_set_options change.
817 (md_parse_option): Likewise. Update file_ase_explicit.
818 (mips_after_parse_args): Adjust for mips_set_options change.
819 Use bitmask operations to select the default ASEs. Set file_ase
820 rather than individual per-ASE variables.
821 (s_mipsset): Adjust for mips_set_options change.
822 (mips_elf_final_processing): Test file_ase rather than
823 file_ase_mdmx. Remove commented-out code.
824
d16afab6
RS
8252013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
826
827 * config/tc-mips.c (mips_cpu_info): Add an "ase" field.
828 (MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, MIPS_CPU_ASE_MT)
829 (MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX, MIPS_CPU_ASE_DSPR2)
830 (MIPS_CPU_ASE_MCU, MIPS_CPU_ASE_VIRT, MIPS_CPU_ASE_EVA): Delete.
831 (mips_after_parse_args): Use the new "ase" field to choose
832 the default ASEs.
833 (mips_cpu_info_table): Move ASEs from the "flags" field to the
834 "ase" field.
835
e83a675f
RE
8362013-06-18 Richard Earnshaw <rearnsha@arm.com>
837
838 * config/tc-arm.c (symbol_preemptible): New function.
839 (relax_branch): Use it.
840
7f3c4072
CM
8412013-06-17 Catherine Moore <clm@codesourcery.com>
842 Maciej W. Rozycki <macro@codesourcery.com>
843 Chao-Ying Fu <fu@mips.com>
844
845 * config/tc-mips.c (mips_set_options): Add ase_eva.
846 (mips_set_options mips_opts): Add ase_eva.
847 (file_ase_eva): Declare.
848 (ISA_SUPPORTS_EVA_ASE): Define.
849 (IS_SEXT_9BIT_NUM): Define.
850 (MIPS_CPU_ASE_EVA): Define.
851 (is_opcode_valid): Add support for ase_eva.
852 (macro_build): Likewise.
853 (macro): Likewise.
854 (validate_mips_insn): Likewise.
855 (validate_micromips_insn): Likewise.
856 (mips_ip): Likewise.
857 (options): Add OPTION_EVA and OPTION_NO_EVA.
858 (md_longopts): Add -meva and -mno-eva.
859 (md_parse_option): Process new options.
860 (mips_after_parse_args): Check for valid EVA combinations.
861 (s_mipsset): Likewise.
862
e410add4
RS
8632013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
864
865 * dwarf2dbg.h (dwarf2_move_insn): Declare.
866 * dwarf2dbg.c (line_subseg): Add pmove_tail.
867 (get_line_subseg): Add create_p argument. Initialize pmove_tail.
868 (dwarf2_gen_line_info_1): Update call accordingly.
869 (dwarf2_move_insn): New function.
870 * config/tc-mips.c (append_insn): Use dwarf2_move_insn.
871
6a50d470
RS
8722013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
873
874 Revert:
875
876 2011-09-05 Richard Sandiford <rdsandiford@googlemail.com>
877
878 PR gas/13024
879 * dwarf2dbg.c (pending_lines, pending_lines_tail): New variables.
880 (dwarf2_gen_line_info_1): Delete.
881 (dwarf2_push_line, dwarf2_flush_pending_lines): New functions.
882 (dwarf2_gen_line_info, dwarf2_emit_label): Use them.
883 (dwarf2_consume_line_info): Call dwarf2_flush_pending_lines.
884 (dwarf2_directive_loc): Push previous .locs instead of generating
885 them immediately.
886
f122319e
CF
8872013-06-13 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
888
889 * config/tc-mips.c (ISA_SUPPORTS_VIRT_ASE): Support micromips.
890 (ISA_SUPPORTS_VIRT64_ASE): Support 64-bit micromips.
891
909c7f9c
NC
8922013-06-13 Nick Clifton <nickc@redhat.com>
893
894 PR gas/15602
895 * config/tc-m68k.h (TC_CHECK_ADJUSTED_BROKEN_DOT_WORD): Define.
896 * config/tc-m68k.c (tc_m68k_check_adjusted_broken_word): New
897 function. Generates an error if the adjusted offset is out of a
898 16-bit range.
899
5d5755a7
SL
9002013-06-12 Sandra Loosemore <sandra@codesourcery.com>
901
902 * config/tc-nios2.c (md_apply_fix): Mask constant
903 BFD_RELOC_NIOS2_HIADJ16 value to 16 bits.
904
3bf0dbfb
MR
9052013-06-10 Maciej W. Rozycki <macro@codesourcery.com>
906
907 * config/tc-mips.c (append_insn): Don't do branch relaxation for
908 MIPS-3D instructions either.
909 (md_convert_frag): Update the COPx branch mask accordingly.
910
911 * config/tc-mips.c (md_show_usage): Document --[no-]relax-branch
912 option.
913 * doc/as.texinfo (Overview): Add --relax-branch and
914 --no-relax-branch.
915 * doc/c-mips.texi (MIPS Opts): Document --relax-branch and
916 --no-relax-branch.
917
9daf7bab
SL
9182013-06-09 Sandra Loosemore <sandra@codesourcery.com>
919
920 * config/tc-nios2.c (nios2_parse_args): Allow trap argument to
921 omitted.
922
d301a56b
RS
9232013-06-08 Catherine Moore <clm@codesourcery.com>
924
925 * config/tc-mips.c (is_opcode_valid): Build ASE mask.
926 (is_opcode_valid_16): Pass ase value to opcode_is_member.
927 (append_insn): Change INSN_xxxx to ASE_xxxx.
928
7bab7634
DC
9292013-06-01 George Thomas <george.thomas@atmel.com>
930
cbe02d4f 931 * gas/config/tc-avr.c: Change ISA for devices with USB support to
7bab7634
DC
932 AVR_ISA_XMEGAU
933
f60cf82f
L
9342013-05-31 H.J. Lu <hongjiu.lu@intel.com>
935
936 * config/tc-i386.c (md_begin): Don't align text/data/bss sections
937 for ELF.
938
a3f278e2
CM
9392013-05-31 Paul Brook <paul@codesourcery.com>
940
a3f278e2
CM
941 * config/tc-mips.c (s_ehword): New.
942
067ec077
CM
9432013-05-30 Paul Brook <paul@codesourcery.com>
944
945 * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH.
946
d6101ac2
MR
9472013-05-29 Maciej W. Rozycki <macro@codesourcery.com>
948
949 * write.c (resolve_reloc_expr_symbols): On REL targets don't
950 convert relocs who have no relocatable field either. Rephrase
951 the conditional so that the PC-relative check is only applied
952 for REL targets.
953
f19ccbda
MR
9542013-05-28 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
955
956 * config/tc-mips.c (macro) <ld>: Don't use $zero for address
957 calculation.
958
418009c2
YZ
9592013-05-28 Yufeng Zhang <yufeng.zhang@arm.com>
960
961 * config/tc-aarch64.c (reloc_table): Update to use
477330fc 962 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of
418009c2
YZ
963 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE.
964 (md_apply_fix): Likewise.
965 (aarch64_force_relocation): Likewise.
966
0a8897c7
KT
9672013-05-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
968
969 * config/tc-arm.c (it_fsm_post_encode): Improve
970 warning messages about deprecated IT block formats.
971
89d2a2a3
MS
9722013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com>
973
974 * config/tc-aarch64.c (md_apply_fix): Move value range checking
975 inside fx_done condition.
976
c77c0862
RS
9772013-05-22 Jürgen Urban <JuergenUrban@gmx.de>
978
979 * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB.
980
c0637f3a
PB
9812013-05-20 Peter Bergner <bergner@vnet.ibm.com>
982
983 * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error
984 and clean up warning when using PRINT_OPCODE_TABLE.
985
5656a981
AM
9862013-05-20 Alan Modra <amodra@gmail.com>
987
988 * config/tc-ppc.c (md_apply_fix): Hoist code common to insn
989 and data fixups performing shift/high adjust/sign extension on
990 fieldval. Sink fx_pcrel handling and checks. Use fixP->fx_size
991 when writing data fixups rather than recalculating size.
992
997b26e8
JBG
9932013-05-16 Jan-Benedict Glaw <jbglaw@lug-owl.de>
994
995 * doc/c-msp430.texi: Fix typo.
996
9f6e76f4
TG
9972013-05-16 Tristan Gingold <gingold@adacore.com>
998
999 * config/tc-ppc.c (ppc_is_toc_sym): Symbols of class XMC_TC
1000 are also TOC symbols.
1001
638d3803
NC
10022013-05-16 Nick Clifton <nickc@redhat.com>
1003
1004 * config/tc-msp430.c: Make -mmcu recognise more part numbers.
1005 Add -mcpu command to specify core type.
997b26e8 1006 * doc/c-msp430.texi: Update documentation.
638d3803 1007
b015e599
AP
10082013-05-09 Andrew Pinski <apinski@cavium.com>
1009
1010 * config/tc-mips.c (struct mips_set_options): New ase_virt field.
1011 (mips_opts): Update for the new field.
1012 (file_ase_virt): New variable.
1013 (ISA_SUPPORTS_VIRT_ASE): New macro.
1014 (ISA_SUPPORTS_VIRT64_ASE): New macro.
1015 (MIPS_CPU_ASE_VIRT): New define.
1016 (is_opcode_valid): Handle ase_virt.
1017 (macro_build): Handle "+J".
1018 (validate_mips_insn): Likewise.
1019 (mips_ip): Likewise.
1020 (enum options): Add OPTION_VIRT and OPTION_NO_VIRT.
1021 (md_longopts): Add mvirt and mnovirt
1022 (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT.
1023 (mips_after_parse_args): Handle ase_virt field.
1024 (s_mipsset): Handle "virt" and "novirt".
1025 (mips_elf_final_processing): Add a comment about virt ASE might need
1026 a new flag.
1027 (md_show_usage): Print out the usage of -mvirt and mno-virt options.
1028 * doc/c-mips.texi: Document -mvirt and -mno-virt.
1029 Document ".set virt" and ".set novirt".
1030
da8094d7
AM
10312013-05-09 Alan Modra <amodra@gmail.com>
1032
1033 * config/tc-ppc.c (md_apply_fix): Sign extend fieldval under
1034 control of operand flag bits.
1035
c5f8c205
AM
10362013-05-07 Alan Modra <amodra@gmail.com>
1037
1038 * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro.
1039 (PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise.
1040 (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise.
1041 (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise.
1042 (md_apply_fix): Set fx_no_overflow for assorted relocations.
1043 Shift and sign-extend fieldval for use by some VLE reloc
1044 operand->insert functions.
1045
b47468a6
CM
10462013-05-06 Paul Brook <paul@codesourcery.com>
1047 Catherine Moore <clm@codesourcery.com>
1048
c5f8c205
AM
1049 * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL.
1050 (limited_pcrel_reloc_p): Likewise.
b47468a6
CM
1051 (md_apply_fix): Likewise.
1052 (tc_gen_reloc): Likewise.
1053
2de39019
CM
10542013-05-06 Richard Sandiford <rdsandiford@googlemail.com>
1055
1056 * config/tc-mips.c (limited_pcrel_reloc_p): New function.
1057 (mips_fix_adjustable): Adjust pc-relative check to use
1058 limited_pc_reloc_p.
1059
754e2bb9
RS
10602013-05-02 Richard Sandiford <rdsandiford@googlemail.com>
1061
1062 * config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries.
1063 (s_mips_stab): Do not restrict to stabn only.
1064
13761a11
NC
10652013-05-02 Nick Clifton <nickc@redhat.com>
1066
1067 * config/tc-msp430.c: Add support for the MSP430X architecture.
1068 Add code to insert a NOP instruction after any instruction that
1069 might change the interrupt state.
1070 Add support for the LARGE memory model.
1071 Add code to initialise the .MSP430.attributes section.
1072 * config/tc-msp430.h: Add support for the MSP430X architecture.
1073 * doc/c-msp430.texi: Document the new -mL and -mN command line
1074 options.
1075 * NEWS: Mention support for the MSP430X architecture.
1076
df26367c
MR
10772013-05-01 Maciej W. Rozycki <macro@codesourcery.com>
1078
1079 * configure.tgt: Replace alpha*-*-linuxecoff* pattern with
1080 alpha*-*-linux*ecoff*.
1081
f02d8318
CF
10822013-04-30 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1083
1084 * config/tc-mips.c (mips_ip): Add sizelo.
1085 For "+C", "+G", and "+H", set sizelo and compare against it.
1086
b40bf0a2
NC
10872013-04-29 Nick Clifton <nickc@redhat.com>
1088
1089 * as.c (Options): Add -gdwarf-sections.
1090 (parse_args): Likewise.
1091 * as.h (flag_dwarf_sections): Declare.
1092 * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes.
1093 (process_entries): When -gdwarf-sections is enabled generate
1094 fragmentary .debug_line sections.
1095 (out_debug_line): Set the section for the .debug_line section end
1096 symbol.
1097 * doc/as.texinfo: Document -gdwarf-sections.
1098 * NEWS: Mention -gdwarf-sections.
1099
8eeccb77 11002013-04-26 Christian Groessler <chris@groessler.org>
00a3147e
CG
1101
1102 * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdline
1103 according to the target parameter. Don't call s_segm since s_segm
1104 calls bfd_set_arch_mach using stdoutput, but stdoutput isn't
1105 initialized yet.
1106 (md_begin): Call s_segm according to target parameter from command
1107 line.
1108
49926cd0
AM
11092013-04-25 Alan Modra <amodra@gmail.com>
1110
1111 * configure.in: Allow little-endian linux.
1112 * configure: Regenerate.
1113
e3031850
SL
11142013-04-24 Sandra Loosemore <sandra@codesourcery.com>
1115
1116 * config/tc-nios2.c (nios2_control_register_arg_p): Rename
1117 "fstatus" control register to "eccinj".
1118
cb948fc0
KT
11192013-04-19 Kai Tietz <ktietz@redhat.com>
1120
1121 * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin.
1122
4455e9ad
JB
11232013-04-15 Julian Brown <julian@codesourcery.com>
1124
1125 * expr.c (add_to_result, subtract_from_result): Make global.
1126 * expr.h (add_to_result, subtract_from_result): Add prototypes.
1127 * config/tc-sh.c (sh_optimize_expr): Use add_to_result,
1128 subtract_from_result to handle extra bit of precision for .sleb128
1129 directive operands.
1130
956a6ba3
JB
11312013-04-10 Julian Brown <julian@codesourcery.com>
1132
1133 * read.c (convert_to_bignum): Add sign parameter. Use it
1134 instead of X_unsigned to determine sign of resulting bignum.
1135 (emit_expr): Pass extra argument to convert_to_bignum.
1136 (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass
1137 X_extrabit to convert_to_bignum.
1138 (parse_bitfield_cons): Set X_extrabit.
1139 * expr.c (make_expr_symbol, expr_build_uconstant, operand):
1140 Initialise X_extrabit field as appropriate.
1141 (add_to_result): New.
1142 (subtract_from_result): New.
1143 (expr): Use above.
1144 * expr.h (expressionS): Add X_extrabit field.
1145
eb9f3f00
JB
11462013-04-10 Jan Beulich <jbeulich@suse.com>
1147
1148 * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base
1149 register being PC when is_t or writeback, and use distinct
1150 diagnostic for the latter case.
1151
ccb84d65
JB
11522013-04-10 Jan Beulich <jbeulich@suse.com>
1153
1154 * gas/config/tc-arm.c (parse_operands): Re-write
1155 po_barrier_or_imm().
1156 (do_barrier): Remove bogus constraint().
1157 (do_t_barrier): Remove.
1158
4d13caa0
NC
11592013-04-09 Joerg Wunsch <joerg.wunsch@atmel.com>
1160
1161 * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2,
1162 ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2,
1163 ATmega2564RFR2
1164 * gas/doc/c-avr.texi (-mmcu documentation): Likewise.
1165
16d02dc9
JB
11662013-04-09 Jan Beulich <jbeulich@suse.com>
1167
1168 * gas/config/tc-arm.c (do_vmrs): Accept all control registers.
1169 Use local variable Rt in more places.
1170 (do_vmsr): Accept all control registers.
1171
05ac0ffb
JB
11722013-04-09 Jan Beulich <jbeulich@suse.com>
1173
1174 * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
1175 if there was none specified for moves between scalar and core
1176 register.
1177
2d51fb74
JB
11782013-04-09 Jan Beulich <jbeulich@suse.com>
1179
1180 * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the
1181 NEON_ALL_LANES case.
1182
94dcf8bf
JB
11832013-04-08 Jan Beulich <jbeulich@suse.com>
1184
1185 * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for
1186 PC-relative VSTR.
1187
1472d06f
JB
11882013-04-08 Jan Beulich <jbeulich@suse.com>
1189
1190 * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq
1191 entry to sp_fiq.
1192
0c76cae8
AM
11932013-04-03 Alan Modra <amodra@gmail.com>
1194
1195 * doc/as.texinfo: Add support to generate man options for h8300.
1196 * doc/c-h8300.texi: Likewise.
1197
92eb40d9
RR
11982013-03-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
1199
1200 * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and
1201 Cortex-A57.
1202
51dcdd4d
NC
12032013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com>
1204
1205 PR binutils/15068
1206 * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array.
1207
c5d685bf
NC
12082013-03-26 Nick Clifton <nickc@redhat.com>
1209
9b978282
NC
1210 PR gas/15295
1211 * listing.c (rebuffer_line): Rewrite to avoid seeking back to the
1212 start of the file each time.
1213
c5d685bf
NC
1214 PR gas/15178
1215 * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for
1216 FreeBSD targets.
1217
9699c833
TG
12182013-03-26 Douglas B Rupp <rupp@gnat.com>
1219
1220 * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment
1221 after fixup.
1222
4755303e
WN
12232013-03-21 Will Newton <will.newton@linaro.org>
1224
1225 * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all
1226 pc-relative str instructions in Thumb mode.
1227
81f5558e
NC
12282013-03-21 Michael Schewe <michael.schewe@gmx.net>
1229
1230 * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
1231 @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
1232 R_H8_DISP32A16.
1233 * config/tc-h8300.h: Remove duplicated defines.
1234
71863e73
NC
12352013-03-21 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
1236
1237 PR gas/15282
1238 * tc-avr.c (mcu_has_3_byte_pc): New function.
1239 (tc_cfi_frame_initial_instructions): Call it to find return
1240 address size.
1241
795b8e6b
NC
12422013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com>
1243
1244 PR gas/15095
1245 * config/tc-tic6x.c (tic6x_try_encode): Handle
1246 tic6x_coding_dreg_(msb|lsb) field coding types and use it to
1247 encode register pair numbers when required.
1248
ba86b375
WN
12492013-03-15 Will Newton <will.newton@linaro.org>
1250
1251 * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register
1252 in vstr in Thumb mode for pre-ARMv7 cores.
1253
9e6f3811
AS
12542013-03-14 Andreas Schwab <schwab@suse.de>
1255
1256 * doc/c-arc.texi (ARC Directives): Revert last change and use
1257 @itemize instead of @table.
1258 * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
1259
b10bf8c5
NC
12602013-03-14 Nick Clifton <nickc@redhat.com>
1261
1262 PR gas/15273
1263 * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a
1264 NULL message, instead just check ARM_CPU_IS_ANY directly.
1265
ba724cfc
NC
12662013-03-14 Nick Clifton <nickc@redhat.com>
1267
1268 PR gas/15212
9e6f3811 1269 * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet
ba724cfc
NC
1270 for table format.
1271 * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
1272 to the @item directives.
1273 (ARM-Neon-Alignment): Move to correct place in the document.
1274 * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
1275 formatting.
1276 * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
1277 @smallexample.
1278
531a94fd
SL
12792013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
1280
1281 * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'
1282 case. Add default BAD_CASE to switch.
1283
dad60f8e
SL
12842013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
1285
1286 * config/tc-nios2.c (nios2_assemble_args_ds): New function.
1287 (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
1288
dd5181d5
KT
12892013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1290
1291 * config/tc-arm.c (crc_ext_armv8): New feature set.
1292 (UNPRED_REG): New macro.
1293 (do_crc32_1): New function.
1294 (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
1295 do_crc32ch, do_crc32cw): Likewise.
1296 (TUEc): New macro.
1297 (insns): Add entries for crc32 mnemonics.
1298 (arm_extensions): Add entry for crc.
1299
8e723a10
CLT
13002013-03-08 Chung-Lin Tang <cltang@codesourcery.com>
1301
1302 * write.h (struct fix): Add fx_dot_frag field.
1303 (dot_frag): Declare.
1304 * write.c (dot_frag): New variable.
1305 (fix_new_internal): Set fx_dot_frag field with dot_frag.
1306 (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
1307 * expr.c (expr): Save value of frag_now in dot_frag when setting
1308 dot_value.
1309 * read.c (emit_expr): Likewise. Delete comments.
1310
be05d201
L
13112013-03-07 H.J. Lu <hongjiu.lu@intel.com>
1312
1313 * config/tc-i386.c (flag_code_names): Removed.
1314 (i386_index_check): Rewrote.
1315
62b0d0d5
YZ
13162013-03-05 Yufeng Zhang <yufeng.zhang@arm.com>
1317
1318 * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
1319 add comment.
1320 (aarch64_double_precision_fmovable): New function.
1321 (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
1322 function; handle hexadecimal representation of IEEE754 encoding.
1323 (parse_operands): Update the call to parse_aarch64_imm_float.
1324
165de32a
L
13252013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1326
1327 * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
1328 (check_hle): Updated.
1329 (md_assemble): Likewise.
1330 (parse_insn): Likewise.
1331
d5de92cf
L
13322013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1333
1334 * config/tc-i386.c (_i386_insn): Add rep_prefix.
9e6f3811 1335 (md_assemble): Check if REP prefix is OK.
d5de92cf
L
1336 (parse_insn): Remove expecting_string_instruction. Set
1337 i.rep_prefix.
1338
e60bb1dd
YZ
13392013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1340
1341 * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
1342
aeebdd9b
YZ
13432013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1344
1345 * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
1346 for system registers.
1347
4107ae22
DD
13482013-02-27 DJ Delorie <dj@redhat.com>
1349
1350 * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
1351 (rl78_op): Handle %code().
1352 (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
1353 (tc_gen_reloc): Likwise; convert to a computed reloc.
1354 (md_apply_fix): Likewise.
1355
151fa98f
NC
13562013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
1357
1358 * config/rl78-parse.y: Fix encoding of DIVWU insn.
1359
70a8bc5b 13602013-02-25 Terry Guo <terry.guo@arm.com>
1361
1362 * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
1363 * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
1364 list of accepted CPUs.
1365
5c111e37
L
13662013-02-19 H.J. Lu <hongjiu.lu@intel.com>
1367
1368 PR gas/15159
1369 * config/tc-i386.c (cpu_arch): Add ".smap".
1370
1371 * doc/c-i386.texi: Document smap.
1372
8a75745d
MR
13732013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1374
1375 * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
1376 mips_assembling_insn appropriately.
1377 (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
1378
79850f26
MR
13792013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1380
cf29fc61 1381 * config/tc-mips.c (append_insn): Correct indentation, remove
79850f26
MR
1382 extraneous braces.
1383
4c261dff
NC
13842013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1385
5c111e37 1386 * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
4c261dff 1387
ea33f281
NC
13882013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
1389
1390 * configure.tgt: Add nios2-*-rtems*.
1391
a1ccaec9
YZ
13922013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
1393
1394 * config/tc-aarch64.c (md_begin): Change to check if 'name' is
1395 NULL.
1396
0aa27725
RS
13972013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
1398
1399 * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
1400 (macro): Use it. Assert that trunc.w.s is not used for r5900.
1401
da4339ed
NC
14022013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com>
1403
1404 * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
1405 core.
1406
36591ba1 14072013-02-06 Sandra Loosemore <sandra@codesourcery.com>
5c111e37 1408 Andrew Jenner <andrew@codesourcery.com>
36591ba1
SL
1409
1410 Based on patches from Altera Corporation.
1411
1412 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
1413 (TARGET_CPU_HFILES): Add config/tc-nios2.h.
1414 * Makefile.in: Regenerated.
1415 * configure.tgt: Add case for nios2*-linux*.
1416 * config/obj-elf.c: Conditionally include elf/nios2.h.
1417 * config/tc-nios2.c: New file.
1418 * config/tc-nios2.h: New file.
1419 * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
1420 * doc/Makefile.in: Regenerated.
1421 * doc/all.texi: Set NIOSII.
1422 * doc/as.texinfo (Overview): Add Nios II options.
1423 (Machine Dependencies): Include c-nios2.texi.
1424 * doc/c-nios2.texi: New file.
1425 * NEWS: Note Altera Nios II support.
1426
94d4433a
AM
14272013-02-06 Alan Modra <amodra@gmail.com>
1428
1429 PR gas/14255
1430 * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
1431 Don't skip fixups with fx_subsy non-NULL.
1432 * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
1433 with fx_subsy non-NULL.
1434
ace9af6f
L
14352013-02-04 H.J. Lu <hongjiu.lu@intel.com>
1436
1437 * doc/c-metag.texi: Add "@c man" markers.
1438
89d67ed9
AM
14392013-02-04 Alan Modra <amodra@gmail.com>
1440
1441 * write.c (fixup_segment): Return void. Delete seg_reloc_count
1442 related code.
1443 (TC_ADJUST_RELOC_COUNT): Delete.
1444 * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
1445
89072bd6
AM
14462013-02-04 Alan Modra <amodra@gmail.com>
1447
1448 * po/POTFILES.in: Regenerate.
1449
f9b2d544
NC
14502013-01-30 Markos Chandras <markos.chandras@imgtec.com>
1451
1452 * config/tc-metag.c: Make SWAP instruction less permissive with
1453 its operands.
1454
392ca752
DD
14552013-01-29 DJ Delorie <dj@redhat.com>
1456
1457 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
1458 relocs in .word/.etc statements.
1459
427d0db6
RM
14602013-01-29 Roland McGrath <mcgrathr@google.com>
1461
1462 * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
1463 immediate value for 8-bit offset" error so it shows line info.
1464
4faf939a
JM
14652013-01-24 Joseph Myers <joseph@codesourcery.com>
1466
1467 * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
1468 for 64-bit output.
1469
78c8d46c
NC
14702013-01-24 Nick Clifton <nickc@redhat.com>
1471
1472 * config/tc-v850.c: Add support for e3v5 architecture.
1473 * doc/c-v850.texi: Mention new support.
1474
fb5b7503
NC
14752013-01-23 Nick Clifton <nickc@redhat.com>
1476
1477 PR gas/15039
1478 * config/tc-avr.c: Include dwarf2dbg.h.
1479
8ce3d284
L
14802013-01-18 H.J. Lu <hongjiu.lu@intel.com>
1481
1482 * config/tc-i386.c (reloc): Support size relocation only for ELF.
1483 (tc_i386_fix_adjustable): Likewise.
1484 (lex_got): Likewise.
1485 (tc_gen_reloc): Likewise.
1486
f5555712
YZ
14872013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
1488
1489 * config/tc-aarch64.c (output_operand_error_record): Change to output
1490 the out-of-range error message as value-expected message if there is
1491 only one single value in the expected range.
1492 (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
1493 LSL #0 as a programmer-friendly feature.
1494
8fd4256d
L
14952013-01-16 H.J. Lu <hongjiu.lu@intel.com>
1496
1497 * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
1498 (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
1499 BFD_RELOC_64_SIZE relocations.
1500 (lex_got): Support "symbol@SIZE" and don't create GOT symbol
1501 for it.
1502 (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
1503 relocations against local symbols.
1504
a5840dce
AM
15052013-01-16 Alan Modra <amodra@gmail.com>
1506
1507 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
1508 finding some sort of toc syntax error, and break to avoid
1509 compiler uninit warning.
1510
af89796a
L
15112013-01-15 H.J. Lu <hongjiu.lu@intel.com>
1512
1513 PR gas/15019
1514 * config/tc-i386.c (lex_got): Increment length by 1 if the
1515 relocation token is removed.
1516
dd42f060
NC
15172013-01-15 Nick Clifton <nickc@redhat.com>
1518
1519 * config/tc-v850.c (md_assemble): Allow signed values for
1520 V850E_IMMEDIATE.
1521
464e3686
SK
15222013-01-11 Sean Keys <skeys@ipdatasys.com>
1523
1524 * config/tc-xgate.c (md_begin): Fix mistake made when going from
af89796a 1525 git to cvs.
464e3686 1526
5817ffd1
PB
15272013-01-10 Peter Bergner <bergner@vnet.ibm.com>
1528
1529 * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
1530 * doc/c-ppc.texi (PowerPC-Opts): Likewise.
1531 * config/tc-ppc.c (md_show_usage): Likewise.
1532 (ppc_handle_align): Handle power8's group ending nop.
1533
f4b1f6a9
SK
15342013-01-10 Sean Keys <skeys@ipdatasys.com>
1535
1536 * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
af89796a 1537 that the assember exits after the opcodes have been printed.
f4b1f6a9 1538
34bca508
L
15392013-01-10 H.J. Lu <hongjiu.lu@intel.com>
1540
1541 * app.c: Remove trailing white spaces.
1542 * as.c: Likewise.
1543 * as.h: Likewise.
1544 * cond.c: Likewise.
1545 * dw2gencfi.c: Likewise.
1546 * dwarf2dbg.h: Likewise.
1547 * ecoff.c: Likewise.
1548 * input-file.c: Likewise.
1549 * itbl-lex.h: Likewise.
1550 * output-file.c: Likewise.
1551 * read.c: Likewise.
1552 * sb.c: Likewise.
1553 * subsegs.c: Likewise.
1554 * symbols.c: Likewise.
1555 * write.c: Likewise.
1556 * config/tc-i386.c: Likewise.
1557 * doc/Makefile.am: Likewise.
1558 * doc/Makefile.in: Likewise.
1559 * doc/c-aarch64.texi: Likewise.
1560 * doc/c-alpha.texi: Likewise.
1561 * doc/c-arc.texi: Likewise.
1562 * doc/c-arm.texi: Likewise.
1563 * doc/c-avr.texi: Likewise.
1564 * doc/c-bfin.texi: Likewise.
1565 * doc/c-cr16.texi: Likewise.
1566 * doc/c-d10v.texi: Likewise.
1567 * doc/c-d30v.texi: Likewise.
1568 * doc/c-h8300.texi: Likewise.
1569 * doc/c-hppa.texi: Likewise.
1570 * doc/c-i370.texi: Likewise.
1571 * doc/c-i386.texi: Likewise.
1572 * doc/c-i860.texi: Likewise.
1573 * doc/c-m32c.texi: Likewise.
1574 * doc/c-m32r.texi: Likewise.
1575 * doc/c-m68hc11.texi: Likewise.
1576 * doc/c-m68k.texi: Likewise.
1577 * doc/c-microblaze.texi: Likewise.
1578 * doc/c-mips.texi: Likewise.
1579 * doc/c-msp430.texi: Likewise.
1580 * doc/c-mt.texi: Likewise.
1581 * doc/c-s390.texi: Likewise.
1582 * doc/c-score.texi: Likewise.
1583 * doc/c-sh.texi: Likewise.
1584 * doc/c-sh64.texi: Likewise.
1585 * doc/c-tic54x.texi: Likewise.
1586 * doc/c-tic6x.texi: Likewise.
1587 * doc/c-v850.texi: Likewise.
1588 * doc/c-xc16x.texi: Likewise.
1589 * doc/c-xgate.texi: Likewise.
1590 * doc/c-xtensa.texi: Likewise.
1591 * doc/c-z80.texi: Likewise.
1592 * doc/internals.texi: Likewise.
1593
4c665b71
RM
15942013-01-10 Roland McGrath <mcgrathr@google.com>
1595
1596 * hash.c (hash_new_sized): Make it global.
1597 * hash.h: Declare it.
1598 * macro.c (define_macro): Use hash_new_sized instead of hash_new,
1599 pass a small size.
1600
a3c62988
NC
16012013-01-10 Will Newton <will.newton@imgtec.com>
1602
1603 * Makefile.am: Add Meta.
1604 * Makefile.in: Regenerate.
1605 * config/tc-metag.c: New file.
1606 * config/tc-metag.h: New file.
1607 * configure.tgt: Add Meta.
1608 * doc/Makefile.am: Add Meta.
1609 * doc/Makefile.in: Regenerate.
1610 * doc/all.texi: Add Meta.
1611 * doc/as.texiinfo: Document Meta options.
1612 * doc/c-metag.texi: New file.
1613
b37df7c4
SE
16142013-01-09 Steve Ellcey <sellcey@mips.com>
1615
1616 * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
1617 calls.
1618 * config/tc-mips.c (internalError): Remove, replace with abort.
1619
a3251895
YZ
16202013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
1621
1622 * config/tc-aarch64.c (parse_operands): Change to compare the result
1623 of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
1624
8ab8155f
NC
16252013-01-07 Nick Clifton <nickc@redhat.com>
1626
1627 PR gas/14887
1628 * config/tc-arm.c (skip_past_char): Skip whitespace before the
1629 anticipated character.
1630 * config/tc-arm.c (parse_address_main): Delete skip of whitespace
1631 here as it is no longer needed.
1632
a4ac1c42
AS
16332013-01-06 Andreas Schwab <schwab@linux-m68k.org>
1634
1635 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
1636 * doc/c-score.texi (SCORE-Opts): Likewise.
1637 * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
1638
e407c74b
NC
16392013-01-04 Juergen Urban <JuergenUrban@gmx.de>
1640
1641 * config/tc-mips.c: Add support for MIPS r5900.
1642 Add M_LQ_AB and M_SQ_AB to support large values for instructions
1643 lq and sq.
1644 (can_swap_branch_p, get_append_method): Detect some conditional
1645 short loops to fix a bug on the r5900 by NOP in the branch delay
1646 slot.
1647 (M_MUL): Support 3 operands in multu on r5900.
1648 (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
1649 (s_mipsset): Force 32 bit floating point on r5900.
1650 (mips_ip): Check parameter range of instructions mfps and mtps on
1651 r5900.
1652 * configure.in: Detect CPU type when target string contains r5900
1653 (e.g. mips64r5900el-linux-gnu).
1654
62658407
L
16552013-01-02 H.J. Lu <hongjiu.lu@intel.com>
1656
1657 * as.c (parse_args): Update copyright year to 2013.
1658
95830fd1
YZ
16592013-01-02 Yufeng Zhang <yufeng.zhang@arm.com>
1660
1661 * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
1662 and "cortex57".
1663
517bb291 16642013-01-02 Nick Clifton <nickc@redhat.com>
d709e4e6 1665
517bb291
NC
1666 PR gas/14987
1667 * config/tc-arm.c (parse_address_main): Skip whitespace before a
1668 closing bracket.
d709e4e6 1669
517bb291 1670For older changes see ChangeLog-2012
08d56133 1671\f
517bb291 1672Copyright (C) 2013 Free Software Foundation, Inc.
752937aa
NC
1673
1674Copying and distribution of this file, with or without modification,
1675are permitted in any medium without royalty provided the copyright
1676notice and this notice are preserved.
1677
08d56133
NC
1678Local Variables:
1679mode: change-log
1680left-margin: 8
1681fill-column: 74
1682version-control: never
1683End: