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2013-09-30 Tristan Gingold <gingold@adacore.com>
[thirdparty/binutils-gdb.git] / gas / ChangeLog
CommitLineData
cc9afea3
AM		 12013-09-20 Alan Modra <amodra@gmail.com>
2
3 * configure: Regenerate.
4
58ca03a2
TG		 52013-09-18 Tristan Gingold <gingold@adacore.com>
6
7 * NEWS: Add marker for 2.24.
8
ab905915
NC		 92013-09-18 Nick Clifton <nickc@redhat.com>
10
11 * config/tc-msp430.c (OPTION_MOVE_DATA): Define.
12 (move_data): New variable.
13 (md_parse_option): Parse -md.
14 (msp430_section): New function. Catch references to the .bss or
15 .data sections and generate a special symbol for use by the libcrt
16 library.
17 (md_pseudo_table): Intercept .section directives.
18 (md_longopt): Add -md
19 (md_show_usage): Likewise.
20 (msp430_operands): Generate a warning message if a NOP is inserted
21 into the instruction stream.
22 * doc/c-msp430.texi (node MSP430 Options): Document -md option.
23
f1c38003
SE		 242013-09-17 Doug Gilmore <Doug.Gilmore@imgtec.com>
25
26 * config/tc-mips.c (mips_elf_final_processing): Set
ab905915 27 EF_MIPS_FP64 for -mgp32 -mfp64, removing old FIXME.
f1c38003 28
1d50d57c
WN		 292013-09-16 Will Newton <will.newton@linaro.org>
30
31 * config/tc-arm.c (do_neon_ld_st_interleave): Add constraint
32 disallowing element size 64 with interleave other than 1.
33
173d3447
CF		 342013-09-12 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
35
36 * config/tc-mips.c (match_insn): Set error when $31 is used for
37 bltzal* and bgezal*.
38
ac21e7da
TG		 392013-09-04 Tristan Gingold <gingold@adacore.com>
40
41 * config/tc-ppc.c (md_apply_fix): Handle defined after use toc
42 symbols.
43
74db7efb
NC		 442013-09-04 Roland McGrath <mcgrathr@google.com>
45
46 PR gas/15914
47 * config/tc-arm.c (T16_32_TAB): Add _udf.
48 (do_t_udf): New function.
49 (insns): Add "udf".
50
664a88c6
DD		 512013-08-23 Sandeep Kumar Singh <Sandeep.Singh2@kpitcummins.com>
52
53 * config/rx-parse.y: Rearrange the components of a bison grammar to issue
54 assembler errors at correct position.
55
9aff4b7a
NC		 562013-08-23 Yuri Chornoivan <yurchor@ukr.net>
57
58 PR binutils/15834
59 * config/tc-ia64.c: Fix typos.
60 * config/tc-sparc.c: Likewise.
61 * config/tc-z80.c: Likewise.
62 * doc/c-i386.texi: Likewise.
63 * doc/c-m32r.texi: Likewise.
64
4f2374c7
WN		 652013-08-23 Will Newton <will.newton@linaro.org>
66
9aff4b7a 67 * config/tc-arm.c: (do_neon_ldx_stx): Add extra constraints
4f2374c7
WN		 68 for pre-indexed addressing modes.
69
b4e6cb80
AM		 702013-08-21 Alan Modra <amodra@gmail.com>
71
72 * symbols.c (fb_label_instance_inc, fb_label_instance): Properly
73 range check label number for use with fb_low_counter array.
74
1661c76c
RS		 752013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
76
77 * config/tc-mips.c (mips_check_isa_supports_ase, reg_lookup)
78 (mips_parse_argument_token, validate_micromips_insn, md_begin)
79 (check_regno, match_float_constant, check_completed_insn, append_insn)
80 (match_insn, match_mips16_insn, match_insns, macro_start)
81 (macro_build_ldst_constoffset, load_register, macro, mips_ip)
82 (mips16_ip, mips_set_option_string, md_parse_option)
83 (mips_after_parse_args, mips_after_parse_args, md_pcrel_from)
84 (md_apply_fix, s_align, s_option, s_mipsset, s_tls_rel_directive)
85 (s_gpword, s_gpdword, s_ehword, s_nan, tc_gen_reloc, md_convert_frag)
86 (s_mips_end, s_mips_ent, s_mips_frame, s_mips_mask, mips_parse_cpu):
87 Start error messages with a lower-case letter. Do not end error
88 messages with a period. Wrap long messages to 80 character-lines.
89 Use "cannot" instead of "can't" and "can not".
90
b0e6f033
RS		 912013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
92
93 * config/tc-mips.c (imm_expr): Expand comment.
94 (set_at, macro, mips16_macro): Expect imm_expr to be O_constant
95 when populated.
96
e423441d
RS		 972013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
98
99 * config/tc-mips.c (imm2_expr): Delete.
100 (md_assemble, match_insn, imm2_expr.X_op, mips_ip): Update accordingly.
101
5e0dc5ba
RS		 1022013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
103
104 * config/tc-mips.c (report_bad_range, report_bad_field): Delete.
105 (macro): Remove M_DEXT and M_DINS handling.
106
60f20e8b
RS		 1072013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
108
109 * config/tc-mips.c (mips_arg_info): Replace allow_nonconst and
110 lax_max with lax_match.
111 (match_int_operand): Update accordingly. Don't report an error
112 for !lax_match-only cases.
113 (match_insn): Replace more_alts with lax_match and use it to
114 initialize the mips_arg_info field. Add a complete_p parameter.
115 Handle implicit VU0 suffixes here.
116 (match_invalid_for_isa, match_insns, match_mips16_insns): New
117 functions.
118 (mips_ip, mips16_ip): Use them.
119
d436c1c2
RS		 1202013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
121
122 * config/tc-mips.c (match_expression): Report uses of registers here.
123 Add a "must be an immediate expression" error. Handle elided offsets
124 here rather than...
125 (match_int_operand): ...here.
126
1a00e612
RS		 1272013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
128
129 * config/tc-mips.c (mips_arg_info): Remove soft_match.
130 (match_out_of_range, match_not_constant): New functions.
131 (match_const_int): Remove fallback parameter and check for soft_match.
132 Use match_not_constant.
133 (match_mapped_int_operand, match_addiusp_operand)
134 (match_perf_reg_operand, match_save_restore_list_operand)
135 (match_mdmx_imm_reg_operand): Update accordingly. Use
136 match_out_of_range and set_insn_error* instead of as_bad.
137 (match_int_operand): Likewise. Use match_not_constant in the
138 !allows_nonconst case.
139 (match_float_constant): Report invalid float constants.
140 (match_insn, match_mips16_insn): Remove soft_match code. Rely on
141 match_float_constant to check for invalid constants. Fail the
142 match if match_const_int or match_float_constant return false.
143 (mips_ip): Update accordingly.
144 (mips16_ip): Likewise. Undo null termination of instruction name
145 once lookup is complete.
146
e3de51ce
RS		 1472013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
148
149 * config/tc-mips.c (mips_insn_error_format): New enum.
150 (mips_insn_error): New struct.
151 (insn_error): Change to a mips_insn_error.
152 (clear_insn_error, set_insn_error_format, set_insn_error)
153 (set_insn_error_i, set_insn_error_ss, report_insn_error): New
154 functions.
155 (mips_parse_argument_token, md_assemble, match_insn)
156 (match_mips16_insn): Use them instead of manipulating insn_error
157 directly.
158 (mips_ip, mips16_ip): Likewise. Simplify control flow.
159
97d87491
RS		 1602013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
161
162 * config/tc-mips.c (normalize_constant_expr): Move further up file.
163 (normalize_address_expr): Likewise.
164 (match_insn, match_mips16_insn): New functions, split out from...
165 (mips_ip, mips16_ip): ...here.
166
0f35dbc4
RS		 1672013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
168
169 * config/tc-mips.c (operand_reg_mask, match_operand): Handle
170 OP_OPTIONAL_REG.
171 (mips_ip, mips16_ip): Use mips_optional_operand_p to check
172 for optional operands.
173
27285eed
AM		 1742013-08-16 Alan Modra <amodra@gmail.com>
175
176 * config/tc-ppc.c (ppc_elf_cons): Allow @l and other reloc
177 modifiers generally.
178
cbe02d4f
AM		 1792013-08-16 Alan Modra <amodra@gmail.com>
180
181 * config/tc-ppc.c (ppc_elf_lcomm): Use subsection 1.
182
3c02c47f
DE		 1832013-08-14 David Edelsohn <dje.gcc@gmail.com>
184
185 * config/tc-ppc.c (ppc_comm): Accept optional fourth .lcomm
186 argument as alignment.
187
4046d87a
NC		 1882013-08-09 Nick Clifton <nickc@redhat.com>
189
190 * config/tc-rl78.c (elf_flags): New variable.
191 (enum options): Add OPTION_G10.
192 (md_longopts): Add mg10.
193 (md_parse_option): Parse -mg10.
194 (rl78_elf_final_processing): New function.
195 * config/tc-rl78.c (tc_final_processing): Define.
196 * doc/c-rl78.texi: Document -mg10 option.
197
ee5734f0
RS		 1982013-08-06 Jürgen Urban <JuergenUrban@gmx.de>
199
200 * config/tc-mips.c (match_vu0_suffix_operand): Allow single-channel
201 suffixes to be elided too.
202 (mips_lookup_insn): Don't reject INSN2_VU0_CHANNEL_SUFFIX here.
203 (mips_ip): Assume .xyzw if no VU0 suffix is specified. Allow +N
204 to be omitted too.
205
13896403
RS		 2062013-08-05 John Tytgat <john@bass-software.com>
207
208 * po/POTFILES.in: Regenerate.
209
d6787ef9
EB		 2102013-08-05 Eric Botcazou <ebotcazou@adacore.com>
211 Konrad Eisele <konrad@gaisler.com>
212
213 * config/tc-sparc.c (sparc_arch_types): Add leon.
214 (sparc_arch): Move sparc4 around and add leon.
215 (sparc_target_format): Document -Aleon.
216 * doc/c-sparc.texi: Likewise.
217
da8bca91
RS		 2182013-08-05 Richard Sandiford <rdsandiford@googlemail.com>
219
220 * config/tc-mips.c (mips_lookup_insn): Make length and opend signed.
221
14daeee3
RS		 2222013-08-04 Jürgen Urban <JuergenUrban@gmx.de>
223 Richard Sandiford <rdsandiford@googlemail.com>
224
225 * config/tc-mips.c (MAX_OPERANDS): Bump to 6.
226 (RWARN): Bump to 0x8000000.
227 (RTYPE_VI, RTYPE_VF, RTYPE_R5900_I, RTYPE_R5900_Q, RTYPE_R5900_R)
228 (RTYPE_R5900_ACC): New register types.
229 (RTYPE_MASK): Include them.
230 (R5900_I_NAMES, R5900_Q_NAMES, R5900_R_NAMES, R5900_ACC_NAMES): New
231 macros.
232 (reg_names): Include them.
233 (mips_parse_register_1): New function, split out from...
234 (mips_parse_register): ...here. Add a channels_ptr parameter.
235 Look for VU0 channel suffixes when nonnull.
236 (reg_lookup): Update the call to mips_parse_register.
237 (mips_parse_vu0_channels): New function.
238 (OT_CHANNELS, OT_DOUBLE_CHAR): New mips_operand_token_types.
239 (mips_operand_token): Add a "channels" field to the union.
240 Extend the comment above "ch" to OT_DOUBLE_CHAR.
241 (mips_parse_base_start): Match -- and ++. Handle channel suffixes.
242 (mips_parse_argument_token): Handle channel suffixes here too.
243 (validate_mips_insn): Handle INSN2_VU0_CHANNEL_SUFFIX.
244 Ignore OP_VU0_MATCH_SUFFIX when calculating the used bits.
245 Handle '#' formats.
246 (md_begin): Register $vfN and $vfI registers.
247 (operand_reg_mask): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX.
248 (convert_reg_type): Handle OP_REG_VI, OP_REG_VF, OP_REG_R5900_I,
249 OP_REG_R5900_Q, OP_REG_R5900_R and OP_REG_R5900_ACC.
250 (match_vu0_suffix_operand): New function.
251 (match_operand): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX.
252 (macro): Use "+7" rather than "E" for LDQ2 and STQ2.
253 (mips_lookup_insn): New function.
254 (mips_ip): Use it. Allow "+K" operands to be elided at the end
255 of an instruction. Handle '#' sequences.
256
c0ebe874
RS		 2572013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
258
259 * config/tc-mips.c (macro, mips16_macro): Create an array of operand
260 values and use it instead of sreg, treg, xreg, etc.
261
3ccad066
RS		 2622013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
263
264 * config/tc-mips.c (match_int_operand): Use mips_int_operand_min
265 and mips_int_operand_max.
266 (mips16_immed_operand, mips16_immed_operands, MIPS16_NUM_IMMED):
267 Delete.
268 (mips16_immed_operand, mips16_immed_in_range_p): New functions.
269 (mips16_immed, mips16_extended_frag): Use them. Use mips_int_operand
270 instead of mips16_immed_operand.
271
0acfaea6
RS		 2722013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
273
274 * config/tc-mips.c (mips16_macro): Don't use move_register.
275 (mips16_ip): Allow macros to use 'p'.
276
fc76e730
RS		 2772013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
278
279 * config/tc-mips.c (MAX_OPERANDS): New macro.
280 (mips_operand_array): New structure.
281 (mips_operands, mips16_operands, micromips_operands): New arrays.
282 (micromips_to_32_reg_b_map, micromips_to_32_reg_c_map)
283 (micromips_to_32_reg_e_map, micromips_to_32_reg_f_map)
284 (micromips_to_32_reg_g_map, micromips_to_32_reg_l_map)
285 (micromips_to_32_reg_q_map): Delete.
286 (insn_operands, insn_opno, insn_extract_operand): New functions.
287 (validate_mips_insn): Take a mips_operand_array as argument and
288 use it to build up a list of operands. Extend to handle INSN_MACRO
289 and MIPS16.
290 (validate_mips16_insn): New function.
291 (validate_micromips_insn): Take a mips_operand_array as argument.
292 Handle INSN_MACRO.
293 (md_begin): Initialize mips_operands, mips16_operands and
294 micromips_operands. Call validate_mips_insn and
295 validate_micromips_insn for macro instructions too.
296 Call validate_mips16_insn for MIPS16 instructions.
297 (insn_read_mask, insn_write_mask, operand_reg_mask, insn_reg_mask):
298 New functions.
299 (gpr_read_mask, gpr_write_mask, fpr_read_mask, fpr_write_mask): Use
300 them. Handle INSN_UDI.
301 (get_append_method): Use gpr_read_mask.
302
26545944
RS		 3032013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
304
305 * config/tc-mips.c (compact_branch_p, uncond_branch_p): Use the same
306 flags for MIPS16 and non-MIPS16 instructions.
307 (gpr_mod_mask): Move the INSN2_MOD_SP case outside the micromips block.
308 (gpr_read_mask): Use INSN2_READ_GPR_31 for MIPS16 instructions too.
309 (gpr_write_mask): Remove MIPS16_INSN_WRITE_SP handling.
310 (can_swap_branch_p, get_append_method): Use the same flags for MIPS16
311 and non-MIPS16 instructions. Fix formatting.
312
85fcb30f
RS		 3132013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
314
315 * config/tc-mips.c (reg_needs_delay): Move later in file.
316 Use gpr_write_mask.
317 (insns_between): Use gpr_read_mask instead of EXTRACT_OPERAND.
318
43234a1e
L		 3192013-07-26 Sergey Guriev <sergey.s.guriev@intel.com>
320 Alexander Ivchenko <alexander.ivchenko@intel.com>
321 Maxim Kuznetsov <maxim.kuznetsov@intel.com>
322 Sergey Lega <sergey.s.lega@intel.com>
323 Anna Tikhonova <anna.tikhonova@intel.com>
324 Ilya Tocar <ilya.tocar@intel.com>
325 Andrey Turetskiy <andrey.turetskiy@intel.com>
326 Ilya Verbin <ilya.verbin@intel.com>
327 Kirill Yukhin <kirill.yukhin@intel.com>
328 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
329
330 * config/tc-i386-intel.c (O_zmmword_ptr): New.
331 (i386_types): Add zmmword.
332 (i386_intel_simplify_register): Allow regzmm.
333 (i386_intel_simplify): Handle zmmwords.
334 (i386_intel_operand): Handle RC/SAE, vector operations and
335 zmmwords.
336 * config/tc-i386.c (ZMMWORD_MNEM_SUFFIX): New.
337 (struct RC_Operation): New.
338 (struct Mask_Operation): New.
339 (struct Broadcast_Operation): New.
340 (vex_prefix): Size of bytes increased to 4 to support EVEX
341 encoding.
342 (enum i386_error): Add new error codes: unsupported_broadcast,
343 broadcast_not_on_src_operand, broadcast_needed,
344 unsupported_masking, mask_not_on_destination, no_default_mask,
345 unsupported_rc_sae, rc_sae_operand_not_last_imm,
346 invalid_register_operand, try_vector_disp8.
347 (struct _i386_insn): Add new fields vrex, need_vrex, mask,
348 rounding, broadcast, memshift.
349 (struct RC_name): New.
350 (RC_NamesTable): New.
351 (evexlig): New.
352 (evexwig): New.
353 (extra_symbol_chars): Add '{'.
354 (cpu_arch): Add AVX512F, AVX512CD, AVX512ER and AVX512PF.
355 (i386_operand_type): Add regzmm, regmask and vec_disp8.
356 (match_mem_size): Handle zmmwords.
357 (operand_type_match): Handle zmm-registers.
358 (mode_from_disp_size): Handle vec_disp8.
359 (fits_in_vec_disp8): New.
360 (md_begin): Handle {} properly.
361 (type_names): Add "rZMM", "Mask reg" and "Vector d8".
362 (build_vex_prefix): Handle vrex.
363 (build_evex_prefix): New.
364 (process_immext): Adjust to properly handle EVEX.
365 (md_assemble): Add EVEX encoding support.
366 (swap_2_operands): Correctly handle operands with masking,
367 broadcasting or RC/SAE.
368 (check_VecOperands): Support EVEX features.
369 (VEX_check_operands): Properly handle 16 upper [xyz]mm registers.
370 (match_template): Support regzmm and handle new error codes.
371 (process_suffix): Handle zmmwords and zmm-registers.
372 (check_byte_reg): Extend to zmm-registers.
373 (process_operands): Extend to zmm-registers.
374 (build_modrm_byte): Handle EVEX.
375 (output_insn): Adjust to properly handle EVEX case.
376 (disp_size): Handle vec_disp8.
377 (output_disp): Support compressed disp8*N evex feature.
378 (output_imm): Handle RC/SAE immediates properly.
379 (check_VecOperations): New.
380 (i386_immediate): Handle EVEX features.
381 (i386_index_check): Handle zmmwords and zmm-registers.
382 (RC_SAE_immediate): New.
383 (i386_att_operand): Handle EVEX features.
384 (parse_real_register): Add a check for ZMM/Mask registers.
385 (OPTION_MEVEXLIG): New.
386 (OPTION_MEVEXWIG): New.
387 (md_longopts): Add mevexlig and mevexwig.
388 (md_parse_option): Handle mevexlig and mevexwig options.
389 (md_show_usage): Add description for mevexlig and mevexwig.
390 * doc/c-i386.texi: Document avx512f/.avx512f, avx512cd/.avx512cd,
391 avx512er/.avx512er, avx512pf/.avx512pf, mevexlig and mevexwig.
392
a0046408
L		 3932013-07-25 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
394
395 * config/tc-i386.c (cpu_arch): Add .sha.
396 * doc/c-i386.texi: Document sha/.sha.
397
7e8b059b
L		 3982013-07-24 Anna Tikhonova <anna.tikhonova@intel.com>
399 Kirill Yukhin <kirill.yukhin@intel.com>
400 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
401
402 * config/tc-i386.c (BND_PREFIX): New.
403 (struct _i386_insn): Add new field bnd_prefix.
404 (add_bnd_prefix): New.
405 (cpu_arch): Add MPX.
406 (i386_operand_type): Add regbnd.
407 (md_assemble): Handle BND prefixes.
408 (parse_insn): Likewise.
409 (output_branch): Likewise.
410 (output_jump): Likewise.
411 (build_modrm_byte): Handle regbnd.
412 (OPTION_MADD_BND_PREFIX): New.
413 (md_longopts): Add entry for 'madd-bnd-prefix'.
414 (md_parse_option): Handle madd-bnd-prefix option.
415 (md_show_usage): Add description for madd-bnd-prefix
416 option.
417 * doc/c-i386.texi: Document mpx/.mpx and -madd-bnd-prefix.
418
7fa9fcb6
TG		 4192013-07-24 Tristan Gingold <gingold@adacore.com>
420
421 * config/tc-ppc.c (md_apply_fix): Adjust BFD_RELOC_PPC_B16 on
422 xcoff targets.
423
614eb277
AK		 4242013-07-24 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
425
426 * config/tc-s390.c (s390_machine): Don't force the .machine
427 argument to lower case.
428
e673710a
KT		 4292013-07-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
430
431 * config/tc-arm.c (s_arm_arch_extension): Improve error message
432 for invalid extension.
433
69091a2c
YZ		 4342013-07-19 Yufeng Zhang <yufeng.zhang@arm.com>
435
436 * config/tc-aarch64.c (enum aarch64_abi_type): New enumeration tag.
437 (AARCH64_ABI_LP64, AARCH64_ABI_ILP32): New enumerators.
438 (aarch64_abi): New variable.
439 (ilp32_p): Change to be a macro.
440 (aarch64_opts): Remove the support for option -milp32 and -mlp64.
441 (struct aarch64_option_abi_value_table): New struct.
442 (aarch64_abis): New table.
443 (aarch64_parse_abi): New function.
444 (aarch64_long_opts): Add entry for -mabi=.
445 * doc/as.texinfo (Target AArch64 options): Document -mabi.
446 * doc/c-aarch64.texi: Likewise.
447
faf786e6
NC		 4482013-07-18 Jim Thomas <thomas@cfht.hawaii.edu>
449
450 * config/tc-i386-intel.c (i386_intel_operand): Fixed signed vs
451 unsigned comparison.
452
f0c00282
NC		 4532013-07-18 Sandeep Kumar Singh <Sandeep.Singh2@kpitcummins.com>
454
cbe02d4f 455 * config/rx-defs.h: Add macros for RX100, RX200, RX600, and
f0c00282 456 RX610.
cbe02d4f 457 * config/rx-parse.y: (rx_check_float_support): Add function to
f0c00282
NC		 458 check floating point operation support for target RX100 and
459 RX200.
cbe02d4f
AM		 460 * config/tc-rx.c: Add CPU options RX100, RX200, RX600, and RX610.
461 * doc/c-rx.texi: Add -mcpu option to recognize macros for RX100,
462 RX200, RX600, and RX610
f0c00282 463
8c997c27
NC		 4642013-07-18 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
465
466 * config/tc-avr.c (md_show_usage): Add avrxmega2 to help text
467
8be59acb
NC		 4682013-07-18 Vishnu K.S <vishnu.k_s@atmel.com>
469
470 * config/tc-avr.c: Make ata6289's ISA to AVR_ISA_AVR4.
471 * doc/c-avr.texi: Likewise.
472
4a06e5a2
RS		 4732013-07-15 Richard Sandiford <rdsandiford@googlemail.com>
474
475 * config/tc-mips.c (match_save_restore_list_operand): Avoid -Wformat
476 error with older GCCs.
477 (mips16_macro_build): Dereference args.
478
a92713e6
RS		 4792013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
480
481 * config/tc-mips.c (mips_prefer_vec_regno, mips_parse_register):
482 New functions, split out from...
483 (reg_lookup): ...here. Remove itbl support.
484 (reglist_lookup): Delete.
485 (mips_operand_token_type): New enum.
486 (mips_operand_token): New structure.
487 (mips_operand_tokens): New variable.
488 (mips_add_token, mips_parse_base_start, mips_parse_argument_token)
489 (mips_parse_arguments): New functions.
490 (md_begin): Initialize mips_operand_tokens.
491 (mips_arg_info): Add a token field. Remove optional_reg field.
492 (match_char, match_expression): New functions.
493 (match_const_int): Use match_expression. Remove "s" argument
494 and return a boolean result. Remove O_register handling.
495 (match_regno, match_reg, match_reg_range): New functions.
496 (match_int_operand, match_mapped_int_operand, match_msb_operand)
497 (match_reg_operand, match_reg_pair_operand, match_perf_reg_operand)
498 (match_addiusp_operand, match_clo_clz_dest_operand)
499 (match_lwm_swm_list_operand, match_entry_exit_operand)
500 (match_save_restore_list_operand, match_mdmx_imm_reg_operand)
501 (match_tied_reg_operand): Remove "s" argument and return a boolean
502 result. Match tokens rather than text. Update calls to
503 match_const_int. Rely on match_regno to call check_regno.
504 (match_pcrel_operand, match_pc_operand): Replace "s" argument with
505 "arg" argument. Return a boolean result.
506 (parse_float_constant): Replace with...
507 (match_float_constant): ...this new function.
508 (match_operand): Remove "s" argument and return a boolean result.
509 Update calls to subfunctions.
510 (mips_ip, mips16_ip): Call mips_parse_arguments. Use match routines
511 rather than string-parsing routines. Update handling of optional
512 registers for token scheme.
513
89565f1b
RS		 5142013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
515
516 * config/tc-mips.c (parse_float_constant): Split out from...
517 (mips_ip): ...here.
518
3c14a432
RS		 5192013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
520
521 * config/tc-mips.c (INSERT_BITS, INSERT_OPERAND, MIPS16_INSERT_OPERAND):
522 Delete.
523
364215c8
RS		 5242013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
525
526 * config/tc-mips.c (mips32_to_16_reg_map): Delete.
527 (match_entry_exit_operand): New function.
528 (match_save_restore_list_operand): Likewise.
529 (match_operand): Use them.
530 (check_absolute_expr): Delete.
531 (mips16_ip): Rewrite main parsing loop to use mips_operands.
532
9e12b7a2
RS		 5332013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
534
535 * config/tc-mips.c: Enable functions commented out in previous patch.
536 (SKIP_SPACE_TABS): Move further up file.
537 (mips32_to_micromips_reg_b_map, mips32_to_micromips_reg_c_map)
538 (mips32_to_micromips_reg_d_map, mips32_to_micromips_reg_e_map)
539 (ips32_to_micromips_reg_f_map, mips32_to_micromips_reg_g_map)
540 (mips32_to_micromips_reg_l_map, mips32_to_micromips_reg_m_map)
541 (mips32_to_micromips_reg_q_map, mips32_to_micromips_reg_n_map)
542 (micromips_imm_b_map, micromips_imm_c_map): Delete.
543 (mips_lookup_reg_pair): Delete.
544 (macro): Use report_bad_range and report_bad_field.
545 (mips_immed, expr_const_in_range): Delete.
546 (mips_ip): Rewrite main parsing loop to use new functions.
547
a1d78564
RS		 5482013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
549
550 * config/tc-mips.c (mips_oddfpreg_ok): Move further up file.
551 Change return type to bfd_boolean.
552 (report_bad_range, report_bad_field): New functions.
553 (mips_arg_info): New structure.
554 (match_const_int, convert_reg_type, check_regno, match_int_operand)
555 (match_mapped_int_operand, match_msb_operand, match_reg_operand)
556 (match_reg_pair_operand, match_pcrel_operand, match_perf_reg_operand)
557 (match_addiusp_operand, match_clo_clz_dest_operand)
558 (match_lwm_swm_list_operand, match_mdmx_imm_reg_operand)
559 (match_pc_operand, match_tied_reg_operand, match_operand)
560 (check_completed_insn): New functions, commented out for now.
561
e077a1c8
RS		 5622013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
563
564 * config/tc-mips.c (insn_insert_operand): New function.
565 (macro_build, mips16_macro_build): Put null character check
566 in the for loop and convert continues to breaks. Use operand
567 structures to handle constant operands.
568
ab902481
RS		 5692013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
570
571 * config/tc-mips.c (validate_mips_insn): Move further up file.
572 Add insn_bits and decode_operand arguments. Use the mips_operand
573 fields to work out which bits an operand occupies. Detect double
574 definitions.
575 (validate_micromips_insn): Move further up file. Call into
576 validate_mips_insn.
577
2f8b73cc
RS		 5782013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
579
580 * config/tc-mips.c (mips16_macro_build): Remove 'Y' case.
581
c8276761
RS		 5822013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
583
584 * config/tc-mips.c (macro_build): Take an int for "C", "k", "\\"
585 and "~".
586 (macro): Update accordingly.
587
77bd4346
RS		 5882013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
589
590 * config/tc-mips.c (imm_expr, imm2_expr, offset_expr): Tweak commentary.
591 (imm_reloc): Delete.
592 (md_assemble): Remove imm_reloc handling.
593 (mips_ip): Update commentary. Use offset_expr and offset_reloc
594 rather than imm_expr and imm_reloc for 'i', 'j' and 'u'.
595 Use a temporary array rather than imm_reloc when parsing
596 constant expressions. Remove imm_reloc initialization.
597 (mips16_ip): Update commentary. Use offset_expr and offset_reloc
598 for the relaxable field. Use a relax_char variable to track the
599 type of this field. Remove imm_reloc initialization.
600
cc537e56
RS		 6012013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
602
603 * config/tc-mips.c (mips16_ip): Handle "I".
604
ba92f887
MR		 6052013-07-12 Maciej W. Rozycki <macro@codesourcery.com>
606
607 * config/tc-mips.c (mips_flag_nan2008): New variable.
608 (options): Add OPTION_NAN enum value.
609 (md_longopts): Handle it.
610 (md_parse_option): Likewise.
611 (s_nan): New function.
612 (mips_elf_final_processing): Handle EF_MIPS_NAN2008.
613 (md_show_usage): Add -mnan.
614
615 * doc/as.texinfo (Overview): Add -mnan.
616 * doc/c-mips.texi (MIPS Opts): Document -mnan.
617 (MIPS NaN Encodings): New node. Document .nan directive.
618 (MIPS-Dependent): List the new node.
619
c1094734
TG		 6202013-07-09 Tristan Gingold <gingold@adacore.com>
621
622 * configure.com: Define HAVE_SYS_TYPES_H and HAVE_UNISTD_H
623
0cbbe1b8
RS		 6242013-07-08 Richard Sandiford <rdsandiford@googlemail.com>
625
626 * config/tc-mips.c (mips_ip): Unconditionally parse an expression
627 for 'A' and assume that the constant has been elided if the result
628 is an O_register.
629
f2ae14a1
RS		 6302013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
631
632 * config/tc-mips.c (gprel16_reloc_p): New function.
633 (macro_read_relocs): Assume BFD_RELOC_LO16 if all relocs are
634 BFD_RELOC_UNUSED.
635 (offset_high_part, small_offset_p): New functions.
636 (nacro): Use them. Remove *_OB and *_DOB cases. For single-
637 register load and store macros, handle the 16-bit offset case first.
638 If a 16-bit offset is not suitable for the instruction we're
639 generating, load it into the temporary register using
640 ADDRESS_ADDI_INSN. Make the M_LI_DD code fall through into the
641 M_L_DAB code once the address has been constructed. For double load
642 and store macros, again handle the 16-bit offset case first.
643 If the second register cannot be accessed from the same high
644 part as the first, load it into AT using ADDRESS_ADDI_INSN.
645 Fix the handling of LD in cases where the first register is the
646 same as the base. Also handle the case where the offset is
647 not 16 bits and the second register cannot be accessed from the
648 same high part as the first. For unaligned loads and stores,
649 fuse the offbits == 12 and old "ab" handling. Apply this handling
650 whenever the second offset needs a different high part from the first.
651 Construct the offset using ADDRESS_ADDI_INSN where possible,
652 for offbits == 16 as well as offbits == 12. Use offset_reloc
653 when constructing the individual loads and stores.
654 (mips_ip): Set up imm_expr, imm2_expr, offset_expr, imm_reloc
655 and offset_reloc before matching against a particular opcode.
656 Handle elided 'A' constants. Allow 'A' constants to use
657 relocation operators.
658
5c324c16
RS		 6592013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
660
661 * config/tc-mips.c (validate_mips_insn): Remove "[" and "]" handling.
662 (mips_ip): Likewise. Do not set is_mdmx for INSN_5400 instructions.
663 Check constraints on the VR5400 RZU.OB, SLL.OB and SRL.OB instructions.
664
23e69e47
RS		 6652013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
666
667 * config/tc-mips.c (mips_ip): Preserve the real bit number for "+p".
668 Require the msb to be <= 31 for "+s". Check that the size is <= 31
669 for both "+s" and "+S".
670
27c5c572
RS		 6712013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
672
673 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn):
674 (mips_ip, mips16_ip): Handle "+i".
675
e76ff5ab
RS		 6762013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
677
678 * config/tc-mips.c (mips32_to_micromips_reg_h_map): Delete.
679 (micromips_to_32_reg_h_map): Rename to...
680 (micromips_to_32_reg_h_map1): ...this.
681 (micromips_to_32_reg_i_map): Rename to...
682 (micromips_to_32_reg_h_map2): ...this.
683 (mips_lookup_reg_pair): New function.
684 (gpr_write_mask, macro): Adjust after above renaming.
685 (validate_micromips_insn): Remove "mi" handling.
686 (mips_ip): Likewise. Parse both registers in a pair for "mh".
687
fa7616a4
RS		 6882013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
689
690 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn)
691 (mips_ip): Remove "+D" and "+T" handling.
692
fb798c50
AK		 6932013-07-05 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
694
695 * config/tc-s390.c (md_gather_operands, md_apply_fix): Support new
696 relocs.
697
2c0a3565
MS		 6982013-07-03 Marcus Shawcroft <marcus.shawcroft@arm.com>
699
4aa2c5e2
MS		 700 * config/tc-aarch64.c (reloc_table): Merge got_prel19 into got.
701
7022013-07-02 Marcus Shawcroft <marcus.shawcroft@arm.com>
703
2c0a3565
MS		 704 * config/tc-aarch64.c (md_apply_fix): Reorder case values.
705 (aarch64_force_relocation): Likewise.
706
f40da81b
AM		 7072013-07-02 Alan Modra <amodra@gmail.com>
708
709 * config/tc-ppc.c (ppc_elf_adjust_symtab): Don't make .TOC. weak.
710
81566a9b
MR		 7112013-06-26 Maciej W. Rozycki <macro@codesourcery.com>
712
713 * doc/as.texinfo (Overview): Remove @samp from MIPS ISA names.
714 * doc/c-mips.texi (MIPS Options): Remove @sc from MIPS ISA names.
715 Replace @sc{mips16} with literal `MIPS16'.
716 (MIPS ISA): Replace @sc{mips3} with literal `MIPS III'.
717
a6bb11b2
YZ		 7182013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
719
720 * config/tc-aarch64.c (reloc_table): Replace
721 BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with
722 BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to
723 BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and
724 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC.
725 (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC,
726 BFD_RELOC_AARCH64_LD32_GOT_LO12_NC,
727 BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC,
728 BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC,
729 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and
730 BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC.
731 (aarch64_force_relocation): Likewise.
732
cec5225b
YZ		 7332013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
734
735 * config/tc-aarch64.c (ilp32_p): New static variable.
736 (elf64_aarch64_target_format): Return the target according to the
737 value of 'ilp32_p'.
738 (md_begin): Determine 'mach' according to the value of 'ilp32_p'.
739 (aarch64_opts): Add support for options '-milp32' and '-mlp64'.
740 (aarch64_dwarf2_addr_size): New function.
741 * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration.
742 (DWARF2_ADDR_SIZE): New define.
743
e335d9cb
RS		 7442013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
745
746 * doc/c-mips.texi: Use ISA instead of @sc{isa}.
747
18870af7
RS		 7482013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
749
750 * config/tc-mips.c (validate_mips_insn): Use STYPE rather than SHAMT.
751
833794fc
MR		 7522013-06-25 Maciej W. Rozycki <macro@codesourcery.com>
753
754 * config/tc-mips.c (mips_set_options): Add insn32 member.
755 (mips_opts): Initialize it.
756 (NOP_INSN, NOP_INSN_SIZE): Handle insn32 mode.
757 (options): Add OPTION_INSN32 and OPTION_NO_INSN32 enum values.
758 (md_longopts): Add "minsn32" and "mno-insn32" options.
759 (is_size_valid): Handle insn32 mode.
760 (md_assemble): Pass instruction string down to macro.
761 (brk_fmt): Add second dimension and insn32 mode initializers.
762 (mfhl_fmt): Likewise.
763 (BRK_FMT, MFHL_FMT): Handle insn32 mode.
764 (macro_build) <'c'>: Handle microMIPS 32-bit BREAK encoding.
765 (macro_build_jalr, move_register): Handle insn32 mode.
766 (macro_build_branch_rs): Likewise.
767 (macro): Handle insn32 mode.
768 <M_JRADDIUSP>, <M_JRC>, <M_MOVEP>: New cases.
769 (mips_ip): Handle insn32 mode.
770 (md_parse_option): Handle OPTION_INSN32 and OPTION_NO_INSN32.
771 (s_mipsset): Handle "insn32" and "noinsn32" pseudo-ops.
772 (mips_handle_align): Handle insn32 mode.
773 (md_show_usage): Add -minsn32 and -mno-insn32.
774
775 * doc/as.texinfo (Target MIPS options): Add -minsn32 and
776 -mno-insn32 options.
777 (-minsn32, -mno-insn32): New options.
778 * doc/c-mips.texi (MIPS Opts): Add -minsn32 and -mno-insn32
779 options.
780 (MIPS assembly options): New node. Document .set insn32 and
781 .set noinsn32.
782 (MIPS-Dependent): List the new node.
783
d1706f38
NC		 7842013-06-25 Nick Clifton <nickc@redhat.com>
785
786 * config/tc-msp430.c (msp430_srcoperand): Do not allow the use of
787 the PC in indirect addressing on 430xv2 parts.
788 (msp430_operands): Add version test to hardware bug encoding
789 restrictions.
790
477330fc
RM		 7912013-06-24 Roland McGrath <mcgrathr@google.com>
792
d996d970
RM		 793 * config/tc-arm.c (parse_reg_list): Use skip_past_char for '}',
794 so it skips whitespace before it.
795 (s_arm_unwind_save_mmxwr, s_arm_unwind_save_mmxwcg): Likewise.
796
477330fc
RM		 797 * config/tc-arm.c (arm_symbol_chars): Include '{' and '}'.
798 (arm_reg_parse_multi): Skip whitespace first.
799 (parse_reg_list): Likewise.
800 (parse_vfp_reg_list): Likewise.
801 (s_arm_unwind_save_mmxwcg): Likewise.
802
24382199
NC		 8032013-06-24 Nick Clifton <nickc@redhat.com>
804
805 PR gas/15623
806 * config/tc-arm.c (do_t_smc): Mark as ending an IT block.
807
c3678916
RS		 8082013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
809
810 * config/tc-mips.c (mips_ip): Fix swapped bit numbers in comments.
811
42429eac
RS		 8122013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
813
814 * config/tc-mips.c: Assert that offsetT and valueT are at least
815 8 bytes in size.
816 (GPR_SMIN, GPR_SMAX): New macros.
817 (macro, mips_ip): Remove code for 4-byte valueT and offsetT.
818
f3ded42a
RS		 8192013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
820
821 * config/tc-mips.c: Remove OBJ_ELF, OBJ_MAYBE_ELF and IS_ELF
822 conditions. Remove any code deselected by them.
823 (s_mips_frame, s_mips_mask): Handle ECOFF_DEBUGGING case first.
824
e8044f35
RS		 8252013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
826
827 * NEWS: Note removal of ECOFF support.
828 * doc/as.texinfo (--emulation): Update for the removal of MIPS ECOFF.
829 * Makefile.am (TARG_ENV_HFILES): Remove config/te-lnews.h.
830 (MULTI_CFILES): Remove config/e-mipsecoff.c.
831 * Makefile.in: Regenerate.
832 * configure.in: Remove MIPS ECOFF references.
833 (mips-sony-bsd*, mips-*-bsd*, mips-*-lnews*-ecoff, mips-*-*-ecoff):
834 Delete cases.
835 (mips-*-irix5*-*, mips*-*-linux*-*, mips*-*-freebsd*)
836 (mips*-*-kfreebsd*-gnu, mips-*-*-elf): Fold into...
837 (mips-*-*): ...this single case.
838 (mipsbecoff, mipslecoff, mipsecoff): Remove emulations. Expect
839 MIPS emulations to be e-mipself*.
840 * configure: Regenerate.
841 * configure.tgt (mips-sony-bsd*, mips-*-ultrix*, mips-*-osf*)
842 (mips-*-ecoff*, mips-*-pe*, mips-*-irix*, ips-*-lnews*, mips-*-riscos*)
843 (mips-*-sysv*): Remove coff and ecoff cases.
844 * as.c (mipsbecoff, mipslecoff, mipsecoff): Remove.
845 * ecoff.c: Remove reference to MIPS ECOFF.
846 * config/e-mipsecoff.c, config/te-lnews.h: Delete files.
847 * config/tc-mips.c (ECOFF_LITTLE_FORMAT): Delete.
848 (RDATA_SECTION_NAME, mips_target_form): Remove COFF and ECOFF cases.
849 (mips_hi_fixup): Tweak comment.
850 (append_insn): Require a howto.
851 (mips_after_parse_args): Remove OBJ_MAYBE_ECOFF code.
852
98508b2a
RS		 8532013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
854
855 * doc/as.texinfo: Use MIPS rather than @sc{mips} throughout.
856 Use "CPU" instead of "cpu".
857 * doc/c-mips.texi: Likewise.
858 (MIPS Opts): Rename to MIPS Options.
859 (MIPS option stack): Rename to MIPS Option Stack.
860 (MIPS ASE instruction generation overrides): Rename to
861 MIPS ASE Instruction Generation Overrides (for now).
862 (MIPS floating-point): Rename to MIPS Floating-Point.
863
fc16f8cc
RS		 8642013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
865
866 * doc/c-mips.texi (MIPS Macros): New section.
867 (MIPS Object): Replace with...
868 (MIPS Small Data): ...this new section.
869
5a7560b5
RS		 8702013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
871
872 * doc/c-mips.texi (MIPS symbol sizes): Move section further up file.
873 Capitalize name. Use @kindex instead of @cindex for .set entries.
874
a1b86ab7
RS		 8752013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
876
877 * doc/c-mips.texi (MIPS Stabs): Remove section.
878
c6278170
RS		 8792013-06-20 Richard Sandiford <rdsandiford@googlemail.com>
880
881 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS, ISA_SUPPORTS_DSP_ASE)
882 (ISA_SUPPORTS_DSP64_ASE, ISA_SUPPORTS_DSPR2_ASE, ISA_SUPPORTS_EVA_ASE)
883 (ISA_SUPPORTS_MT_ASE, ISA_SUPPORTS_MCU_ASE, ISA_SUPPORTS_VIRT_ASE)
884 (ISA_SUPPORTS_VIRT64_ASE): Delete.
885 (mips_ase): New structure.
886 (mips_ases): New table.
887 (FP64_ASES): New macro.
888 (mips_ase_groups): New array.
889 (mips_isa_rev, mips_ase_mask, mips_check_isa_supports_ase)
890 (mips_check_isa_supports_ases, mips_set_ase, mips_lookup_ase): New
891 functions.
892 (is_opcode_valid): Use mips_ases to get the 64-bit ASE flags.
893 (md_parse_option): Use mips_ases and mips_set_ase instead of
894 separate case statements for each ASE option.
895 (mips_after_parse_args): Use FP64_ASES. Use
896 mips_check_isa_supports_ases to check the ASEs against
897 other options.
898 (s_mipsset): Use mips_ases and mips_set_ase instead of
899 separate if statements for each ASE option. Use
900 mips_check_isa_supports_ases, even when a non-ASE option
901 is specified.
902
63a4bc21
KT		 9032013-06-19 Greta Yorsh <Greta.Yorsh@arm.com>
904
905 * config/tc-arm.c (arm_cpus): Add support for Cortex-A12.
906
c31f3936
RS		 9072013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
908
909 * config/tc-mips.c (md_shortopts, options, md_longopts)
910 (md_longopts_size): Move earlier in file.
911
846ef2d0
RS		 9122013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
913
914 * config/tc-mips.c (mips_set_options): Replace separate "ase_*" fields
915 with a single "ase" bitmask.
916 (mips_opts): Update accordingly.
917 (file_ase, file_ase_explicit): New variables.
918 (file_ase_mips3d, file_ase_mdmx, file_ase_smartmips, file_ase_dsp)
919 (file_ase_dspr2, file_ase_eva, file_ase_mt, file_ase_virt): Delete.
920 (ISA_HAS_ROR): Adjust for mips_set_options change.
921 (is_opcode_valid): Take the base ase mask directly from mips_opts.
922 (mips_ip): Adjust for mips_set_options change.
923 (md_parse_option): Likewise. Update file_ase_explicit.
924 (mips_after_parse_args): Adjust for mips_set_options change.
925 Use bitmask operations to select the default ASEs. Set file_ase
926 rather than individual per-ASE variables.
927 (s_mipsset): Adjust for mips_set_options change.
928 (mips_elf_final_processing): Test file_ase rather than
929 file_ase_mdmx. Remove commented-out code.
930
d16afab6
RS		 9312013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
932
933 * config/tc-mips.c (mips_cpu_info): Add an "ase" field.
934 (MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, MIPS_CPU_ASE_MT)
935 (MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX, MIPS_CPU_ASE_DSPR2)
936 (MIPS_CPU_ASE_MCU, MIPS_CPU_ASE_VIRT, MIPS_CPU_ASE_EVA): Delete.
937 (mips_after_parse_args): Use the new "ase" field to choose
938 the default ASEs.
939 (mips_cpu_info_table): Move ASEs from the "flags" field to the
940 "ase" field.
941
e83a675f
RE		 9422013-06-18 Richard Earnshaw <rearnsha@arm.com>
943
944 * config/tc-arm.c (symbol_preemptible): New function.
945 (relax_branch): Use it.
946
7f3c4072
CM		 9472013-06-17 Catherine Moore <clm@codesourcery.com>
948 Maciej W. Rozycki <macro@codesourcery.com>
949 Chao-Ying Fu <fu@mips.com>
950
951 * config/tc-mips.c (mips_set_options): Add ase_eva.
952 (mips_set_options mips_opts): Add ase_eva.
953 (file_ase_eva): Declare.
954 (ISA_SUPPORTS_EVA_ASE): Define.
955 (IS_SEXT_9BIT_NUM): Define.
956 (MIPS_CPU_ASE_EVA): Define.
957 (is_opcode_valid): Add support for ase_eva.
958 (macro_build): Likewise.
959 (macro): Likewise.
960 (validate_mips_insn): Likewise.
961 (validate_micromips_insn): Likewise.
962 (mips_ip): Likewise.
963 (options): Add OPTION_EVA and OPTION_NO_EVA.
964 (md_longopts): Add -meva and -mno-eva.
965 (md_parse_option): Process new options.
966 (mips_after_parse_args): Check for valid EVA combinations.
967 (s_mipsset): Likewise.
968
e410add4
RS		 9692013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
970
971 * dwarf2dbg.h (dwarf2_move_insn): Declare.
972 * dwarf2dbg.c (line_subseg): Add pmove_tail.
973 (get_line_subseg): Add create_p argument. Initialize pmove_tail.
974 (dwarf2_gen_line_info_1): Update call accordingly.
975 (dwarf2_move_insn): New function.
976 * config/tc-mips.c (append_insn): Use dwarf2_move_insn.
977
6a50d470
RS		 9782013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
979
980 Revert:
981
982 2011-09-05 Richard Sandiford <rdsandiford@googlemail.com>
983
984 PR gas/13024
985 * dwarf2dbg.c (pending_lines, pending_lines_tail): New variables.
986 (dwarf2_gen_line_info_1): Delete.
987 (dwarf2_push_line, dwarf2_flush_pending_lines): New functions.
988 (dwarf2_gen_line_info, dwarf2_emit_label): Use them.
989 (dwarf2_consume_line_info): Call dwarf2_flush_pending_lines.
990 (dwarf2_directive_loc): Push previous .locs instead of generating
991 them immediately.
992
f122319e
CF		 9932013-06-13 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
994
995 * config/tc-mips.c (ISA_SUPPORTS_VIRT_ASE): Support micromips.
996 (ISA_SUPPORTS_VIRT64_ASE): Support 64-bit micromips.
997
909c7f9c
NC		 9982013-06-13 Nick Clifton <nickc@redhat.com>
999
1000 PR gas/15602
1001 * config/tc-m68k.h (TC_CHECK_ADJUSTED_BROKEN_DOT_WORD): Define.
1002 * config/tc-m68k.c (tc_m68k_check_adjusted_broken_word): New
1003 function. Generates an error if the adjusted offset is out of a
1004 16-bit range.
1005
5d5755a7
SL		 10062013-06-12 Sandra Loosemore <sandra@codesourcery.com>
1007
1008 * config/tc-nios2.c (md_apply_fix): Mask constant
1009 BFD_RELOC_NIOS2_HIADJ16 value to 16 bits.
1010
3bf0dbfb
MR		 10112013-06-10 Maciej W. Rozycki <macro@codesourcery.com>
1012
1013 * config/tc-mips.c (append_insn): Don't do branch relaxation for
1014 MIPS-3D instructions either.
1015 (md_convert_frag): Update the COPx branch mask accordingly.
1016
1017 * config/tc-mips.c (md_show_usage): Document --[no-]relax-branch
1018 option.
1019 * doc/as.texinfo (Overview): Add --relax-branch and
1020 --no-relax-branch.
1021 * doc/c-mips.texi (MIPS Opts): Document --relax-branch and
1022 --no-relax-branch.
1023
9daf7bab
SL		 10242013-06-09 Sandra Loosemore <sandra@codesourcery.com>
1025
1026 * config/tc-nios2.c (nios2_parse_args): Allow trap argument to
1027 omitted.
1028
d301a56b
RS		 10292013-06-08 Catherine Moore <clm@codesourcery.com>
1030
1031 * config/tc-mips.c (is_opcode_valid): Build ASE mask.
1032 (is_opcode_valid_16): Pass ase value to opcode_is_member.
1033 (append_insn): Change INSN_xxxx to ASE_xxxx.
1034
7bab7634
DC		 10352013-06-01 George Thomas <george.thomas@atmel.com>
1036
cbe02d4f 1037 * gas/config/tc-avr.c: Change ISA for devices with USB support to
7bab7634
DC		 1038 AVR_ISA_XMEGAU
1039
f60cf82f
L		 10402013-05-31 H.J. Lu <hongjiu.lu@intel.com>
1041
1042 * config/tc-i386.c (md_begin): Don't align text/data/bss sections
1043 for ELF.
1044
a3f278e2
CM		 10452013-05-31 Paul Brook <paul@codesourcery.com>
1046
a3f278e2
CM		 1047 * config/tc-mips.c (s_ehword): New.
1048
067ec077
CM		 10492013-05-30 Paul Brook <paul@codesourcery.com>
1050
1051 * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH.
1052
d6101ac2
MR		 10532013-05-29 Maciej W. Rozycki <macro@codesourcery.com>
1054
1055 * write.c (resolve_reloc_expr_symbols): On REL targets don't
1056 convert relocs who have no relocatable field either. Rephrase
1057 the conditional so that the PC-relative check is only applied
1058 for REL targets.
1059
f19ccbda
MR		 10602013-05-28 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1061
1062 * config/tc-mips.c (macro) <ld>: Don't use $zero for address
1063 calculation.
1064
418009c2
YZ		 10652013-05-28 Yufeng Zhang <yufeng.zhang@arm.com>
1066
1067 * config/tc-aarch64.c (reloc_table): Update to use
477330fc 1068 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of
418009c2
YZ		 1069 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE.
1070 (md_apply_fix): Likewise.
1071 (aarch64_force_relocation): Likewise.
1072
0a8897c7
KT		 10732013-05-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1074
1075 * config/tc-arm.c (it_fsm_post_encode): Improve
1076 warning messages about deprecated IT block formats.
1077
89d2a2a3
MS		 10782013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com>
1079
1080 * config/tc-aarch64.c (md_apply_fix): Move value range checking
1081 inside fx_done condition.
1082
c77c0862
RS		 10832013-05-22 Jürgen Urban <JuergenUrban@gmx.de>
1084
1085 * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB.
1086
c0637f3a
PB		 10872013-05-20 Peter Bergner <bergner@vnet.ibm.com>
1088
1089 * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error
1090 and clean up warning when using PRINT_OPCODE_TABLE.
1091
5656a981
AM		 10922013-05-20 Alan Modra <amodra@gmail.com>
1093
1094 * config/tc-ppc.c (md_apply_fix): Hoist code common to insn
1095 and data fixups performing shift/high adjust/sign extension on
1096 fieldval. Sink fx_pcrel handling and checks. Use fixP->fx_size
1097 when writing data fixups rather than recalculating size.
1098
997b26e8
JBG		 10992013-05-16 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1100
1101 * doc/c-msp430.texi: Fix typo.
1102
9f6e76f4
TG		 11032013-05-16 Tristan Gingold <gingold@adacore.com>
1104
1105 * config/tc-ppc.c (ppc_is_toc_sym): Symbols of class XMC_TC
1106 are also TOC symbols.
1107
638d3803
NC		 11082013-05-16 Nick Clifton <nickc@redhat.com>
1109
1110 * config/tc-msp430.c: Make -mmcu recognise more part numbers.
1111 Add -mcpu command to specify core type.
997b26e8 1112 * doc/c-msp430.texi: Update documentation.
638d3803 1113
b015e599
AP		 11142013-05-09 Andrew Pinski <apinski@cavium.com>
1115
1116 * config/tc-mips.c (struct mips_set_options): New ase_virt field.
1117 (mips_opts): Update for the new field.
1118 (file_ase_virt): New variable.
1119 (ISA_SUPPORTS_VIRT_ASE): New macro.
1120 (ISA_SUPPORTS_VIRT64_ASE): New macro.
1121 (MIPS_CPU_ASE_VIRT): New define.
1122 (is_opcode_valid): Handle ase_virt.
1123 (macro_build): Handle "+J".
1124 (validate_mips_insn): Likewise.
1125 (mips_ip): Likewise.
1126 (enum options): Add OPTION_VIRT and OPTION_NO_VIRT.
1127 (md_longopts): Add mvirt and mnovirt
1128 (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT.
1129 (mips_after_parse_args): Handle ase_virt field.
1130 (s_mipsset): Handle "virt" and "novirt".
1131 (mips_elf_final_processing): Add a comment about virt ASE might need
1132 a new flag.
1133 (md_show_usage): Print out the usage of -mvirt and mno-virt options.
1134 * doc/c-mips.texi: Document -mvirt and -mno-virt.
1135 Document ".set virt" and ".set novirt".
1136
da8094d7
AM		 11372013-05-09 Alan Modra <amodra@gmail.com>
1138
1139 * config/tc-ppc.c (md_apply_fix): Sign extend fieldval under
1140 control of operand flag bits.
1141
c5f8c205
AM		 11422013-05-07 Alan Modra <amodra@gmail.com>
1143
1144 * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro.
1145 (PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise.
1146 (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise.
1147 (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise.
1148 (md_apply_fix): Set fx_no_overflow for assorted relocations.
1149 Shift and sign-extend fieldval for use by some VLE reloc
1150 operand->insert functions.
1151
b47468a6
CM		 11522013-05-06 Paul Brook <paul@codesourcery.com>
1153 Catherine Moore <clm@codesourcery.com>
1154
c5f8c205
AM		 1155 * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL.
1156 (limited_pcrel_reloc_p): Likewise.
b47468a6
CM		 1157 (md_apply_fix): Likewise.
1158 (tc_gen_reloc): Likewise.
1159
2de39019
CM		 11602013-05-06 Richard Sandiford <rdsandiford@googlemail.com>
1161
1162 * config/tc-mips.c (limited_pcrel_reloc_p): New function.
1163 (mips_fix_adjustable): Adjust pc-relative check to use
1164 limited_pc_reloc_p.
1165
754e2bb9
RS		 11662013-05-02 Richard Sandiford <rdsandiford@googlemail.com>
1167
1168 * config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries.
1169 (s_mips_stab): Do not restrict to stabn only.
1170
13761a11
NC		 11712013-05-02 Nick Clifton <nickc@redhat.com>
1172
1173 * config/tc-msp430.c: Add support for the MSP430X architecture.
1174 Add code to insert a NOP instruction after any instruction that
1175 might change the interrupt state.
1176 Add support for the LARGE memory model.
1177 Add code to initialise the .MSP430.attributes section.
1178 * config/tc-msp430.h: Add support for the MSP430X architecture.
1179 * doc/c-msp430.texi: Document the new -mL and -mN command line
1180 options.
1181 * NEWS: Mention support for the MSP430X architecture.
1182
df26367c
MR		 11832013-05-01 Maciej W. Rozycki <macro@codesourcery.com>
1184
1185 * configure.tgt: Replace alpha*-*-linuxecoff* pattern with
1186 alpha*-*-linux*ecoff*.
1187
f02d8318
CF		 11882013-04-30 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1189
1190 * config/tc-mips.c (mips_ip): Add sizelo.
1191 For "+C", "+G", and "+H", set sizelo and compare against it.
1192
b40bf0a2
NC		 11932013-04-29 Nick Clifton <nickc@redhat.com>
1194
1195 * as.c (Options): Add -gdwarf-sections.
1196 (parse_args): Likewise.
1197 * as.h (flag_dwarf_sections): Declare.
1198 * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes.
1199 (process_entries): When -gdwarf-sections is enabled generate
1200 fragmentary .debug_line sections.
1201 (out_debug_line): Set the section for the .debug_line section end
1202 symbol.
1203 * doc/as.texinfo: Document -gdwarf-sections.
1204 * NEWS: Mention -gdwarf-sections.
1205
8eeccb77 12062013-04-26 Christian Groessler <chris@groessler.org>
00a3147e
CG		 1207
1208 * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdline
1209 according to the target parameter. Don't call s_segm since s_segm
1210 calls bfd_set_arch_mach using stdoutput, but stdoutput isn't
1211 initialized yet.
1212 (md_begin): Call s_segm according to target parameter from command
1213 line.
1214
49926cd0
AM		 12152013-04-25 Alan Modra <amodra@gmail.com>
1216
1217 * configure.in: Allow little-endian linux.
1218 * configure: Regenerate.
1219
e3031850
SL		 12202013-04-24 Sandra Loosemore <sandra@codesourcery.com>
1221
1222 * config/tc-nios2.c (nios2_control_register_arg_p): Rename
1223 "fstatus" control register to "eccinj".
1224
cb948fc0
KT		 12252013-04-19 Kai Tietz <ktietz@redhat.com>
1226
1227 * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin.
1228
4455e9ad
JB		 12292013-04-15 Julian Brown <julian@codesourcery.com>
1230
1231 * expr.c (add_to_result, subtract_from_result): Make global.
1232 * expr.h (add_to_result, subtract_from_result): Add prototypes.
1233 * config/tc-sh.c (sh_optimize_expr): Use add_to_result,
1234 subtract_from_result to handle extra bit of precision for .sleb128
1235 directive operands.
1236
956a6ba3
JB		 12372013-04-10 Julian Brown <julian@codesourcery.com>
1238
1239 * read.c (convert_to_bignum): Add sign parameter. Use it
1240 instead of X_unsigned to determine sign of resulting bignum.
1241 (emit_expr): Pass extra argument to convert_to_bignum.
1242 (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass
1243 X_extrabit to convert_to_bignum.
1244 (parse_bitfield_cons): Set X_extrabit.
1245 * expr.c (make_expr_symbol, expr_build_uconstant, operand):
1246 Initialise X_extrabit field as appropriate.
1247 (add_to_result): New.
1248 (subtract_from_result): New.
1249 (expr): Use above.
1250 * expr.h (expressionS): Add X_extrabit field.
1251
eb9f3f00
JB		 12522013-04-10 Jan Beulich <jbeulich@suse.com>
1253
1254 * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base
1255 register being PC when is_t or writeback, and use distinct
1256 diagnostic for the latter case.
1257
ccb84d65
JB		 12582013-04-10 Jan Beulich <jbeulich@suse.com>
1259
1260 * gas/config/tc-arm.c (parse_operands): Re-write
1261 po_barrier_or_imm().
1262 (do_barrier): Remove bogus constraint().
1263 (do_t_barrier): Remove.
1264
4d13caa0
NC		 12652013-04-09 Joerg Wunsch <joerg.wunsch@atmel.com>
1266
1267 * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2,
1268 ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2,
1269 ATmega2564RFR2
1270 * gas/doc/c-avr.texi (-mmcu documentation): Likewise.
1271
16d02dc9
JB		 12722013-04-09 Jan Beulich <jbeulich@suse.com>
1273
1274 * gas/config/tc-arm.c (do_vmrs): Accept all control registers.
1275 Use local variable Rt in more places.
1276 (do_vmsr): Accept all control registers.
1277
05ac0ffb
JB		 12782013-04-09 Jan Beulich <jbeulich@suse.com>
1279
1280 * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
1281 if there was none specified for moves between scalar and core
1282 register.
1283
2d51fb74
JB		 12842013-04-09 Jan Beulich <jbeulich@suse.com>
1285
1286 * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the
1287 NEON_ALL_LANES case.
1288
94dcf8bf
JB		 12892013-04-08 Jan Beulich <jbeulich@suse.com>
1290
1291 * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for
1292 PC-relative VSTR.
1293
1472d06f
JB		 12942013-04-08 Jan Beulich <jbeulich@suse.com>
1295
1296 * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq
1297 entry to sp_fiq.
1298
0c76cae8
AM		 12992013-04-03 Alan Modra <amodra@gmail.com>
1300
1301 * doc/as.texinfo: Add support to generate man options for h8300.
1302 * doc/c-h8300.texi: Likewise.
1303
92eb40d9
RR		 13042013-03-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
1305
1306 * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and
1307 Cortex-A57.
1308
51dcdd4d
NC		 13092013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com>
1310
1311 PR binutils/15068
1312 * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array.
1313
c5d685bf
NC		 13142013-03-26 Nick Clifton <nickc@redhat.com>
1315
9b978282
NC		 1316 PR gas/15295
1317 * listing.c (rebuffer_line): Rewrite to avoid seeking back to the
1318 start of the file each time.
1319
c5d685bf
NC		 1320 PR gas/15178
1321 * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for
1322 FreeBSD targets.
1323
9699c833
TG		 13242013-03-26 Douglas B Rupp <rupp@gnat.com>
1325
1326 * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment
1327 after fixup.
1328
4755303e
WN		 13292013-03-21 Will Newton <will.newton@linaro.org>
1330
1331 * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all
1332 pc-relative str instructions in Thumb mode.
1333
81f5558e
NC		 13342013-03-21 Michael Schewe <michael.schewe@gmx.net>
1335
1336 * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
1337 @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
1338 R_H8_DISP32A16.
1339 * config/tc-h8300.h: Remove duplicated defines.
1340
71863e73
NC		 13412013-03-21 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
1342
1343 PR gas/15282
1344 * tc-avr.c (mcu_has_3_byte_pc): New function.
1345 (tc_cfi_frame_initial_instructions): Call it to find return
1346 address size.
1347
795b8e6b
NC		 13482013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com>
1349
1350 PR gas/15095
1351 * config/tc-tic6x.c (tic6x_try_encode): Handle
1352 tic6x_coding_dreg_(msb|lsb) field coding types and use it to
1353 encode register pair numbers when required.
1354
ba86b375
WN		 13552013-03-15 Will Newton <will.newton@linaro.org>
1356
1357 * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register
1358 in vstr in Thumb mode for pre-ARMv7 cores.
1359
9e6f3811
AS		 13602013-03-14 Andreas Schwab <schwab@suse.de>
1361
1362 * doc/c-arc.texi (ARC Directives): Revert last change and use
1363 @itemize instead of @table.
1364 * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
1365
b10bf8c5
NC		 13662013-03-14 Nick Clifton <nickc@redhat.com>
1367
1368 PR gas/15273
1369 * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a
1370 NULL message, instead just check ARM_CPU_IS_ANY directly.
1371
ba724cfc
NC		 13722013-03-14 Nick Clifton <nickc@redhat.com>
1373
1374 PR gas/15212
9e6f3811 1375 * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet
ba724cfc
NC		 1376 for table format.
1377 * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
1378 to the @item directives.
1379 (ARM-Neon-Alignment): Move to correct place in the document.
1380 * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
1381 formatting.
1382 * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
1383 @smallexample.
1384
531a94fd
SL		 13852013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
1386
1387 * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'
1388 case. Add default BAD_CASE to switch.
1389
dad60f8e
SL		 13902013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
1391
1392 * config/tc-nios2.c (nios2_assemble_args_ds): New function.
1393 (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
1394
dd5181d5
KT		 13952013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1396
1397 * config/tc-arm.c (crc_ext_armv8): New feature set.
1398 (UNPRED_REG): New macro.
1399 (do_crc32_1): New function.
1400 (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
1401 do_crc32ch, do_crc32cw): Likewise.
1402 (TUEc): New macro.
1403 (insns): Add entries for crc32 mnemonics.
1404 (arm_extensions): Add entry for crc.
1405
8e723a10
CLT		 14062013-03-08 Chung-Lin Tang <cltang@codesourcery.com>
1407
1408 * write.h (struct fix): Add fx_dot_frag field.
1409 (dot_frag): Declare.
1410 * write.c (dot_frag): New variable.
1411 (fix_new_internal): Set fx_dot_frag field with dot_frag.
1412 (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
1413 * expr.c (expr): Save value of frag_now in dot_frag when setting
1414 dot_value.
1415 * read.c (emit_expr): Likewise. Delete comments.
1416
be05d201
L		 14172013-03-07 H.J. Lu <hongjiu.lu@intel.com>
1418
1419 * config/tc-i386.c (flag_code_names): Removed.
1420 (i386_index_check): Rewrote.
1421
62b0d0d5
YZ		 14222013-03-05 Yufeng Zhang <yufeng.zhang@arm.com>
1423
1424 * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
1425 add comment.
1426 (aarch64_double_precision_fmovable): New function.
1427 (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
1428 function; handle hexadecimal representation of IEEE754 encoding.
1429 (parse_operands): Update the call to parse_aarch64_imm_float.
1430
165de32a
L		 14312013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1432
1433 * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
1434 (check_hle): Updated.
1435 (md_assemble): Likewise.
1436 (parse_insn): Likewise.
1437
d5de92cf
L		 14382013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1439
1440 * config/tc-i386.c (_i386_insn): Add rep_prefix.
9e6f3811 1441 (md_assemble): Check if REP prefix is OK.
d5de92cf
L		 1442 (parse_insn): Remove expecting_string_instruction. Set
1443 i.rep_prefix.
1444
e60bb1dd
YZ		 14452013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1446
1447 * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
1448
aeebdd9b
YZ		 14492013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1450
1451 * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
1452 for system registers.
1453
4107ae22
DD		 14542013-02-27 DJ Delorie <dj@redhat.com>
1455
1456 * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
1457 (rl78_op): Handle %code().
1458 (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
1459 (tc_gen_reloc): Likwise; convert to a computed reloc.
1460 (md_apply_fix): Likewise.
1461
151fa98f
NC		 14622013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
1463
1464 * config/rl78-parse.y: Fix encoding of DIVWU insn.
1465
70a8bc5b 14662013-02-25 Terry Guo <terry.guo@arm.com>
1467
1468 * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
1469 * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
1470 list of accepted CPUs.
1471
5c111e37
L		 14722013-02-19 H.J. Lu <hongjiu.lu@intel.com>
1473
1474 PR gas/15159
1475 * config/tc-i386.c (cpu_arch): Add ".smap".
1476
1477 * doc/c-i386.texi: Document smap.
1478
8a75745d
MR		 14792013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1480
1481 * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
1482 mips_assembling_insn appropriately.
1483 (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
1484
79850f26
MR		 14852013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1486
cf29fc61 1487 * config/tc-mips.c (append_insn): Correct indentation, remove
79850f26
MR		 1488 extraneous braces.
1489
4c261dff
NC		 14902013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1491
5c111e37 1492 * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
4c261dff 1493
ea33f281
NC		 14942013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
1495
1496 * configure.tgt: Add nios2-*-rtems*.
1497
a1ccaec9
YZ		 14982013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
1499
1500 * config/tc-aarch64.c (md_begin): Change to check if 'name' is
1501 NULL.
1502
0aa27725
RS		 15032013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
1504
1505 * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
1506 (macro): Use it. Assert that trunc.w.s is not used for r5900.
1507
da4339ed
NC		 15082013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com>
1509
1510 * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
1511 core.
1512
36591ba1 15132013-02-06 Sandra Loosemore <sandra@codesourcery.com>
5c111e37 1514 Andrew Jenner <andrew@codesourcery.com>
36591ba1
SL		 1515
1516 Based on patches from Altera Corporation.
1517
1518 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
1519 (TARGET_CPU_HFILES): Add config/tc-nios2.h.
1520 * Makefile.in: Regenerated.
1521 * configure.tgt: Add case for nios2*-linux*.
1522 * config/obj-elf.c: Conditionally include elf/nios2.h.
1523 * config/tc-nios2.c: New file.
1524 * config/tc-nios2.h: New file.
1525 * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
1526 * doc/Makefile.in: Regenerated.
1527 * doc/all.texi: Set NIOSII.
1528 * doc/as.texinfo (Overview): Add Nios II options.
1529 (Machine Dependencies): Include c-nios2.texi.
1530 * doc/c-nios2.texi: New file.
1531 * NEWS: Note Altera Nios II support.
1532
94d4433a
AM		 15332013-02-06 Alan Modra <amodra@gmail.com>
1534
1535 PR gas/14255
1536 * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
1537 Don't skip fixups with fx_subsy non-NULL.
1538 * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
1539 with fx_subsy non-NULL.
1540
ace9af6f
L		 15412013-02-04 H.J. Lu <hongjiu.lu@intel.com>
1542
1543 * doc/c-metag.texi: Add "@c man" markers.
1544
89d67ed9
AM		 15452013-02-04 Alan Modra <amodra@gmail.com>
1546
1547 * write.c (fixup_segment): Return void. Delete seg_reloc_count
1548 related code.
1549 (TC_ADJUST_RELOC_COUNT): Delete.
1550 * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
1551
89072bd6
AM		 15522013-02-04 Alan Modra <amodra@gmail.com>
1553
1554 * po/POTFILES.in: Regenerate.
1555
f9b2d544
NC		 15562013-01-30 Markos Chandras <markos.chandras@imgtec.com>
1557
1558 * config/tc-metag.c: Make SWAP instruction less permissive with
1559 its operands.
1560
392ca752
DD		 15612013-01-29 DJ Delorie <dj@redhat.com>
1562
1563 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
1564 relocs in .word/.etc statements.
1565
427d0db6
RM		 15662013-01-29 Roland McGrath <mcgrathr@google.com>
1567
1568 * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
1569 immediate value for 8-bit offset" error so it shows line info.
1570
4faf939a
JM		 15712013-01-24 Joseph Myers <joseph@codesourcery.com>
1572
1573 * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
1574 for 64-bit output.
1575
78c8d46c
NC		 15762013-01-24 Nick Clifton <nickc@redhat.com>
1577
1578 * config/tc-v850.c: Add support for e3v5 architecture.
1579 * doc/c-v850.texi: Mention new support.
1580
fb5b7503
NC		 15812013-01-23 Nick Clifton <nickc@redhat.com>
1582
1583 PR gas/15039
1584 * config/tc-avr.c: Include dwarf2dbg.h.
1585
8ce3d284
L		 15862013-01-18 H.J. Lu <hongjiu.lu@intel.com>
1587
1588 * config/tc-i386.c (reloc): Support size relocation only for ELF.
1589 (tc_i386_fix_adjustable): Likewise.
1590 (lex_got): Likewise.
1591 (tc_gen_reloc): Likewise.
1592
f5555712
YZ		 15932013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
1594
1595 * config/tc-aarch64.c (output_operand_error_record): Change to output
1596 the out-of-range error message as value-expected message if there is
1597 only one single value in the expected range.
1598 (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
1599 LSL #0 as a programmer-friendly feature.
1600
8fd4256d
L		 16012013-01-16 H.J. Lu <hongjiu.lu@intel.com>
1602
1603 * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
1604 (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
1605 BFD_RELOC_64_SIZE relocations.
1606 (lex_got): Support "symbol@SIZE" and don't create GOT symbol
1607 for it.
1608 (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
1609 relocations against local symbols.
1610
a5840dce
AM		 16112013-01-16 Alan Modra <amodra@gmail.com>
1612
1613 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
1614 finding some sort of toc syntax error, and break to avoid
1615 compiler uninit warning.
1616
af89796a
L		 16172013-01-15 H.J. Lu <hongjiu.lu@intel.com>
1618
1619 PR gas/15019
1620 * config/tc-i386.c (lex_got): Increment length by 1 if the
1621 relocation token is removed.
1622
dd42f060
NC		 16232013-01-15 Nick Clifton <nickc@redhat.com>
1624
1625 * config/tc-v850.c (md_assemble): Allow signed values for
1626 V850E_IMMEDIATE.
1627
464e3686
SK		 16282013-01-11 Sean Keys <skeys@ipdatasys.com>
1629
1630 * config/tc-xgate.c (md_begin): Fix mistake made when going from
af89796a 1631 git to cvs.
464e3686 1632
5817ffd1
PB		 16332013-01-10 Peter Bergner <bergner@vnet.ibm.com>
1634
1635 * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
1636 * doc/c-ppc.texi (PowerPC-Opts): Likewise.
1637 * config/tc-ppc.c (md_show_usage): Likewise.
1638 (ppc_handle_align): Handle power8's group ending nop.
1639
f4b1f6a9
SK		 16402013-01-10 Sean Keys <skeys@ipdatasys.com>
1641
1642 * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
af89796a 1643 that the assember exits after the opcodes have been printed.
f4b1f6a9 1644
34bca508
L		 16452013-01-10 H.J. Lu <hongjiu.lu@intel.com>
1646
1647 * app.c: Remove trailing white spaces.
1648 * as.c: Likewise.
1649 * as.h: Likewise.
1650 * cond.c: Likewise.
1651 * dw2gencfi.c: Likewise.
1652 * dwarf2dbg.h: Likewise.
1653 * ecoff.c: Likewise.
1654 * input-file.c: Likewise.
1655 * itbl-lex.h: Likewise.
1656 * output-file.c: Likewise.
1657 * read.c: Likewise.
1658 * sb.c: Likewise.
1659 * subsegs.c: Likewise.
1660 * symbols.c: Likewise.
1661 * write.c: Likewise.
1662 * config/tc-i386.c: Likewise.
1663 * doc/Makefile.am: Likewise.
1664 * doc/Makefile.in: Likewise.
1665 * doc/c-aarch64.texi: Likewise.
1666 * doc/c-alpha.texi: Likewise.
1667 * doc/c-arc.texi: Likewise.
1668 * doc/c-arm.texi: Likewise.
1669 * doc/c-avr.texi: Likewise.
1670 * doc/c-bfin.texi: Likewise.
1671 * doc/c-cr16.texi: Likewise.
1672 * doc/c-d10v.texi: Likewise.
1673 * doc/c-d30v.texi: Likewise.
1674 * doc/c-h8300.texi: Likewise.
1675 * doc/c-hppa.texi: Likewise.
1676 * doc/c-i370.texi: Likewise.
1677 * doc/c-i386.texi: Likewise.
1678 * doc/c-i860.texi: Likewise.
1679 * doc/c-m32c.texi: Likewise.
1680 * doc/c-m32r.texi: Likewise.
1681 * doc/c-m68hc11.texi: Likewise.
1682 * doc/c-m68k.texi: Likewise.
1683 * doc/c-microblaze.texi: Likewise.
1684 * doc/c-mips.texi: Likewise.
1685 * doc/c-msp430.texi: Likewise.
1686 * doc/c-mt.texi: Likewise.
1687 * doc/c-s390.texi: Likewise.
1688 * doc/c-score.texi: Likewise.
1689 * doc/c-sh.texi: Likewise.
1690 * doc/c-sh64.texi: Likewise.
1691 * doc/c-tic54x.texi: Likewise.
1692 * doc/c-tic6x.texi: Likewise.
1693 * doc/c-v850.texi: Likewise.
1694 * doc/c-xc16x.texi: Likewise.
1695 * doc/c-xgate.texi: Likewise.
1696 * doc/c-xtensa.texi: Likewise.
1697 * doc/c-z80.texi: Likewise.
1698 * doc/internals.texi: Likewise.
1699
4c665b71
RM		 17002013-01-10 Roland McGrath <mcgrathr@google.com>
1701
1702 * hash.c (hash_new_sized): Make it global.
1703 * hash.h: Declare it.
1704 * macro.c (define_macro): Use hash_new_sized instead of hash_new,
1705 pass a small size.
1706
a3c62988
NC		 17072013-01-10 Will Newton <will.newton@imgtec.com>
1708
1709 * Makefile.am: Add Meta.
1710 * Makefile.in: Regenerate.
1711 * config/tc-metag.c: New file.
1712 * config/tc-metag.h: New file.
1713 * configure.tgt: Add Meta.
1714 * doc/Makefile.am: Add Meta.
1715 * doc/Makefile.in: Regenerate.
1716 * doc/all.texi: Add Meta.
1717 * doc/as.texiinfo: Document Meta options.
1718 * doc/c-metag.texi: New file.
1719
b37df7c4
SE		 17202013-01-09 Steve Ellcey <sellcey@mips.com>
1721
1722 * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
1723 calls.
1724 * config/tc-mips.c (internalError): Remove, replace with abort.
1725
a3251895
YZ		 17262013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
1727
1728 * config/tc-aarch64.c (parse_operands): Change to compare the result
1729 of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
1730
8ab8155f
NC		 17312013-01-07 Nick Clifton <nickc@redhat.com>
1732
1733 PR gas/14887
1734 * config/tc-arm.c (skip_past_char): Skip whitespace before the
1735 anticipated character.
1736 * config/tc-arm.c (parse_address_main): Delete skip of whitespace
1737 here as it is no longer needed.
1738
a4ac1c42
AS		 17392013-01-06 Andreas Schwab <schwab@linux-m68k.org>
1740
1741 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
1742 * doc/c-score.texi (SCORE-Opts): Likewise.
1743 * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
1744
e407c74b
NC		 17452013-01-04 Juergen Urban <JuergenUrban@gmx.de>
1746
1747 * config/tc-mips.c: Add support for MIPS r5900.
1748 Add M_LQ_AB and M_SQ_AB to support large values for instructions
1749 lq and sq.
1750 (can_swap_branch_p, get_append_method): Detect some conditional
1751 short loops to fix a bug on the r5900 by NOP in the branch delay
1752 slot.
1753 (M_MUL): Support 3 operands in multu on r5900.
1754 (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
1755 (s_mipsset): Force 32 bit floating point on r5900.
1756 (mips_ip): Check parameter range of instructions mfps and mtps on
1757 r5900.
1758 * configure.in: Detect CPU type when target string contains r5900
1759 (e.g. mips64r5900el-linux-gnu).
1760
62658407
L		 17612013-01-02 H.J. Lu <hongjiu.lu@intel.com>
1762
1763 * as.c (parse_args): Update copyright year to 2013.
1764
95830fd1
YZ		 17652013-01-02 Yufeng Zhang <yufeng.zhang@arm.com>
1766
1767 * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
1768 and "cortex57".
1769
517bb291 17702013-01-02 Nick Clifton <nickc@redhat.com>
d709e4e6 1771
517bb291
NC		 1772 PR gas/14987
1773 * config/tc-arm.c (parse_address_main): Skip whitespace before a
1774 closing bracket.
d709e4e6 1775
517bb291 1776For older changes see ChangeLog-2012
08d56133 1777\f
517bb291 1778Copyright (C) 2013 Free Software Foundation, Inc.
752937aa
NC		 1779
1780Copying and distribution of this file, with or without modification,
1781are permitted in any medium without royalty provided the copyright
1782notice and this notice are preserved.
1783
08d56133
NC		 1784Local Variables:
1785mode: change-log
1786left-margin: 8
1787fill-column: 74
1788version-control: never
1789End:
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