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Commit | Line | Data |
---|---|---|
f0c00282 NC |
1 | 2013-07-18 Sandeep Kumar Singh <Sandeep.Singh2@kpitcummins.com> |
2 | ||
3 | * config/rx-defs.h: Add macros for RX100, RX200, RX600, and | |
4 | RX610. | |
5 | * config/rx-parse.y: (rx_check_float_support): Add function to | |
6 | check floating point operation support for target RX100 and | |
7 | RX200. | |
8 | * config/tc-rx.c: Add CPU options RX100, RX200, RX600, and RX610. | |
9 | * doc/c-rx.texi: Add -mcpu option to recognize macros for RX100, | |
10 | RX200, RX600, and RX610 | |
11 | ||
8c997c27 NC |
12 | 2013-07-18 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com> |
13 | ||
14 | * config/tc-avr.c (md_show_usage): Add avrxmega2 to help text | |
15 | ||
8be59acb NC |
16 | 2013-07-18 Vishnu K.S <vishnu.k_s@atmel.com> |
17 | ||
18 | * config/tc-avr.c: Make ata6289's ISA to AVR_ISA_AVR4. | |
19 | * doc/c-avr.texi: Likewise. | |
20 | ||
4a06e5a2 RS |
21 | 2013-07-15 Richard Sandiford <rdsandiford@googlemail.com> |
22 | ||
23 | * config/tc-mips.c (match_save_restore_list_operand): Avoid -Wformat | |
24 | error with older GCCs. | |
25 | (mips16_macro_build): Dereference args. | |
26 | ||
a92713e6 RS |
27 | 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com> |
28 | ||
29 | * config/tc-mips.c (mips_prefer_vec_regno, mips_parse_register): | |
30 | New functions, split out from... | |
31 | (reg_lookup): ...here. Remove itbl support. | |
32 | (reglist_lookup): Delete. | |
33 | (mips_operand_token_type): New enum. | |
34 | (mips_operand_token): New structure. | |
35 | (mips_operand_tokens): New variable. | |
36 | (mips_add_token, mips_parse_base_start, mips_parse_argument_token) | |
37 | (mips_parse_arguments): New functions. | |
38 | (md_begin): Initialize mips_operand_tokens. | |
39 | (mips_arg_info): Add a token field. Remove optional_reg field. | |
40 | (match_char, match_expression): New functions. | |
41 | (match_const_int): Use match_expression. Remove "s" argument | |
42 | and return a boolean result. Remove O_register handling. | |
43 | (match_regno, match_reg, match_reg_range): New functions. | |
44 | (match_int_operand, match_mapped_int_operand, match_msb_operand) | |
45 | (match_reg_operand, match_reg_pair_operand, match_perf_reg_operand) | |
46 | (match_addiusp_operand, match_clo_clz_dest_operand) | |
47 | (match_lwm_swm_list_operand, match_entry_exit_operand) | |
48 | (match_save_restore_list_operand, match_mdmx_imm_reg_operand) | |
49 | (match_tied_reg_operand): Remove "s" argument and return a boolean | |
50 | result. Match tokens rather than text. Update calls to | |
51 | match_const_int. Rely on match_regno to call check_regno. | |
52 | (match_pcrel_operand, match_pc_operand): Replace "s" argument with | |
53 | "arg" argument. Return a boolean result. | |
54 | (parse_float_constant): Replace with... | |
55 | (match_float_constant): ...this new function. | |
56 | (match_operand): Remove "s" argument and return a boolean result. | |
57 | Update calls to subfunctions. | |
58 | (mips_ip, mips16_ip): Call mips_parse_arguments. Use match routines | |
59 | rather than string-parsing routines. Update handling of optional | |
60 | registers for token scheme. | |
61 | ||
89565f1b RS |
62 | 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com> |
63 | ||
64 | * config/tc-mips.c (parse_float_constant): Split out from... | |
65 | (mips_ip): ...here. | |
66 | ||
3c14a432 RS |
67 | 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com> |
68 | ||
69 | * config/tc-mips.c (INSERT_BITS, INSERT_OPERAND, MIPS16_INSERT_OPERAND): | |
70 | Delete. | |
71 | ||
364215c8 RS |
72 | 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com> |
73 | ||
74 | * config/tc-mips.c (mips32_to_16_reg_map): Delete. | |
75 | (match_entry_exit_operand): New function. | |
76 | (match_save_restore_list_operand): Likewise. | |
77 | (match_operand): Use them. | |
78 | (check_absolute_expr): Delete. | |
79 | (mips16_ip): Rewrite main parsing loop to use mips_operands. | |
80 | ||
9e12b7a2 RS |
81 | 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com> |
82 | ||
83 | * config/tc-mips.c: Enable functions commented out in previous patch. | |
84 | (SKIP_SPACE_TABS): Move further up file. | |
85 | (mips32_to_micromips_reg_b_map, mips32_to_micromips_reg_c_map) | |
86 | (mips32_to_micromips_reg_d_map, mips32_to_micromips_reg_e_map) | |
87 | (ips32_to_micromips_reg_f_map, mips32_to_micromips_reg_g_map) | |
88 | (mips32_to_micromips_reg_l_map, mips32_to_micromips_reg_m_map) | |
89 | (mips32_to_micromips_reg_q_map, mips32_to_micromips_reg_n_map) | |
90 | (micromips_imm_b_map, micromips_imm_c_map): Delete. | |
91 | (mips_lookup_reg_pair): Delete. | |
92 | (macro): Use report_bad_range and report_bad_field. | |
93 | (mips_immed, expr_const_in_range): Delete. | |
94 | (mips_ip): Rewrite main parsing loop to use new functions. | |
95 | ||
a1d78564 RS |
96 | 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com> |
97 | ||
98 | * config/tc-mips.c (mips_oddfpreg_ok): Move further up file. | |
99 | Change return type to bfd_boolean. | |
100 | (report_bad_range, report_bad_field): New functions. | |
101 | (mips_arg_info): New structure. | |
102 | (match_const_int, convert_reg_type, check_regno, match_int_operand) | |
103 | (match_mapped_int_operand, match_msb_operand, match_reg_operand) | |
104 | (match_reg_pair_operand, match_pcrel_operand, match_perf_reg_operand) | |
105 | (match_addiusp_operand, match_clo_clz_dest_operand) | |
106 | (match_lwm_swm_list_operand, match_mdmx_imm_reg_operand) | |
107 | (match_pc_operand, match_tied_reg_operand, match_operand) | |
108 | (check_completed_insn): New functions, commented out for now. | |
109 | ||
e077a1c8 RS |
110 | 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com> |
111 | ||
112 | * config/tc-mips.c (insn_insert_operand): New function. | |
113 | (macro_build, mips16_macro_build): Put null character check | |
114 | in the for loop and convert continues to breaks. Use operand | |
115 | structures to handle constant operands. | |
116 | ||
ab902481 RS |
117 | 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com> |
118 | ||
119 | * config/tc-mips.c (validate_mips_insn): Move further up file. | |
120 | Add insn_bits and decode_operand arguments. Use the mips_operand | |
121 | fields to work out which bits an operand occupies. Detect double | |
122 | definitions. | |
123 | (validate_micromips_insn): Move further up file. Call into | |
124 | validate_mips_insn. | |
125 | ||
2f8b73cc RS |
126 | 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com> |
127 | ||
128 | * config/tc-mips.c (mips16_macro_build): Remove 'Y' case. | |
129 | ||
c8276761 RS |
130 | 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com> |
131 | ||
132 | * config/tc-mips.c (macro_build): Take an int for "C", "k", "\\" | |
133 | and "~". | |
134 | (macro): Update accordingly. | |
135 | ||
77bd4346 RS |
136 | 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com> |
137 | ||
138 | * config/tc-mips.c (imm_expr, imm2_expr, offset_expr): Tweak commentary. | |
139 | (imm_reloc): Delete. | |
140 | (md_assemble): Remove imm_reloc handling. | |
141 | (mips_ip): Update commentary. Use offset_expr and offset_reloc | |
142 | rather than imm_expr and imm_reloc for 'i', 'j' and 'u'. | |
143 | Use a temporary array rather than imm_reloc when parsing | |
144 | constant expressions. Remove imm_reloc initialization. | |
145 | (mips16_ip): Update commentary. Use offset_expr and offset_reloc | |
146 | for the relaxable field. Use a relax_char variable to track the | |
147 | type of this field. Remove imm_reloc initialization. | |
148 | ||
cc537e56 RS |
149 | 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com> |
150 | ||
151 | * config/tc-mips.c (mips16_ip): Handle "I". | |
152 | ||
ba92f887 MR |
153 | 2013-07-12 Maciej W. Rozycki <macro@codesourcery.com> |
154 | ||
155 | * config/tc-mips.c (mips_flag_nan2008): New variable. | |
156 | (options): Add OPTION_NAN enum value. | |
157 | (md_longopts): Handle it. | |
158 | (md_parse_option): Likewise. | |
159 | (s_nan): New function. | |
160 | (mips_elf_final_processing): Handle EF_MIPS_NAN2008. | |
161 | (md_show_usage): Add -mnan. | |
162 | ||
163 | * doc/as.texinfo (Overview): Add -mnan. | |
164 | * doc/c-mips.texi (MIPS Opts): Document -mnan. | |
165 | (MIPS NaN Encodings): New node. Document .nan directive. | |
166 | (MIPS-Dependent): List the new node. | |
167 | ||
c1094734 TG |
168 | 2013-07-09 Tristan Gingold <gingold@adacore.com> |
169 | ||
170 | * configure.com: Define HAVE_SYS_TYPES_H and HAVE_UNISTD_H | |
171 | ||
0cbbe1b8 RS |
172 | 2013-07-08 Richard Sandiford <rdsandiford@googlemail.com> |
173 | ||
174 | * config/tc-mips.c (mips_ip): Unconditionally parse an expression | |
175 | for 'A' and assume that the constant has been elided if the result | |
176 | is an O_register. | |
177 | ||
f2ae14a1 RS |
178 | 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com> |
179 | ||
180 | * config/tc-mips.c (gprel16_reloc_p): New function. | |
181 | (macro_read_relocs): Assume BFD_RELOC_LO16 if all relocs are | |
182 | BFD_RELOC_UNUSED. | |
183 | (offset_high_part, small_offset_p): New functions. | |
184 | (nacro): Use them. Remove *_OB and *_DOB cases. For single- | |
185 | register load and store macros, handle the 16-bit offset case first. | |
186 | If a 16-bit offset is not suitable for the instruction we're | |
187 | generating, load it into the temporary register using | |
188 | ADDRESS_ADDI_INSN. Make the M_LI_DD code fall through into the | |
189 | M_L_DAB code once the address has been constructed. For double load | |
190 | and store macros, again handle the 16-bit offset case first. | |
191 | If the second register cannot be accessed from the same high | |
192 | part as the first, load it into AT using ADDRESS_ADDI_INSN. | |
193 | Fix the handling of LD in cases where the first register is the | |
194 | same as the base. Also handle the case where the offset is | |
195 | not 16 bits and the second register cannot be accessed from the | |
196 | same high part as the first. For unaligned loads and stores, | |
197 | fuse the offbits == 12 and old "ab" handling. Apply this handling | |
198 | whenever the second offset needs a different high part from the first. | |
199 | Construct the offset using ADDRESS_ADDI_INSN where possible, | |
200 | for offbits == 16 as well as offbits == 12. Use offset_reloc | |
201 | when constructing the individual loads and stores. | |
202 | (mips_ip): Set up imm_expr, imm2_expr, offset_expr, imm_reloc | |
203 | and offset_reloc before matching against a particular opcode. | |
204 | Handle elided 'A' constants. Allow 'A' constants to use | |
205 | relocation operators. | |
206 | ||
5c324c16 RS |
207 | 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com> |
208 | ||
209 | * config/tc-mips.c (validate_mips_insn): Remove "[" and "]" handling. | |
210 | (mips_ip): Likewise. Do not set is_mdmx for INSN_5400 instructions. | |
211 | Check constraints on the VR5400 RZU.OB, SLL.OB and SRL.OB instructions. | |
212 | ||
23e69e47 RS |
213 | 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com> |
214 | ||
215 | * config/tc-mips.c (mips_ip): Preserve the real bit number for "+p". | |
216 | Require the msb to be <= 31 for "+s". Check that the size is <= 31 | |
217 | for both "+s" and "+S". | |
218 | ||
27c5c572 RS |
219 | 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com> |
220 | ||
221 | * config/tc-mips.c (validate_mips_insn, validate_micromips_insn): | |
222 | (mips_ip, mips16_ip): Handle "+i". | |
223 | ||
e76ff5ab RS |
224 | 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com> |
225 | ||
226 | * config/tc-mips.c (mips32_to_micromips_reg_h_map): Delete. | |
227 | (micromips_to_32_reg_h_map): Rename to... | |
228 | (micromips_to_32_reg_h_map1): ...this. | |
229 | (micromips_to_32_reg_i_map): Rename to... | |
230 | (micromips_to_32_reg_h_map2): ...this. | |
231 | (mips_lookup_reg_pair): New function. | |
232 | (gpr_write_mask, macro): Adjust after above renaming. | |
233 | (validate_micromips_insn): Remove "mi" handling. | |
234 | (mips_ip): Likewise. Parse both registers in a pair for "mh". | |
235 | ||
fa7616a4 RS |
236 | 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com> |
237 | ||
238 | * config/tc-mips.c (validate_mips_insn, validate_micromips_insn) | |
239 | (mips_ip): Remove "+D" and "+T" handling. | |
240 | ||
fb798c50 AK |
241 | 2013-07-05 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> |
242 | ||
243 | * config/tc-s390.c (md_gather_operands, md_apply_fix): Support new | |
244 | relocs. | |
245 | ||
2c0a3565 MS |
246 | 2013-07-03 Marcus Shawcroft <marcus.shawcroft@arm.com> |
247 | ||
4aa2c5e2 MS |
248 | * config/tc-aarch64.c (reloc_table): Merge got_prel19 into got. |
249 | ||
250 | 2013-07-02 Marcus Shawcroft <marcus.shawcroft@arm.com> | |
251 | ||
2c0a3565 MS |
252 | * config/tc-aarch64.c (md_apply_fix): Reorder case values. |
253 | (aarch64_force_relocation): Likewise. | |
254 | ||
f40da81b AM |
255 | 2013-07-02 Alan Modra <amodra@gmail.com> |
256 | ||
257 | * config/tc-ppc.c (ppc_elf_adjust_symtab): Don't make .TOC. weak. | |
258 | ||
81566a9b MR |
259 | 2013-06-26 Maciej W. Rozycki <macro@codesourcery.com> |
260 | ||
261 | * doc/as.texinfo (Overview): Remove @samp from MIPS ISA names. | |
262 | * doc/c-mips.texi (MIPS Options): Remove @sc from MIPS ISA names. | |
263 | Replace @sc{mips16} with literal `MIPS16'. | |
264 | (MIPS ISA): Replace @sc{mips3} with literal `MIPS III'. | |
265 | ||
a6bb11b2 YZ |
266 | 2013-06-26 Yufeng Zhang <yufeng.zhang@arm.com> |
267 | ||
268 | * config/tc-aarch64.c (reloc_table): Replace | |
269 | BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with | |
270 | BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to | |
271 | BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and | |
272 | BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. | |
273 | (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, | |
274 | BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, | |
275 | BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, | |
276 | BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, | |
277 | BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and | |
278 | BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. | |
279 | (aarch64_force_relocation): Likewise. | |
280 | ||
cec5225b YZ |
281 | 2013-06-26 Yufeng Zhang <yufeng.zhang@arm.com> |
282 | ||
283 | * config/tc-aarch64.c (ilp32_p): New static variable. | |
284 | (elf64_aarch64_target_format): Return the target according to the | |
285 | value of 'ilp32_p'. | |
286 | (md_begin): Determine 'mach' according to the value of 'ilp32_p'. | |
287 | (aarch64_opts): Add support for options '-milp32' and '-mlp64'. | |
288 | (aarch64_dwarf2_addr_size): New function. | |
289 | * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. | |
290 | (DWARF2_ADDR_SIZE): New define. | |
291 | ||
e335d9cb RS |
292 | 2013-06-26 Richard Sandiford <rdsandiford@googlemail.com> |
293 | ||
294 | * doc/c-mips.texi: Use ISA instead of @sc{isa}. | |
295 | ||
18870af7 RS |
296 | 2013-06-26 Richard Sandiford <rdsandiford@googlemail.com> |
297 | ||
298 | * config/tc-mips.c (validate_mips_insn): Use STYPE rather than SHAMT. | |
299 | ||
833794fc MR |
300 | 2013-06-25 Maciej W. Rozycki <macro@codesourcery.com> |
301 | ||
302 | * config/tc-mips.c (mips_set_options): Add insn32 member. | |
303 | (mips_opts): Initialize it. | |
304 | (NOP_INSN, NOP_INSN_SIZE): Handle insn32 mode. | |
305 | (options): Add OPTION_INSN32 and OPTION_NO_INSN32 enum values. | |
306 | (md_longopts): Add "minsn32" and "mno-insn32" options. | |
307 | (is_size_valid): Handle insn32 mode. | |
308 | (md_assemble): Pass instruction string down to macro. | |
309 | (brk_fmt): Add second dimension and insn32 mode initializers. | |
310 | (mfhl_fmt): Likewise. | |
311 | (BRK_FMT, MFHL_FMT): Handle insn32 mode. | |
312 | (macro_build) <'c'>: Handle microMIPS 32-bit BREAK encoding. | |
313 | (macro_build_jalr, move_register): Handle insn32 mode. | |
314 | (macro_build_branch_rs): Likewise. | |
315 | (macro): Handle insn32 mode. | |
316 | <M_JRADDIUSP>, <M_JRC>, <M_MOVEP>: New cases. | |
317 | (mips_ip): Handle insn32 mode. | |
318 | (md_parse_option): Handle OPTION_INSN32 and OPTION_NO_INSN32. | |
319 | (s_mipsset): Handle "insn32" and "noinsn32" pseudo-ops. | |
320 | (mips_handle_align): Handle insn32 mode. | |
321 | (md_show_usage): Add -minsn32 and -mno-insn32. | |
322 | ||
323 | * doc/as.texinfo (Target MIPS options): Add -minsn32 and | |
324 | -mno-insn32 options. | |
325 | (-minsn32, -mno-insn32): New options. | |
326 | * doc/c-mips.texi (MIPS Opts): Add -minsn32 and -mno-insn32 | |
327 | options. | |
328 | (MIPS assembly options): New node. Document .set insn32 and | |
329 | .set noinsn32. | |
330 | (MIPS-Dependent): List the new node. | |
331 | ||
d1706f38 NC |
332 | 2013-06-25 Nick Clifton <nickc@redhat.com> |
333 | ||
334 | * config/tc-msp430.c (msp430_srcoperand): Do not allow the use of | |
335 | the PC in indirect addressing on 430xv2 parts. | |
336 | (msp430_operands): Add version test to hardware bug encoding | |
337 | restrictions. | |
338 | ||
477330fc RM |
339 | 2013-06-24 Roland McGrath <mcgrathr@google.com> |
340 | ||
d996d970 RM |
341 | * config/tc-arm.c (parse_reg_list): Use skip_past_char for '}', |
342 | so it skips whitespace before it. | |
343 | (s_arm_unwind_save_mmxwr, s_arm_unwind_save_mmxwcg): Likewise. | |
344 | ||
477330fc RM |
345 | * config/tc-arm.c (arm_symbol_chars): Include '{' and '}'. |
346 | (arm_reg_parse_multi): Skip whitespace first. | |
347 | (parse_reg_list): Likewise. | |
348 | (parse_vfp_reg_list): Likewise. | |
349 | (s_arm_unwind_save_mmxwcg): Likewise. | |
350 | ||
24382199 NC |
351 | 2013-06-24 Nick Clifton <nickc@redhat.com> |
352 | ||
353 | PR gas/15623 | |
354 | * config/tc-arm.c (do_t_smc): Mark as ending an IT block. | |
355 | ||
c3678916 RS |
356 | 2013-06-23 Richard Sandiford <rdsandiford@googlemail.com> |
357 | ||
358 | * config/tc-mips.c (mips_ip): Fix swapped bit numbers in comments. | |
359 | ||
42429eac RS |
360 | 2013-06-23 Richard Sandiford <rdsandiford@googlemail.com> |
361 | ||
362 | * config/tc-mips.c: Assert that offsetT and valueT are at least | |
363 | 8 bytes in size. | |
364 | (GPR_SMIN, GPR_SMAX): New macros. | |
365 | (macro, mips_ip): Remove code for 4-byte valueT and offsetT. | |
366 | ||
f3ded42a RS |
367 | 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com> |
368 | ||
369 | * config/tc-mips.c: Remove OBJ_ELF, OBJ_MAYBE_ELF and IS_ELF | |
370 | conditions. Remove any code deselected by them. | |
371 | (s_mips_frame, s_mips_mask): Handle ECOFF_DEBUGGING case first. | |
372 | ||
e8044f35 RS |
373 | 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com> |
374 | ||
375 | * NEWS: Note removal of ECOFF support. | |
376 | * doc/as.texinfo (--emulation): Update for the removal of MIPS ECOFF. | |
377 | * Makefile.am (TARG_ENV_HFILES): Remove config/te-lnews.h. | |
378 | (MULTI_CFILES): Remove config/e-mipsecoff.c. | |
379 | * Makefile.in: Regenerate. | |
380 | * configure.in: Remove MIPS ECOFF references. | |
381 | (mips-sony-bsd*, mips-*-bsd*, mips-*-lnews*-ecoff, mips-*-*-ecoff): | |
382 | Delete cases. | |
383 | (mips-*-irix5*-*, mips*-*-linux*-*, mips*-*-freebsd*) | |
384 | (mips*-*-kfreebsd*-gnu, mips-*-*-elf): Fold into... | |
385 | (mips-*-*): ...this single case. | |
386 | (mipsbecoff, mipslecoff, mipsecoff): Remove emulations. Expect | |
387 | MIPS emulations to be e-mipself*. | |
388 | * configure: Regenerate. | |
389 | * configure.tgt (mips-sony-bsd*, mips-*-ultrix*, mips-*-osf*) | |
390 | (mips-*-ecoff*, mips-*-pe*, mips-*-irix*, ips-*-lnews*, mips-*-riscos*) | |
391 | (mips-*-sysv*): Remove coff and ecoff cases. | |
392 | * as.c (mipsbecoff, mipslecoff, mipsecoff): Remove. | |
393 | * ecoff.c: Remove reference to MIPS ECOFF. | |
394 | * config/e-mipsecoff.c, config/te-lnews.h: Delete files. | |
395 | * config/tc-mips.c (ECOFF_LITTLE_FORMAT): Delete. | |
396 | (RDATA_SECTION_NAME, mips_target_form): Remove COFF and ECOFF cases. | |
397 | (mips_hi_fixup): Tweak comment. | |
398 | (append_insn): Require a howto. | |
399 | (mips_after_parse_args): Remove OBJ_MAYBE_ECOFF code. | |
400 | ||
98508b2a RS |
401 | 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com> |
402 | ||
403 | * doc/as.texinfo: Use MIPS rather than @sc{mips} throughout. | |
404 | Use "CPU" instead of "cpu". | |
405 | * doc/c-mips.texi: Likewise. | |
406 | (MIPS Opts): Rename to MIPS Options. | |
407 | (MIPS option stack): Rename to MIPS Option Stack. | |
408 | (MIPS ASE instruction generation overrides): Rename to | |
409 | MIPS ASE Instruction Generation Overrides (for now). | |
410 | (MIPS floating-point): Rename to MIPS Floating-Point. | |
411 | ||
fc16f8cc RS |
412 | 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com> |
413 | ||
414 | * doc/c-mips.texi (MIPS Macros): New section. | |
415 | (MIPS Object): Replace with... | |
416 | (MIPS Small Data): ...this new section. | |
417 | ||
5a7560b5 RS |
418 | 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com> |
419 | ||
420 | * doc/c-mips.texi (MIPS symbol sizes): Move section further up file. | |
421 | Capitalize name. Use @kindex instead of @cindex for .set entries. | |
422 | ||
a1b86ab7 RS |
423 | 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com> |
424 | ||
425 | * doc/c-mips.texi (MIPS Stabs): Remove section. | |
426 | ||
c6278170 RS |
427 | 2013-06-20 Richard Sandiford <rdsandiford@googlemail.com> |
428 | ||
429 | * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS, ISA_SUPPORTS_DSP_ASE) | |
430 | (ISA_SUPPORTS_DSP64_ASE, ISA_SUPPORTS_DSPR2_ASE, ISA_SUPPORTS_EVA_ASE) | |
431 | (ISA_SUPPORTS_MT_ASE, ISA_SUPPORTS_MCU_ASE, ISA_SUPPORTS_VIRT_ASE) | |
432 | (ISA_SUPPORTS_VIRT64_ASE): Delete. | |
433 | (mips_ase): New structure. | |
434 | (mips_ases): New table. | |
435 | (FP64_ASES): New macro. | |
436 | (mips_ase_groups): New array. | |
437 | (mips_isa_rev, mips_ase_mask, mips_check_isa_supports_ase) | |
438 | (mips_check_isa_supports_ases, mips_set_ase, mips_lookup_ase): New | |
439 | functions. | |
440 | (is_opcode_valid): Use mips_ases to get the 64-bit ASE flags. | |
441 | (md_parse_option): Use mips_ases and mips_set_ase instead of | |
442 | separate case statements for each ASE option. | |
443 | (mips_after_parse_args): Use FP64_ASES. Use | |
444 | mips_check_isa_supports_ases to check the ASEs against | |
445 | other options. | |
446 | (s_mipsset): Use mips_ases and mips_set_ase instead of | |
447 | separate if statements for each ASE option. Use | |
448 | mips_check_isa_supports_ases, even when a non-ASE option | |
449 | is specified. | |
450 | ||
63a4bc21 KT |
451 | 2013-06-19 Greta Yorsh <Greta.Yorsh@arm.com> |
452 | ||
453 | * config/tc-arm.c (arm_cpus): Add support for Cortex-A12. | |
454 | ||
c31f3936 RS |
455 | 2013-06-18 Richard Sandiford <rdsandiford@googlemail.com> |
456 | ||
457 | * config/tc-mips.c (md_shortopts, options, md_longopts) | |
458 | (md_longopts_size): Move earlier in file. | |
459 | ||
846ef2d0 RS |
460 | 2013-06-18 Richard Sandiford <rdsandiford@googlemail.com> |
461 | ||
462 | * config/tc-mips.c (mips_set_options): Replace separate "ase_*" fields | |
463 | with a single "ase" bitmask. | |
464 | (mips_opts): Update accordingly. | |
465 | (file_ase, file_ase_explicit): New variables. | |
466 | (file_ase_mips3d, file_ase_mdmx, file_ase_smartmips, file_ase_dsp) | |
467 | (file_ase_dspr2, file_ase_eva, file_ase_mt, file_ase_virt): Delete. | |
468 | (ISA_HAS_ROR): Adjust for mips_set_options change. | |
469 | (is_opcode_valid): Take the base ase mask directly from mips_opts. | |
470 | (mips_ip): Adjust for mips_set_options change. | |
471 | (md_parse_option): Likewise. Update file_ase_explicit. | |
472 | (mips_after_parse_args): Adjust for mips_set_options change. | |
473 | Use bitmask operations to select the default ASEs. Set file_ase | |
474 | rather than individual per-ASE variables. | |
475 | (s_mipsset): Adjust for mips_set_options change. | |
476 | (mips_elf_final_processing): Test file_ase rather than | |
477 | file_ase_mdmx. Remove commented-out code. | |
478 | ||
d16afab6 RS |
479 | 2013-06-18 Richard Sandiford <rdsandiford@googlemail.com> |
480 | ||
481 | * config/tc-mips.c (mips_cpu_info): Add an "ase" field. | |
482 | (MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, MIPS_CPU_ASE_MT) | |
483 | (MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX, MIPS_CPU_ASE_DSPR2) | |
484 | (MIPS_CPU_ASE_MCU, MIPS_CPU_ASE_VIRT, MIPS_CPU_ASE_EVA): Delete. | |
485 | (mips_after_parse_args): Use the new "ase" field to choose | |
486 | the default ASEs. | |
487 | (mips_cpu_info_table): Move ASEs from the "flags" field to the | |
488 | "ase" field. | |
489 | ||
e83a675f RE |
490 | 2013-06-18 Richard Earnshaw <rearnsha@arm.com> |
491 | ||
492 | * config/tc-arm.c (symbol_preemptible): New function. | |
493 | (relax_branch): Use it. | |
494 | ||
7f3c4072 CM |
495 | 2013-06-17 Catherine Moore <clm@codesourcery.com> |
496 | Maciej W. Rozycki <macro@codesourcery.com> | |
497 | Chao-Ying Fu <fu@mips.com> | |
498 | ||
499 | * config/tc-mips.c (mips_set_options): Add ase_eva. | |
500 | (mips_set_options mips_opts): Add ase_eva. | |
501 | (file_ase_eva): Declare. | |
502 | (ISA_SUPPORTS_EVA_ASE): Define. | |
503 | (IS_SEXT_9BIT_NUM): Define. | |
504 | (MIPS_CPU_ASE_EVA): Define. | |
505 | (is_opcode_valid): Add support for ase_eva. | |
506 | (macro_build): Likewise. | |
507 | (macro): Likewise. | |
508 | (validate_mips_insn): Likewise. | |
509 | (validate_micromips_insn): Likewise. | |
510 | (mips_ip): Likewise. | |
511 | (options): Add OPTION_EVA and OPTION_NO_EVA. | |
512 | (md_longopts): Add -meva and -mno-eva. | |
513 | (md_parse_option): Process new options. | |
514 | (mips_after_parse_args): Check for valid EVA combinations. | |
515 | (s_mipsset): Likewise. | |
516 | ||
e410add4 RS |
517 | 2013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com> |
518 | ||
519 | * dwarf2dbg.h (dwarf2_move_insn): Declare. | |
520 | * dwarf2dbg.c (line_subseg): Add pmove_tail. | |
521 | (get_line_subseg): Add create_p argument. Initialize pmove_tail. | |
522 | (dwarf2_gen_line_info_1): Update call accordingly. | |
523 | (dwarf2_move_insn): New function. | |
524 | * config/tc-mips.c (append_insn): Use dwarf2_move_insn. | |
525 | ||
6a50d470 RS |
526 | 2013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com> |
527 | ||
528 | Revert: | |
529 | ||
530 | 2011-09-05 Richard Sandiford <rdsandiford@googlemail.com> | |
531 | ||
532 | PR gas/13024 | |
533 | * dwarf2dbg.c (pending_lines, pending_lines_tail): New variables. | |
534 | (dwarf2_gen_line_info_1): Delete. | |
535 | (dwarf2_push_line, dwarf2_flush_pending_lines): New functions. | |
536 | (dwarf2_gen_line_info, dwarf2_emit_label): Use them. | |
537 | (dwarf2_consume_line_info): Call dwarf2_flush_pending_lines. | |
538 | (dwarf2_directive_loc): Push previous .locs instead of generating | |
539 | them immediately. | |
540 | ||
f122319e CF |
541 | 2013-06-13 Chao-ying Fu <Chao-ying.Fu@imgtec.com> |
542 | ||
543 | * config/tc-mips.c (ISA_SUPPORTS_VIRT_ASE): Support micromips. | |
544 | (ISA_SUPPORTS_VIRT64_ASE): Support 64-bit micromips. | |
545 | ||
909c7f9c NC |
546 | 2013-06-13 Nick Clifton <nickc@redhat.com> |
547 | ||
548 | PR gas/15602 | |
549 | * config/tc-m68k.h (TC_CHECK_ADJUSTED_BROKEN_DOT_WORD): Define. | |
550 | * config/tc-m68k.c (tc_m68k_check_adjusted_broken_word): New | |
551 | function. Generates an error if the adjusted offset is out of a | |
552 | 16-bit range. | |
553 | ||
5d5755a7 SL |
554 | 2013-06-12 Sandra Loosemore <sandra@codesourcery.com> |
555 | ||
556 | * config/tc-nios2.c (md_apply_fix): Mask constant | |
557 | BFD_RELOC_NIOS2_HIADJ16 value to 16 bits. | |
558 | ||
3bf0dbfb MR |
559 | 2013-06-10 Maciej W. Rozycki <macro@codesourcery.com> |
560 | ||
561 | * config/tc-mips.c (append_insn): Don't do branch relaxation for | |
562 | MIPS-3D instructions either. | |
563 | (md_convert_frag): Update the COPx branch mask accordingly. | |
564 | ||
565 | * config/tc-mips.c (md_show_usage): Document --[no-]relax-branch | |
566 | option. | |
567 | * doc/as.texinfo (Overview): Add --relax-branch and | |
568 | --no-relax-branch. | |
569 | * doc/c-mips.texi (MIPS Opts): Document --relax-branch and | |
570 | --no-relax-branch. | |
571 | ||
9daf7bab SL |
572 | 2013-06-09 Sandra Loosemore <sandra@codesourcery.com> |
573 | ||
574 | * config/tc-nios2.c (nios2_parse_args): Allow trap argument to | |
575 | omitted. | |
576 | ||
d301a56b RS |
577 | 2013-06-08 Catherine Moore <clm@codesourcery.com> |
578 | ||
579 | * config/tc-mips.c (is_opcode_valid): Build ASE mask. | |
580 | (is_opcode_valid_16): Pass ase value to opcode_is_member. | |
581 | (append_insn): Change INSN_xxxx to ASE_xxxx. | |
582 | ||
7bab7634 DC |
583 | 2013-06-01 George Thomas <george.thomas@atmel.com> |
584 | ||
585 | * gas/config/tc-avr.c: Change ISA for devices with USB support to | |
586 | AVR_ISA_XMEGAU | |
587 | ||
f60cf82f L |
588 | 2013-05-31 H.J. Lu <hongjiu.lu@intel.com> |
589 | ||
590 | * config/tc-i386.c (md_begin): Don't align text/data/bss sections | |
591 | for ELF. | |
592 | ||
a3f278e2 CM |
593 | 2013-05-31 Paul Brook <paul@codesourcery.com> |
594 | ||
595 | gas/ | |
596 | * config/tc-mips.c (s_ehword): New. | |
597 | ||
067ec077 CM |
598 | 2013-05-30 Paul Brook <paul@codesourcery.com> |
599 | ||
600 | * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH. | |
601 | ||
d6101ac2 MR |
602 | 2013-05-29 Maciej W. Rozycki <macro@codesourcery.com> |
603 | ||
604 | * write.c (resolve_reloc_expr_symbols): On REL targets don't | |
605 | convert relocs who have no relocatable field either. Rephrase | |
606 | the conditional so that the PC-relative check is only applied | |
607 | for REL targets. | |
608 | ||
f19ccbda MR |
609 | 2013-05-28 Chao-ying Fu <Chao-ying.Fu@imgtec.com> |
610 | ||
611 | * config/tc-mips.c (macro) <ld>: Don't use $zero for address | |
612 | calculation. | |
613 | ||
418009c2 YZ |
614 | 2013-05-28 Yufeng Zhang <yufeng.zhang@arm.com> |
615 | ||
616 | * config/tc-aarch64.c (reloc_table): Update to use | |
477330fc | 617 | BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of |
418009c2 YZ |
618 | BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE. |
619 | (md_apply_fix): Likewise. | |
620 | (aarch64_force_relocation): Likewise. | |
621 | ||
0a8897c7 KT |
622 | 2013-05-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com> |
623 | ||
624 | * config/tc-arm.c (it_fsm_post_encode): Improve | |
625 | warning messages about deprecated IT block formats. | |
626 | ||
89d2a2a3 MS |
627 | 2013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com> |
628 | ||
629 | * config/tc-aarch64.c (md_apply_fix): Move value range checking | |
630 | inside fx_done condition. | |
631 | ||
c77c0862 RS |
632 | 2013-05-22 Jürgen Urban <JuergenUrban@gmx.de> |
633 | ||
634 | * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB. | |
635 | ||
c0637f3a PB |
636 | 2013-05-20 Peter Bergner <bergner@vnet.ibm.com> |
637 | ||
638 | * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error | |
639 | and clean up warning when using PRINT_OPCODE_TABLE. | |
640 | ||
5656a981 AM |
641 | 2013-05-20 Alan Modra <amodra@gmail.com> |
642 | ||
643 | * config/tc-ppc.c (md_apply_fix): Hoist code common to insn | |
644 | and data fixups performing shift/high adjust/sign extension on | |
645 | fieldval. Sink fx_pcrel handling and checks. Use fixP->fx_size | |
646 | when writing data fixups rather than recalculating size. | |
647 | ||
997b26e8 JBG |
648 | 2013-05-16 Jan-Benedict Glaw <jbglaw@lug-owl.de> |
649 | ||
650 | * doc/c-msp430.texi: Fix typo. | |
651 | ||
9f6e76f4 TG |
652 | 2013-05-16 Tristan Gingold <gingold@adacore.com> |
653 | ||
654 | * config/tc-ppc.c (ppc_is_toc_sym): Symbols of class XMC_TC | |
655 | are also TOC symbols. | |
656 | ||
638d3803 NC |
657 | 2013-05-16 Nick Clifton <nickc@redhat.com> |
658 | ||
659 | * config/tc-msp430.c: Make -mmcu recognise more part numbers. | |
660 | Add -mcpu command to specify core type. | |
997b26e8 | 661 | * doc/c-msp430.texi: Update documentation. |
638d3803 | 662 | |
b015e599 AP |
663 | 2013-05-09 Andrew Pinski <apinski@cavium.com> |
664 | ||
665 | * config/tc-mips.c (struct mips_set_options): New ase_virt field. | |
666 | (mips_opts): Update for the new field. | |
667 | (file_ase_virt): New variable. | |
668 | (ISA_SUPPORTS_VIRT_ASE): New macro. | |
669 | (ISA_SUPPORTS_VIRT64_ASE): New macro. | |
670 | (MIPS_CPU_ASE_VIRT): New define. | |
671 | (is_opcode_valid): Handle ase_virt. | |
672 | (macro_build): Handle "+J". | |
673 | (validate_mips_insn): Likewise. | |
674 | (mips_ip): Likewise. | |
675 | (enum options): Add OPTION_VIRT and OPTION_NO_VIRT. | |
676 | (md_longopts): Add mvirt and mnovirt | |
677 | (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT. | |
678 | (mips_after_parse_args): Handle ase_virt field. | |
679 | (s_mipsset): Handle "virt" and "novirt". | |
680 | (mips_elf_final_processing): Add a comment about virt ASE might need | |
681 | a new flag. | |
682 | (md_show_usage): Print out the usage of -mvirt and mno-virt options. | |
683 | * doc/c-mips.texi: Document -mvirt and -mno-virt. | |
684 | Document ".set virt" and ".set novirt". | |
685 | ||
da8094d7 AM |
686 | 2013-05-09 Alan Modra <amodra@gmail.com> |
687 | ||
688 | * config/tc-ppc.c (md_apply_fix): Sign extend fieldval under | |
689 | control of operand flag bits. | |
690 | ||
c5f8c205 AM |
691 | 2013-05-07 Alan Modra <amodra@gmail.com> |
692 | ||
693 | * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro. | |
694 | (PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise. | |
695 | (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise. | |
696 | (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise. | |
697 | (md_apply_fix): Set fx_no_overflow for assorted relocations. | |
698 | Shift and sign-extend fieldval for use by some VLE reloc | |
699 | operand->insert functions. | |
700 | ||
b47468a6 CM |
701 | 2013-05-06 Paul Brook <paul@codesourcery.com> |
702 | Catherine Moore <clm@codesourcery.com> | |
703 | ||
c5f8c205 AM |
704 | * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL. |
705 | (limited_pcrel_reloc_p): Likewise. | |
b47468a6 CM |
706 | (md_apply_fix): Likewise. |
707 | (tc_gen_reloc): Likewise. | |
708 | ||
2de39019 CM |
709 | 2013-05-06 Richard Sandiford <rdsandiford@googlemail.com> |
710 | ||
711 | * config/tc-mips.c (limited_pcrel_reloc_p): New function. | |
712 | (mips_fix_adjustable): Adjust pc-relative check to use | |
713 | limited_pc_reloc_p. | |
714 | ||
754e2bb9 RS |
715 | 2013-05-02 Richard Sandiford <rdsandiford@googlemail.com> |
716 | ||
717 | * config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries. | |
718 | (s_mips_stab): Do not restrict to stabn only. | |
719 | ||
13761a11 NC |
720 | 2013-05-02 Nick Clifton <nickc@redhat.com> |
721 | ||
722 | * config/tc-msp430.c: Add support for the MSP430X architecture. | |
723 | Add code to insert a NOP instruction after any instruction that | |
724 | might change the interrupt state. | |
725 | Add support for the LARGE memory model. | |
726 | Add code to initialise the .MSP430.attributes section. | |
727 | * config/tc-msp430.h: Add support for the MSP430X architecture. | |
728 | * doc/c-msp430.texi: Document the new -mL and -mN command line | |
729 | options. | |
730 | * NEWS: Mention support for the MSP430X architecture. | |
731 | ||
df26367c MR |
732 | 2013-05-01 Maciej W. Rozycki <macro@codesourcery.com> |
733 | ||
734 | * configure.tgt: Replace alpha*-*-linuxecoff* pattern with | |
735 | alpha*-*-linux*ecoff*. | |
736 | ||
f02d8318 CF |
737 | 2013-04-30 Chao-ying Fu <Chao-ying.Fu@imgtec.com> |
738 | ||
739 | * config/tc-mips.c (mips_ip): Add sizelo. | |
740 | For "+C", "+G", and "+H", set sizelo and compare against it. | |
741 | ||
b40bf0a2 NC |
742 | 2013-04-29 Nick Clifton <nickc@redhat.com> |
743 | ||
744 | * as.c (Options): Add -gdwarf-sections. | |
745 | (parse_args): Likewise. | |
746 | * as.h (flag_dwarf_sections): Declare. | |
747 | * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes. | |
748 | (process_entries): When -gdwarf-sections is enabled generate | |
749 | fragmentary .debug_line sections. | |
750 | (out_debug_line): Set the section for the .debug_line section end | |
751 | symbol. | |
752 | * doc/as.texinfo: Document -gdwarf-sections. | |
753 | * NEWS: Mention -gdwarf-sections. | |
754 | ||
8eeccb77 | 755 | 2013-04-26 Christian Groessler <chris@groessler.org> |
00a3147e CG |
756 | |
757 | * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdline | |
758 | according to the target parameter. Don't call s_segm since s_segm | |
759 | calls bfd_set_arch_mach using stdoutput, but stdoutput isn't | |
760 | initialized yet. | |
761 | (md_begin): Call s_segm according to target parameter from command | |
762 | line. | |
763 | ||
49926cd0 AM |
764 | 2013-04-25 Alan Modra <amodra@gmail.com> |
765 | ||
766 | * configure.in: Allow little-endian linux. | |
767 | * configure: Regenerate. | |
768 | ||
e3031850 SL |
769 | 2013-04-24 Sandra Loosemore <sandra@codesourcery.com> |
770 | ||
771 | * config/tc-nios2.c (nios2_control_register_arg_p): Rename | |
772 | "fstatus" control register to "eccinj". | |
773 | ||
cb948fc0 KT |
774 | 2013-04-19 Kai Tietz <ktietz@redhat.com> |
775 | ||
776 | * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin. | |
777 | ||
4455e9ad JB |
778 | 2013-04-15 Julian Brown <julian@codesourcery.com> |
779 | ||
780 | * expr.c (add_to_result, subtract_from_result): Make global. | |
781 | * expr.h (add_to_result, subtract_from_result): Add prototypes. | |
782 | * config/tc-sh.c (sh_optimize_expr): Use add_to_result, | |
783 | subtract_from_result to handle extra bit of precision for .sleb128 | |
784 | directive operands. | |
785 | ||
956a6ba3 JB |
786 | 2013-04-10 Julian Brown <julian@codesourcery.com> |
787 | ||
788 | * read.c (convert_to_bignum): Add sign parameter. Use it | |
789 | instead of X_unsigned to determine sign of resulting bignum. | |
790 | (emit_expr): Pass extra argument to convert_to_bignum. | |
791 | (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass | |
792 | X_extrabit to convert_to_bignum. | |
793 | (parse_bitfield_cons): Set X_extrabit. | |
794 | * expr.c (make_expr_symbol, expr_build_uconstant, operand): | |
795 | Initialise X_extrabit field as appropriate. | |
796 | (add_to_result): New. | |
797 | (subtract_from_result): New. | |
798 | (expr): Use above. | |
799 | * expr.h (expressionS): Add X_extrabit field. | |
800 | ||
eb9f3f00 JB |
801 | 2013-04-10 Jan Beulich <jbeulich@suse.com> |
802 | ||
803 | * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base | |
804 | register being PC when is_t or writeback, and use distinct | |
805 | diagnostic for the latter case. | |
806 | ||
ccb84d65 JB |
807 | 2013-04-10 Jan Beulich <jbeulich@suse.com> |
808 | ||
809 | * gas/config/tc-arm.c (parse_operands): Re-write | |
810 | po_barrier_or_imm(). | |
811 | (do_barrier): Remove bogus constraint(). | |
812 | (do_t_barrier): Remove. | |
813 | ||
4d13caa0 NC |
814 | 2013-04-09 Joerg Wunsch <joerg.wunsch@atmel.com> |
815 | ||
816 | * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2, | |
817 | ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2, | |
818 | ATmega2564RFR2 | |
819 | * gas/doc/c-avr.texi (-mmcu documentation): Likewise. | |
820 | ||
16d02dc9 JB |
821 | 2013-04-09 Jan Beulich <jbeulich@suse.com> |
822 | ||
823 | * gas/config/tc-arm.c (do_vmrs): Accept all control registers. | |
824 | Use local variable Rt in more places. | |
825 | (do_vmsr): Accept all control registers. | |
826 | ||
05ac0ffb JB |
827 | 2013-04-09 Jan Beulich <jbeulich@suse.com> |
828 | ||
829 | * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix | |
830 | if there was none specified for moves between scalar and core | |
831 | register. | |
832 | ||
2d51fb74 JB |
833 | 2013-04-09 Jan Beulich <jbeulich@suse.com> |
834 | ||
835 | * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the | |
836 | NEON_ALL_LANES case. | |
837 | ||
94dcf8bf JB |
838 | 2013-04-08 Jan Beulich <jbeulich@suse.com> |
839 | ||
840 | * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for | |
841 | PC-relative VSTR. | |
842 | ||
1472d06f JB |
843 | 2013-04-08 Jan Beulich <jbeulich@suse.com> |
844 | ||
845 | * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq | |
846 | entry to sp_fiq. | |
847 | ||
0c76cae8 AM |
848 | 2013-04-03 Alan Modra <amodra@gmail.com> |
849 | ||
850 | * doc/as.texinfo: Add support to generate man options for h8300. | |
851 | * doc/c-h8300.texi: Likewise. | |
852 | ||
92eb40d9 RR |
853 | 2013-03-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com> |
854 | ||
855 | * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and | |
856 | Cortex-A57. | |
857 | ||
51dcdd4d NC |
858 | 2013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com> |
859 | ||
860 | PR binutils/15068 | |
861 | * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array. | |
862 | ||
c5d685bf NC |
863 | 2013-03-26 Nick Clifton <nickc@redhat.com> |
864 | ||
9b978282 NC |
865 | PR gas/15295 |
866 | * listing.c (rebuffer_line): Rewrite to avoid seeking back to the | |
867 | start of the file each time. | |
868 | ||
c5d685bf NC |
869 | PR gas/15178 |
870 | * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for | |
871 | FreeBSD targets. | |
872 | ||
9699c833 TG |
873 | 2013-03-26 Douglas B Rupp <rupp@gnat.com> |
874 | ||
875 | * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment | |
876 | after fixup. | |
877 | ||
4755303e WN |
878 | 2013-03-21 Will Newton <will.newton@linaro.org> |
879 | ||
880 | * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all | |
881 | pc-relative str instructions in Thumb mode. | |
882 | ||
81f5558e NC |
883 | 2013-03-21 Michael Schewe <michael.schewe@gmx.net> |
884 | ||
885 | * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov | |
886 | @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc | |
887 | R_H8_DISP32A16. | |
888 | * config/tc-h8300.h: Remove duplicated defines. | |
889 | ||
71863e73 NC |
890 | 2013-03-21 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com> |
891 | ||
892 | PR gas/15282 | |
893 | * tc-avr.c (mcu_has_3_byte_pc): New function. | |
894 | (tc_cfi_frame_initial_instructions): Call it to find return | |
895 | address size. | |
896 | ||
795b8e6b NC |
897 | 2013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com> |
898 | ||
899 | PR gas/15095 | |
900 | * config/tc-tic6x.c (tic6x_try_encode): Handle | |
901 | tic6x_coding_dreg_(msb|lsb) field coding types and use it to | |
902 | encode register pair numbers when required. | |
903 | ||
ba86b375 WN |
904 | 2013-03-15 Will Newton <will.newton@linaro.org> |
905 | ||
906 | * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register | |
907 | in vstr in Thumb mode for pre-ARMv7 cores. | |
908 | ||
9e6f3811 AS |
909 | 2013-03-14 Andreas Schwab <schwab@suse.de> |
910 | ||
911 | * doc/c-arc.texi (ARC Directives): Revert last change and use | |
912 | @itemize instead of @table. | |
913 | * doc/c-arm.texi (ARM-Instruction-Set): Likewise. | |
914 | ||
b10bf8c5 NC |
915 | 2013-03-14 Nick Clifton <nickc@redhat.com> |
916 | ||
917 | PR gas/15273 | |
918 | * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a | |
919 | NULL message, instead just check ARM_CPU_IS_ANY directly. | |
920 | ||
ba724cfc NC |
921 | 2013-03-14 Nick Clifton <nickc@redhat.com> |
922 | ||
923 | PR gas/15212 | |
9e6f3811 | 924 | * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet |
ba724cfc NC |
925 | for table format. |
926 | * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text | |
927 | to the @item directives. | |
928 | (ARM-Neon-Alignment): Move to correct place in the document. | |
929 | * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table | |
930 | formatting. | |
931 | * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of | |
932 | @smallexample. | |
933 | ||
531a94fd SL |
934 | 2013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de> |
935 | ||
936 | * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o' | |
937 | case. Add default BAD_CASE to switch. | |
938 | ||
dad60f8e SL |
939 | 2013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de> |
940 | ||
941 | * config/tc-nios2.c (nios2_assemble_args_ds): New function. | |
942 | (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries. | |
943 | ||
dd5181d5 KT |
944 | 2013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com> |
945 | ||
946 | * config/tc-arm.c (crc_ext_armv8): New feature set. | |
947 | (UNPRED_REG): New macro. | |
948 | (do_crc32_1): New function. | |
949 | (do_crc32b, do_crc32h, do_crc32w, do_crc32cb, | |
950 | do_crc32ch, do_crc32cw): Likewise. | |
951 | (TUEc): New macro. | |
952 | (insns): Add entries for crc32 mnemonics. | |
953 | (arm_extensions): Add entry for crc. | |
954 | ||
8e723a10 CLT |
955 | 2013-03-08 Chung-Lin Tang <cltang@codesourcery.com> |
956 | ||
957 | * write.h (struct fix): Add fx_dot_frag field. | |
958 | (dot_frag): Declare. | |
959 | * write.c (dot_frag): New variable. | |
960 | (fix_new_internal): Set fx_dot_frag field with dot_frag. | |
961 | (fixup_segment): Base calculation of fx_offset with fx_dot_frag. | |
962 | * expr.c (expr): Save value of frag_now in dot_frag when setting | |
963 | dot_value. | |
964 | * read.c (emit_expr): Likewise. Delete comments. | |
965 | ||
be05d201 L |
966 | 2013-03-07 H.J. Lu <hongjiu.lu@intel.com> |
967 | ||
968 | * config/tc-i386.c (flag_code_names): Removed. | |
969 | (i386_index_check): Rewrote. | |
970 | ||
62b0d0d5 YZ |
971 | 2013-03-05 Yufeng Zhang <yufeng.zhang@arm.com> |
972 | ||
973 | * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern'; | |
974 | add comment. | |
975 | (aarch64_double_precision_fmovable): New function. | |
976 | (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new | |
977 | function; handle hexadecimal representation of IEEE754 encoding. | |
978 | (parse_operands): Update the call to parse_aarch64_imm_float. | |
979 | ||
165de32a L |
980 | 2013-02-28 H.J. Lu <hongjiu.lu@intel.com> |
981 | ||
982 | * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix. | |
983 | (check_hle): Updated. | |
984 | (md_assemble): Likewise. | |
985 | (parse_insn): Likewise. | |
986 | ||
d5de92cf L |
987 | 2013-02-28 H.J. Lu <hongjiu.lu@intel.com> |
988 | ||
989 | * config/tc-i386.c (_i386_insn): Add rep_prefix. | |
9e6f3811 | 990 | (md_assemble): Check if REP prefix is OK. |
d5de92cf L |
991 | (parse_insn): Remove expecting_string_instruction. Set |
992 | i.rep_prefix. | |
993 | ||
e60bb1dd YZ |
994 | 2013-02-28 Yufeng Zhang <yufeng.zhang@arm.com> |
995 | ||
996 | * config/tc-aarch64.c (aarch64_features): Add the 'crc' option. | |
997 | ||
aeebdd9b YZ |
998 | 2013-02-28 Yufeng Zhang <yufeng.zhang@arm.com> |
999 | ||
1000 | * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn | |
1001 | for system registers. | |
1002 | ||
4107ae22 DD |
1003 | 2013-02-27 DJ Delorie <dj@redhat.com> |
1004 | ||
1005 | * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE. | |
1006 | (rl78_op): Handle %code(). | |
1007 | (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands. | |
1008 | (tc_gen_reloc): Likwise; convert to a computed reloc. | |
1009 | (md_apply_fix): Likewise. | |
1010 | ||
151fa98f NC |
1011 | 2013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com> |
1012 | ||
1013 | * config/rl78-parse.y: Fix encoding of DIVWU insn. | |
1014 | ||
70a8bc5b | 1015 | 2013-02-25 Terry Guo <terry.guo@arm.com> |
1016 | ||
1017 | * config/tc-arm.c (arm_cpus): Add cortex-r7 entry. | |
1018 | * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to | |
1019 | list of accepted CPUs. | |
1020 | ||
5c111e37 L |
1021 | 2013-02-19 H.J. Lu <hongjiu.lu@intel.com> |
1022 | ||
1023 | PR gas/15159 | |
1024 | * config/tc-i386.c (cpu_arch): Add ".smap". | |
1025 | ||
1026 | * doc/c-i386.texi: Document smap. | |
1027 | ||
8a75745d MR |
1028 | 2013-02-18 Maciej W. Rozycki <macro@codesourcery.com> |
1029 | ||
1030 | * config/tc-mips.c (s_cpload): Call mips_mark_labels and set | |
1031 | mips_assembling_insn appropriately. | |
1032 | (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise. | |
1033 | ||
79850f26 MR |
1034 | 2013-02-18 Maciej W. Rozycki <macro@codesourcery.com> |
1035 | ||
cf29fc61 | 1036 | * config/tc-mips.c (append_insn): Correct indentation, remove |
79850f26 MR |
1037 | extraneous braces. |
1038 | ||
4c261dff NC |
1039 | 2013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com> |
1040 | ||
5c111e37 | 1041 | * config/tc-arm.c (do_neon_mov): Break on NS_NULL. |
4c261dff | 1042 | |
ea33f281 NC |
1043 | 2013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de> |
1044 | ||
1045 | * configure.tgt: Add nios2-*-rtems*. | |
1046 | ||
a1ccaec9 YZ |
1047 | 2013-02-14 Yufeng Zhang <yufeng.zhang@arm.com> |
1048 | ||
1049 | * config/tc-aarch64.c (md_begin): Change to check if 'name' is | |
1050 | NULL. | |
1051 | ||
0aa27725 RS |
1052 | 2013-02-09 Jürgen Urban <JuergenUrban@gmx.de> |
1053 | ||
1054 | * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro. | |
1055 | (macro): Use it. Assert that trunc.w.s is not used for r5900. | |
1056 | ||
da4339ed NC |
1057 | 2013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com> |
1058 | ||
1059 | * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4 | |
1060 | core. | |
1061 | ||
36591ba1 | 1062 | 2013-02-06 Sandra Loosemore <sandra@codesourcery.com> |
5c111e37 | 1063 | Andrew Jenner <andrew@codesourcery.com> |
36591ba1 SL |
1064 | |
1065 | Based on patches from Altera Corporation. | |
1066 | ||
1067 | * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c. | |
1068 | (TARGET_CPU_HFILES): Add config/tc-nios2.h. | |
1069 | * Makefile.in: Regenerated. | |
1070 | * configure.tgt: Add case for nios2*-linux*. | |
1071 | * config/obj-elf.c: Conditionally include elf/nios2.h. | |
1072 | * config/tc-nios2.c: New file. | |
1073 | * config/tc-nios2.h: New file. | |
1074 | * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi. | |
1075 | * doc/Makefile.in: Regenerated. | |
1076 | * doc/all.texi: Set NIOSII. | |
1077 | * doc/as.texinfo (Overview): Add Nios II options. | |
1078 | (Machine Dependencies): Include c-nios2.texi. | |
1079 | * doc/c-nios2.texi: New file. | |
1080 | * NEWS: Note Altera Nios II support. | |
1081 | ||
94d4433a AM |
1082 | 2013-02-06 Alan Modra <amodra@gmail.com> |
1083 | ||
1084 | PR gas/14255 | |
1085 | * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc. | |
1086 | Don't skip fixups with fx_subsy non-NULL. | |
1087 | * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups | |
1088 | with fx_subsy non-NULL. | |
1089 | ||
ace9af6f L |
1090 | 2013-02-04 H.J. Lu <hongjiu.lu@intel.com> |
1091 | ||
1092 | * doc/c-metag.texi: Add "@c man" markers. | |
1093 | ||
89d67ed9 AM |
1094 | 2013-02-04 Alan Modra <amodra@gmail.com> |
1095 | ||
1096 | * write.c (fixup_segment): Return void. Delete seg_reloc_count | |
1097 | related code. | |
1098 | (TC_ADJUST_RELOC_COUNT): Delete. | |
1099 | * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete. | |
1100 | ||
89072bd6 AM |
1101 | 2013-02-04 Alan Modra <amodra@gmail.com> |
1102 | ||
1103 | * po/POTFILES.in: Regenerate. | |
1104 | ||
f9b2d544 NC |
1105 | 2013-01-30 Markos Chandras <markos.chandras@imgtec.com> |
1106 | ||
1107 | * config/tc-metag.c: Make SWAP instruction less permissive with | |
1108 | its operands. | |
1109 | ||
392ca752 DD |
1110 | 2013-01-29 DJ Delorie <dj@redhat.com> |
1111 | ||
1112 | * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified | |
1113 | relocs in .word/.etc statements. | |
1114 | ||
427d0db6 RM |
1115 | 2013-01-29 Roland McGrath <mcgrathr@google.com> |
1116 | ||
1117 | * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad | |
1118 | immediate value for 8-bit offset" error so it shows line info. | |
1119 | ||
4faf939a JM |
1120 | 2013-01-24 Joseph Myers <joseph@codesourcery.com> |
1121 | ||
1122 | * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections | |
1123 | for 64-bit output. | |
1124 | ||
78c8d46c NC |
1125 | 2013-01-24 Nick Clifton <nickc@redhat.com> |
1126 | ||
1127 | * config/tc-v850.c: Add support for e3v5 architecture. | |
1128 | * doc/c-v850.texi: Mention new support. | |
1129 | ||
fb5b7503 NC |
1130 | 2013-01-23 Nick Clifton <nickc@redhat.com> |
1131 | ||
1132 | PR gas/15039 | |
1133 | * config/tc-avr.c: Include dwarf2dbg.h. | |
1134 | ||
8ce3d284 L |
1135 | 2013-01-18 H.J. Lu <hongjiu.lu@intel.com> |
1136 | ||
1137 | * config/tc-i386.c (reloc): Support size relocation only for ELF. | |
1138 | (tc_i386_fix_adjustable): Likewise. | |
1139 | (lex_got): Likewise. | |
1140 | (tc_gen_reloc): Likewise. | |
1141 | ||
f5555712 YZ |
1142 | 2013-01-17 Yufeng Zhang <yufeng.zhang@arm.com> |
1143 | ||
1144 | * config/tc-aarch64.c (output_operand_error_record): Change to output | |
1145 | the out-of-range error message as value-expected message if there is | |
1146 | only one single value in the expected range. | |
1147 | (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with | |
1148 | LSL #0 as a programmer-friendly feature. | |
1149 | ||
8fd4256d L |
1150 | 2013-01-16 H.J. Lu <hongjiu.lu@intel.com> |
1151 | ||
1152 | * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32. | |
1153 | (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and | |
1154 | BFD_RELOC_64_SIZE relocations. | |
1155 | (lex_got): Support "symbol@SIZE" and don't create GOT symbol | |
1156 | for it. | |
1157 | (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64 | |
1158 | relocations against local symbols. | |
1159 | ||
a5840dce AM |
1160 | 2013-01-16 Alan Modra <amodra@gmail.com> |
1161 | ||
1162 | * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after | |
1163 | finding some sort of toc syntax error, and break to avoid | |
1164 | compiler uninit warning. | |
1165 | ||
af89796a L |
1166 | 2013-01-15 H.J. Lu <hongjiu.lu@intel.com> |
1167 | ||
1168 | PR gas/15019 | |
1169 | * config/tc-i386.c (lex_got): Increment length by 1 if the | |
1170 | relocation token is removed. | |
1171 | ||
dd42f060 NC |
1172 | 2013-01-15 Nick Clifton <nickc@redhat.com> |
1173 | ||
1174 | * config/tc-v850.c (md_assemble): Allow signed values for | |
1175 | V850E_IMMEDIATE. | |
1176 | ||
464e3686 SK |
1177 | 2013-01-11 Sean Keys <skeys@ipdatasys.com> |
1178 | ||
1179 | * config/tc-xgate.c (md_begin): Fix mistake made when going from | |
af89796a | 1180 | git to cvs. |
464e3686 | 1181 | |
5817ffd1 PB |
1182 | 2013-01-10 Peter Bergner <bergner@vnet.ibm.com> |
1183 | ||
1184 | * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm. | |
1185 | * doc/c-ppc.texi (PowerPC-Opts): Likewise. | |
1186 | * config/tc-ppc.c (md_show_usage): Likewise. | |
1187 | (ppc_handle_align): Handle power8's group ending nop. | |
1188 | ||
f4b1f6a9 SK |
1189 | 2013-01-10 Sean Keys <skeys@ipdatasys.com> |
1190 | ||
1191 | * config/tc-xgate.c (md_begin): Fix the printing of opcodes so | |
af89796a | 1192 | that the assember exits after the opcodes have been printed. |
f4b1f6a9 | 1193 | |
34bca508 L |
1194 | 2013-01-10 H.J. Lu <hongjiu.lu@intel.com> |
1195 | ||
1196 | * app.c: Remove trailing white spaces. | |
1197 | * as.c: Likewise. | |
1198 | * as.h: Likewise. | |
1199 | * cond.c: Likewise. | |
1200 | * dw2gencfi.c: Likewise. | |
1201 | * dwarf2dbg.h: Likewise. | |
1202 | * ecoff.c: Likewise. | |
1203 | * input-file.c: Likewise. | |
1204 | * itbl-lex.h: Likewise. | |
1205 | * output-file.c: Likewise. | |
1206 | * read.c: Likewise. | |
1207 | * sb.c: Likewise. | |
1208 | * subsegs.c: Likewise. | |
1209 | * symbols.c: Likewise. | |
1210 | * write.c: Likewise. | |
1211 | * config/tc-i386.c: Likewise. | |
1212 | * doc/Makefile.am: Likewise. | |
1213 | * doc/Makefile.in: Likewise. | |
1214 | * doc/c-aarch64.texi: Likewise. | |
1215 | * doc/c-alpha.texi: Likewise. | |
1216 | * doc/c-arc.texi: Likewise. | |
1217 | * doc/c-arm.texi: Likewise. | |
1218 | * doc/c-avr.texi: Likewise. | |
1219 | * doc/c-bfin.texi: Likewise. | |
1220 | * doc/c-cr16.texi: Likewise. | |
1221 | * doc/c-d10v.texi: Likewise. | |
1222 | * doc/c-d30v.texi: Likewise. | |
1223 | * doc/c-h8300.texi: Likewise. | |
1224 | * doc/c-hppa.texi: Likewise. | |
1225 | * doc/c-i370.texi: Likewise. | |
1226 | * doc/c-i386.texi: Likewise. | |
1227 | * doc/c-i860.texi: Likewise. | |
1228 | * doc/c-m32c.texi: Likewise. | |
1229 | * doc/c-m32r.texi: Likewise. | |
1230 | * doc/c-m68hc11.texi: Likewise. | |
1231 | * doc/c-m68k.texi: Likewise. | |
1232 | * doc/c-microblaze.texi: Likewise. | |
1233 | * doc/c-mips.texi: Likewise. | |
1234 | * doc/c-msp430.texi: Likewise. | |
1235 | * doc/c-mt.texi: Likewise. | |
1236 | * doc/c-s390.texi: Likewise. | |
1237 | * doc/c-score.texi: Likewise. | |
1238 | * doc/c-sh.texi: Likewise. | |
1239 | * doc/c-sh64.texi: Likewise. | |
1240 | * doc/c-tic54x.texi: Likewise. | |
1241 | * doc/c-tic6x.texi: Likewise. | |
1242 | * doc/c-v850.texi: Likewise. | |
1243 | * doc/c-xc16x.texi: Likewise. | |
1244 | * doc/c-xgate.texi: Likewise. | |
1245 | * doc/c-xtensa.texi: Likewise. | |
1246 | * doc/c-z80.texi: Likewise. | |
1247 | * doc/internals.texi: Likewise. | |
1248 | ||
4c665b71 RM |
1249 | 2013-01-10 Roland McGrath <mcgrathr@google.com> |
1250 | ||
1251 | * hash.c (hash_new_sized): Make it global. | |
1252 | * hash.h: Declare it. | |
1253 | * macro.c (define_macro): Use hash_new_sized instead of hash_new, | |
1254 | pass a small size. | |
1255 | ||
a3c62988 NC |
1256 | 2013-01-10 Will Newton <will.newton@imgtec.com> |
1257 | ||
1258 | * Makefile.am: Add Meta. | |
1259 | * Makefile.in: Regenerate. | |
1260 | * config/tc-metag.c: New file. | |
1261 | * config/tc-metag.h: New file. | |
1262 | * configure.tgt: Add Meta. | |
1263 | * doc/Makefile.am: Add Meta. | |
1264 | * doc/Makefile.in: Regenerate. | |
1265 | * doc/all.texi: Add Meta. | |
1266 | * doc/as.texiinfo: Document Meta options. | |
1267 | * doc/c-metag.texi: New file. | |
1268 | ||
b37df7c4 SE |
1269 | 2013-01-09 Steve Ellcey <sellcey@mips.com> |
1270 | ||
1271 | * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal | |
1272 | calls. | |
1273 | * config/tc-mips.c (internalError): Remove, replace with abort. | |
1274 | ||
a3251895 YZ |
1275 | 2013-01-08 Yufeng Zhang <yufeng.zhang@arm.com> |
1276 | ||
1277 | * config/tc-aarch64.c (parse_operands): Change to compare the result | |
1278 | of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'. | |
1279 | ||
8ab8155f NC |
1280 | 2013-01-07 Nick Clifton <nickc@redhat.com> |
1281 | ||
1282 | PR gas/14887 | |
1283 | * config/tc-arm.c (skip_past_char): Skip whitespace before the | |
1284 | anticipated character. | |
1285 | * config/tc-arm.c (parse_address_main): Delete skip of whitespace | |
1286 | here as it is no longer needed. | |
1287 | ||
a4ac1c42 AS |
1288 | 2013-01-06 Andreas Schwab <schwab@linux-m68k.org> |
1289 | ||
1290 | * doc/c-mips.texi (MIPS Opts): Fix use of @itemx. | |
1291 | * doc/c-score.texi (SCORE-Opts): Likewise. | |
1292 | * doc/c-tic54x.texi (TIC54X-Directives): Likewise. | |
1293 | ||
e407c74b NC |
1294 | 2013-01-04 Juergen Urban <JuergenUrban@gmx.de> |
1295 | ||
1296 | * config/tc-mips.c: Add support for MIPS r5900. | |
1297 | Add M_LQ_AB and M_SQ_AB to support large values for instructions | |
1298 | lq and sq. | |
1299 | (can_swap_branch_p, get_append_method): Detect some conditional | |
1300 | short loops to fix a bug on the r5900 by NOP in the branch delay | |
1301 | slot. | |
1302 | (M_MUL): Support 3 operands in multu on r5900. | |
1303 | (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I. | |
1304 | (s_mipsset): Force 32 bit floating point on r5900. | |
1305 | (mips_ip): Check parameter range of instructions mfps and mtps on | |
1306 | r5900. | |
1307 | * configure.in: Detect CPU type when target string contains r5900 | |
1308 | (e.g. mips64r5900el-linux-gnu). | |
1309 | ||
62658407 L |
1310 | 2013-01-02 H.J. Lu <hongjiu.lu@intel.com> |
1311 | ||
1312 | * as.c (parse_args): Update copyright year to 2013. | |
1313 | ||
95830fd1 YZ |
1314 | 2013-01-02 Yufeng Zhang <yufeng.zhang@arm.com> |
1315 | ||
1316 | * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53" | |
1317 | and "cortex57". | |
1318 | ||
517bb291 | 1319 | 2013-01-02 Nick Clifton <nickc@redhat.com> |
d709e4e6 | 1320 | |
517bb291 NC |
1321 | PR gas/14987 |
1322 | * config/tc-arm.c (parse_address_main): Skip whitespace before a | |
1323 | closing bracket. | |
d709e4e6 | 1324 | |
517bb291 | 1325 | For older changes see ChangeLog-2012 |
08d56133 | 1326 | \f |
517bb291 | 1327 | Copyright (C) 2013 Free Software Foundation, Inc. |
752937aa NC |
1328 | |
1329 | Copying and distribution of this file, with or without modification, | |
1330 | are permitted in any medium without royalty provided the copyright | |
1331 | notice and this notice are preserved. | |
1332 | ||
08d56133 NC |
1333 | Local Variables: |
1334 | mode: change-log | |
1335 | left-margin: 8 | |
1336 | fill-column: 74 | |
1337 | version-control: never | |
1338 | End: |