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Commit | Line | Data |
---|---|---|
c1094734 TG |
1 | 2013-07-09 Tristan Gingold <gingold@adacore.com> |
2 | ||
3 | * configure.com: Define HAVE_SYS_TYPES_H and HAVE_UNISTD_H | |
4 | ||
0cbbe1b8 RS |
5 | 2013-07-08 Richard Sandiford <rdsandiford@googlemail.com> |
6 | ||
7 | * config/tc-mips.c (mips_ip): Unconditionally parse an expression | |
8 | for 'A' and assume that the constant has been elided if the result | |
9 | is an O_register. | |
10 | ||
f2ae14a1 RS |
11 | 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com> |
12 | ||
13 | * config/tc-mips.c (gprel16_reloc_p): New function. | |
14 | (macro_read_relocs): Assume BFD_RELOC_LO16 if all relocs are | |
15 | BFD_RELOC_UNUSED. | |
16 | (offset_high_part, small_offset_p): New functions. | |
17 | (nacro): Use them. Remove *_OB and *_DOB cases. For single- | |
18 | register load and store macros, handle the 16-bit offset case first. | |
19 | If a 16-bit offset is not suitable for the instruction we're | |
20 | generating, load it into the temporary register using | |
21 | ADDRESS_ADDI_INSN. Make the M_LI_DD code fall through into the | |
22 | M_L_DAB code once the address has been constructed. For double load | |
23 | and store macros, again handle the 16-bit offset case first. | |
24 | If the second register cannot be accessed from the same high | |
25 | part as the first, load it into AT using ADDRESS_ADDI_INSN. | |
26 | Fix the handling of LD in cases where the first register is the | |
27 | same as the base. Also handle the case where the offset is | |
28 | not 16 bits and the second register cannot be accessed from the | |
29 | same high part as the first. For unaligned loads and stores, | |
30 | fuse the offbits == 12 and old "ab" handling. Apply this handling | |
31 | whenever the second offset needs a different high part from the first. | |
32 | Construct the offset using ADDRESS_ADDI_INSN where possible, | |
33 | for offbits == 16 as well as offbits == 12. Use offset_reloc | |
34 | when constructing the individual loads and stores. | |
35 | (mips_ip): Set up imm_expr, imm2_expr, offset_expr, imm_reloc | |
36 | and offset_reloc before matching against a particular opcode. | |
37 | Handle elided 'A' constants. Allow 'A' constants to use | |
38 | relocation operators. | |
39 | ||
5c324c16 RS |
40 | 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com> |
41 | ||
42 | * config/tc-mips.c (validate_mips_insn): Remove "[" and "]" handling. | |
43 | (mips_ip): Likewise. Do not set is_mdmx for INSN_5400 instructions. | |
44 | Check constraints on the VR5400 RZU.OB, SLL.OB and SRL.OB instructions. | |
45 | ||
23e69e47 RS |
46 | 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com> |
47 | ||
48 | * config/tc-mips.c (mips_ip): Preserve the real bit number for "+p". | |
49 | Require the msb to be <= 31 for "+s". Check that the size is <= 31 | |
50 | for both "+s" and "+S". | |
51 | ||
27c5c572 RS |
52 | 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com> |
53 | ||
54 | * config/tc-mips.c (validate_mips_insn, validate_micromips_insn): | |
55 | (mips_ip, mips16_ip): Handle "+i". | |
56 | ||
e76ff5ab RS |
57 | 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com> |
58 | ||
59 | * config/tc-mips.c (mips32_to_micromips_reg_h_map): Delete. | |
60 | (micromips_to_32_reg_h_map): Rename to... | |
61 | (micromips_to_32_reg_h_map1): ...this. | |
62 | (micromips_to_32_reg_i_map): Rename to... | |
63 | (micromips_to_32_reg_h_map2): ...this. | |
64 | (mips_lookup_reg_pair): New function. | |
65 | (gpr_write_mask, macro): Adjust after above renaming. | |
66 | (validate_micromips_insn): Remove "mi" handling. | |
67 | (mips_ip): Likewise. Parse both registers in a pair for "mh". | |
68 | ||
fa7616a4 RS |
69 | 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com> |
70 | ||
71 | * config/tc-mips.c (validate_mips_insn, validate_micromips_insn) | |
72 | (mips_ip): Remove "+D" and "+T" handling. | |
73 | ||
fb798c50 AK |
74 | 2013-07-05 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> |
75 | ||
76 | * config/tc-s390.c (md_gather_operands, md_apply_fix): Support new | |
77 | relocs. | |
78 | ||
2c0a3565 MS |
79 | 2013-07-03 Marcus Shawcroft <marcus.shawcroft@arm.com> |
80 | ||
4aa2c5e2 MS |
81 | * config/tc-aarch64.c (reloc_table): Merge got_prel19 into got. |
82 | ||
83 | 2013-07-02 Marcus Shawcroft <marcus.shawcroft@arm.com> | |
84 | ||
2c0a3565 MS |
85 | * config/tc-aarch64.c (md_apply_fix): Reorder case values. |
86 | (aarch64_force_relocation): Likewise. | |
87 | ||
f40da81b AM |
88 | 2013-07-02 Alan Modra <amodra@gmail.com> |
89 | ||
90 | * config/tc-ppc.c (ppc_elf_adjust_symtab): Don't make .TOC. weak. | |
91 | ||
81566a9b MR |
92 | 2013-06-26 Maciej W. Rozycki <macro@codesourcery.com> |
93 | ||
94 | * doc/as.texinfo (Overview): Remove @samp from MIPS ISA names. | |
95 | * doc/c-mips.texi (MIPS Options): Remove @sc from MIPS ISA names. | |
96 | Replace @sc{mips16} with literal `MIPS16'. | |
97 | (MIPS ISA): Replace @sc{mips3} with literal `MIPS III'. | |
98 | ||
a6bb11b2 YZ |
99 | 2013-06-26 Yufeng Zhang <yufeng.zhang@arm.com> |
100 | ||
101 | * config/tc-aarch64.c (reloc_table): Replace | |
102 | BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with | |
103 | BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to | |
104 | BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and | |
105 | BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC. | |
106 | (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC, | |
107 | BFD_RELOC_AARCH64_LD32_GOT_LO12_NC, | |
108 | BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC, | |
109 | BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC, | |
110 | BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and | |
111 | BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC. | |
112 | (aarch64_force_relocation): Likewise. | |
113 | ||
cec5225b YZ |
114 | 2013-06-26 Yufeng Zhang <yufeng.zhang@arm.com> |
115 | ||
116 | * config/tc-aarch64.c (ilp32_p): New static variable. | |
117 | (elf64_aarch64_target_format): Return the target according to the | |
118 | value of 'ilp32_p'. | |
119 | (md_begin): Determine 'mach' according to the value of 'ilp32_p'. | |
120 | (aarch64_opts): Add support for options '-milp32' and '-mlp64'. | |
121 | (aarch64_dwarf2_addr_size): New function. | |
122 | * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration. | |
123 | (DWARF2_ADDR_SIZE): New define. | |
124 | ||
e335d9cb RS |
125 | 2013-06-26 Richard Sandiford <rdsandiford@googlemail.com> |
126 | ||
127 | * doc/c-mips.texi: Use ISA instead of @sc{isa}. | |
128 | ||
18870af7 RS |
129 | 2013-06-26 Richard Sandiford <rdsandiford@googlemail.com> |
130 | ||
131 | * config/tc-mips.c (validate_mips_insn): Use STYPE rather than SHAMT. | |
132 | ||
833794fc MR |
133 | 2013-06-25 Maciej W. Rozycki <macro@codesourcery.com> |
134 | ||
135 | * config/tc-mips.c (mips_set_options): Add insn32 member. | |
136 | (mips_opts): Initialize it. | |
137 | (NOP_INSN, NOP_INSN_SIZE): Handle insn32 mode. | |
138 | (options): Add OPTION_INSN32 and OPTION_NO_INSN32 enum values. | |
139 | (md_longopts): Add "minsn32" and "mno-insn32" options. | |
140 | (is_size_valid): Handle insn32 mode. | |
141 | (md_assemble): Pass instruction string down to macro. | |
142 | (brk_fmt): Add second dimension and insn32 mode initializers. | |
143 | (mfhl_fmt): Likewise. | |
144 | (BRK_FMT, MFHL_FMT): Handle insn32 mode. | |
145 | (macro_build) <'c'>: Handle microMIPS 32-bit BREAK encoding. | |
146 | (macro_build_jalr, move_register): Handle insn32 mode. | |
147 | (macro_build_branch_rs): Likewise. | |
148 | (macro): Handle insn32 mode. | |
149 | <M_JRADDIUSP>, <M_JRC>, <M_MOVEP>: New cases. | |
150 | (mips_ip): Handle insn32 mode. | |
151 | (md_parse_option): Handle OPTION_INSN32 and OPTION_NO_INSN32. | |
152 | (s_mipsset): Handle "insn32" and "noinsn32" pseudo-ops. | |
153 | (mips_handle_align): Handle insn32 mode. | |
154 | (md_show_usage): Add -minsn32 and -mno-insn32. | |
155 | ||
156 | * doc/as.texinfo (Target MIPS options): Add -minsn32 and | |
157 | -mno-insn32 options. | |
158 | (-minsn32, -mno-insn32): New options. | |
159 | * doc/c-mips.texi (MIPS Opts): Add -minsn32 and -mno-insn32 | |
160 | options. | |
161 | (MIPS assembly options): New node. Document .set insn32 and | |
162 | .set noinsn32. | |
163 | (MIPS-Dependent): List the new node. | |
164 | ||
d1706f38 NC |
165 | 2013-06-25 Nick Clifton <nickc@redhat.com> |
166 | ||
167 | * config/tc-msp430.c (msp430_srcoperand): Do not allow the use of | |
168 | the PC in indirect addressing on 430xv2 parts. | |
169 | (msp430_operands): Add version test to hardware bug encoding | |
170 | restrictions. | |
171 | ||
477330fc RM |
172 | 2013-06-24 Roland McGrath <mcgrathr@google.com> |
173 | ||
d996d970 RM |
174 | * config/tc-arm.c (parse_reg_list): Use skip_past_char for '}', |
175 | so it skips whitespace before it. | |
176 | (s_arm_unwind_save_mmxwr, s_arm_unwind_save_mmxwcg): Likewise. | |
177 | ||
477330fc RM |
178 | * config/tc-arm.c (arm_symbol_chars): Include '{' and '}'. |
179 | (arm_reg_parse_multi): Skip whitespace first. | |
180 | (parse_reg_list): Likewise. | |
181 | (parse_vfp_reg_list): Likewise. | |
182 | (s_arm_unwind_save_mmxwcg): Likewise. | |
183 | ||
24382199 NC |
184 | 2013-06-24 Nick Clifton <nickc@redhat.com> |
185 | ||
186 | PR gas/15623 | |
187 | * config/tc-arm.c (do_t_smc): Mark as ending an IT block. | |
188 | ||
c3678916 RS |
189 | 2013-06-23 Richard Sandiford <rdsandiford@googlemail.com> |
190 | ||
191 | * config/tc-mips.c (mips_ip): Fix swapped bit numbers in comments. | |
192 | ||
42429eac RS |
193 | 2013-06-23 Richard Sandiford <rdsandiford@googlemail.com> |
194 | ||
195 | * config/tc-mips.c: Assert that offsetT and valueT are at least | |
196 | 8 bytes in size. | |
197 | (GPR_SMIN, GPR_SMAX): New macros. | |
198 | (macro, mips_ip): Remove code for 4-byte valueT and offsetT. | |
199 | ||
f3ded42a RS |
200 | 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com> |
201 | ||
202 | * config/tc-mips.c: Remove OBJ_ELF, OBJ_MAYBE_ELF and IS_ELF | |
203 | conditions. Remove any code deselected by them. | |
204 | (s_mips_frame, s_mips_mask): Handle ECOFF_DEBUGGING case first. | |
205 | ||
e8044f35 RS |
206 | 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com> |
207 | ||
208 | * NEWS: Note removal of ECOFF support. | |
209 | * doc/as.texinfo (--emulation): Update for the removal of MIPS ECOFF. | |
210 | * Makefile.am (TARG_ENV_HFILES): Remove config/te-lnews.h. | |
211 | (MULTI_CFILES): Remove config/e-mipsecoff.c. | |
212 | * Makefile.in: Regenerate. | |
213 | * configure.in: Remove MIPS ECOFF references. | |
214 | (mips-sony-bsd*, mips-*-bsd*, mips-*-lnews*-ecoff, mips-*-*-ecoff): | |
215 | Delete cases. | |
216 | (mips-*-irix5*-*, mips*-*-linux*-*, mips*-*-freebsd*) | |
217 | (mips*-*-kfreebsd*-gnu, mips-*-*-elf): Fold into... | |
218 | (mips-*-*): ...this single case. | |
219 | (mipsbecoff, mipslecoff, mipsecoff): Remove emulations. Expect | |
220 | MIPS emulations to be e-mipself*. | |
221 | * configure: Regenerate. | |
222 | * configure.tgt (mips-sony-bsd*, mips-*-ultrix*, mips-*-osf*) | |
223 | (mips-*-ecoff*, mips-*-pe*, mips-*-irix*, ips-*-lnews*, mips-*-riscos*) | |
224 | (mips-*-sysv*): Remove coff and ecoff cases. | |
225 | * as.c (mipsbecoff, mipslecoff, mipsecoff): Remove. | |
226 | * ecoff.c: Remove reference to MIPS ECOFF. | |
227 | * config/e-mipsecoff.c, config/te-lnews.h: Delete files. | |
228 | * config/tc-mips.c (ECOFF_LITTLE_FORMAT): Delete. | |
229 | (RDATA_SECTION_NAME, mips_target_form): Remove COFF and ECOFF cases. | |
230 | (mips_hi_fixup): Tweak comment. | |
231 | (append_insn): Require a howto. | |
232 | (mips_after_parse_args): Remove OBJ_MAYBE_ECOFF code. | |
233 | ||
98508b2a RS |
234 | 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com> |
235 | ||
236 | * doc/as.texinfo: Use MIPS rather than @sc{mips} throughout. | |
237 | Use "CPU" instead of "cpu". | |
238 | * doc/c-mips.texi: Likewise. | |
239 | (MIPS Opts): Rename to MIPS Options. | |
240 | (MIPS option stack): Rename to MIPS Option Stack. | |
241 | (MIPS ASE instruction generation overrides): Rename to | |
242 | MIPS ASE Instruction Generation Overrides (for now). | |
243 | (MIPS floating-point): Rename to MIPS Floating-Point. | |
244 | ||
fc16f8cc RS |
245 | 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com> |
246 | ||
247 | * doc/c-mips.texi (MIPS Macros): New section. | |
248 | (MIPS Object): Replace with... | |
249 | (MIPS Small Data): ...this new section. | |
250 | ||
5a7560b5 RS |
251 | 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com> |
252 | ||
253 | * doc/c-mips.texi (MIPS symbol sizes): Move section further up file. | |
254 | Capitalize name. Use @kindex instead of @cindex for .set entries. | |
255 | ||
a1b86ab7 RS |
256 | 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com> |
257 | ||
258 | * doc/c-mips.texi (MIPS Stabs): Remove section. | |
259 | ||
c6278170 RS |
260 | 2013-06-20 Richard Sandiford <rdsandiford@googlemail.com> |
261 | ||
262 | * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS, ISA_SUPPORTS_DSP_ASE) | |
263 | (ISA_SUPPORTS_DSP64_ASE, ISA_SUPPORTS_DSPR2_ASE, ISA_SUPPORTS_EVA_ASE) | |
264 | (ISA_SUPPORTS_MT_ASE, ISA_SUPPORTS_MCU_ASE, ISA_SUPPORTS_VIRT_ASE) | |
265 | (ISA_SUPPORTS_VIRT64_ASE): Delete. | |
266 | (mips_ase): New structure. | |
267 | (mips_ases): New table. | |
268 | (FP64_ASES): New macro. | |
269 | (mips_ase_groups): New array. | |
270 | (mips_isa_rev, mips_ase_mask, mips_check_isa_supports_ase) | |
271 | (mips_check_isa_supports_ases, mips_set_ase, mips_lookup_ase): New | |
272 | functions. | |
273 | (is_opcode_valid): Use mips_ases to get the 64-bit ASE flags. | |
274 | (md_parse_option): Use mips_ases and mips_set_ase instead of | |
275 | separate case statements for each ASE option. | |
276 | (mips_after_parse_args): Use FP64_ASES. Use | |
277 | mips_check_isa_supports_ases to check the ASEs against | |
278 | other options. | |
279 | (s_mipsset): Use mips_ases and mips_set_ase instead of | |
280 | separate if statements for each ASE option. Use | |
281 | mips_check_isa_supports_ases, even when a non-ASE option | |
282 | is specified. | |
283 | ||
63a4bc21 KT |
284 | 2013-06-19 Greta Yorsh <Greta.Yorsh@arm.com> |
285 | ||
286 | * config/tc-arm.c (arm_cpus): Add support for Cortex-A12. | |
287 | ||
c31f3936 RS |
288 | 2013-06-18 Richard Sandiford <rdsandiford@googlemail.com> |
289 | ||
290 | * config/tc-mips.c (md_shortopts, options, md_longopts) | |
291 | (md_longopts_size): Move earlier in file. | |
292 | ||
846ef2d0 RS |
293 | 2013-06-18 Richard Sandiford <rdsandiford@googlemail.com> |
294 | ||
295 | * config/tc-mips.c (mips_set_options): Replace separate "ase_*" fields | |
296 | with a single "ase" bitmask. | |
297 | (mips_opts): Update accordingly. | |
298 | (file_ase, file_ase_explicit): New variables. | |
299 | (file_ase_mips3d, file_ase_mdmx, file_ase_smartmips, file_ase_dsp) | |
300 | (file_ase_dspr2, file_ase_eva, file_ase_mt, file_ase_virt): Delete. | |
301 | (ISA_HAS_ROR): Adjust for mips_set_options change. | |
302 | (is_opcode_valid): Take the base ase mask directly from mips_opts. | |
303 | (mips_ip): Adjust for mips_set_options change. | |
304 | (md_parse_option): Likewise. Update file_ase_explicit. | |
305 | (mips_after_parse_args): Adjust for mips_set_options change. | |
306 | Use bitmask operations to select the default ASEs. Set file_ase | |
307 | rather than individual per-ASE variables. | |
308 | (s_mipsset): Adjust for mips_set_options change. | |
309 | (mips_elf_final_processing): Test file_ase rather than | |
310 | file_ase_mdmx. Remove commented-out code. | |
311 | ||
d16afab6 RS |
312 | 2013-06-18 Richard Sandiford <rdsandiford@googlemail.com> |
313 | ||
314 | * config/tc-mips.c (mips_cpu_info): Add an "ase" field. | |
315 | (MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, MIPS_CPU_ASE_MT) | |
316 | (MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX, MIPS_CPU_ASE_DSPR2) | |
317 | (MIPS_CPU_ASE_MCU, MIPS_CPU_ASE_VIRT, MIPS_CPU_ASE_EVA): Delete. | |
318 | (mips_after_parse_args): Use the new "ase" field to choose | |
319 | the default ASEs. | |
320 | (mips_cpu_info_table): Move ASEs from the "flags" field to the | |
321 | "ase" field. | |
322 | ||
e83a675f RE |
323 | 2013-06-18 Richard Earnshaw <rearnsha@arm.com> |
324 | ||
325 | * config/tc-arm.c (symbol_preemptible): New function. | |
326 | (relax_branch): Use it. | |
327 | ||
7f3c4072 CM |
328 | 2013-06-17 Catherine Moore <clm@codesourcery.com> |
329 | Maciej W. Rozycki <macro@codesourcery.com> | |
330 | Chao-Ying Fu <fu@mips.com> | |
331 | ||
332 | * config/tc-mips.c (mips_set_options): Add ase_eva. | |
333 | (mips_set_options mips_opts): Add ase_eva. | |
334 | (file_ase_eva): Declare. | |
335 | (ISA_SUPPORTS_EVA_ASE): Define. | |
336 | (IS_SEXT_9BIT_NUM): Define. | |
337 | (MIPS_CPU_ASE_EVA): Define. | |
338 | (is_opcode_valid): Add support for ase_eva. | |
339 | (macro_build): Likewise. | |
340 | (macro): Likewise. | |
341 | (validate_mips_insn): Likewise. | |
342 | (validate_micromips_insn): Likewise. | |
343 | (mips_ip): Likewise. | |
344 | (options): Add OPTION_EVA and OPTION_NO_EVA. | |
345 | (md_longopts): Add -meva and -mno-eva. | |
346 | (md_parse_option): Process new options. | |
347 | (mips_after_parse_args): Check for valid EVA combinations. | |
348 | (s_mipsset): Likewise. | |
349 | ||
e410add4 RS |
350 | 2013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com> |
351 | ||
352 | * dwarf2dbg.h (dwarf2_move_insn): Declare. | |
353 | * dwarf2dbg.c (line_subseg): Add pmove_tail. | |
354 | (get_line_subseg): Add create_p argument. Initialize pmove_tail. | |
355 | (dwarf2_gen_line_info_1): Update call accordingly. | |
356 | (dwarf2_move_insn): New function. | |
357 | * config/tc-mips.c (append_insn): Use dwarf2_move_insn. | |
358 | ||
6a50d470 RS |
359 | 2013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com> |
360 | ||
361 | Revert: | |
362 | ||
363 | 2011-09-05 Richard Sandiford <rdsandiford@googlemail.com> | |
364 | ||
365 | PR gas/13024 | |
366 | * dwarf2dbg.c (pending_lines, pending_lines_tail): New variables. | |
367 | (dwarf2_gen_line_info_1): Delete. | |
368 | (dwarf2_push_line, dwarf2_flush_pending_lines): New functions. | |
369 | (dwarf2_gen_line_info, dwarf2_emit_label): Use them. | |
370 | (dwarf2_consume_line_info): Call dwarf2_flush_pending_lines. | |
371 | (dwarf2_directive_loc): Push previous .locs instead of generating | |
372 | them immediately. | |
373 | ||
f122319e CF |
374 | 2013-06-13 Chao-ying Fu <Chao-ying.Fu@imgtec.com> |
375 | ||
376 | * config/tc-mips.c (ISA_SUPPORTS_VIRT_ASE): Support micromips. | |
377 | (ISA_SUPPORTS_VIRT64_ASE): Support 64-bit micromips. | |
378 | ||
909c7f9c NC |
379 | 2013-06-13 Nick Clifton <nickc@redhat.com> |
380 | ||
381 | PR gas/15602 | |
382 | * config/tc-m68k.h (TC_CHECK_ADJUSTED_BROKEN_DOT_WORD): Define. | |
383 | * config/tc-m68k.c (tc_m68k_check_adjusted_broken_word): New | |
384 | function. Generates an error if the adjusted offset is out of a | |
385 | 16-bit range. | |
386 | ||
5d5755a7 SL |
387 | 2013-06-12 Sandra Loosemore <sandra@codesourcery.com> |
388 | ||
389 | * config/tc-nios2.c (md_apply_fix): Mask constant | |
390 | BFD_RELOC_NIOS2_HIADJ16 value to 16 bits. | |
391 | ||
3bf0dbfb MR |
392 | 2013-06-10 Maciej W. Rozycki <macro@codesourcery.com> |
393 | ||
394 | * config/tc-mips.c (append_insn): Don't do branch relaxation for | |
395 | MIPS-3D instructions either. | |
396 | (md_convert_frag): Update the COPx branch mask accordingly. | |
397 | ||
398 | * config/tc-mips.c (md_show_usage): Document --[no-]relax-branch | |
399 | option. | |
400 | * doc/as.texinfo (Overview): Add --relax-branch and | |
401 | --no-relax-branch. | |
402 | * doc/c-mips.texi (MIPS Opts): Document --relax-branch and | |
403 | --no-relax-branch. | |
404 | ||
9daf7bab SL |
405 | 2013-06-09 Sandra Loosemore <sandra@codesourcery.com> |
406 | ||
407 | * config/tc-nios2.c (nios2_parse_args): Allow trap argument to | |
408 | omitted. | |
409 | ||
d301a56b RS |
410 | 2013-06-08 Catherine Moore <clm@codesourcery.com> |
411 | ||
412 | * config/tc-mips.c (is_opcode_valid): Build ASE mask. | |
413 | (is_opcode_valid_16): Pass ase value to opcode_is_member. | |
414 | (append_insn): Change INSN_xxxx to ASE_xxxx. | |
415 | ||
7bab7634 DC |
416 | 2013-06-01 George Thomas <george.thomas@atmel.com> |
417 | ||
418 | * gas/config/tc-avr.c: Change ISA for devices with USB support to | |
419 | AVR_ISA_XMEGAU | |
420 | ||
f60cf82f L |
421 | 2013-05-31 H.J. Lu <hongjiu.lu@intel.com> |
422 | ||
423 | * config/tc-i386.c (md_begin): Don't align text/data/bss sections | |
424 | for ELF. | |
425 | ||
a3f278e2 CM |
426 | 2013-05-31 Paul Brook <paul@codesourcery.com> |
427 | ||
428 | gas/ | |
429 | * config/tc-mips.c (s_ehword): New. | |
430 | ||
067ec077 CM |
431 | 2013-05-30 Paul Brook <paul@codesourcery.com> |
432 | ||
433 | * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH. | |
434 | ||
d6101ac2 MR |
435 | 2013-05-29 Maciej W. Rozycki <macro@codesourcery.com> |
436 | ||
437 | * write.c (resolve_reloc_expr_symbols): On REL targets don't | |
438 | convert relocs who have no relocatable field either. Rephrase | |
439 | the conditional so that the PC-relative check is only applied | |
440 | for REL targets. | |
441 | ||
f19ccbda MR |
442 | 2013-05-28 Chao-ying Fu <Chao-ying.Fu@imgtec.com> |
443 | ||
444 | * config/tc-mips.c (macro) <ld>: Don't use $zero for address | |
445 | calculation. | |
446 | ||
418009c2 YZ |
447 | 2013-05-28 Yufeng Zhang <yufeng.zhang@arm.com> |
448 | ||
449 | * config/tc-aarch64.c (reloc_table): Update to use | |
477330fc | 450 | BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of |
418009c2 YZ |
451 | BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE. |
452 | (md_apply_fix): Likewise. | |
453 | (aarch64_force_relocation): Likewise. | |
454 | ||
0a8897c7 KT |
455 | 2013-05-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com> |
456 | ||
457 | * config/tc-arm.c (it_fsm_post_encode): Improve | |
458 | warning messages about deprecated IT block formats. | |
459 | ||
89d2a2a3 MS |
460 | 2013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com> |
461 | ||
462 | * config/tc-aarch64.c (md_apply_fix): Move value range checking | |
463 | inside fx_done condition. | |
464 | ||
c77c0862 RS |
465 | 2013-05-22 Jürgen Urban <JuergenUrban@gmx.de> |
466 | ||
467 | * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB. | |
468 | ||
c0637f3a PB |
469 | 2013-05-20 Peter Bergner <bergner@vnet.ibm.com> |
470 | ||
471 | * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error | |
472 | and clean up warning when using PRINT_OPCODE_TABLE. | |
473 | ||
5656a981 AM |
474 | 2013-05-20 Alan Modra <amodra@gmail.com> |
475 | ||
476 | * config/tc-ppc.c (md_apply_fix): Hoist code common to insn | |
477 | and data fixups performing shift/high adjust/sign extension on | |
478 | fieldval. Sink fx_pcrel handling and checks. Use fixP->fx_size | |
479 | when writing data fixups rather than recalculating size. | |
480 | ||
997b26e8 JBG |
481 | 2013-05-16 Jan-Benedict Glaw <jbglaw@lug-owl.de> |
482 | ||
483 | * doc/c-msp430.texi: Fix typo. | |
484 | ||
9f6e76f4 TG |
485 | 2013-05-16 Tristan Gingold <gingold@adacore.com> |
486 | ||
487 | * config/tc-ppc.c (ppc_is_toc_sym): Symbols of class XMC_TC | |
488 | are also TOC symbols. | |
489 | ||
638d3803 NC |
490 | 2013-05-16 Nick Clifton <nickc@redhat.com> |
491 | ||
492 | * config/tc-msp430.c: Make -mmcu recognise more part numbers. | |
493 | Add -mcpu command to specify core type. | |
997b26e8 | 494 | * doc/c-msp430.texi: Update documentation. |
638d3803 | 495 | |
b015e599 AP |
496 | 2013-05-09 Andrew Pinski <apinski@cavium.com> |
497 | ||
498 | * config/tc-mips.c (struct mips_set_options): New ase_virt field. | |
499 | (mips_opts): Update for the new field. | |
500 | (file_ase_virt): New variable. | |
501 | (ISA_SUPPORTS_VIRT_ASE): New macro. | |
502 | (ISA_SUPPORTS_VIRT64_ASE): New macro. | |
503 | (MIPS_CPU_ASE_VIRT): New define. | |
504 | (is_opcode_valid): Handle ase_virt. | |
505 | (macro_build): Handle "+J". | |
506 | (validate_mips_insn): Likewise. | |
507 | (mips_ip): Likewise. | |
508 | (enum options): Add OPTION_VIRT and OPTION_NO_VIRT. | |
509 | (md_longopts): Add mvirt and mnovirt | |
510 | (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT. | |
511 | (mips_after_parse_args): Handle ase_virt field. | |
512 | (s_mipsset): Handle "virt" and "novirt". | |
513 | (mips_elf_final_processing): Add a comment about virt ASE might need | |
514 | a new flag. | |
515 | (md_show_usage): Print out the usage of -mvirt and mno-virt options. | |
516 | * doc/c-mips.texi: Document -mvirt and -mno-virt. | |
517 | Document ".set virt" and ".set novirt". | |
518 | ||
da8094d7 AM |
519 | 2013-05-09 Alan Modra <amodra@gmail.com> |
520 | ||
521 | * config/tc-ppc.c (md_apply_fix): Sign extend fieldval under | |
522 | control of operand flag bits. | |
523 | ||
c5f8c205 AM |
524 | 2013-05-07 Alan Modra <amodra@gmail.com> |
525 | ||
526 | * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro. | |
527 | (PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise. | |
528 | (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise. | |
529 | (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise. | |
530 | (md_apply_fix): Set fx_no_overflow for assorted relocations. | |
531 | Shift and sign-extend fieldval for use by some VLE reloc | |
532 | operand->insert functions. | |
533 | ||
b47468a6 CM |
534 | 2013-05-06 Paul Brook <paul@codesourcery.com> |
535 | Catherine Moore <clm@codesourcery.com> | |
536 | ||
c5f8c205 AM |
537 | * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL. |
538 | (limited_pcrel_reloc_p): Likewise. | |
b47468a6 CM |
539 | (md_apply_fix): Likewise. |
540 | (tc_gen_reloc): Likewise. | |
541 | ||
2de39019 CM |
542 | 2013-05-06 Richard Sandiford <rdsandiford@googlemail.com> |
543 | ||
544 | * config/tc-mips.c (limited_pcrel_reloc_p): New function. | |
545 | (mips_fix_adjustable): Adjust pc-relative check to use | |
546 | limited_pc_reloc_p. | |
547 | ||
754e2bb9 RS |
548 | 2013-05-02 Richard Sandiford <rdsandiford@googlemail.com> |
549 | ||
550 | * config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries. | |
551 | (s_mips_stab): Do not restrict to stabn only. | |
552 | ||
13761a11 NC |
553 | 2013-05-02 Nick Clifton <nickc@redhat.com> |
554 | ||
555 | * config/tc-msp430.c: Add support for the MSP430X architecture. | |
556 | Add code to insert a NOP instruction after any instruction that | |
557 | might change the interrupt state. | |
558 | Add support for the LARGE memory model. | |
559 | Add code to initialise the .MSP430.attributes section. | |
560 | * config/tc-msp430.h: Add support for the MSP430X architecture. | |
561 | * doc/c-msp430.texi: Document the new -mL and -mN command line | |
562 | options. | |
563 | * NEWS: Mention support for the MSP430X architecture. | |
564 | ||
df26367c MR |
565 | 2013-05-01 Maciej W. Rozycki <macro@codesourcery.com> |
566 | ||
567 | * configure.tgt: Replace alpha*-*-linuxecoff* pattern with | |
568 | alpha*-*-linux*ecoff*. | |
569 | ||
f02d8318 CF |
570 | 2013-04-30 Chao-ying Fu <Chao-ying.Fu@imgtec.com> |
571 | ||
572 | * config/tc-mips.c (mips_ip): Add sizelo. | |
573 | For "+C", "+G", and "+H", set sizelo and compare against it. | |
574 | ||
b40bf0a2 NC |
575 | 2013-04-29 Nick Clifton <nickc@redhat.com> |
576 | ||
577 | * as.c (Options): Add -gdwarf-sections. | |
578 | (parse_args): Likewise. | |
579 | * as.h (flag_dwarf_sections): Declare. | |
580 | * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes. | |
581 | (process_entries): When -gdwarf-sections is enabled generate | |
582 | fragmentary .debug_line sections. | |
583 | (out_debug_line): Set the section for the .debug_line section end | |
584 | symbol. | |
585 | * doc/as.texinfo: Document -gdwarf-sections. | |
586 | * NEWS: Mention -gdwarf-sections. | |
587 | ||
8eeccb77 | 588 | 2013-04-26 Christian Groessler <chris@groessler.org> |
00a3147e CG |
589 | |
590 | * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdline | |
591 | according to the target parameter. Don't call s_segm since s_segm | |
592 | calls bfd_set_arch_mach using stdoutput, but stdoutput isn't | |
593 | initialized yet. | |
594 | (md_begin): Call s_segm according to target parameter from command | |
595 | line. | |
596 | ||
49926cd0 AM |
597 | 2013-04-25 Alan Modra <amodra@gmail.com> |
598 | ||
599 | * configure.in: Allow little-endian linux. | |
600 | * configure: Regenerate. | |
601 | ||
e3031850 SL |
602 | 2013-04-24 Sandra Loosemore <sandra@codesourcery.com> |
603 | ||
604 | * config/tc-nios2.c (nios2_control_register_arg_p): Rename | |
605 | "fstatus" control register to "eccinj". | |
606 | ||
cb948fc0 KT |
607 | 2013-04-19 Kai Tietz <ktietz@redhat.com> |
608 | ||
609 | * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin. | |
610 | ||
4455e9ad JB |
611 | 2013-04-15 Julian Brown <julian@codesourcery.com> |
612 | ||
613 | * expr.c (add_to_result, subtract_from_result): Make global. | |
614 | * expr.h (add_to_result, subtract_from_result): Add prototypes. | |
615 | * config/tc-sh.c (sh_optimize_expr): Use add_to_result, | |
616 | subtract_from_result to handle extra bit of precision for .sleb128 | |
617 | directive operands. | |
618 | ||
956a6ba3 JB |
619 | 2013-04-10 Julian Brown <julian@codesourcery.com> |
620 | ||
621 | * read.c (convert_to_bignum): Add sign parameter. Use it | |
622 | instead of X_unsigned to determine sign of resulting bignum. | |
623 | (emit_expr): Pass extra argument to convert_to_bignum. | |
624 | (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass | |
625 | X_extrabit to convert_to_bignum. | |
626 | (parse_bitfield_cons): Set X_extrabit. | |
627 | * expr.c (make_expr_symbol, expr_build_uconstant, operand): | |
628 | Initialise X_extrabit field as appropriate. | |
629 | (add_to_result): New. | |
630 | (subtract_from_result): New. | |
631 | (expr): Use above. | |
632 | * expr.h (expressionS): Add X_extrabit field. | |
633 | ||
eb9f3f00 JB |
634 | 2013-04-10 Jan Beulich <jbeulich@suse.com> |
635 | ||
636 | * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base | |
637 | register being PC when is_t or writeback, and use distinct | |
638 | diagnostic for the latter case. | |
639 | ||
ccb84d65 JB |
640 | 2013-04-10 Jan Beulich <jbeulich@suse.com> |
641 | ||
642 | * gas/config/tc-arm.c (parse_operands): Re-write | |
643 | po_barrier_or_imm(). | |
644 | (do_barrier): Remove bogus constraint(). | |
645 | (do_t_barrier): Remove. | |
646 | ||
4d13caa0 NC |
647 | 2013-04-09 Joerg Wunsch <joerg.wunsch@atmel.com> |
648 | ||
649 | * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2, | |
650 | ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2, | |
651 | ATmega2564RFR2 | |
652 | * gas/doc/c-avr.texi (-mmcu documentation): Likewise. | |
653 | ||
16d02dc9 JB |
654 | 2013-04-09 Jan Beulich <jbeulich@suse.com> |
655 | ||
656 | * gas/config/tc-arm.c (do_vmrs): Accept all control registers. | |
657 | Use local variable Rt in more places. | |
658 | (do_vmsr): Accept all control registers. | |
659 | ||
05ac0ffb JB |
660 | 2013-04-09 Jan Beulich <jbeulich@suse.com> |
661 | ||
662 | * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix | |
663 | if there was none specified for moves between scalar and core | |
664 | register. | |
665 | ||
2d51fb74 JB |
666 | 2013-04-09 Jan Beulich <jbeulich@suse.com> |
667 | ||
668 | * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the | |
669 | NEON_ALL_LANES case. | |
670 | ||
94dcf8bf JB |
671 | 2013-04-08 Jan Beulich <jbeulich@suse.com> |
672 | ||
673 | * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for | |
674 | PC-relative VSTR. | |
675 | ||
1472d06f JB |
676 | 2013-04-08 Jan Beulich <jbeulich@suse.com> |
677 | ||
678 | * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq | |
679 | entry to sp_fiq. | |
680 | ||
0c76cae8 AM |
681 | 2013-04-03 Alan Modra <amodra@gmail.com> |
682 | ||
683 | * doc/as.texinfo: Add support to generate man options for h8300. | |
684 | * doc/c-h8300.texi: Likewise. | |
685 | ||
92eb40d9 RR |
686 | 2013-03-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com> |
687 | ||
688 | * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and | |
689 | Cortex-A57. | |
690 | ||
51dcdd4d NC |
691 | 2013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com> |
692 | ||
693 | PR binutils/15068 | |
694 | * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array. | |
695 | ||
c5d685bf NC |
696 | 2013-03-26 Nick Clifton <nickc@redhat.com> |
697 | ||
9b978282 NC |
698 | PR gas/15295 |
699 | * listing.c (rebuffer_line): Rewrite to avoid seeking back to the | |
700 | start of the file each time. | |
701 | ||
c5d685bf NC |
702 | PR gas/15178 |
703 | * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for | |
704 | FreeBSD targets. | |
705 | ||
9699c833 TG |
706 | 2013-03-26 Douglas B Rupp <rupp@gnat.com> |
707 | ||
708 | * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment | |
709 | after fixup. | |
710 | ||
4755303e WN |
711 | 2013-03-21 Will Newton <will.newton@linaro.org> |
712 | ||
713 | * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all | |
714 | pc-relative str instructions in Thumb mode. | |
715 | ||
81f5558e NC |
716 | 2013-03-21 Michael Schewe <michael.schewe@gmx.net> |
717 | ||
718 | * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov | |
719 | @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc | |
720 | R_H8_DISP32A16. | |
721 | * config/tc-h8300.h: Remove duplicated defines. | |
722 | ||
71863e73 NC |
723 | 2013-03-21 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com> |
724 | ||
725 | PR gas/15282 | |
726 | * tc-avr.c (mcu_has_3_byte_pc): New function. | |
727 | (tc_cfi_frame_initial_instructions): Call it to find return | |
728 | address size. | |
729 | ||
795b8e6b NC |
730 | 2013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com> |
731 | ||
732 | PR gas/15095 | |
733 | * config/tc-tic6x.c (tic6x_try_encode): Handle | |
734 | tic6x_coding_dreg_(msb|lsb) field coding types and use it to | |
735 | encode register pair numbers when required. | |
736 | ||
ba86b375 WN |
737 | 2013-03-15 Will Newton <will.newton@linaro.org> |
738 | ||
739 | * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register | |
740 | in vstr in Thumb mode for pre-ARMv7 cores. | |
741 | ||
9e6f3811 AS |
742 | 2013-03-14 Andreas Schwab <schwab@suse.de> |
743 | ||
744 | * doc/c-arc.texi (ARC Directives): Revert last change and use | |
745 | @itemize instead of @table. | |
746 | * doc/c-arm.texi (ARM-Instruction-Set): Likewise. | |
747 | ||
b10bf8c5 NC |
748 | 2013-03-14 Nick Clifton <nickc@redhat.com> |
749 | ||
750 | PR gas/15273 | |
751 | * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a | |
752 | NULL message, instead just check ARM_CPU_IS_ANY directly. | |
753 | ||
ba724cfc NC |
754 | 2013-03-14 Nick Clifton <nickc@redhat.com> |
755 | ||
756 | PR gas/15212 | |
9e6f3811 | 757 | * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet |
ba724cfc NC |
758 | for table format. |
759 | * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text | |
760 | to the @item directives. | |
761 | (ARM-Neon-Alignment): Move to correct place in the document. | |
762 | * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table | |
763 | formatting. | |
764 | * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of | |
765 | @smallexample. | |
766 | ||
531a94fd SL |
767 | 2013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de> |
768 | ||
769 | * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o' | |
770 | case. Add default BAD_CASE to switch. | |
771 | ||
dad60f8e SL |
772 | 2013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de> |
773 | ||
774 | * config/tc-nios2.c (nios2_assemble_args_ds): New function. | |
775 | (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries. | |
776 | ||
dd5181d5 KT |
777 | 2013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com> |
778 | ||
779 | * config/tc-arm.c (crc_ext_armv8): New feature set. | |
780 | (UNPRED_REG): New macro. | |
781 | (do_crc32_1): New function. | |
782 | (do_crc32b, do_crc32h, do_crc32w, do_crc32cb, | |
783 | do_crc32ch, do_crc32cw): Likewise. | |
784 | (TUEc): New macro. | |
785 | (insns): Add entries for crc32 mnemonics. | |
786 | (arm_extensions): Add entry for crc. | |
787 | ||
8e723a10 CLT |
788 | 2013-03-08 Chung-Lin Tang <cltang@codesourcery.com> |
789 | ||
790 | * write.h (struct fix): Add fx_dot_frag field. | |
791 | (dot_frag): Declare. | |
792 | * write.c (dot_frag): New variable. | |
793 | (fix_new_internal): Set fx_dot_frag field with dot_frag. | |
794 | (fixup_segment): Base calculation of fx_offset with fx_dot_frag. | |
795 | * expr.c (expr): Save value of frag_now in dot_frag when setting | |
796 | dot_value. | |
797 | * read.c (emit_expr): Likewise. Delete comments. | |
798 | ||
be05d201 L |
799 | 2013-03-07 H.J. Lu <hongjiu.lu@intel.com> |
800 | ||
801 | * config/tc-i386.c (flag_code_names): Removed. | |
802 | (i386_index_check): Rewrote. | |
803 | ||
62b0d0d5 YZ |
804 | 2013-03-05 Yufeng Zhang <yufeng.zhang@arm.com> |
805 | ||
806 | * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern'; | |
807 | add comment. | |
808 | (aarch64_double_precision_fmovable): New function. | |
809 | (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new | |
810 | function; handle hexadecimal representation of IEEE754 encoding. | |
811 | (parse_operands): Update the call to parse_aarch64_imm_float. | |
812 | ||
165de32a L |
813 | 2013-02-28 H.J. Lu <hongjiu.lu@intel.com> |
814 | ||
815 | * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix. | |
816 | (check_hle): Updated. | |
817 | (md_assemble): Likewise. | |
818 | (parse_insn): Likewise. | |
819 | ||
d5de92cf L |
820 | 2013-02-28 H.J. Lu <hongjiu.lu@intel.com> |
821 | ||
822 | * config/tc-i386.c (_i386_insn): Add rep_prefix. | |
9e6f3811 | 823 | (md_assemble): Check if REP prefix is OK. |
d5de92cf L |
824 | (parse_insn): Remove expecting_string_instruction. Set |
825 | i.rep_prefix. | |
826 | ||
e60bb1dd YZ |
827 | 2013-02-28 Yufeng Zhang <yufeng.zhang@arm.com> |
828 | ||
829 | * config/tc-aarch64.c (aarch64_features): Add the 'crc' option. | |
830 | ||
aeebdd9b YZ |
831 | 2013-02-28 Yufeng Zhang <yufeng.zhang@arm.com> |
832 | ||
833 | * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn | |
834 | for system registers. | |
835 | ||
4107ae22 DD |
836 | 2013-02-27 DJ Delorie <dj@redhat.com> |
837 | ||
838 | * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE. | |
839 | (rl78_op): Handle %code(). | |
840 | (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands. | |
841 | (tc_gen_reloc): Likwise; convert to a computed reloc. | |
842 | (md_apply_fix): Likewise. | |
843 | ||
151fa98f NC |
844 | 2013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com> |
845 | ||
846 | * config/rl78-parse.y: Fix encoding of DIVWU insn. | |
847 | ||
70a8bc5b | 848 | 2013-02-25 Terry Guo <terry.guo@arm.com> |
849 | ||
850 | * config/tc-arm.c (arm_cpus): Add cortex-r7 entry. | |
851 | * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to | |
852 | list of accepted CPUs. | |
853 | ||
5c111e37 L |
854 | 2013-02-19 H.J. Lu <hongjiu.lu@intel.com> |
855 | ||
856 | PR gas/15159 | |
857 | * config/tc-i386.c (cpu_arch): Add ".smap". | |
858 | ||
859 | * doc/c-i386.texi: Document smap. | |
860 | ||
8a75745d MR |
861 | 2013-02-18 Maciej W. Rozycki <macro@codesourcery.com> |
862 | ||
863 | * config/tc-mips.c (s_cpload): Call mips_mark_labels and set | |
864 | mips_assembling_insn appropriately. | |
865 | (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise. | |
866 | ||
79850f26 MR |
867 | 2013-02-18 Maciej W. Rozycki <macro@codesourcery.com> |
868 | ||
cf29fc61 | 869 | * config/tc-mips.c (append_insn): Correct indentation, remove |
79850f26 MR |
870 | extraneous braces. |
871 | ||
4c261dff NC |
872 | 2013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com> |
873 | ||
5c111e37 | 874 | * config/tc-arm.c (do_neon_mov): Break on NS_NULL. |
4c261dff | 875 | |
ea33f281 NC |
876 | 2013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de> |
877 | ||
878 | * configure.tgt: Add nios2-*-rtems*. | |
879 | ||
a1ccaec9 YZ |
880 | 2013-02-14 Yufeng Zhang <yufeng.zhang@arm.com> |
881 | ||
882 | * config/tc-aarch64.c (md_begin): Change to check if 'name' is | |
883 | NULL. | |
884 | ||
0aa27725 RS |
885 | 2013-02-09 Jürgen Urban <JuergenUrban@gmx.de> |
886 | ||
887 | * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro. | |
888 | (macro): Use it. Assert that trunc.w.s is not used for r5900. | |
889 | ||
da4339ed NC |
890 | 2013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com> |
891 | ||
892 | * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4 | |
893 | core. | |
894 | ||
36591ba1 | 895 | 2013-02-06 Sandra Loosemore <sandra@codesourcery.com> |
5c111e37 | 896 | Andrew Jenner <andrew@codesourcery.com> |
36591ba1 SL |
897 | |
898 | Based on patches from Altera Corporation. | |
899 | ||
900 | * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c. | |
901 | (TARGET_CPU_HFILES): Add config/tc-nios2.h. | |
902 | * Makefile.in: Regenerated. | |
903 | * configure.tgt: Add case for nios2*-linux*. | |
904 | * config/obj-elf.c: Conditionally include elf/nios2.h. | |
905 | * config/tc-nios2.c: New file. | |
906 | * config/tc-nios2.h: New file. | |
907 | * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi. | |
908 | * doc/Makefile.in: Regenerated. | |
909 | * doc/all.texi: Set NIOSII. | |
910 | * doc/as.texinfo (Overview): Add Nios II options. | |
911 | (Machine Dependencies): Include c-nios2.texi. | |
912 | * doc/c-nios2.texi: New file. | |
913 | * NEWS: Note Altera Nios II support. | |
914 | ||
94d4433a AM |
915 | 2013-02-06 Alan Modra <amodra@gmail.com> |
916 | ||
917 | PR gas/14255 | |
918 | * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc. | |
919 | Don't skip fixups with fx_subsy non-NULL. | |
920 | * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups | |
921 | with fx_subsy non-NULL. | |
922 | ||
ace9af6f L |
923 | 2013-02-04 H.J. Lu <hongjiu.lu@intel.com> |
924 | ||
925 | * doc/c-metag.texi: Add "@c man" markers. | |
926 | ||
89d67ed9 AM |
927 | 2013-02-04 Alan Modra <amodra@gmail.com> |
928 | ||
929 | * write.c (fixup_segment): Return void. Delete seg_reloc_count | |
930 | related code. | |
931 | (TC_ADJUST_RELOC_COUNT): Delete. | |
932 | * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete. | |
933 | ||
89072bd6 AM |
934 | 2013-02-04 Alan Modra <amodra@gmail.com> |
935 | ||
936 | * po/POTFILES.in: Regenerate. | |
937 | ||
f9b2d544 NC |
938 | 2013-01-30 Markos Chandras <markos.chandras@imgtec.com> |
939 | ||
940 | * config/tc-metag.c: Make SWAP instruction less permissive with | |
941 | its operands. | |
942 | ||
392ca752 DD |
943 | 2013-01-29 DJ Delorie <dj@redhat.com> |
944 | ||
945 | * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified | |
946 | relocs in .word/.etc statements. | |
947 | ||
427d0db6 RM |
948 | 2013-01-29 Roland McGrath <mcgrathr@google.com> |
949 | ||
950 | * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad | |
951 | immediate value for 8-bit offset" error so it shows line info. | |
952 | ||
4faf939a JM |
953 | 2013-01-24 Joseph Myers <joseph@codesourcery.com> |
954 | ||
955 | * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections | |
956 | for 64-bit output. | |
957 | ||
78c8d46c NC |
958 | 2013-01-24 Nick Clifton <nickc@redhat.com> |
959 | ||
960 | * config/tc-v850.c: Add support for e3v5 architecture. | |
961 | * doc/c-v850.texi: Mention new support. | |
962 | ||
fb5b7503 NC |
963 | 2013-01-23 Nick Clifton <nickc@redhat.com> |
964 | ||
965 | PR gas/15039 | |
966 | * config/tc-avr.c: Include dwarf2dbg.h. | |
967 | ||
8ce3d284 L |
968 | 2013-01-18 H.J. Lu <hongjiu.lu@intel.com> |
969 | ||
970 | * config/tc-i386.c (reloc): Support size relocation only for ELF. | |
971 | (tc_i386_fix_adjustable): Likewise. | |
972 | (lex_got): Likewise. | |
973 | (tc_gen_reloc): Likewise. | |
974 | ||
f5555712 YZ |
975 | 2013-01-17 Yufeng Zhang <yufeng.zhang@arm.com> |
976 | ||
977 | * config/tc-aarch64.c (output_operand_error_record): Change to output | |
978 | the out-of-range error message as value-expected message if there is | |
979 | only one single value in the expected range. | |
980 | (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with | |
981 | LSL #0 as a programmer-friendly feature. | |
982 | ||
8fd4256d L |
983 | 2013-01-16 H.J. Lu <hongjiu.lu@intel.com> |
984 | ||
985 | * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32. | |
986 | (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and | |
987 | BFD_RELOC_64_SIZE relocations. | |
988 | (lex_got): Support "symbol@SIZE" and don't create GOT symbol | |
989 | for it. | |
990 | (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64 | |
991 | relocations against local symbols. | |
992 | ||
a5840dce AM |
993 | 2013-01-16 Alan Modra <amodra@gmail.com> |
994 | ||
995 | * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after | |
996 | finding some sort of toc syntax error, and break to avoid | |
997 | compiler uninit warning. | |
998 | ||
af89796a L |
999 | 2013-01-15 H.J. Lu <hongjiu.lu@intel.com> |
1000 | ||
1001 | PR gas/15019 | |
1002 | * config/tc-i386.c (lex_got): Increment length by 1 if the | |
1003 | relocation token is removed. | |
1004 | ||
dd42f060 NC |
1005 | 2013-01-15 Nick Clifton <nickc@redhat.com> |
1006 | ||
1007 | * config/tc-v850.c (md_assemble): Allow signed values for | |
1008 | V850E_IMMEDIATE. | |
1009 | ||
464e3686 SK |
1010 | 2013-01-11 Sean Keys <skeys@ipdatasys.com> |
1011 | ||
1012 | * config/tc-xgate.c (md_begin): Fix mistake made when going from | |
af89796a | 1013 | git to cvs. |
464e3686 | 1014 | |
5817ffd1 PB |
1015 | 2013-01-10 Peter Bergner <bergner@vnet.ibm.com> |
1016 | ||
1017 | * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm. | |
1018 | * doc/c-ppc.texi (PowerPC-Opts): Likewise. | |
1019 | * config/tc-ppc.c (md_show_usage): Likewise. | |
1020 | (ppc_handle_align): Handle power8's group ending nop. | |
1021 | ||
f4b1f6a9 SK |
1022 | 2013-01-10 Sean Keys <skeys@ipdatasys.com> |
1023 | ||
1024 | * config/tc-xgate.c (md_begin): Fix the printing of opcodes so | |
af89796a | 1025 | that the assember exits after the opcodes have been printed. |
f4b1f6a9 | 1026 | |
34bca508 L |
1027 | 2013-01-10 H.J. Lu <hongjiu.lu@intel.com> |
1028 | ||
1029 | * app.c: Remove trailing white spaces. | |
1030 | * as.c: Likewise. | |
1031 | * as.h: Likewise. | |
1032 | * cond.c: Likewise. | |
1033 | * dw2gencfi.c: Likewise. | |
1034 | * dwarf2dbg.h: Likewise. | |
1035 | * ecoff.c: Likewise. | |
1036 | * input-file.c: Likewise. | |
1037 | * itbl-lex.h: Likewise. | |
1038 | * output-file.c: Likewise. | |
1039 | * read.c: Likewise. | |
1040 | * sb.c: Likewise. | |
1041 | * subsegs.c: Likewise. | |
1042 | * symbols.c: Likewise. | |
1043 | * write.c: Likewise. | |
1044 | * config/tc-i386.c: Likewise. | |
1045 | * doc/Makefile.am: Likewise. | |
1046 | * doc/Makefile.in: Likewise. | |
1047 | * doc/c-aarch64.texi: Likewise. | |
1048 | * doc/c-alpha.texi: Likewise. | |
1049 | * doc/c-arc.texi: Likewise. | |
1050 | * doc/c-arm.texi: Likewise. | |
1051 | * doc/c-avr.texi: Likewise. | |
1052 | * doc/c-bfin.texi: Likewise. | |
1053 | * doc/c-cr16.texi: Likewise. | |
1054 | * doc/c-d10v.texi: Likewise. | |
1055 | * doc/c-d30v.texi: Likewise. | |
1056 | * doc/c-h8300.texi: Likewise. | |
1057 | * doc/c-hppa.texi: Likewise. | |
1058 | * doc/c-i370.texi: Likewise. | |
1059 | * doc/c-i386.texi: Likewise. | |
1060 | * doc/c-i860.texi: Likewise. | |
1061 | * doc/c-m32c.texi: Likewise. | |
1062 | * doc/c-m32r.texi: Likewise. | |
1063 | * doc/c-m68hc11.texi: Likewise. | |
1064 | * doc/c-m68k.texi: Likewise. | |
1065 | * doc/c-microblaze.texi: Likewise. | |
1066 | * doc/c-mips.texi: Likewise. | |
1067 | * doc/c-msp430.texi: Likewise. | |
1068 | * doc/c-mt.texi: Likewise. | |
1069 | * doc/c-s390.texi: Likewise. | |
1070 | * doc/c-score.texi: Likewise. | |
1071 | * doc/c-sh.texi: Likewise. | |
1072 | * doc/c-sh64.texi: Likewise. | |
1073 | * doc/c-tic54x.texi: Likewise. | |
1074 | * doc/c-tic6x.texi: Likewise. | |
1075 | * doc/c-v850.texi: Likewise. | |
1076 | * doc/c-xc16x.texi: Likewise. | |
1077 | * doc/c-xgate.texi: Likewise. | |
1078 | * doc/c-xtensa.texi: Likewise. | |
1079 | * doc/c-z80.texi: Likewise. | |
1080 | * doc/internals.texi: Likewise. | |
1081 | ||
4c665b71 RM |
1082 | 2013-01-10 Roland McGrath <mcgrathr@google.com> |
1083 | ||
1084 | * hash.c (hash_new_sized): Make it global. | |
1085 | * hash.h: Declare it. | |
1086 | * macro.c (define_macro): Use hash_new_sized instead of hash_new, | |
1087 | pass a small size. | |
1088 | ||
a3c62988 NC |
1089 | 2013-01-10 Will Newton <will.newton@imgtec.com> |
1090 | ||
1091 | * Makefile.am: Add Meta. | |
1092 | * Makefile.in: Regenerate. | |
1093 | * config/tc-metag.c: New file. | |
1094 | * config/tc-metag.h: New file. | |
1095 | * configure.tgt: Add Meta. | |
1096 | * doc/Makefile.am: Add Meta. | |
1097 | * doc/Makefile.in: Regenerate. | |
1098 | * doc/all.texi: Add Meta. | |
1099 | * doc/as.texiinfo: Document Meta options. | |
1100 | * doc/c-metag.texi: New file. | |
1101 | ||
b37df7c4 SE |
1102 | 2013-01-09 Steve Ellcey <sellcey@mips.com> |
1103 | ||
1104 | * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal | |
1105 | calls. | |
1106 | * config/tc-mips.c (internalError): Remove, replace with abort. | |
1107 | ||
a3251895 YZ |
1108 | 2013-01-08 Yufeng Zhang <yufeng.zhang@arm.com> |
1109 | ||
1110 | * config/tc-aarch64.c (parse_operands): Change to compare the result | |
1111 | of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'. | |
1112 | ||
8ab8155f NC |
1113 | 2013-01-07 Nick Clifton <nickc@redhat.com> |
1114 | ||
1115 | PR gas/14887 | |
1116 | * config/tc-arm.c (skip_past_char): Skip whitespace before the | |
1117 | anticipated character. | |
1118 | * config/tc-arm.c (parse_address_main): Delete skip of whitespace | |
1119 | here as it is no longer needed. | |
1120 | ||
a4ac1c42 AS |
1121 | 2013-01-06 Andreas Schwab <schwab@linux-m68k.org> |
1122 | ||
1123 | * doc/c-mips.texi (MIPS Opts): Fix use of @itemx. | |
1124 | * doc/c-score.texi (SCORE-Opts): Likewise. | |
1125 | * doc/c-tic54x.texi (TIC54X-Directives): Likewise. | |
1126 | ||
e407c74b NC |
1127 | 2013-01-04 Juergen Urban <JuergenUrban@gmx.de> |
1128 | ||
1129 | * config/tc-mips.c: Add support for MIPS r5900. | |
1130 | Add M_LQ_AB and M_SQ_AB to support large values for instructions | |
1131 | lq and sq. | |
1132 | (can_swap_branch_p, get_append_method): Detect some conditional | |
1133 | short loops to fix a bug on the r5900 by NOP in the branch delay | |
1134 | slot. | |
1135 | (M_MUL): Support 3 operands in multu on r5900. | |
1136 | (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I. | |
1137 | (s_mipsset): Force 32 bit floating point on r5900. | |
1138 | (mips_ip): Check parameter range of instructions mfps and mtps on | |
1139 | r5900. | |
1140 | * configure.in: Detect CPU type when target string contains r5900 | |
1141 | (e.g. mips64r5900el-linux-gnu). | |
1142 | ||
62658407 L |
1143 | 2013-01-02 H.J. Lu <hongjiu.lu@intel.com> |
1144 | ||
1145 | * as.c (parse_args): Update copyright year to 2013. | |
1146 | ||
95830fd1 YZ |
1147 | 2013-01-02 Yufeng Zhang <yufeng.zhang@arm.com> |
1148 | ||
1149 | * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53" | |
1150 | and "cortex57". | |
1151 | ||
517bb291 | 1152 | 2013-01-02 Nick Clifton <nickc@redhat.com> |
d709e4e6 | 1153 | |
517bb291 NC |
1154 | PR gas/14987 |
1155 | * config/tc-arm.c (parse_address_main): Skip whitespace before a | |
1156 | closing bracket. | |
d709e4e6 | 1157 | |
517bb291 | 1158 | For older changes see ChangeLog-2012 |
08d56133 | 1159 | \f |
517bb291 | 1160 | Copyright (C) 2013 Free Software Foundation, Inc. |
752937aa NC |
1161 | |
1162 | Copying and distribution of this file, with or without modification, | |
1163 | are permitted in any medium without royalty provided the copyright | |
1164 | notice and this notice are preserved. | |
1165 | ||
08d56133 NC |
1166 | Local Variables: |
1167 | mode: change-log | |
1168 | left-margin: 8 | |
1169 | fill-column: 74 | |
1170 | version-control: never | |
1171 | End: |