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* dwarf2read.c (lookup_dwo_cutu): Change missing DWO complaint to
[thirdparty/binutils-gdb.git] / gas / ChangeLog
CommitLineData
7fa9fcb6
TG		 12013-07-24 Tristan Gingold <gingold@adacore.com>
2
3 * config/tc-ppc.c (md_apply_fix): Adjust BFD_RELOC_PPC_B16 on
4 xcoff targets.
5
614eb277
AK		 62013-07-24 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
7
8 * config/tc-s390.c (s390_machine): Don't force the .machine
9 argument to lower case.
10
e673710a
KT		 112013-07-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
12
13 * config/tc-arm.c (s_arm_arch_extension): Improve error message
14 for invalid extension.
15
69091a2c
YZ		 162013-07-19 Yufeng Zhang <yufeng.zhang@arm.com>
17
18 * config/tc-aarch64.c (enum aarch64_abi_type): New enumeration tag.
19 (AARCH64_ABI_LP64, AARCH64_ABI_ILP32): New enumerators.
20 (aarch64_abi): New variable.
21 (ilp32_p): Change to be a macro.
22 (aarch64_opts): Remove the support for option -milp32 and -mlp64.
23 (struct aarch64_option_abi_value_table): New struct.
24 (aarch64_abis): New table.
25 (aarch64_parse_abi): New function.
26 (aarch64_long_opts): Add entry for -mabi=.
27 * doc/as.texinfo (Target AArch64 options): Document -mabi.
28 * doc/c-aarch64.texi: Likewise.
29
faf786e6
NC		 302013-07-18 Jim Thomas <thomas@cfht.hawaii.edu>
31
32 * config/tc-i386-intel.c (i386_intel_operand): Fixed signed vs
33 unsigned comparison.
34
f0c00282
NC		 352013-07-18 Sandeep Kumar Singh <Sandeep.Singh2@kpitcummins.com>
36
37 * config/rx-defs.h: Add macros for RX100, RX200, RX600, and
38 RX610.
39 * config/rx-parse.y: (rx_check_float_support): Add function to
40 check floating point operation support for target RX100 and
41 RX200.
42 * config/tc-rx.c: Add CPU options RX100, RX200, RX600, and RX610.
43 * doc/c-rx.texi: Add -mcpu option to recognize macros for RX100,
44 RX200, RX600, and RX610
45
8c997c27
NC		 462013-07-18 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
47
48 * config/tc-avr.c (md_show_usage): Add avrxmega2 to help text
49
8be59acb
NC		 502013-07-18 Vishnu K.S <vishnu.k_s@atmel.com>
51
52 * config/tc-avr.c: Make ata6289's ISA to AVR_ISA_AVR4.
53 * doc/c-avr.texi: Likewise.
54
4a06e5a2
RS		 552013-07-15 Richard Sandiford <rdsandiford@googlemail.com>
56
57 * config/tc-mips.c (match_save_restore_list_operand): Avoid -Wformat
58 error with older GCCs.
59 (mips16_macro_build): Dereference args.
60
a92713e6
RS		 612013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
62
63 * config/tc-mips.c (mips_prefer_vec_regno, mips_parse_register):
64 New functions, split out from...
65 (reg_lookup): ...here. Remove itbl support.
66 (reglist_lookup): Delete.
67 (mips_operand_token_type): New enum.
68 (mips_operand_token): New structure.
69 (mips_operand_tokens): New variable.
70 (mips_add_token, mips_parse_base_start, mips_parse_argument_token)
71 (mips_parse_arguments): New functions.
72 (md_begin): Initialize mips_operand_tokens.
73 (mips_arg_info): Add a token field. Remove optional_reg field.
74 (match_char, match_expression): New functions.
75 (match_const_int): Use match_expression. Remove "s" argument
76 and return a boolean result. Remove O_register handling.
77 (match_regno, match_reg, match_reg_range): New functions.
78 (match_int_operand, match_mapped_int_operand, match_msb_operand)
79 (match_reg_operand, match_reg_pair_operand, match_perf_reg_operand)
80 (match_addiusp_operand, match_clo_clz_dest_operand)
81 (match_lwm_swm_list_operand, match_entry_exit_operand)
82 (match_save_restore_list_operand, match_mdmx_imm_reg_operand)
83 (match_tied_reg_operand): Remove "s" argument and return a boolean
84 result. Match tokens rather than text. Update calls to
85 match_const_int. Rely on match_regno to call check_regno.
86 (match_pcrel_operand, match_pc_operand): Replace "s" argument with
87 "arg" argument. Return a boolean result.
88 (parse_float_constant): Replace with...
89 (match_float_constant): ...this new function.
90 (match_operand): Remove "s" argument and return a boolean result.
91 Update calls to subfunctions.
92 (mips_ip, mips16_ip): Call mips_parse_arguments. Use match routines
93 rather than string-parsing routines. Update handling of optional
94 registers for token scheme.
95
89565f1b
RS		 962013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
97
98 * config/tc-mips.c (parse_float_constant): Split out from...
99 (mips_ip): ...here.
100
3c14a432
RS		 1012013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
102
103 * config/tc-mips.c (INSERT_BITS, INSERT_OPERAND, MIPS16_INSERT_OPERAND):
104 Delete.
105
364215c8
RS		 1062013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
107
108 * config/tc-mips.c (mips32_to_16_reg_map): Delete.
109 (match_entry_exit_operand): New function.
110 (match_save_restore_list_operand): Likewise.
111 (match_operand): Use them.
112 (check_absolute_expr): Delete.
113 (mips16_ip): Rewrite main parsing loop to use mips_operands.
114
9e12b7a2
RS		 1152013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
116
117 * config/tc-mips.c: Enable functions commented out in previous patch.
118 (SKIP_SPACE_TABS): Move further up file.
119 (mips32_to_micromips_reg_b_map, mips32_to_micromips_reg_c_map)
120 (mips32_to_micromips_reg_d_map, mips32_to_micromips_reg_e_map)
121 (ips32_to_micromips_reg_f_map, mips32_to_micromips_reg_g_map)
122 (mips32_to_micromips_reg_l_map, mips32_to_micromips_reg_m_map)
123 (mips32_to_micromips_reg_q_map, mips32_to_micromips_reg_n_map)
124 (micromips_imm_b_map, micromips_imm_c_map): Delete.
125 (mips_lookup_reg_pair): Delete.
126 (macro): Use report_bad_range and report_bad_field.
127 (mips_immed, expr_const_in_range): Delete.
128 (mips_ip): Rewrite main parsing loop to use new functions.
129
a1d78564
RS		 1302013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
131
132 * config/tc-mips.c (mips_oddfpreg_ok): Move further up file.
133 Change return type to bfd_boolean.
134 (report_bad_range, report_bad_field): New functions.
135 (mips_arg_info): New structure.
136 (match_const_int, convert_reg_type, check_regno, match_int_operand)
137 (match_mapped_int_operand, match_msb_operand, match_reg_operand)
138 (match_reg_pair_operand, match_pcrel_operand, match_perf_reg_operand)
139 (match_addiusp_operand, match_clo_clz_dest_operand)
140 (match_lwm_swm_list_operand, match_mdmx_imm_reg_operand)
141 (match_pc_operand, match_tied_reg_operand, match_operand)
142 (check_completed_insn): New functions, commented out for now.
143
e077a1c8
RS		 1442013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
145
146 * config/tc-mips.c (insn_insert_operand): New function.
147 (macro_build, mips16_macro_build): Put null character check
148 in the for loop and convert continues to breaks. Use operand
149 structures to handle constant operands.
150
ab902481
RS		 1512013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
152
153 * config/tc-mips.c (validate_mips_insn): Move further up file.
154 Add insn_bits and decode_operand arguments. Use the mips_operand
155 fields to work out which bits an operand occupies. Detect double
156 definitions.
157 (validate_micromips_insn): Move further up file. Call into
158 validate_mips_insn.
159
2f8b73cc
RS		 1602013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
161
162 * config/tc-mips.c (mips16_macro_build): Remove 'Y' case.
163
c8276761
RS		 1642013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
165
166 * config/tc-mips.c (macro_build): Take an int for "C", "k", "\\"
167 and "~".
168 (macro): Update accordingly.
169
77bd4346
RS		 1702013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
171
172 * config/tc-mips.c (imm_expr, imm2_expr, offset_expr): Tweak commentary.
173 (imm_reloc): Delete.
174 (md_assemble): Remove imm_reloc handling.
175 (mips_ip): Update commentary. Use offset_expr and offset_reloc
176 rather than imm_expr and imm_reloc for 'i', 'j' and 'u'.
177 Use a temporary array rather than imm_reloc when parsing
178 constant expressions. Remove imm_reloc initialization.
179 (mips16_ip): Update commentary. Use offset_expr and offset_reloc
180 for the relaxable field. Use a relax_char variable to track the
181 type of this field. Remove imm_reloc initialization.
182
cc537e56
RS		 1832013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
184
185 * config/tc-mips.c (mips16_ip): Handle "I".
186
ba92f887
MR		 1872013-07-12 Maciej W. Rozycki <macro@codesourcery.com>
188
189 * config/tc-mips.c (mips_flag_nan2008): New variable.
190 (options): Add OPTION_NAN enum value.
191 (md_longopts): Handle it.
192 (md_parse_option): Likewise.
193 (s_nan): New function.
194 (mips_elf_final_processing): Handle EF_MIPS_NAN2008.
195 (md_show_usage): Add -mnan.
196
197 * doc/as.texinfo (Overview): Add -mnan.
198 * doc/c-mips.texi (MIPS Opts): Document -mnan.
199 (MIPS NaN Encodings): New node. Document .nan directive.
200 (MIPS-Dependent): List the new node.
201
c1094734
TG		 2022013-07-09 Tristan Gingold <gingold@adacore.com>
203
204 * configure.com: Define HAVE_SYS_TYPES_H and HAVE_UNISTD_H
205
0cbbe1b8
RS		 2062013-07-08 Richard Sandiford <rdsandiford@googlemail.com>
207
208 * config/tc-mips.c (mips_ip): Unconditionally parse an expression
209 for 'A' and assume that the constant has been elided if the result
210 is an O_register.
211
f2ae14a1
RS		 2122013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
213
214 * config/tc-mips.c (gprel16_reloc_p): New function.
215 (macro_read_relocs): Assume BFD_RELOC_LO16 if all relocs are
216 BFD_RELOC_UNUSED.
217 (offset_high_part, small_offset_p): New functions.
218 (nacro): Use them. Remove *_OB and *_DOB cases. For single-
219 register load and store macros, handle the 16-bit offset case first.
220 If a 16-bit offset is not suitable for the instruction we're
221 generating, load it into the temporary register using
222 ADDRESS_ADDI_INSN. Make the M_LI_DD code fall through into the
223 M_L_DAB code once the address has been constructed. For double load
224 and store macros, again handle the 16-bit offset case first.
225 If the second register cannot be accessed from the same high
226 part as the first, load it into AT using ADDRESS_ADDI_INSN.
227 Fix the handling of LD in cases where the first register is the
228 same as the base. Also handle the case where the offset is
229 not 16 bits and the second register cannot be accessed from the
230 same high part as the first. For unaligned loads and stores,
231 fuse the offbits == 12 and old "ab" handling. Apply this handling
232 whenever the second offset needs a different high part from the first.
233 Construct the offset using ADDRESS_ADDI_INSN where possible,
234 for offbits == 16 as well as offbits == 12. Use offset_reloc
235 when constructing the individual loads and stores.
236 (mips_ip): Set up imm_expr, imm2_expr, offset_expr, imm_reloc
237 and offset_reloc before matching against a particular opcode.
238 Handle elided 'A' constants. Allow 'A' constants to use
239 relocation operators.
240
5c324c16
RS		 2412013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
242
243 * config/tc-mips.c (validate_mips_insn): Remove "[" and "]" handling.
244 (mips_ip): Likewise. Do not set is_mdmx for INSN_5400 instructions.
245 Check constraints on the VR5400 RZU.OB, SLL.OB and SRL.OB instructions.
246
23e69e47
RS		 2472013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
248
249 * config/tc-mips.c (mips_ip): Preserve the real bit number for "+p".
250 Require the msb to be <= 31 for "+s". Check that the size is <= 31
251 for both "+s" and "+S".
252
27c5c572
RS		 2532013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
254
255 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn):
256 (mips_ip, mips16_ip): Handle "+i".
257
e76ff5ab
RS		 2582013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
259
260 * config/tc-mips.c (mips32_to_micromips_reg_h_map): Delete.
261 (micromips_to_32_reg_h_map): Rename to...
262 (micromips_to_32_reg_h_map1): ...this.
263 (micromips_to_32_reg_i_map): Rename to...
264 (micromips_to_32_reg_h_map2): ...this.
265 (mips_lookup_reg_pair): New function.
266 (gpr_write_mask, macro): Adjust after above renaming.
267 (validate_micromips_insn): Remove "mi" handling.
268 (mips_ip): Likewise. Parse both registers in a pair for "mh".
269
fa7616a4
RS		 2702013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
271
272 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn)
273 (mips_ip): Remove "+D" and "+T" handling.
274
fb798c50
AK		 2752013-07-05 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
276
277 * config/tc-s390.c (md_gather_operands, md_apply_fix): Support new
278 relocs.
279
2c0a3565
MS		 2802013-07-03 Marcus Shawcroft <marcus.shawcroft@arm.com>
281
4aa2c5e2
MS		 282 * config/tc-aarch64.c (reloc_table): Merge got_prel19 into got.
283
2842013-07-02 Marcus Shawcroft <marcus.shawcroft@arm.com>
285
2c0a3565
MS		 286 * config/tc-aarch64.c (md_apply_fix): Reorder case values.
287 (aarch64_force_relocation): Likewise.
288
f40da81b
AM		 2892013-07-02 Alan Modra <amodra@gmail.com>
290
291 * config/tc-ppc.c (ppc_elf_adjust_symtab): Don't make .TOC. weak.
292
81566a9b
MR		 2932013-06-26 Maciej W. Rozycki <macro@codesourcery.com>
294
295 * doc/as.texinfo (Overview): Remove @samp from MIPS ISA names.
296 * doc/c-mips.texi (MIPS Options): Remove @sc from MIPS ISA names.
297 Replace @sc{mips16} with literal `MIPS16'.
298 (MIPS ISA): Replace @sc{mips3} with literal `MIPS III'.
299
a6bb11b2
YZ		 3002013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
301
302 * config/tc-aarch64.c (reloc_table): Replace
303 BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with
304 BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to
305 BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and
306 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC.
307 (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC,
308 BFD_RELOC_AARCH64_LD32_GOT_LO12_NC,
309 BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC,
310 BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC,
311 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and
312 BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC.
313 (aarch64_force_relocation): Likewise.
314
cec5225b
YZ		 3152013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
316
317 * config/tc-aarch64.c (ilp32_p): New static variable.
318 (elf64_aarch64_target_format): Return the target according to the
319 value of 'ilp32_p'.
320 (md_begin): Determine 'mach' according to the value of 'ilp32_p'.
321 (aarch64_opts): Add support for options '-milp32' and '-mlp64'.
322 (aarch64_dwarf2_addr_size): New function.
323 * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration.
324 (DWARF2_ADDR_SIZE): New define.
325
e335d9cb
RS		 3262013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
327
328 * doc/c-mips.texi: Use ISA instead of @sc{isa}.
329
18870af7
RS		 3302013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
331
332 * config/tc-mips.c (validate_mips_insn): Use STYPE rather than SHAMT.
333
833794fc
MR		 3342013-06-25 Maciej W. Rozycki <macro@codesourcery.com>
335
336 * config/tc-mips.c (mips_set_options): Add insn32 member.
337 (mips_opts): Initialize it.
338 (NOP_INSN, NOP_INSN_SIZE): Handle insn32 mode.
339 (options): Add OPTION_INSN32 and OPTION_NO_INSN32 enum values.
340 (md_longopts): Add "minsn32" and "mno-insn32" options.
341 (is_size_valid): Handle insn32 mode.
342 (md_assemble): Pass instruction string down to macro.
343 (brk_fmt): Add second dimension and insn32 mode initializers.
344 (mfhl_fmt): Likewise.
345 (BRK_FMT, MFHL_FMT): Handle insn32 mode.
346 (macro_build) <'c'>: Handle microMIPS 32-bit BREAK encoding.
347 (macro_build_jalr, move_register): Handle insn32 mode.
348 (macro_build_branch_rs): Likewise.
349 (macro): Handle insn32 mode.
350 <M_JRADDIUSP>, <M_JRC>, <M_MOVEP>: New cases.
351 (mips_ip): Handle insn32 mode.
352 (md_parse_option): Handle OPTION_INSN32 and OPTION_NO_INSN32.
353 (s_mipsset): Handle "insn32" and "noinsn32" pseudo-ops.
354 (mips_handle_align): Handle insn32 mode.
355 (md_show_usage): Add -minsn32 and -mno-insn32.
356
357 * doc/as.texinfo (Target MIPS options): Add -minsn32 and
358 -mno-insn32 options.
359 (-minsn32, -mno-insn32): New options.
360 * doc/c-mips.texi (MIPS Opts): Add -minsn32 and -mno-insn32
361 options.
362 (MIPS assembly options): New node. Document .set insn32 and
363 .set noinsn32.
364 (MIPS-Dependent): List the new node.
365
d1706f38
NC		 3662013-06-25 Nick Clifton <nickc@redhat.com>
367
368 * config/tc-msp430.c (msp430_srcoperand): Do not allow the use of
369 the PC in indirect addressing on 430xv2 parts.
370 (msp430_operands): Add version test to hardware bug encoding
371 restrictions.
372
477330fc
RM		 3732013-06-24 Roland McGrath <mcgrathr@google.com>
374
d996d970
RM		 375 * config/tc-arm.c (parse_reg_list): Use skip_past_char for '}',
376 so it skips whitespace before it.
377 (s_arm_unwind_save_mmxwr, s_arm_unwind_save_mmxwcg): Likewise.
378
477330fc
RM		 379 * config/tc-arm.c (arm_symbol_chars): Include '{' and '}'.
380 (arm_reg_parse_multi): Skip whitespace first.
381 (parse_reg_list): Likewise.
382 (parse_vfp_reg_list): Likewise.
383 (s_arm_unwind_save_mmxwcg): Likewise.
384
24382199
NC		 3852013-06-24 Nick Clifton <nickc@redhat.com>
386
387 PR gas/15623
388 * config/tc-arm.c (do_t_smc): Mark as ending an IT block.
389
c3678916
RS		 3902013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
391
392 * config/tc-mips.c (mips_ip): Fix swapped bit numbers in comments.
393
42429eac
RS		 3942013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
395
396 * config/tc-mips.c: Assert that offsetT and valueT are at least
397 8 bytes in size.
398 (GPR_SMIN, GPR_SMAX): New macros.
399 (macro, mips_ip): Remove code for 4-byte valueT and offsetT.
400
f3ded42a
RS		 4012013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
402
403 * config/tc-mips.c: Remove OBJ_ELF, OBJ_MAYBE_ELF and IS_ELF
404 conditions. Remove any code deselected by them.
405 (s_mips_frame, s_mips_mask): Handle ECOFF_DEBUGGING case first.
406
e8044f35
RS		 4072013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
408
409 * NEWS: Note removal of ECOFF support.
410 * doc/as.texinfo (--emulation): Update for the removal of MIPS ECOFF.
411 * Makefile.am (TARG_ENV_HFILES): Remove config/te-lnews.h.
412 (MULTI_CFILES): Remove config/e-mipsecoff.c.
413 * Makefile.in: Regenerate.
414 * configure.in: Remove MIPS ECOFF references.
415 (mips-sony-bsd*, mips-*-bsd*, mips-*-lnews*-ecoff, mips-*-*-ecoff):
416 Delete cases.
417 (mips-*-irix5*-*, mips*-*-linux*-*, mips*-*-freebsd*)
418 (mips*-*-kfreebsd*-gnu, mips-*-*-elf): Fold into...
419 (mips-*-*): ...this single case.
420 (mipsbecoff, mipslecoff, mipsecoff): Remove emulations. Expect
421 MIPS emulations to be e-mipself*.
422 * configure: Regenerate.
423 * configure.tgt (mips-sony-bsd*, mips-*-ultrix*, mips-*-osf*)
424 (mips-*-ecoff*, mips-*-pe*, mips-*-irix*, ips-*-lnews*, mips-*-riscos*)
425 (mips-*-sysv*): Remove coff and ecoff cases.
426 * as.c (mipsbecoff, mipslecoff, mipsecoff): Remove.
427 * ecoff.c: Remove reference to MIPS ECOFF.
428 * config/e-mipsecoff.c, config/te-lnews.h: Delete files.
429 * config/tc-mips.c (ECOFF_LITTLE_FORMAT): Delete.
430 (RDATA_SECTION_NAME, mips_target_form): Remove COFF and ECOFF cases.
431 (mips_hi_fixup): Tweak comment.
432 (append_insn): Require a howto.
433 (mips_after_parse_args): Remove OBJ_MAYBE_ECOFF code.
434
98508b2a
RS		 4352013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
436
437 * doc/as.texinfo: Use MIPS rather than @sc{mips} throughout.
438 Use "CPU" instead of "cpu".
439 * doc/c-mips.texi: Likewise.
440 (MIPS Opts): Rename to MIPS Options.
441 (MIPS option stack): Rename to MIPS Option Stack.
442 (MIPS ASE instruction generation overrides): Rename to
443 MIPS ASE Instruction Generation Overrides (for now).
444 (MIPS floating-point): Rename to MIPS Floating-Point.
445
fc16f8cc
RS		 4462013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
447
448 * doc/c-mips.texi (MIPS Macros): New section.
449 (MIPS Object): Replace with...
450 (MIPS Small Data): ...this new section.
451
5a7560b5
RS		 4522013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
453
454 * doc/c-mips.texi (MIPS symbol sizes): Move section further up file.
455 Capitalize name. Use @kindex instead of @cindex for .set entries.
456
a1b86ab7
RS		 4572013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
458
459 * doc/c-mips.texi (MIPS Stabs): Remove section.
460
c6278170
RS		 4612013-06-20 Richard Sandiford <rdsandiford@googlemail.com>
462
463 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS, ISA_SUPPORTS_DSP_ASE)
464 (ISA_SUPPORTS_DSP64_ASE, ISA_SUPPORTS_DSPR2_ASE, ISA_SUPPORTS_EVA_ASE)
465 (ISA_SUPPORTS_MT_ASE, ISA_SUPPORTS_MCU_ASE, ISA_SUPPORTS_VIRT_ASE)
466 (ISA_SUPPORTS_VIRT64_ASE): Delete.
467 (mips_ase): New structure.
468 (mips_ases): New table.
469 (FP64_ASES): New macro.
470 (mips_ase_groups): New array.
471 (mips_isa_rev, mips_ase_mask, mips_check_isa_supports_ase)
472 (mips_check_isa_supports_ases, mips_set_ase, mips_lookup_ase): New
473 functions.
474 (is_opcode_valid): Use mips_ases to get the 64-bit ASE flags.
475 (md_parse_option): Use mips_ases and mips_set_ase instead of
476 separate case statements for each ASE option.
477 (mips_after_parse_args): Use FP64_ASES. Use
478 mips_check_isa_supports_ases to check the ASEs against
479 other options.
480 (s_mipsset): Use mips_ases and mips_set_ase instead of
481 separate if statements for each ASE option. Use
482 mips_check_isa_supports_ases, even when a non-ASE option
483 is specified.
484
63a4bc21
KT		 4852013-06-19 Greta Yorsh <Greta.Yorsh@arm.com>
486
487 * config/tc-arm.c (arm_cpus): Add support for Cortex-A12.
488
c31f3936
RS		 4892013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
490
491 * config/tc-mips.c (md_shortopts, options, md_longopts)
492 (md_longopts_size): Move earlier in file.
493
846ef2d0
RS		 4942013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
495
496 * config/tc-mips.c (mips_set_options): Replace separate "ase_*" fields
497 with a single "ase" bitmask.
498 (mips_opts): Update accordingly.
499 (file_ase, file_ase_explicit): New variables.
500 (file_ase_mips3d, file_ase_mdmx, file_ase_smartmips, file_ase_dsp)
501 (file_ase_dspr2, file_ase_eva, file_ase_mt, file_ase_virt): Delete.
502 (ISA_HAS_ROR): Adjust for mips_set_options change.
503 (is_opcode_valid): Take the base ase mask directly from mips_opts.
504 (mips_ip): Adjust for mips_set_options change.
505 (md_parse_option): Likewise. Update file_ase_explicit.
506 (mips_after_parse_args): Adjust for mips_set_options change.
507 Use bitmask operations to select the default ASEs. Set file_ase
508 rather than individual per-ASE variables.
509 (s_mipsset): Adjust for mips_set_options change.
510 (mips_elf_final_processing): Test file_ase rather than
511 file_ase_mdmx. Remove commented-out code.
512
d16afab6
RS		 5132013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
514
515 * config/tc-mips.c (mips_cpu_info): Add an "ase" field.
516 (MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, MIPS_CPU_ASE_MT)
517 (MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX, MIPS_CPU_ASE_DSPR2)
518 (MIPS_CPU_ASE_MCU, MIPS_CPU_ASE_VIRT, MIPS_CPU_ASE_EVA): Delete.
519 (mips_after_parse_args): Use the new "ase" field to choose
520 the default ASEs.
521 (mips_cpu_info_table): Move ASEs from the "flags" field to the
522 "ase" field.
523
e83a675f
RE		 5242013-06-18 Richard Earnshaw <rearnsha@arm.com>
525
526 * config/tc-arm.c (symbol_preemptible): New function.
527 (relax_branch): Use it.
528
7f3c4072
CM		 5292013-06-17 Catherine Moore <clm@codesourcery.com>
530 Maciej W. Rozycki <macro@codesourcery.com>
531 Chao-Ying Fu <fu@mips.com>
532
533 * config/tc-mips.c (mips_set_options): Add ase_eva.
534 (mips_set_options mips_opts): Add ase_eva.
535 (file_ase_eva): Declare.
536 (ISA_SUPPORTS_EVA_ASE): Define.
537 (IS_SEXT_9BIT_NUM): Define.
538 (MIPS_CPU_ASE_EVA): Define.
539 (is_opcode_valid): Add support for ase_eva.
540 (macro_build): Likewise.
541 (macro): Likewise.
542 (validate_mips_insn): Likewise.
543 (validate_micromips_insn): Likewise.
544 (mips_ip): Likewise.
545 (options): Add OPTION_EVA and OPTION_NO_EVA.
546 (md_longopts): Add -meva and -mno-eva.
547 (md_parse_option): Process new options.
548 (mips_after_parse_args): Check for valid EVA combinations.
549 (s_mipsset): Likewise.
550
e410add4
RS		 5512013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
552
553 * dwarf2dbg.h (dwarf2_move_insn): Declare.
554 * dwarf2dbg.c (line_subseg): Add pmove_tail.
555 (get_line_subseg): Add create_p argument. Initialize pmove_tail.
556 (dwarf2_gen_line_info_1): Update call accordingly.
557 (dwarf2_move_insn): New function.
558 * config/tc-mips.c (append_insn): Use dwarf2_move_insn.
559
6a50d470
RS		 5602013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
561
562 Revert:
563
564 2011-09-05 Richard Sandiford <rdsandiford@googlemail.com>
565
566 PR gas/13024
567 * dwarf2dbg.c (pending_lines, pending_lines_tail): New variables.
568 (dwarf2_gen_line_info_1): Delete.
569 (dwarf2_push_line, dwarf2_flush_pending_lines): New functions.
570 (dwarf2_gen_line_info, dwarf2_emit_label): Use them.
571 (dwarf2_consume_line_info): Call dwarf2_flush_pending_lines.
572 (dwarf2_directive_loc): Push previous .locs instead of generating
573 them immediately.
574
f122319e
CF		 5752013-06-13 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
576
577 * config/tc-mips.c (ISA_SUPPORTS_VIRT_ASE): Support micromips.
578 (ISA_SUPPORTS_VIRT64_ASE): Support 64-bit micromips.
579
909c7f9c
NC		 5802013-06-13 Nick Clifton <nickc@redhat.com>
581
582 PR gas/15602
583 * config/tc-m68k.h (TC_CHECK_ADJUSTED_BROKEN_DOT_WORD): Define.
584 * config/tc-m68k.c (tc_m68k_check_adjusted_broken_word): New
585 function. Generates an error if the adjusted offset is out of a
586 16-bit range.
587
5d5755a7
SL		 5882013-06-12 Sandra Loosemore <sandra@codesourcery.com>
589
590 * config/tc-nios2.c (md_apply_fix): Mask constant
591 BFD_RELOC_NIOS2_HIADJ16 value to 16 bits.
592
3bf0dbfb
MR		 5932013-06-10 Maciej W. Rozycki <macro@codesourcery.com>
594
595 * config/tc-mips.c (append_insn): Don't do branch relaxation for
596 MIPS-3D instructions either.
597 (md_convert_frag): Update the COPx branch mask accordingly.
598
599 * config/tc-mips.c (md_show_usage): Document --[no-]relax-branch
600 option.
601 * doc/as.texinfo (Overview): Add --relax-branch and
602 --no-relax-branch.
603 * doc/c-mips.texi (MIPS Opts): Document --relax-branch and
604 --no-relax-branch.
605
9daf7bab
SL		 6062013-06-09 Sandra Loosemore <sandra@codesourcery.com>
607
608 * config/tc-nios2.c (nios2_parse_args): Allow trap argument to
609 omitted.
610
d301a56b
RS		 6112013-06-08 Catherine Moore <clm@codesourcery.com>
612
613 * config/tc-mips.c (is_opcode_valid): Build ASE mask.
614 (is_opcode_valid_16): Pass ase value to opcode_is_member.
615 (append_insn): Change INSN_xxxx to ASE_xxxx.
616
7bab7634
DC		 6172013-06-01 George Thomas <george.thomas@atmel.com>
618
619 * gas/config/tc-avr.c: Change ISA for devices with USB support to
620 AVR_ISA_XMEGAU
621
f60cf82f
L		 6222013-05-31 H.J. Lu <hongjiu.lu@intel.com>
623
624 * config/tc-i386.c (md_begin): Don't align text/data/bss sections
625 for ELF.
626
a3f278e2
CM		 6272013-05-31 Paul Brook <paul@codesourcery.com>
628
629 gas/
630 * config/tc-mips.c (s_ehword): New.
631
067ec077
CM		 6322013-05-30 Paul Brook <paul@codesourcery.com>
633
634 * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH.
635
d6101ac2
MR		 6362013-05-29 Maciej W. Rozycki <macro@codesourcery.com>
637
638 * write.c (resolve_reloc_expr_symbols): On REL targets don't
639 convert relocs who have no relocatable field either. Rephrase
640 the conditional so that the PC-relative check is only applied
641 for REL targets.
642
f19ccbda
MR		 6432013-05-28 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
644
645 * config/tc-mips.c (macro) <ld>: Don't use $zero for address
646 calculation.
647
418009c2
YZ		 6482013-05-28 Yufeng Zhang <yufeng.zhang@arm.com>
649
650 * config/tc-aarch64.c (reloc_table): Update to use
477330fc 651 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of
418009c2
YZ		 652 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE.
653 (md_apply_fix): Likewise.
654 (aarch64_force_relocation): Likewise.
655
0a8897c7
KT		 6562013-05-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
657
658 * config/tc-arm.c (it_fsm_post_encode): Improve
659 warning messages about deprecated IT block formats.
660
89d2a2a3
MS		 6612013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com>
662
663 * config/tc-aarch64.c (md_apply_fix): Move value range checking
664 inside fx_done condition.
665
c77c0862
RS		 6662013-05-22 Jürgen Urban <JuergenUrban@gmx.de>
667
668 * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB.
669
c0637f3a
PB		 6702013-05-20 Peter Bergner <bergner@vnet.ibm.com>
671
672 * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error
673 and clean up warning when using PRINT_OPCODE_TABLE.
674
5656a981
AM		 6752013-05-20 Alan Modra <amodra@gmail.com>
676
677 * config/tc-ppc.c (md_apply_fix): Hoist code common to insn
678 and data fixups performing shift/high adjust/sign extension on
679 fieldval. Sink fx_pcrel handling and checks. Use fixP->fx_size
680 when writing data fixups rather than recalculating size.
681
997b26e8
JBG		 6822013-05-16 Jan-Benedict Glaw <jbglaw@lug-owl.de>
683
684 * doc/c-msp430.texi: Fix typo.
685
9f6e76f4
TG		 6862013-05-16 Tristan Gingold <gingold@adacore.com>
687
688 * config/tc-ppc.c (ppc_is_toc_sym): Symbols of class XMC_TC
689 are also TOC symbols.
690
638d3803
NC		 6912013-05-16 Nick Clifton <nickc@redhat.com>
692
693 * config/tc-msp430.c: Make -mmcu recognise more part numbers.
694 Add -mcpu command to specify core type.
997b26e8 695 * doc/c-msp430.texi: Update documentation.
638d3803 696
b015e599
AP		 6972013-05-09 Andrew Pinski <apinski@cavium.com>
698
699 * config/tc-mips.c (struct mips_set_options): New ase_virt field.
700 (mips_opts): Update for the new field.
701 (file_ase_virt): New variable.
702 (ISA_SUPPORTS_VIRT_ASE): New macro.
703 (ISA_SUPPORTS_VIRT64_ASE): New macro.
704 (MIPS_CPU_ASE_VIRT): New define.
705 (is_opcode_valid): Handle ase_virt.
706 (macro_build): Handle "+J".
707 (validate_mips_insn): Likewise.
708 (mips_ip): Likewise.
709 (enum options): Add OPTION_VIRT and OPTION_NO_VIRT.
710 (md_longopts): Add mvirt and mnovirt
711 (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT.
712 (mips_after_parse_args): Handle ase_virt field.
713 (s_mipsset): Handle "virt" and "novirt".
714 (mips_elf_final_processing): Add a comment about virt ASE might need
715 a new flag.
716 (md_show_usage): Print out the usage of -mvirt and mno-virt options.
717 * doc/c-mips.texi: Document -mvirt and -mno-virt.
718 Document ".set virt" and ".set novirt".
719
da8094d7
AM		 7202013-05-09 Alan Modra <amodra@gmail.com>
721
722 * config/tc-ppc.c (md_apply_fix): Sign extend fieldval under
723 control of operand flag bits.
724
c5f8c205
AM		 7252013-05-07 Alan Modra <amodra@gmail.com>
726
727 * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro.
728 (PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise.
729 (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise.
730 (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise.
731 (md_apply_fix): Set fx_no_overflow for assorted relocations.
732 Shift and sign-extend fieldval for use by some VLE reloc
733 operand->insert functions.
734
b47468a6
CM		 7352013-05-06 Paul Brook <paul@codesourcery.com>
736 Catherine Moore <clm@codesourcery.com>
737
c5f8c205
AM		 738 * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL.
739 (limited_pcrel_reloc_p): Likewise.
b47468a6
CM		 740 (md_apply_fix): Likewise.
741 (tc_gen_reloc): Likewise.
742
2de39019
CM		 7432013-05-06 Richard Sandiford <rdsandiford@googlemail.com>
744
745 * config/tc-mips.c (limited_pcrel_reloc_p): New function.
746 (mips_fix_adjustable): Adjust pc-relative check to use
747 limited_pc_reloc_p.
748
754e2bb9
RS		 7492013-05-02 Richard Sandiford <rdsandiford@googlemail.com>
750
751 * config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries.
752 (s_mips_stab): Do not restrict to stabn only.
753
13761a11
NC		 7542013-05-02 Nick Clifton <nickc@redhat.com>
755
756 * config/tc-msp430.c: Add support for the MSP430X architecture.
757 Add code to insert a NOP instruction after any instruction that
758 might change the interrupt state.
759 Add support for the LARGE memory model.
760 Add code to initialise the .MSP430.attributes section.
761 * config/tc-msp430.h: Add support for the MSP430X architecture.
762 * doc/c-msp430.texi: Document the new -mL and -mN command line
763 options.
764 * NEWS: Mention support for the MSP430X architecture.
765
df26367c
MR		 7662013-05-01 Maciej W. Rozycki <macro@codesourcery.com>
767
768 * configure.tgt: Replace alpha*-*-linuxecoff* pattern with
769 alpha*-*-linux*ecoff*.
770
f02d8318
CF		 7712013-04-30 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
772
773 * config/tc-mips.c (mips_ip): Add sizelo.
774 For "+C", "+G", and "+H", set sizelo and compare against it.
775
b40bf0a2
NC		 7762013-04-29 Nick Clifton <nickc@redhat.com>
777
778 * as.c (Options): Add -gdwarf-sections.
779 (parse_args): Likewise.
780 * as.h (flag_dwarf_sections): Declare.
781 * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes.
782 (process_entries): When -gdwarf-sections is enabled generate
783 fragmentary .debug_line sections.
784 (out_debug_line): Set the section for the .debug_line section end
785 symbol.
786 * doc/as.texinfo: Document -gdwarf-sections.
787 * NEWS: Mention -gdwarf-sections.
788
8eeccb77 7892013-04-26 Christian Groessler <chris@groessler.org>
00a3147e
CG		 790
791 * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdline
792 according to the target parameter. Don't call s_segm since s_segm
793 calls bfd_set_arch_mach using stdoutput, but stdoutput isn't
794 initialized yet.
795 (md_begin): Call s_segm according to target parameter from command
796 line.
797
49926cd0
AM		 7982013-04-25 Alan Modra <amodra@gmail.com>
799
800 * configure.in: Allow little-endian linux.
801 * configure: Regenerate.
802
e3031850
SL		 8032013-04-24 Sandra Loosemore <sandra@codesourcery.com>
804
805 * config/tc-nios2.c (nios2_control_register_arg_p): Rename
806 "fstatus" control register to "eccinj".
807
cb948fc0
KT		 8082013-04-19 Kai Tietz <ktietz@redhat.com>
809
810 * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin.
811
4455e9ad
JB		 8122013-04-15 Julian Brown <julian@codesourcery.com>
813
814 * expr.c (add_to_result, subtract_from_result): Make global.
815 * expr.h (add_to_result, subtract_from_result): Add prototypes.
816 * config/tc-sh.c (sh_optimize_expr): Use add_to_result,
817 subtract_from_result to handle extra bit of precision for .sleb128
818 directive operands.
819
956a6ba3
JB		 8202013-04-10 Julian Brown <julian@codesourcery.com>
821
822 * read.c (convert_to_bignum): Add sign parameter. Use it
823 instead of X_unsigned to determine sign of resulting bignum.
824 (emit_expr): Pass extra argument to convert_to_bignum.
825 (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass
826 X_extrabit to convert_to_bignum.
827 (parse_bitfield_cons): Set X_extrabit.
828 * expr.c (make_expr_symbol, expr_build_uconstant, operand):
829 Initialise X_extrabit field as appropriate.
830 (add_to_result): New.
831 (subtract_from_result): New.
832 (expr): Use above.
833 * expr.h (expressionS): Add X_extrabit field.
834
eb9f3f00
JB		 8352013-04-10 Jan Beulich <jbeulich@suse.com>
836
837 * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base
838 register being PC when is_t or writeback, and use distinct
839 diagnostic for the latter case.
840
ccb84d65
JB		 8412013-04-10 Jan Beulich <jbeulich@suse.com>
842
843 * gas/config/tc-arm.c (parse_operands): Re-write
844 po_barrier_or_imm().
845 (do_barrier): Remove bogus constraint().
846 (do_t_barrier): Remove.
847
4d13caa0
NC		 8482013-04-09 Joerg Wunsch <joerg.wunsch@atmel.com>
849
850 * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2,
851 ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2,
852 ATmega2564RFR2
853 * gas/doc/c-avr.texi (-mmcu documentation): Likewise.
854
16d02dc9
JB		 8552013-04-09 Jan Beulich <jbeulich@suse.com>
856
857 * gas/config/tc-arm.c (do_vmrs): Accept all control registers.
858 Use local variable Rt in more places.
859 (do_vmsr): Accept all control registers.
860
05ac0ffb
JB		 8612013-04-09 Jan Beulich <jbeulich@suse.com>
862
863 * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
864 if there was none specified for moves between scalar and core
865 register.
866
2d51fb74
JB		 8672013-04-09 Jan Beulich <jbeulich@suse.com>
868
869 * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the
870 NEON_ALL_LANES case.
871
94dcf8bf
JB		 8722013-04-08 Jan Beulich <jbeulich@suse.com>
873
874 * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for
875 PC-relative VSTR.
876
1472d06f
JB		 8772013-04-08 Jan Beulich <jbeulich@suse.com>
878
879 * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq
880 entry to sp_fiq.
881
0c76cae8
AM		 8822013-04-03 Alan Modra <amodra@gmail.com>
883
884 * doc/as.texinfo: Add support to generate man options for h8300.
885 * doc/c-h8300.texi: Likewise.
886
92eb40d9
RR		 8872013-03-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
888
889 * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and
890 Cortex-A57.
891
51dcdd4d
NC		 8922013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com>
893
894 PR binutils/15068
895 * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array.
896
c5d685bf
NC		 8972013-03-26 Nick Clifton <nickc@redhat.com>
898
9b978282
NC		 899 PR gas/15295
900 * listing.c (rebuffer_line): Rewrite to avoid seeking back to the
901 start of the file each time.
902
c5d685bf
NC		 903 PR gas/15178
904 * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for
905 FreeBSD targets.
906
9699c833
TG		 9072013-03-26 Douglas B Rupp <rupp@gnat.com>
908
909 * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment
910 after fixup.
911
4755303e
WN		 9122013-03-21 Will Newton <will.newton@linaro.org>
913
914 * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all
915 pc-relative str instructions in Thumb mode.
916
81f5558e
NC		 9172013-03-21 Michael Schewe <michael.schewe@gmx.net>
918
919 * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
920 @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
921 R_H8_DISP32A16.
922 * config/tc-h8300.h: Remove duplicated defines.
923
71863e73
NC		 9242013-03-21 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
925
926 PR gas/15282
927 * tc-avr.c (mcu_has_3_byte_pc): New function.
928 (tc_cfi_frame_initial_instructions): Call it to find return
929 address size.
930
795b8e6b
NC		 9312013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com>
932
933 PR gas/15095
934 * config/tc-tic6x.c (tic6x_try_encode): Handle
935 tic6x_coding_dreg_(msb|lsb) field coding types and use it to
936 encode register pair numbers when required.
937
ba86b375
WN		 9382013-03-15 Will Newton <will.newton@linaro.org>
939
940 * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register
941 in vstr in Thumb mode for pre-ARMv7 cores.
942
9e6f3811
AS		 9432013-03-14 Andreas Schwab <schwab@suse.de>
944
945 * doc/c-arc.texi (ARC Directives): Revert last change and use
946 @itemize instead of @table.
947 * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
948
b10bf8c5
NC		 9492013-03-14 Nick Clifton <nickc@redhat.com>
950
951 PR gas/15273
952 * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a
953 NULL message, instead just check ARM_CPU_IS_ANY directly.
954
ba724cfc
NC		 9552013-03-14 Nick Clifton <nickc@redhat.com>
956
957 PR gas/15212
9e6f3811 958 * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet
ba724cfc
NC		 959 for table format.
960 * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
961 to the @item directives.
962 (ARM-Neon-Alignment): Move to correct place in the document.
963 * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
964 formatting.
965 * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
966 @smallexample.
967
531a94fd
SL		 9682013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
969
970 * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'
971 case. Add default BAD_CASE to switch.
972
dad60f8e
SL		 9732013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
974
975 * config/tc-nios2.c (nios2_assemble_args_ds): New function.
976 (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
977
dd5181d5
KT		 9782013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
979
980 * config/tc-arm.c (crc_ext_armv8): New feature set.
981 (UNPRED_REG): New macro.
982 (do_crc32_1): New function.
983 (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
984 do_crc32ch, do_crc32cw): Likewise.
985 (TUEc): New macro.
986 (insns): Add entries for crc32 mnemonics.
987 (arm_extensions): Add entry for crc.
988
8e723a10
CLT		 9892013-03-08 Chung-Lin Tang <cltang@codesourcery.com>
990
991 * write.h (struct fix): Add fx_dot_frag field.
992 (dot_frag): Declare.
993 * write.c (dot_frag): New variable.
994 (fix_new_internal): Set fx_dot_frag field with dot_frag.
995 (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
996 * expr.c (expr): Save value of frag_now in dot_frag when setting
997 dot_value.
998 * read.c (emit_expr): Likewise. Delete comments.
999
be05d201
L		 10002013-03-07 H.J. Lu <hongjiu.lu@intel.com>
1001
1002 * config/tc-i386.c (flag_code_names): Removed.
1003 (i386_index_check): Rewrote.
1004
62b0d0d5
YZ		 10052013-03-05 Yufeng Zhang <yufeng.zhang@arm.com>
1006
1007 * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
1008 add comment.
1009 (aarch64_double_precision_fmovable): New function.
1010 (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
1011 function; handle hexadecimal representation of IEEE754 encoding.
1012 (parse_operands): Update the call to parse_aarch64_imm_float.
1013
165de32a
L		 10142013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1015
1016 * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
1017 (check_hle): Updated.
1018 (md_assemble): Likewise.
1019 (parse_insn): Likewise.
1020
d5de92cf
L		 10212013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1022
1023 * config/tc-i386.c (_i386_insn): Add rep_prefix.
9e6f3811 1024 (md_assemble): Check if REP prefix is OK.
d5de92cf
L		 1025 (parse_insn): Remove expecting_string_instruction. Set
1026 i.rep_prefix.
1027
e60bb1dd
YZ		 10282013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1029
1030 * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
1031
aeebdd9b
YZ		 10322013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1033
1034 * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
1035 for system registers.
1036
4107ae22
DD		 10372013-02-27 DJ Delorie <dj@redhat.com>
1038
1039 * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
1040 (rl78_op): Handle %code().
1041 (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
1042 (tc_gen_reloc): Likwise; convert to a computed reloc.
1043 (md_apply_fix): Likewise.
1044
151fa98f
NC		 10452013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
1046
1047 * config/rl78-parse.y: Fix encoding of DIVWU insn.
1048
70a8bc5b 10492013-02-25 Terry Guo <terry.guo@arm.com>
1050
1051 * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
1052 * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
1053 list of accepted CPUs.
1054
5c111e37
L		 10552013-02-19 H.J. Lu <hongjiu.lu@intel.com>
1056
1057 PR gas/15159
1058 * config/tc-i386.c (cpu_arch): Add ".smap".
1059
1060 * doc/c-i386.texi: Document smap.
1061
8a75745d
MR		 10622013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1063
1064 * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
1065 mips_assembling_insn appropriately.
1066 (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
1067
79850f26
MR		 10682013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1069
cf29fc61 1070 * config/tc-mips.c (append_insn): Correct indentation, remove
79850f26
MR		 1071 extraneous braces.
1072
4c261dff
NC		 10732013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1074
5c111e37 1075 * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
4c261dff 1076
ea33f281
NC		 10772013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
1078
1079 * configure.tgt: Add nios2-*-rtems*.
1080
a1ccaec9
YZ		 10812013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
1082
1083 * config/tc-aarch64.c (md_begin): Change to check if 'name' is
1084 NULL.
1085
0aa27725
RS		 10862013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
1087
1088 * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
1089 (macro): Use it. Assert that trunc.w.s is not used for r5900.
1090
da4339ed
NC		 10912013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com>
1092
1093 * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
1094 core.
1095
36591ba1 10962013-02-06 Sandra Loosemore <sandra@codesourcery.com>
5c111e37 1097 Andrew Jenner <andrew@codesourcery.com>
36591ba1
SL		 1098
1099 Based on patches from Altera Corporation.
1100
1101 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
1102 (TARGET_CPU_HFILES): Add config/tc-nios2.h.
1103 * Makefile.in: Regenerated.
1104 * configure.tgt: Add case for nios2*-linux*.
1105 * config/obj-elf.c: Conditionally include elf/nios2.h.
1106 * config/tc-nios2.c: New file.
1107 * config/tc-nios2.h: New file.
1108 * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
1109 * doc/Makefile.in: Regenerated.
1110 * doc/all.texi: Set NIOSII.
1111 * doc/as.texinfo (Overview): Add Nios II options.
1112 (Machine Dependencies): Include c-nios2.texi.
1113 * doc/c-nios2.texi: New file.
1114 * NEWS: Note Altera Nios II support.
1115
94d4433a
AM		 11162013-02-06 Alan Modra <amodra@gmail.com>
1117
1118 PR gas/14255
1119 * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
1120 Don't skip fixups with fx_subsy non-NULL.
1121 * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
1122 with fx_subsy non-NULL.
1123
ace9af6f
L		 11242013-02-04 H.J. Lu <hongjiu.lu@intel.com>
1125
1126 * doc/c-metag.texi: Add "@c man" markers.
1127
89d67ed9
AM		 11282013-02-04 Alan Modra <amodra@gmail.com>
1129
1130 * write.c (fixup_segment): Return void. Delete seg_reloc_count
1131 related code.
1132 (TC_ADJUST_RELOC_COUNT): Delete.
1133 * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
1134
89072bd6
AM		 11352013-02-04 Alan Modra <amodra@gmail.com>
1136
1137 * po/POTFILES.in: Regenerate.
1138
f9b2d544
NC		 11392013-01-30 Markos Chandras <markos.chandras@imgtec.com>
1140
1141 * config/tc-metag.c: Make SWAP instruction less permissive with
1142 its operands.
1143
392ca752
DD		 11442013-01-29 DJ Delorie <dj@redhat.com>
1145
1146 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
1147 relocs in .word/.etc statements.
1148
427d0db6
RM		 11492013-01-29 Roland McGrath <mcgrathr@google.com>
1150
1151 * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
1152 immediate value for 8-bit offset" error so it shows line info.
1153
4faf939a
JM		 11542013-01-24 Joseph Myers <joseph@codesourcery.com>
1155
1156 * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
1157 for 64-bit output.
1158
78c8d46c
NC		 11592013-01-24 Nick Clifton <nickc@redhat.com>
1160
1161 * config/tc-v850.c: Add support for e3v5 architecture.
1162 * doc/c-v850.texi: Mention new support.
1163
fb5b7503
NC		 11642013-01-23 Nick Clifton <nickc@redhat.com>
1165
1166 PR gas/15039
1167 * config/tc-avr.c: Include dwarf2dbg.h.
1168
8ce3d284
L		 11692013-01-18 H.J. Lu <hongjiu.lu@intel.com>
1170
1171 * config/tc-i386.c (reloc): Support size relocation only for ELF.
1172 (tc_i386_fix_adjustable): Likewise.
1173 (lex_got): Likewise.
1174 (tc_gen_reloc): Likewise.
1175
f5555712
YZ		 11762013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
1177
1178 * config/tc-aarch64.c (output_operand_error_record): Change to output
1179 the out-of-range error message as value-expected message if there is
1180 only one single value in the expected range.
1181 (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
1182 LSL #0 as a programmer-friendly feature.
1183
8fd4256d
L		 11842013-01-16 H.J. Lu <hongjiu.lu@intel.com>
1185
1186 * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
1187 (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
1188 BFD_RELOC_64_SIZE relocations.
1189 (lex_got): Support "symbol@SIZE" and don't create GOT symbol
1190 for it.
1191 (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
1192 relocations against local symbols.
1193
a5840dce
AM		 11942013-01-16 Alan Modra <amodra@gmail.com>
1195
1196 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
1197 finding some sort of toc syntax error, and break to avoid
1198 compiler uninit warning.
1199
af89796a
L		 12002013-01-15 H.J. Lu <hongjiu.lu@intel.com>
1201
1202 PR gas/15019
1203 * config/tc-i386.c (lex_got): Increment length by 1 if the
1204 relocation token is removed.
1205
dd42f060
NC		 12062013-01-15 Nick Clifton <nickc@redhat.com>
1207
1208 * config/tc-v850.c (md_assemble): Allow signed values for
1209 V850E_IMMEDIATE.
1210
464e3686
SK		 12112013-01-11 Sean Keys <skeys@ipdatasys.com>
1212
1213 * config/tc-xgate.c (md_begin): Fix mistake made when going from
af89796a 1214 git to cvs.
464e3686 1215
5817ffd1
PB		 12162013-01-10 Peter Bergner <bergner@vnet.ibm.com>
1217
1218 * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
1219 * doc/c-ppc.texi (PowerPC-Opts): Likewise.
1220 * config/tc-ppc.c (md_show_usage): Likewise.
1221 (ppc_handle_align): Handle power8's group ending nop.
1222
f4b1f6a9
SK		 12232013-01-10 Sean Keys <skeys@ipdatasys.com>
1224
1225 * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
af89796a 1226 that the assember exits after the opcodes have been printed.
f4b1f6a9 1227
34bca508
L		 12282013-01-10 H.J. Lu <hongjiu.lu@intel.com>
1229
1230 * app.c: Remove trailing white spaces.
1231 * as.c: Likewise.
1232 * as.h: Likewise.
1233 * cond.c: Likewise.
1234 * dw2gencfi.c: Likewise.
1235 * dwarf2dbg.h: Likewise.
1236 * ecoff.c: Likewise.
1237 * input-file.c: Likewise.
1238 * itbl-lex.h: Likewise.
1239 * output-file.c: Likewise.
1240 * read.c: Likewise.
1241 * sb.c: Likewise.
1242 * subsegs.c: Likewise.
1243 * symbols.c: Likewise.
1244 * write.c: Likewise.
1245 * config/tc-i386.c: Likewise.
1246 * doc/Makefile.am: Likewise.
1247 * doc/Makefile.in: Likewise.
1248 * doc/c-aarch64.texi: Likewise.
1249 * doc/c-alpha.texi: Likewise.
1250 * doc/c-arc.texi: Likewise.
1251 * doc/c-arm.texi: Likewise.
1252 * doc/c-avr.texi: Likewise.
1253 * doc/c-bfin.texi: Likewise.
1254 * doc/c-cr16.texi: Likewise.
1255 * doc/c-d10v.texi: Likewise.
1256 * doc/c-d30v.texi: Likewise.
1257 * doc/c-h8300.texi: Likewise.
1258 * doc/c-hppa.texi: Likewise.
1259 * doc/c-i370.texi: Likewise.
1260 * doc/c-i386.texi: Likewise.
1261 * doc/c-i860.texi: Likewise.
1262 * doc/c-m32c.texi: Likewise.
1263 * doc/c-m32r.texi: Likewise.
1264 * doc/c-m68hc11.texi: Likewise.
1265 * doc/c-m68k.texi: Likewise.
1266 * doc/c-microblaze.texi: Likewise.
1267 * doc/c-mips.texi: Likewise.
1268 * doc/c-msp430.texi: Likewise.
1269 * doc/c-mt.texi: Likewise.
1270 * doc/c-s390.texi: Likewise.
1271 * doc/c-score.texi: Likewise.
1272 * doc/c-sh.texi: Likewise.
1273 * doc/c-sh64.texi: Likewise.
1274 * doc/c-tic54x.texi: Likewise.
1275 * doc/c-tic6x.texi: Likewise.
1276 * doc/c-v850.texi: Likewise.
1277 * doc/c-xc16x.texi: Likewise.
1278 * doc/c-xgate.texi: Likewise.
1279 * doc/c-xtensa.texi: Likewise.
1280 * doc/c-z80.texi: Likewise.
1281 * doc/internals.texi: Likewise.
1282
4c665b71
RM		 12832013-01-10 Roland McGrath <mcgrathr@google.com>
1284
1285 * hash.c (hash_new_sized): Make it global.
1286 * hash.h: Declare it.
1287 * macro.c (define_macro): Use hash_new_sized instead of hash_new,
1288 pass a small size.
1289
a3c62988
NC		 12902013-01-10 Will Newton <will.newton@imgtec.com>
1291
1292 * Makefile.am: Add Meta.
1293 * Makefile.in: Regenerate.
1294 * config/tc-metag.c: New file.
1295 * config/tc-metag.h: New file.
1296 * configure.tgt: Add Meta.
1297 * doc/Makefile.am: Add Meta.
1298 * doc/Makefile.in: Regenerate.
1299 * doc/all.texi: Add Meta.
1300 * doc/as.texiinfo: Document Meta options.
1301 * doc/c-metag.texi: New file.
1302
b37df7c4
SE		 13032013-01-09 Steve Ellcey <sellcey@mips.com>
1304
1305 * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
1306 calls.
1307 * config/tc-mips.c (internalError): Remove, replace with abort.
1308
a3251895
YZ		 13092013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
1310
1311 * config/tc-aarch64.c (parse_operands): Change to compare the result
1312 of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
1313
8ab8155f
NC		 13142013-01-07 Nick Clifton <nickc@redhat.com>
1315
1316 PR gas/14887
1317 * config/tc-arm.c (skip_past_char): Skip whitespace before the
1318 anticipated character.
1319 * config/tc-arm.c (parse_address_main): Delete skip of whitespace
1320 here as it is no longer needed.
1321
a4ac1c42
AS		 13222013-01-06 Andreas Schwab <schwab@linux-m68k.org>
1323
1324 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
1325 * doc/c-score.texi (SCORE-Opts): Likewise.
1326 * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
1327
e407c74b
NC		 13282013-01-04 Juergen Urban <JuergenUrban@gmx.de>
1329
1330 * config/tc-mips.c: Add support for MIPS r5900.
1331 Add M_LQ_AB and M_SQ_AB to support large values for instructions
1332 lq and sq.
1333 (can_swap_branch_p, get_append_method): Detect some conditional
1334 short loops to fix a bug on the r5900 by NOP in the branch delay
1335 slot.
1336 (M_MUL): Support 3 operands in multu on r5900.
1337 (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
1338 (s_mipsset): Force 32 bit floating point on r5900.
1339 (mips_ip): Check parameter range of instructions mfps and mtps on
1340 r5900.
1341 * configure.in: Detect CPU type when target string contains r5900
1342 (e.g. mips64r5900el-linux-gnu).
1343
62658407
L		 13442013-01-02 H.J. Lu <hongjiu.lu@intel.com>
1345
1346 * as.c (parse_args): Update copyright year to 2013.
1347
95830fd1
YZ		 13482013-01-02 Yufeng Zhang <yufeng.zhang@arm.com>
1349
1350 * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
1351 and "cortex57".
1352
517bb291 13532013-01-02 Nick Clifton <nickc@redhat.com>
d709e4e6 1354
517bb291
NC		 1355 PR gas/14987
1356 * config/tc-arm.c (parse_address_main): Skip whitespace before a
1357 closing bracket.
d709e4e6 1358
517bb291 1359For older changes see ChangeLog-2012
08d56133 1360\f
517bb291 1361Copyright (C) 2013 Free Software Foundation, Inc.
752937aa
NC		 1362
1363Copying and distribution of this file, with or without modification,
1364are permitted in any medium without royalty provided the copyright
1365notice and this notice are preserved.
1366
08d56133
NC		 1367Local Variables:
1368mode: change-log
1369left-margin: 8
1370fill-column: 74
1371version-control: never
1372End:
A mirror of the official binutils-gdb repository