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* mach-o.c (mach_o_section_name_xlat dw): Add entry for
[thirdparty/binutils-gdb.git] / gas / ChangeLog
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4a06e5a2
RS		 12013-07-15 Richard Sandiford <rdsandiford@googlemail.com>
2
3 * config/tc-mips.c (match_save_restore_list_operand): Avoid -Wformat
4 error with older GCCs.
5 (mips16_macro_build): Dereference args.
6
a92713e6
RS		 72013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
8
9 * config/tc-mips.c (mips_prefer_vec_regno, mips_parse_register):
10 New functions, split out from...
11 (reg_lookup): ...here. Remove itbl support.
12 (reglist_lookup): Delete.
13 (mips_operand_token_type): New enum.
14 (mips_operand_token): New structure.
15 (mips_operand_tokens): New variable.
16 (mips_add_token, mips_parse_base_start, mips_parse_argument_token)
17 (mips_parse_arguments): New functions.
18 (md_begin): Initialize mips_operand_tokens.
19 (mips_arg_info): Add a token field. Remove optional_reg field.
20 (match_char, match_expression): New functions.
21 (match_const_int): Use match_expression. Remove "s" argument
22 and return a boolean result. Remove O_register handling.
23 (match_regno, match_reg, match_reg_range): New functions.
24 (match_int_operand, match_mapped_int_operand, match_msb_operand)
25 (match_reg_operand, match_reg_pair_operand, match_perf_reg_operand)
26 (match_addiusp_operand, match_clo_clz_dest_operand)
27 (match_lwm_swm_list_operand, match_entry_exit_operand)
28 (match_save_restore_list_operand, match_mdmx_imm_reg_operand)
29 (match_tied_reg_operand): Remove "s" argument and return a boolean
30 result. Match tokens rather than text. Update calls to
31 match_const_int. Rely on match_regno to call check_regno.
32 (match_pcrel_operand, match_pc_operand): Replace "s" argument with
33 "arg" argument. Return a boolean result.
34 (parse_float_constant): Replace with...
35 (match_float_constant): ...this new function.
36 (match_operand): Remove "s" argument and return a boolean result.
37 Update calls to subfunctions.
38 (mips_ip, mips16_ip): Call mips_parse_arguments. Use match routines
39 rather than string-parsing routines. Update handling of optional
40 registers for token scheme.
41
89565f1b
RS		 422013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
43
44 * config/tc-mips.c (parse_float_constant): Split out from...
45 (mips_ip): ...here.
46
3c14a432
RS		 472013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
48
49 * config/tc-mips.c (INSERT_BITS, INSERT_OPERAND, MIPS16_INSERT_OPERAND):
50 Delete.
51
364215c8
RS		 522013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
53
54 * config/tc-mips.c (mips32_to_16_reg_map): Delete.
55 (match_entry_exit_operand): New function.
56 (match_save_restore_list_operand): Likewise.
57 (match_operand): Use them.
58 (check_absolute_expr): Delete.
59 (mips16_ip): Rewrite main parsing loop to use mips_operands.
60
9e12b7a2
RS		 612013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
62
63 * config/tc-mips.c: Enable functions commented out in previous patch.
64 (SKIP_SPACE_TABS): Move further up file.
65 (mips32_to_micromips_reg_b_map, mips32_to_micromips_reg_c_map)
66 (mips32_to_micromips_reg_d_map, mips32_to_micromips_reg_e_map)
67 (ips32_to_micromips_reg_f_map, mips32_to_micromips_reg_g_map)
68 (mips32_to_micromips_reg_l_map, mips32_to_micromips_reg_m_map)
69 (mips32_to_micromips_reg_q_map, mips32_to_micromips_reg_n_map)
70 (micromips_imm_b_map, micromips_imm_c_map): Delete.
71 (mips_lookup_reg_pair): Delete.
72 (macro): Use report_bad_range and report_bad_field.
73 (mips_immed, expr_const_in_range): Delete.
74 (mips_ip): Rewrite main parsing loop to use new functions.
75
a1d78564
RS		 762013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
77
78 * config/tc-mips.c (mips_oddfpreg_ok): Move further up file.
79 Change return type to bfd_boolean.
80 (report_bad_range, report_bad_field): New functions.
81 (mips_arg_info): New structure.
82 (match_const_int, convert_reg_type, check_regno, match_int_operand)
83 (match_mapped_int_operand, match_msb_operand, match_reg_operand)
84 (match_reg_pair_operand, match_pcrel_operand, match_perf_reg_operand)
85 (match_addiusp_operand, match_clo_clz_dest_operand)
86 (match_lwm_swm_list_operand, match_mdmx_imm_reg_operand)
87 (match_pc_operand, match_tied_reg_operand, match_operand)
88 (check_completed_insn): New functions, commented out for now.
89
e077a1c8
RS		 902013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
91
92 * config/tc-mips.c (insn_insert_operand): New function.
93 (macro_build, mips16_macro_build): Put null character check
94 in the for loop and convert continues to breaks. Use operand
95 structures to handle constant operands.
96
ab902481
RS		 972013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
98
99 * config/tc-mips.c (validate_mips_insn): Move further up file.
100 Add insn_bits and decode_operand arguments. Use the mips_operand
101 fields to work out which bits an operand occupies. Detect double
102 definitions.
103 (validate_micromips_insn): Move further up file. Call into
104 validate_mips_insn.
105
2f8b73cc
RS		 1062013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
107
108 * config/tc-mips.c (mips16_macro_build): Remove 'Y' case.
109
c8276761
RS		 1102013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
111
112 * config/tc-mips.c (macro_build): Take an int for "C", "k", "\\"
113 and "~".
114 (macro): Update accordingly.
115
77bd4346
RS		 1162013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
117
118 * config/tc-mips.c (imm_expr, imm2_expr, offset_expr): Tweak commentary.
119 (imm_reloc): Delete.
120 (md_assemble): Remove imm_reloc handling.
121 (mips_ip): Update commentary. Use offset_expr and offset_reloc
122 rather than imm_expr and imm_reloc for 'i', 'j' and 'u'.
123 Use a temporary array rather than imm_reloc when parsing
124 constant expressions. Remove imm_reloc initialization.
125 (mips16_ip): Update commentary. Use offset_expr and offset_reloc
126 for the relaxable field. Use a relax_char variable to track the
127 type of this field. Remove imm_reloc initialization.
128
cc537e56
RS		 1292013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
130
131 * config/tc-mips.c (mips16_ip): Handle "I".
132
ba92f887
MR		 1332013-07-12 Maciej W. Rozycki <macro@codesourcery.com>
134
135 * config/tc-mips.c (mips_flag_nan2008): New variable.
136 (options): Add OPTION_NAN enum value.
137 (md_longopts): Handle it.
138 (md_parse_option): Likewise.
139 (s_nan): New function.
140 (mips_elf_final_processing): Handle EF_MIPS_NAN2008.
141 (md_show_usage): Add -mnan.
142
143 * doc/as.texinfo (Overview): Add -mnan.
144 * doc/c-mips.texi (MIPS Opts): Document -mnan.
145 (MIPS NaN Encodings): New node. Document .nan directive.
146 (MIPS-Dependent): List the new node.
147
c1094734
TG		 1482013-07-09 Tristan Gingold <gingold@adacore.com>
149
150 * configure.com: Define HAVE_SYS_TYPES_H and HAVE_UNISTD_H
151
0cbbe1b8
RS		 1522013-07-08 Richard Sandiford <rdsandiford@googlemail.com>
153
154 * config/tc-mips.c (mips_ip): Unconditionally parse an expression
155 for 'A' and assume that the constant has been elided if the result
156 is an O_register.
157
f2ae14a1
RS		 1582013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
159
160 * config/tc-mips.c (gprel16_reloc_p): New function.
161 (macro_read_relocs): Assume BFD_RELOC_LO16 if all relocs are
162 BFD_RELOC_UNUSED.
163 (offset_high_part, small_offset_p): New functions.
164 (nacro): Use them. Remove *_OB and *_DOB cases. For single-
165 register load and store macros, handle the 16-bit offset case first.
166 If a 16-bit offset is not suitable for the instruction we're
167 generating, load it into the temporary register using
168 ADDRESS_ADDI_INSN. Make the M_LI_DD code fall through into the
169 M_L_DAB code once the address has been constructed. For double load
170 and store macros, again handle the 16-bit offset case first.
171 If the second register cannot be accessed from the same high
172 part as the first, load it into AT using ADDRESS_ADDI_INSN.
173 Fix the handling of LD in cases where the first register is the
174 same as the base. Also handle the case where the offset is
175 not 16 bits and the second register cannot be accessed from the
176 same high part as the first. For unaligned loads and stores,
177 fuse the offbits == 12 and old "ab" handling. Apply this handling
178 whenever the second offset needs a different high part from the first.
179 Construct the offset using ADDRESS_ADDI_INSN where possible,
180 for offbits == 16 as well as offbits == 12. Use offset_reloc
181 when constructing the individual loads and stores.
182 (mips_ip): Set up imm_expr, imm2_expr, offset_expr, imm_reloc
183 and offset_reloc before matching against a particular opcode.
184 Handle elided 'A' constants. Allow 'A' constants to use
185 relocation operators.
186
5c324c16
RS		 1872013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
188
189 * config/tc-mips.c (validate_mips_insn): Remove "[" and "]" handling.
190 (mips_ip): Likewise. Do not set is_mdmx for INSN_5400 instructions.
191 Check constraints on the VR5400 RZU.OB, SLL.OB and SRL.OB instructions.
192
23e69e47
RS		 1932013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
194
195 * config/tc-mips.c (mips_ip): Preserve the real bit number for "+p".
196 Require the msb to be <= 31 for "+s". Check that the size is <= 31
197 for both "+s" and "+S".
198
27c5c572
RS		 1992013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
200
201 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn):
202 (mips_ip, mips16_ip): Handle "+i".
203
e76ff5ab
RS		 2042013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
205
206 * config/tc-mips.c (mips32_to_micromips_reg_h_map): Delete.
207 (micromips_to_32_reg_h_map): Rename to...
208 (micromips_to_32_reg_h_map1): ...this.
209 (micromips_to_32_reg_i_map): Rename to...
210 (micromips_to_32_reg_h_map2): ...this.
211 (mips_lookup_reg_pair): New function.
212 (gpr_write_mask, macro): Adjust after above renaming.
213 (validate_micromips_insn): Remove "mi" handling.
214 (mips_ip): Likewise. Parse both registers in a pair for "mh".
215
fa7616a4
RS		 2162013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
217
218 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn)
219 (mips_ip): Remove "+D" and "+T" handling.
220
fb798c50
AK		 2212013-07-05 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
222
223 * config/tc-s390.c (md_gather_operands, md_apply_fix): Support new
224 relocs.
225
2c0a3565
MS		 2262013-07-03 Marcus Shawcroft <marcus.shawcroft@arm.com>
227
4aa2c5e2
MS		 228 * config/tc-aarch64.c (reloc_table): Merge got_prel19 into got.
229
2302013-07-02 Marcus Shawcroft <marcus.shawcroft@arm.com>
231
2c0a3565
MS		 232 * config/tc-aarch64.c (md_apply_fix): Reorder case values.
233 (aarch64_force_relocation): Likewise.
234
f40da81b
AM		 2352013-07-02 Alan Modra <amodra@gmail.com>
236
237 * config/tc-ppc.c (ppc_elf_adjust_symtab): Don't make .TOC. weak.
238
81566a9b
MR		 2392013-06-26 Maciej W. Rozycki <macro@codesourcery.com>
240
241 * doc/as.texinfo (Overview): Remove @samp from MIPS ISA names.
242 * doc/c-mips.texi (MIPS Options): Remove @sc from MIPS ISA names.
243 Replace @sc{mips16} with literal `MIPS16'.
244 (MIPS ISA): Replace @sc{mips3} with literal `MIPS III'.
245
a6bb11b2
YZ		 2462013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
247
248 * config/tc-aarch64.c (reloc_table): Replace
249 BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with
250 BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to
251 BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and
252 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC.
253 (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC,
254 BFD_RELOC_AARCH64_LD32_GOT_LO12_NC,
255 BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC,
256 BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC,
257 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and
258 BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC.
259 (aarch64_force_relocation): Likewise.
260
cec5225b
YZ		 2612013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
262
263 * config/tc-aarch64.c (ilp32_p): New static variable.
264 (elf64_aarch64_target_format): Return the target according to the
265 value of 'ilp32_p'.
266 (md_begin): Determine 'mach' according to the value of 'ilp32_p'.
267 (aarch64_opts): Add support for options '-milp32' and '-mlp64'.
268 (aarch64_dwarf2_addr_size): New function.
269 * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration.
270 (DWARF2_ADDR_SIZE): New define.
271
e335d9cb
RS		 2722013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
273
274 * doc/c-mips.texi: Use ISA instead of @sc{isa}.
275
18870af7
RS		 2762013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
277
278 * config/tc-mips.c (validate_mips_insn): Use STYPE rather than SHAMT.
279
833794fc
MR		 2802013-06-25 Maciej W. Rozycki <macro@codesourcery.com>
281
282 * config/tc-mips.c (mips_set_options): Add insn32 member.
283 (mips_opts): Initialize it.
284 (NOP_INSN, NOP_INSN_SIZE): Handle insn32 mode.
285 (options): Add OPTION_INSN32 and OPTION_NO_INSN32 enum values.
286 (md_longopts): Add "minsn32" and "mno-insn32" options.
287 (is_size_valid): Handle insn32 mode.
288 (md_assemble): Pass instruction string down to macro.
289 (brk_fmt): Add second dimension and insn32 mode initializers.
290 (mfhl_fmt): Likewise.
291 (BRK_FMT, MFHL_FMT): Handle insn32 mode.
292 (macro_build) <'c'>: Handle microMIPS 32-bit BREAK encoding.
293 (macro_build_jalr, move_register): Handle insn32 mode.
294 (macro_build_branch_rs): Likewise.
295 (macro): Handle insn32 mode.
296 <M_JRADDIUSP>, <M_JRC>, <M_MOVEP>: New cases.
297 (mips_ip): Handle insn32 mode.
298 (md_parse_option): Handle OPTION_INSN32 and OPTION_NO_INSN32.
299 (s_mipsset): Handle "insn32" and "noinsn32" pseudo-ops.
300 (mips_handle_align): Handle insn32 mode.
301 (md_show_usage): Add -minsn32 and -mno-insn32.
302
303 * doc/as.texinfo (Target MIPS options): Add -minsn32 and
304 -mno-insn32 options.
305 (-minsn32, -mno-insn32): New options.
306 * doc/c-mips.texi (MIPS Opts): Add -minsn32 and -mno-insn32
307 options.
308 (MIPS assembly options): New node. Document .set insn32 and
309 .set noinsn32.
310 (MIPS-Dependent): List the new node.
311
d1706f38
NC		 3122013-06-25 Nick Clifton <nickc@redhat.com>
313
314 * config/tc-msp430.c (msp430_srcoperand): Do not allow the use of
315 the PC in indirect addressing on 430xv2 parts.
316 (msp430_operands): Add version test to hardware bug encoding
317 restrictions.
318
477330fc
RM		 3192013-06-24 Roland McGrath <mcgrathr@google.com>
320
d996d970
RM		 321 * config/tc-arm.c (parse_reg_list): Use skip_past_char for '}',
322 so it skips whitespace before it.
323 (s_arm_unwind_save_mmxwr, s_arm_unwind_save_mmxwcg): Likewise.
324
477330fc
RM		 325 * config/tc-arm.c (arm_symbol_chars): Include '{' and '}'.
326 (arm_reg_parse_multi): Skip whitespace first.
327 (parse_reg_list): Likewise.
328 (parse_vfp_reg_list): Likewise.
329 (s_arm_unwind_save_mmxwcg): Likewise.
330
24382199
NC		 3312013-06-24 Nick Clifton <nickc@redhat.com>
332
333 PR gas/15623
334 * config/tc-arm.c (do_t_smc): Mark as ending an IT block.
335
c3678916
RS		 3362013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
337
338 * config/tc-mips.c (mips_ip): Fix swapped bit numbers in comments.
339
42429eac
RS		 3402013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
341
342 * config/tc-mips.c: Assert that offsetT and valueT are at least
343 8 bytes in size.
344 (GPR_SMIN, GPR_SMAX): New macros.
345 (macro, mips_ip): Remove code for 4-byte valueT and offsetT.
346
f3ded42a
RS		 3472013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
348
349 * config/tc-mips.c: Remove OBJ_ELF, OBJ_MAYBE_ELF and IS_ELF
350 conditions. Remove any code deselected by them.
351 (s_mips_frame, s_mips_mask): Handle ECOFF_DEBUGGING case first.
352
e8044f35
RS		 3532013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
354
355 * NEWS: Note removal of ECOFF support.
356 * doc/as.texinfo (--emulation): Update for the removal of MIPS ECOFF.
357 * Makefile.am (TARG_ENV_HFILES): Remove config/te-lnews.h.
358 (MULTI_CFILES): Remove config/e-mipsecoff.c.
359 * Makefile.in: Regenerate.
360 * configure.in: Remove MIPS ECOFF references.
361 (mips-sony-bsd*, mips-*-bsd*, mips-*-lnews*-ecoff, mips-*-*-ecoff):
362 Delete cases.
363 (mips-*-irix5*-*, mips*-*-linux*-*, mips*-*-freebsd*)
364 (mips*-*-kfreebsd*-gnu, mips-*-*-elf): Fold into...
365 (mips-*-*): ...this single case.
366 (mipsbecoff, mipslecoff, mipsecoff): Remove emulations. Expect
367 MIPS emulations to be e-mipself*.
368 * configure: Regenerate.
369 * configure.tgt (mips-sony-bsd*, mips-*-ultrix*, mips-*-osf*)
370 (mips-*-ecoff*, mips-*-pe*, mips-*-irix*, ips-*-lnews*, mips-*-riscos*)
371 (mips-*-sysv*): Remove coff and ecoff cases.
372 * as.c (mipsbecoff, mipslecoff, mipsecoff): Remove.
373 * ecoff.c: Remove reference to MIPS ECOFF.
374 * config/e-mipsecoff.c, config/te-lnews.h: Delete files.
375 * config/tc-mips.c (ECOFF_LITTLE_FORMAT): Delete.
376 (RDATA_SECTION_NAME, mips_target_form): Remove COFF and ECOFF cases.
377 (mips_hi_fixup): Tweak comment.
378 (append_insn): Require a howto.
379 (mips_after_parse_args): Remove OBJ_MAYBE_ECOFF code.
380
98508b2a
RS		 3812013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
382
383 * doc/as.texinfo: Use MIPS rather than @sc{mips} throughout.
384 Use "CPU" instead of "cpu".
385 * doc/c-mips.texi: Likewise.
386 (MIPS Opts): Rename to MIPS Options.
387 (MIPS option stack): Rename to MIPS Option Stack.
388 (MIPS ASE instruction generation overrides): Rename to
389 MIPS ASE Instruction Generation Overrides (for now).
390 (MIPS floating-point): Rename to MIPS Floating-Point.
391
fc16f8cc
RS		 3922013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
393
394 * doc/c-mips.texi (MIPS Macros): New section.
395 (MIPS Object): Replace with...
396 (MIPS Small Data): ...this new section.
397
5a7560b5
RS		 3982013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
399
400 * doc/c-mips.texi (MIPS symbol sizes): Move section further up file.
401 Capitalize name. Use @kindex instead of @cindex for .set entries.
402
a1b86ab7
RS		 4032013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
404
405 * doc/c-mips.texi (MIPS Stabs): Remove section.
406
c6278170
RS		 4072013-06-20 Richard Sandiford <rdsandiford@googlemail.com>
408
409 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS, ISA_SUPPORTS_DSP_ASE)
410 (ISA_SUPPORTS_DSP64_ASE, ISA_SUPPORTS_DSPR2_ASE, ISA_SUPPORTS_EVA_ASE)
411 (ISA_SUPPORTS_MT_ASE, ISA_SUPPORTS_MCU_ASE, ISA_SUPPORTS_VIRT_ASE)
412 (ISA_SUPPORTS_VIRT64_ASE): Delete.
413 (mips_ase): New structure.
414 (mips_ases): New table.
415 (FP64_ASES): New macro.
416 (mips_ase_groups): New array.
417 (mips_isa_rev, mips_ase_mask, mips_check_isa_supports_ase)
418 (mips_check_isa_supports_ases, mips_set_ase, mips_lookup_ase): New
419 functions.
420 (is_opcode_valid): Use mips_ases to get the 64-bit ASE flags.
421 (md_parse_option): Use mips_ases and mips_set_ase instead of
422 separate case statements for each ASE option.
423 (mips_after_parse_args): Use FP64_ASES. Use
424 mips_check_isa_supports_ases to check the ASEs against
425 other options.
426 (s_mipsset): Use mips_ases and mips_set_ase instead of
427 separate if statements for each ASE option. Use
428 mips_check_isa_supports_ases, even when a non-ASE option
429 is specified.
430
63a4bc21
KT		 4312013-06-19 Greta Yorsh <Greta.Yorsh@arm.com>
432
433 * config/tc-arm.c (arm_cpus): Add support for Cortex-A12.
434
c31f3936
RS		 4352013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
436
437 * config/tc-mips.c (md_shortopts, options, md_longopts)
438 (md_longopts_size): Move earlier in file.
439
846ef2d0
RS		 4402013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
441
442 * config/tc-mips.c (mips_set_options): Replace separate "ase_*" fields
443 with a single "ase" bitmask.
444 (mips_opts): Update accordingly.
445 (file_ase, file_ase_explicit): New variables.
446 (file_ase_mips3d, file_ase_mdmx, file_ase_smartmips, file_ase_dsp)
447 (file_ase_dspr2, file_ase_eva, file_ase_mt, file_ase_virt): Delete.
448 (ISA_HAS_ROR): Adjust for mips_set_options change.
449 (is_opcode_valid): Take the base ase mask directly from mips_opts.
450 (mips_ip): Adjust for mips_set_options change.
451 (md_parse_option): Likewise. Update file_ase_explicit.
452 (mips_after_parse_args): Adjust for mips_set_options change.
453 Use bitmask operations to select the default ASEs. Set file_ase
454 rather than individual per-ASE variables.
455 (s_mipsset): Adjust for mips_set_options change.
456 (mips_elf_final_processing): Test file_ase rather than
457 file_ase_mdmx. Remove commented-out code.
458
d16afab6
RS		 4592013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
460
461 * config/tc-mips.c (mips_cpu_info): Add an "ase" field.
462 (MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, MIPS_CPU_ASE_MT)
463 (MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX, MIPS_CPU_ASE_DSPR2)
464 (MIPS_CPU_ASE_MCU, MIPS_CPU_ASE_VIRT, MIPS_CPU_ASE_EVA): Delete.
465 (mips_after_parse_args): Use the new "ase" field to choose
466 the default ASEs.
467 (mips_cpu_info_table): Move ASEs from the "flags" field to the
468 "ase" field.
469
e83a675f
RE		 4702013-06-18 Richard Earnshaw <rearnsha@arm.com>
471
472 * config/tc-arm.c (symbol_preemptible): New function.
473 (relax_branch): Use it.
474
7f3c4072
CM		 4752013-06-17 Catherine Moore <clm@codesourcery.com>
476 Maciej W. Rozycki <macro@codesourcery.com>
477 Chao-Ying Fu <fu@mips.com>
478
479 * config/tc-mips.c (mips_set_options): Add ase_eva.
480 (mips_set_options mips_opts): Add ase_eva.
481 (file_ase_eva): Declare.
482 (ISA_SUPPORTS_EVA_ASE): Define.
483 (IS_SEXT_9BIT_NUM): Define.
484 (MIPS_CPU_ASE_EVA): Define.
485 (is_opcode_valid): Add support for ase_eva.
486 (macro_build): Likewise.
487 (macro): Likewise.
488 (validate_mips_insn): Likewise.
489 (validate_micromips_insn): Likewise.
490 (mips_ip): Likewise.
491 (options): Add OPTION_EVA and OPTION_NO_EVA.
492 (md_longopts): Add -meva and -mno-eva.
493 (md_parse_option): Process new options.
494 (mips_after_parse_args): Check for valid EVA combinations.
495 (s_mipsset): Likewise.
496
e410add4
RS		 4972013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
498
499 * dwarf2dbg.h (dwarf2_move_insn): Declare.
500 * dwarf2dbg.c (line_subseg): Add pmove_tail.
501 (get_line_subseg): Add create_p argument. Initialize pmove_tail.
502 (dwarf2_gen_line_info_1): Update call accordingly.
503 (dwarf2_move_insn): New function.
504 * config/tc-mips.c (append_insn): Use dwarf2_move_insn.
505
6a50d470
RS		 5062013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
507
508 Revert:
509
510 2011-09-05 Richard Sandiford <rdsandiford@googlemail.com>
511
512 PR gas/13024
513 * dwarf2dbg.c (pending_lines, pending_lines_tail): New variables.
514 (dwarf2_gen_line_info_1): Delete.
515 (dwarf2_push_line, dwarf2_flush_pending_lines): New functions.
516 (dwarf2_gen_line_info, dwarf2_emit_label): Use them.
517 (dwarf2_consume_line_info): Call dwarf2_flush_pending_lines.
518 (dwarf2_directive_loc): Push previous .locs instead of generating
519 them immediately.
520
f122319e
CF		 5212013-06-13 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
522
523 * config/tc-mips.c (ISA_SUPPORTS_VIRT_ASE): Support micromips.
524 (ISA_SUPPORTS_VIRT64_ASE): Support 64-bit micromips.
525
909c7f9c
NC		 5262013-06-13 Nick Clifton <nickc@redhat.com>
527
528 PR gas/15602
529 * config/tc-m68k.h (TC_CHECK_ADJUSTED_BROKEN_DOT_WORD): Define.
530 * config/tc-m68k.c (tc_m68k_check_adjusted_broken_word): New
531 function. Generates an error if the adjusted offset is out of a
532 16-bit range.
533
5d5755a7
SL		 5342013-06-12 Sandra Loosemore <sandra@codesourcery.com>
535
536 * config/tc-nios2.c (md_apply_fix): Mask constant
537 BFD_RELOC_NIOS2_HIADJ16 value to 16 bits.
538
3bf0dbfb
MR		 5392013-06-10 Maciej W. Rozycki <macro@codesourcery.com>
540
541 * config/tc-mips.c (append_insn): Don't do branch relaxation for
542 MIPS-3D instructions either.
543 (md_convert_frag): Update the COPx branch mask accordingly.
544
545 * config/tc-mips.c (md_show_usage): Document --[no-]relax-branch
546 option.
547 * doc/as.texinfo (Overview): Add --relax-branch and
548 --no-relax-branch.
549 * doc/c-mips.texi (MIPS Opts): Document --relax-branch and
550 --no-relax-branch.
551
9daf7bab
SL		 5522013-06-09 Sandra Loosemore <sandra@codesourcery.com>
553
554 * config/tc-nios2.c (nios2_parse_args): Allow trap argument to
555 omitted.
556
d301a56b
RS		 5572013-06-08 Catherine Moore <clm@codesourcery.com>
558
559 * config/tc-mips.c (is_opcode_valid): Build ASE mask.
560 (is_opcode_valid_16): Pass ase value to opcode_is_member.
561 (append_insn): Change INSN_xxxx to ASE_xxxx.
562
7bab7634
DC		 5632013-06-01 George Thomas <george.thomas@atmel.com>
564
565 * gas/config/tc-avr.c: Change ISA for devices with USB support to
566 AVR_ISA_XMEGAU
567
f60cf82f
L		 5682013-05-31 H.J. Lu <hongjiu.lu@intel.com>
569
570 * config/tc-i386.c (md_begin): Don't align text/data/bss sections
571 for ELF.
572
a3f278e2
CM		 5732013-05-31 Paul Brook <paul@codesourcery.com>
574
575 gas/
576 * config/tc-mips.c (s_ehword): New.
577
067ec077
CM		 5782013-05-30 Paul Brook <paul@codesourcery.com>
579
580 * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH.
581
d6101ac2
MR		 5822013-05-29 Maciej W. Rozycki <macro@codesourcery.com>
583
584 * write.c (resolve_reloc_expr_symbols): On REL targets don't
585 convert relocs who have no relocatable field either. Rephrase
586 the conditional so that the PC-relative check is only applied
587 for REL targets.
588
f19ccbda
MR		 5892013-05-28 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
590
591 * config/tc-mips.c (macro) <ld>: Don't use $zero for address
592 calculation.
593
418009c2
YZ		 5942013-05-28 Yufeng Zhang <yufeng.zhang@arm.com>
595
596 * config/tc-aarch64.c (reloc_table): Update to use
477330fc 597 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of
418009c2
YZ		 598 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE.
599 (md_apply_fix): Likewise.
600 (aarch64_force_relocation): Likewise.
601
0a8897c7
KT		 6022013-05-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
603
604 * config/tc-arm.c (it_fsm_post_encode): Improve
605 warning messages about deprecated IT block formats.
606
89d2a2a3
MS		 6072013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com>
608
609 * config/tc-aarch64.c (md_apply_fix): Move value range checking
610 inside fx_done condition.
611
c77c0862
RS		 6122013-05-22 Jürgen Urban <JuergenUrban@gmx.de>
613
614 * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB.
615
c0637f3a
PB		 6162013-05-20 Peter Bergner <bergner@vnet.ibm.com>
617
618 * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error
619 and clean up warning when using PRINT_OPCODE_TABLE.
620
5656a981
AM		 6212013-05-20 Alan Modra <amodra@gmail.com>
622
623 * config/tc-ppc.c (md_apply_fix): Hoist code common to insn
624 and data fixups performing shift/high adjust/sign extension on
625 fieldval. Sink fx_pcrel handling and checks. Use fixP->fx_size
626 when writing data fixups rather than recalculating size.
627
997b26e8
JBG		 6282013-05-16 Jan-Benedict Glaw <jbglaw@lug-owl.de>
629
630 * doc/c-msp430.texi: Fix typo.
631
9f6e76f4
TG		 6322013-05-16 Tristan Gingold <gingold@adacore.com>
633
634 * config/tc-ppc.c (ppc_is_toc_sym): Symbols of class XMC_TC
635 are also TOC symbols.
636
638d3803
NC		 6372013-05-16 Nick Clifton <nickc@redhat.com>
638
639 * config/tc-msp430.c: Make -mmcu recognise more part numbers.
640 Add -mcpu command to specify core type.
997b26e8 641 * doc/c-msp430.texi: Update documentation.
638d3803 642
b015e599
AP		 6432013-05-09 Andrew Pinski <apinski@cavium.com>
644
645 * config/tc-mips.c (struct mips_set_options): New ase_virt field.
646 (mips_opts): Update for the new field.
647 (file_ase_virt): New variable.
648 (ISA_SUPPORTS_VIRT_ASE): New macro.
649 (ISA_SUPPORTS_VIRT64_ASE): New macro.
650 (MIPS_CPU_ASE_VIRT): New define.
651 (is_opcode_valid): Handle ase_virt.
652 (macro_build): Handle "+J".
653 (validate_mips_insn): Likewise.
654 (mips_ip): Likewise.
655 (enum options): Add OPTION_VIRT and OPTION_NO_VIRT.
656 (md_longopts): Add mvirt and mnovirt
657 (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT.
658 (mips_after_parse_args): Handle ase_virt field.
659 (s_mipsset): Handle "virt" and "novirt".
660 (mips_elf_final_processing): Add a comment about virt ASE might need
661 a new flag.
662 (md_show_usage): Print out the usage of -mvirt and mno-virt options.
663 * doc/c-mips.texi: Document -mvirt and -mno-virt.
664 Document ".set virt" and ".set novirt".
665
da8094d7
AM		 6662013-05-09 Alan Modra <amodra@gmail.com>
667
668 * config/tc-ppc.c (md_apply_fix): Sign extend fieldval under
669 control of operand flag bits.
670
c5f8c205
AM		 6712013-05-07 Alan Modra <amodra@gmail.com>
672
673 * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro.
674 (PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise.
675 (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise.
676 (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise.
677 (md_apply_fix): Set fx_no_overflow for assorted relocations.
678 Shift and sign-extend fieldval for use by some VLE reloc
679 operand->insert functions.
680
b47468a6
CM		 6812013-05-06 Paul Brook <paul@codesourcery.com>
682 Catherine Moore <clm@codesourcery.com>
683
c5f8c205
AM		 684 * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL.
685 (limited_pcrel_reloc_p): Likewise.
b47468a6
CM		 686 (md_apply_fix): Likewise.
687 (tc_gen_reloc): Likewise.
688
2de39019
CM		 6892013-05-06 Richard Sandiford <rdsandiford@googlemail.com>
690
691 * config/tc-mips.c (limited_pcrel_reloc_p): New function.
692 (mips_fix_adjustable): Adjust pc-relative check to use
693 limited_pc_reloc_p.
694
754e2bb9
RS		 6952013-05-02 Richard Sandiford <rdsandiford@googlemail.com>
696
697 * config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries.
698 (s_mips_stab): Do not restrict to stabn only.
699
13761a11
NC		 7002013-05-02 Nick Clifton <nickc@redhat.com>
701
702 * config/tc-msp430.c: Add support for the MSP430X architecture.
703 Add code to insert a NOP instruction after any instruction that
704 might change the interrupt state.
705 Add support for the LARGE memory model.
706 Add code to initialise the .MSP430.attributes section.
707 * config/tc-msp430.h: Add support for the MSP430X architecture.
708 * doc/c-msp430.texi: Document the new -mL and -mN command line
709 options.
710 * NEWS: Mention support for the MSP430X architecture.
711
df26367c
MR		 7122013-05-01 Maciej W. Rozycki <macro@codesourcery.com>
713
714 * configure.tgt: Replace alpha*-*-linuxecoff* pattern with
715 alpha*-*-linux*ecoff*.
716
f02d8318
CF		 7172013-04-30 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
718
719 * config/tc-mips.c (mips_ip): Add sizelo.
720 For "+C", "+G", and "+H", set sizelo and compare against it.
721
b40bf0a2
NC		 7222013-04-29 Nick Clifton <nickc@redhat.com>
723
724 * as.c (Options): Add -gdwarf-sections.
725 (parse_args): Likewise.
726 * as.h (flag_dwarf_sections): Declare.
727 * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes.
728 (process_entries): When -gdwarf-sections is enabled generate
729 fragmentary .debug_line sections.
730 (out_debug_line): Set the section for the .debug_line section end
731 symbol.
732 * doc/as.texinfo: Document -gdwarf-sections.
733 * NEWS: Mention -gdwarf-sections.
734
8eeccb77 7352013-04-26 Christian Groessler <chris@groessler.org>
00a3147e
CG		 736
737 * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdline
738 according to the target parameter. Don't call s_segm since s_segm
739 calls bfd_set_arch_mach using stdoutput, but stdoutput isn't
740 initialized yet.
741 (md_begin): Call s_segm according to target parameter from command
742 line.
743
49926cd0
AM		 7442013-04-25 Alan Modra <amodra@gmail.com>
745
746 * configure.in: Allow little-endian linux.
747 * configure: Regenerate.
748
e3031850
SL		 7492013-04-24 Sandra Loosemore <sandra@codesourcery.com>
750
751 * config/tc-nios2.c (nios2_control_register_arg_p): Rename
752 "fstatus" control register to "eccinj".
753
cb948fc0
KT		 7542013-04-19 Kai Tietz <ktietz@redhat.com>
755
756 * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin.
757
4455e9ad
JB		 7582013-04-15 Julian Brown <julian@codesourcery.com>
759
760 * expr.c (add_to_result, subtract_from_result): Make global.
761 * expr.h (add_to_result, subtract_from_result): Add prototypes.
762 * config/tc-sh.c (sh_optimize_expr): Use add_to_result,
763 subtract_from_result to handle extra bit of precision for .sleb128
764 directive operands.
765
956a6ba3
JB		 7662013-04-10 Julian Brown <julian@codesourcery.com>
767
768 * read.c (convert_to_bignum): Add sign parameter. Use it
769 instead of X_unsigned to determine sign of resulting bignum.
770 (emit_expr): Pass extra argument to convert_to_bignum.
771 (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass
772 X_extrabit to convert_to_bignum.
773 (parse_bitfield_cons): Set X_extrabit.
774 * expr.c (make_expr_symbol, expr_build_uconstant, operand):
775 Initialise X_extrabit field as appropriate.
776 (add_to_result): New.
777 (subtract_from_result): New.
778 (expr): Use above.
779 * expr.h (expressionS): Add X_extrabit field.
780
eb9f3f00
JB		 7812013-04-10 Jan Beulich <jbeulich@suse.com>
782
783 * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base
784 register being PC when is_t or writeback, and use distinct
785 diagnostic for the latter case.
786
ccb84d65
JB		 7872013-04-10 Jan Beulich <jbeulich@suse.com>
788
789 * gas/config/tc-arm.c (parse_operands): Re-write
790 po_barrier_or_imm().
791 (do_barrier): Remove bogus constraint().
792 (do_t_barrier): Remove.
793
4d13caa0
NC		 7942013-04-09 Joerg Wunsch <joerg.wunsch@atmel.com>
795
796 * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2,
797 ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2,
798 ATmega2564RFR2
799 * gas/doc/c-avr.texi (-mmcu documentation): Likewise.
800
16d02dc9
JB		 8012013-04-09 Jan Beulich <jbeulich@suse.com>
802
803 * gas/config/tc-arm.c (do_vmrs): Accept all control registers.
804 Use local variable Rt in more places.
805 (do_vmsr): Accept all control registers.
806
05ac0ffb
JB		 8072013-04-09 Jan Beulich <jbeulich@suse.com>
808
809 * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
810 if there was none specified for moves between scalar and core
811 register.
812
2d51fb74
JB		 8132013-04-09 Jan Beulich <jbeulich@suse.com>
814
815 * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the
816 NEON_ALL_LANES case.
817
94dcf8bf
JB		 8182013-04-08 Jan Beulich <jbeulich@suse.com>
819
820 * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for
821 PC-relative VSTR.
822
1472d06f
JB		 8232013-04-08 Jan Beulich <jbeulich@suse.com>
824
825 * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq
826 entry to sp_fiq.
827
0c76cae8
AM		 8282013-04-03 Alan Modra <amodra@gmail.com>
829
830 * doc/as.texinfo: Add support to generate man options for h8300.
831 * doc/c-h8300.texi: Likewise.
832
92eb40d9
RR		 8332013-03-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
834
835 * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and
836 Cortex-A57.
837
51dcdd4d
NC		 8382013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com>
839
840 PR binutils/15068
841 * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array.
842
c5d685bf
NC		 8432013-03-26 Nick Clifton <nickc@redhat.com>
844
9b978282
NC		 845 PR gas/15295
846 * listing.c (rebuffer_line): Rewrite to avoid seeking back to the
847 start of the file each time.
848
c5d685bf
NC		 849 PR gas/15178
850 * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for
851 FreeBSD targets.
852
9699c833
TG		 8532013-03-26 Douglas B Rupp <rupp@gnat.com>
854
855 * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment
856 after fixup.
857
4755303e
WN		 8582013-03-21 Will Newton <will.newton@linaro.org>
859
860 * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all
861 pc-relative str instructions in Thumb mode.
862
81f5558e
NC		 8632013-03-21 Michael Schewe <michael.schewe@gmx.net>
864
865 * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
866 @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
867 R_H8_DISP32A16.
868 * config/tc-h8300.h: Remove duplicated defines.
869
71863e73
NC		 8702013-03-21 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
871
872 PR gas/15282
873 * tc-avr.c (mcu_has_3_byte_pc): New function.
874 (tc_cfi_frame_initial_instructions): Call it to find return
875 address size.
876
795b8e6b
NC		 8772013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com>
878
879 PR gas/15095
880 * config/tc-tic6x.c (tic6x_try_encode): Handle
881 tic6x_coding_dreg_(msb|lsb) field coding types and use it to
882 encode register pair numbers when required.
883
ba86b375
WN		 8842013-03-15 Will Newton <will.newton@linaro.org>
885
886 * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register
887 in vstr in Thumb mode for pre-ARMv7 cores.
888
9e6f3811
AS		 8892013-03-14 Andreas Schwab <schwab@suse.de>
890
891 * doc/c-arc.texi (ARC Directives): Revert last change and use
892 @itemize instead of @table.
893 * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
894
b10bf8c5
NC		 8952013-03-14 Nick Clifton <nickc@redhat.com>
896
897 PR gas/15273
898 * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a
899 NULL message, instead just check ARM_CPU_IS_ANY directly.
900
ba724cfc
NC		 9012013-03-14 Nick Clifton <nickc@redhat.com>
902
903 PR gas/15212
9e6f3811 904 * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet
ba724cfc
NC		 905 for table format.
906 * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
907 to the @item directives.
908 (ARM-Neon-Alignment): Move to correct place in the document.
909 * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
910 formatting.
911 * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
912 @smallexample.
913
531a94fd
SL		 9142013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
915
916 * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'
917 case. Add default BAD_CASE to switch.
918
dad60f8e
SL		 9192013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
920
921 * config/tc-nios2.c (nios2_assemble_args_ds): New function.
922 (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
923
dd5181d5
KT		 9242013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
925
926 * config/tc-arm.c (crc_ext_armv8): New feature set.
927 (UNPRED_REG): New macro.
928 (do_crc32_1): New function.
929 (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
930 do_crc32ch, do_crc32cw): Likewise.
931 (TUEc): New macro.
932 (insns): Add entries for crc32 mnemonics.
933 (arm_extensions): Add entry for crc.
934
8e723a10
CLT		 9352013-03-08 Chung-Lin Tang <cltang@codesourcery.com>
936
937 * write.h (struct fix): Add fx_dot_frag field.
938 (dot_frag): Declare.
939 * write.c (dot_frag): New variable.
940 (fix_new_internal): Set fx_dot_frag field with dot_frag.
941 (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
942 * expr.c (expr): Save value of frag_now in dot_frag when setting
943 dot_value.
944 * read.c (emit_expr): Likewise. Delete comments.
945
be05d201
L		 9462013-03-07 H.J. Lu <hongjiu.lu@intel.com>
947
948 * config/tc-i386.c (flag_code_names): Removed.
949 (i386_index_check): Rewrote.
950
62b0d0d5
YZ		 9512013-03-05 Yufeng Zhang <yufeng.zhang@arm.com>
952
953 * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
954 add comment.
955 (aarch64_double_precision_fmovable): New function.
956 (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
957 function; handle hexadecimal representation of IEEE754 encoding.
958 (parse_operands): Update the call to parse_aarch64_imm_float.
959
165de32a
L		 9602013-02-28 H.J. Lu <hongjiu.lu@intel.com>
961
962 * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
963 (check_hle): Updated.
964 (md_assemble): Likewise.
965 (parse_insn): Likewise.
966
d5de92cf
L		 9672013-02-28 H.J. Lu <hongjiu.lu@intel.com>
968
969 * config/tc-i386.c (_i386_insn): Add rep_prefix.
9e6f3811 970 (md_assemble): Check if REP prefix is OK.
d5de92cf
L		 971 (parse_insn): Remove expecting_string_instruction. Set
972 i.rep_prefix.
973
e60bb1dd
YZ		 9742013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
975
976 * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
977
aeebdd9b
YZ		 9782013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
979
980 * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
981 for system registers.
982
4107ae22
DD		 9832013-02-27 DJ Delorie <dj@redhat.com>
984
985 * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
986 (rl78_op): Handle %code().
987 (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
988 (tc_gen_reloc): Likwise; convert to a computed reloc.
989 (md_apply_fix): Likewise.
990
151fa98f
NC		 9912013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
992
993 * config/rl78-parse.y: Fix encoding of DIVWU insn.
994
70a8bc5b 9952013-02-25 Terry Guo <terry.guo@arm.com>
996
997 * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
998 * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
999 list of accepted CPUs.
1000
5c111e37
L		 10012013-02-19 H.J. Lu <hongjiu.lu@intel.com>
1002
1003 PR gas/15159
1004 * config/tc-i386.c (cpu_arch): Add ".smap".
1005
1006 * doc/c-i386.texi: Document smap.
1007
8a75745d
MR		 10082013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1009
1010 * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
1011 mips_assembling_insn appropriately.
1012 (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
1013
79850f26
MR		 10142013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1015
cf29fc61 1016 * config/tc-mips.c (append_insn): Correct indentation, remove
79850f26
MR		 1017 extraneous braces.
1018
4c261dff
NC		 10192013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1020
5c111e37 1021 * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
4c261dff 1022
ea33f281
NC		 10232013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
1024
1025 * configure.tgt: Add nios2-*-rtems*.
1026
a1ccaec9
YZ		 10272013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
1028
1029 * config/tc-aarch64.c (md_begin): Change to check if 'name' is
1030 NULL.
1031
0aa27725
RS		 10322013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
1033
1034 * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
1035 (macro): Use it. Assert that trunc.w.s is not used for r5900.
1036
da4339ed
NC		 10372013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com>
1038
1039 * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
1040 core.
1041
36591ba1 10422013-02-06 Sandra Loosemore <sandra@codesourcery.com>
5c111e37 1043 Andrew Jenner <andrew@codesourcery.com>
36591ba1
SL		 1044
1045 Based on patches from Altera Corporation.
1046
1047 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
1048 (TARGET_CPU_HFILES): Add config/tc-nios2.h.
1049 * Makefile.in: Regenerated.
1050 * configure.tgt: Add case for nios2*-linux*.
1051 * config/obj-elf.c: Conditionally include elf/nios2.h.
1052 * config/tc-nios2.c: New file.
1053 * config/tc-nios2.h: New file.
1054 * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
1055 * doc/Makefile.in: Regenerated.
1056 * doc/all.texi: Set NIOSII.
1057 * doc/as.texinfo (Overview): Add Nios II options.
1058 (Machine Dependencies): Include c-nios2.texi.
1059 * doc/c-nios2.texi: New file.
1060 * NEWS: Note Altera Nios II support.
1061
94d4433a
AM		 10622013-02-06 Alan Modra <amodra@gmail.com>
1063
1064 PR gas/14255
1065 * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
1066 Don't skip fixups with fx_subsy non-NULL.
1067 * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
1068 with fx_subsy non-NULL.
1069
ace9af6f
L		 10702013-02-04 H.J. Lu <hongjiu.lu@intel.com>
1071
1072 * doc/c-metag.texi: Add "@c man" markers.
1073
89d67ed9
AM		 10742013-02-04 Alan Modra <amodra@gmail.com>
1075
1076 * write.c (fixup_segment): Return void. Delete seg_reloc_count
1077 related code.
1078 (TC_ADJUST_RELOC_COUNT): Delete.
1079 * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
1080
89072bd6
AM		 10812013-02-04 Alan Modra <amodra@gmail.com>
1082
1083 * po/POTFILES.in: Regenerate.
1084
f9b2d544
NC		 10852013-01-30 Markos Chandras <markos.chandras@imgtec.com>
1086
1087 * config/tc-metag.c: Make SWAP instruction less permissive with
1088 its operands.
1089
392ca752
DD		 10902013-01-29 DJ Delorie <dj@redhat.com>
1091
1092 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
1093 relocs in .word/.etc statements.
1094
427d0db6
RM		 10952013-01-29 Roland McGrath <mcgrathr@google.com>
1096
1097 * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
1098 immediate value for 8-bit offset" error so it shows line info.
1099
4faf939a
JM		 11002013-01-24 Joseph Myers <joseph@codesourcery.com>
1101
1102 * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
1103 for 64-bit output.
1104
78c8d46c
NC		 11052013-01-24 Nick Clifton <nickc@redhat.com>
1106
1107 * config/tc-v850.c: Add support for e3v5 architecture.
1108 * doc/c-v850.texi: Mention new support.
1109
fb5b7503
NC		 11102013-01-23 Nick Clifton <nickc@redhat.com>
1111
1112 PR gas/15039
1113 * config/tc-avr.c: Include dwarf2dbg.h.
1114
8ce3d284
L		 11152013-01-18 H.J. Lu <hongjiu.lu@intel.com>
1116
1117 * config/tc-i386.c (reloc): Support size relocation only for ELF.
1118 (tc_i386_fix_adjustable): Likewise.
1119 (lex_got): Likewise.
1120 (tc_gen_reloc): Likewise.
1121
f5555712
YZ		 11222013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
1123
1124 * config/tc-aarch64.c (output_operand_error_record): Change to output
1125 the out-of-range error message as value-expected message if there is
1126 only one single value in the expected range.
1127 (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
1128 LSL #0 as a programmer-friendly feature.
1129
8fd4256d
L		 11302013-01-16 H.J. Lu <hongjiu.lu@intel.com>
1131
1132 * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
1133 (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
1134 BFD_RELOC_64_SIZE relocations.
1135 (lex_got): Support "symbol@SIZE" and don't create GOT symbol
1136 for it.
1137 (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
1138 relocations against local symbols.
1139
a5840dce
AM		 11402013-01-16 Alan Modra <amodra@gmail.com>
1141
1142 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
1143 finding some sort of toc syntax error, and break to avoid
1144 compiler uninit warning.
1145
af89796a
L		 11462013-01-15 H.J. Lu <hongjiu.lu@intel.com>
1147
1148 PR gas/15019
1149 * config/tc-i386.c (lex_got): Increment length by 1 if the
1150 relocation token is removed.
1151
dd42f060
NC		 11522013-01-15 Nick Clifton <nickc@redhat.com>
1153
1154 * config/tc-v850.c (md_assemble): Allow signed values for
1155 V850E_IMMEDIATE.
1156
464e3686
SK		 11572013-01-11 Sean Keys <skeys@ipdatasys.com>
1158
1159 * config/tc-xgate.c (md_begin): Fix mistake made when going from
af89796a 1160 git to cvs.
464e3686 1161
5817ffd1
PB		 11622013-01-10 Peter Bergner <bergner@vnet.ibm.com>
1163
1164 * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
1165 * doc/c-ppc.texi (PowerPC-Opts): Likewise.
1166 * config/tc-ppc.c (md_show_usage): Likewise.
1167 (ppc_handle_align): Handle power8's group ending nop.
1168
f4b1f6a9
SK		 11692013-01-10 Sean Keys <skeys@ipdatasys.com>
1170
1171 * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
af89796a 1172 that the assember exits after the opcodes have been printed.
f4b1f6a9 1173
34bca508
L		 11742013-01-10 H.J. Lu <hongjiu.lu@intel.com>
1175
1176 * app.c: Remove trailing white spaces.
1177 * as.c: Likewise.
1178 * as.h: Likewise.
1179 * cond.c: Likewise.
1180 * dw2gencfi.c: Likewise.
1181 * dwarf2dbg.h: Likewise.
1182 * ecoff.c: Likewise.
1183 * input-file.c: Likewise.
1184 * itbl-lex.h: Likewise.
1185 * output-file.c: Likewise.
1186 * read.c: Likewise.
1187 * sb.c: Likewise.
1188 * subsegs.c: Likewise.
1189 * symbols.c: Likewise.
1190 * write.c: Likewise.
1191 * config/tc-i386.c: Likewise.
1192 * doc/Makefile.am: Likewise.
1193 * doc/Makefile.in: Likewise.
1194 * doc/c-aarch64.texi: Likewise.
1195 * doc/c-alpha.texi: Likewise.
1196 * doc/c-arc.texi: Likewise.
1197 * doc/c-arm.texi: Likewise.
1198 * doc/c-avr.texi: Likewise.
1199 * doc/c-bfin.texi: Likewise.
1200 * doc/c-cr16.texi: Likewise.
1201 * doc/c-d10v.texi: Likewise.
1202 * doc/c-d30v.texi: Likewise.
1203 * doc/c-h8300.texi: Likewise.
1204 * doc/c-hppa.texi: Likewise.
1205 * doc/c-i370.texi: Likewise.
1206 * doc/c-i386.texi: Likewise.
1207 * doc/c-i860.texi: Likewise.
1208 * doc/c-m32c.texi: Likewise.
1209 * doc/c-m32r.texi: Likewise.
1210 * doc/c-m68hc11.texi: Likewise.
1211 * doc/c-m68k.texi: Likewise.
1212 * doc/c-microblaze.texi: Likewise.
1213 * doc/c-mips.texi: Likewise.
1214 * doc/c-msp430.texi: Likewise.
1215 * doc/c-mt.texi: Likewise.
1216 * doc/c-s390.texi: Likewise.
1217 * doc/c-score.texi: Likewise.
1218 * doc/c-sh.texi: Likewise.
1219 * doc/c-sh64.texi: Likewise.
1220 * doc/c-tic54x.texi: Likewise.
1221 * doc/c-tic6x.texi: Likewise.
1222 * doc/c-v850.texi: Likewise.
1223 * doc/c-xc16x.texi: Likewise.
1224 * doc/c-xgate.texi: Likewise.
1225 * doc/c-xtensa.texi: Likewise.
1226 * doc/c-z80.texi: Likewise.
1227 * doc/internals.texi: Likewise.
1228
4c665b71
RM		 12292013-01-10 Roland McGrath <mcgrathr@google.com>
1230
1231 * hash.c (hash_new_sized): Make it global.
1232 * hash.h: Declare it.
1233 * macro.c (define_macro): Use hash_new_sized instead of hash_new,
1234 pass a small size.
1235
a3c62988
NC		 12362013-01-10 Will Newton <will.newton@imgtec.com>
1237
1238 * Makefile.am: Add Meta.
1239 * Makefile.in: Regenerate.
1240 * config/tc-metag.c: New file.
1241 * config/tc-metag.h: New file.
1242 * configure.tgt: Add Meta.
1243 * doc/Makefile.am: Add Meta.
1244 * doc/Makefile.in: Regenerate.
1245 * doc/all.texi: Add Meta.
1246 * doc/as.texiinfo: Document Meta options.
1247 * doc/c-metag.texi: New file.
1248
b37df7c4
SE		 12492013-01-09 Steve Ellcey <sellcey@mips.com>
1250
1251 * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
1252 calls.
1253 * config/tc-mips.c (internalError): Remove, replace with abort.
1254
a3251895
YZ		 12552013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
1256
1257 * config/tc-aarch64.c (parse_operands): Change to compare the result
1258 of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
1259
8ab8155f
NC		 12602013-01-07 Nick Clifton <nickc@redhat.com>
1261
1262 PR gas/14887
1263 * config/tc-arm.c (skip_past_char): Skip whitespace before the
1264 anticipated character.
1265 * config/tc-arm.c (parse_address_main): Delete skip of whitespace
1266 here as it is no longer needed.
1267
a4ac1c42
AS		 12682013-01-06 Andreas Schwab <schwab@linux-m68k.org>
1269
1270 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
1271 * doc/c-score.texi (SCORE-Opts): Likewise.
1272 * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
1273
e407c74b
NC		 12742013-01-04 Juergen Urban <JuergenUrban@gmx.de>
1275
1276 * config/tc-mips.c: Add support for MIPS r5900.
1277 Add M_LQ_AB and M_SQ_AB to support large values for instructions
1278 lq and sq.
1279 (can_swap_branch_p, get_append_method): Detect some conditional
1280 short loops to fix a bug on the r5900 by NOP in the branch delay
1281 slot.
1282 (M_MUL): Support 3 operands in multu on r5900.
1283 (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
1284 (s_mipsset): Force 32 bit floating point on r5900.
1285 (mips_ip): Check parameter range of instructions mfps and mtps on
1286 r5900.
1287 * configure.in: Detect CPU type when target string contains r5900
1288 (e.g. mips64r5900el-linux-gnu).
1289
62658407
L		 12902013-01-02 H.J. Lu <hongjiu.lu@intel.com>
1291
1292 * as.c (parse_args): Update copyright year to 2013.
1293
95830fd1
YZ		 12942013-01-02 Yufeng Zhang <yufeng.zhang@arm.com>
1295
1296 * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
1297 and "cortex57".
1298
517bb291 12992013-01-02 Nick Clifton <nickc@redhat.com>
d709e4e6 1300
517bb291
NC		 1301 PR gas/14987
1302 * config/tc-arm.c (parse_address_main): Skip whitespace before a
1303 closing bracket.
d709e4e6 1304
517bb291 1305For older changes see ChangeLog-2012
08d56133 1306\f
517bb291 1307Copyright (C) 2013 Free Software Foundation, Inc.
752937aa
NC		 1308
1309Copying and distribution of this file, with or without modification,
1310are permitted in any medium without royalty provided the copyright
1311notice and this notice are preserved.
1312
08d56133
NC		 1313Local Variables:
1314mode: change-log
1315left-margin: 8
1316fill-column: 74
1317version-control: never
1318End:
A mirror of the official binutils-gdb repository