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* opncls.c (get_alt_debug_link_info_shim): Update type of 'len'.
[thirdparty/binutils-gdb.git] / gas / ChangeLog
CommitLineData
cecf1424
JB
12013-10-08 Jan Beulich <jbeulich@suse.com>
2
3 * tc-i386.c (check_word_reg): Remove misplaced "else".
4 (check_long_reg): Restore symmetry with check_word_reg.
5
d3bfe16e
JB
62013-10-08 Jan Beulich <jbeulich@suse.com>
7
8 * gas/config/tc-arm.c (do_t_push_pop): Honor inst.size_req. Simplify
9 LR/PC check.
10
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NC
112013-10-08 Nick Clifton <nickc@redhat.com>
12
13 * config/tc-msp430.c (msp430_operands): Accept "<foo>.a" as an alias
14 for "<foo>a". Issue error messages for unrecognised or corrrupt
15 size extensions.
16
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172013-10-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
18
19 * config/tc-arm.c (do_t_mvn_tst): Use narrow form for tst when
20 possible.
21
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222013-09-30 Saravanan Ekanathan <saravanan.ekanathan@amd.com>
23
24 * config/tc-i386.c (cpu_arch): Add CPU_BDVER4_FLAGS.
25 * doc/c-i386.texi: Add -march=bdver4 option.
26
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272013-09-20 Alan Modra <amodra@gmail.com>
28
29 * configure: Regenerate.
30
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312013-09-18 Tristan Gingold <gingold@adacore.com>
32
33 * NEWS: Add marker for 2.24.
34
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352013-09-18 Nick Clifton <nickc@redhat.com>
36
37 * config/tc-msp430.c (OPTION_MOVE_DATA): Define.
38 (move_data): New variable.
39 (md_parse_option): Parse -md.
40 (msp430_section): New function. Catch references to the .bss or
41 .data sections and generate a special symbol for use by the libcrt
42 library.
43 (md_pseudo_table): Intercept .section directives.
44 (md_longopt): Add -md
45 (md_show_usage): Likewise.
46 (msp430_operands): Generate a warning message if a NOP is inserted
47 into the instruction stream.
48 * doc/c-msp430.texi (node MSP430 Options): Document -md option.
49
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502013-09-17 Doug Gilmore <Doug.Gilmore@imgtec.com>
51
52 * config/tc-mips.c (mips_elf_final_processing): Set
ab905915 53 EF_MIPS_FP64 for -mgp32 -mfp64, removing old FIXME.
f1c38003 54
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552013-09-16 Will Newton <will.newton@linaro.org>
56
57 * config/tc-arm.c (do_neon_ld_st_interleave): Add constraint
58 disallowing element size 64 with interleave other than 1.
59
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602013-09-12 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
61
62 * config/tc-mips.c (match_insn): Set error when $31 is used for
63 bltzal* and bgezal*.
64
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652013-09-04 Tristan Gingold <gingold@adacore.com>
66
67 * config/tc-ppc.c (md_apply_fix): Handle defined after use toc
68 symbols.
69
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702013-09-04 Roland McGrath <mcgrathr@google.com>
71
72 PR gas/15914
73 * config/tc-arm.c (T16_32_TAB): Add _udf.
74 (do_t_udf): New function.
75 (insns): Add "udf".
76
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772013-08-23 Sandeep Kumar Singh <Sandeep.Singh2@kpitcummins.com>
78
79 * config/rx-parse.y: Rearrange the components of a bison grammar to issue
80 assembler errors at correct position.
81
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822013-08-23 Yuri Chornoivan <yurchor@ukr.net>
83
84 PR binutils/15834
85 * config/tc-ia64.c: Fix typos.
86 * config/tc-sparc.c: Likewise.
87 * config/tc-z80.c: Likewise.
88 * doc/c-i386.texi: Likewise.
89 * doc/c-m32r.texi: Likewise.
90
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912013-08-23 Will Newton <will.newton@linaro.org>
92
9aff4b7a 93 * config/tc-arm.c: (do_neon_ldx_stx): Add extra constraints
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94 for pre-indexed addressing modes.
95
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962013-08-21 Alan Modra <amodra@gmail.com>
97
98 * symbols.c (fb_label_instance_inc, fb_label_instance): Properly
99 range check label number for use with fb_low_counter array.
100
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1012013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
102
103 * config/tc-mips.c (mips_check_isa_supports_ase, reg_lookup)
104 (mips_parse_argument_token, validate_micromips_insn, md_begin)
105 (check_regno, match_float_constant, check_completed_insn, append_insn)
106 (match_insn, match_mips16_insn, match_insns, macro_start)
107 (macro_build_ldst_constoffset, load_register, macro, mips_ip)
108 (mips16_ip, mips_set_option_string, md_parse_option)
109 (mips_after_parse_args, mips_after_parse_args, md_pcrel_from)
110 (md_apply_fix, s_align, s_option, s_mipsset, s_tls_rel_directive)
111 (s_gpword, s_gpdword, s_ehword, s_nan, tc_gen_reloc, md_convert_frag)
112 (s_mips_end, s_mips_ent, s_mips_frame, s_mips_mask, mips_parse_cpu):
113 Start error messages with a lower-case letter. Do not end error
114 messages with a period. Wrap long messages to 80 character-lines.
115 Use "cannot" instead of "can't" and "can not".
116
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1172013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
118
119 * config/tc-mips.c (imm_expr): Expand comment.
120 (set_at, macro, mips16_macro): Expect imm_expr to be O_constant
121 when populated.
122
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1232013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
124
125 * config/tc-mips.c (imm2_expr): Delete.
126 (md_assemble, match_insn, imm2_expr.X_op, mips_ip): Update accordingly.
127
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1282013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
129
130 * config/tc-mips.c (report_bad_range, report_bad_field): Delete.
131 (macro): Remove M_DEXT and M_DINS handling.
132
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1332013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
134
135 * config/tc-mips.c (mips_arg_info): Replace allow_nonconst and
136 lax_max with lax_match.
137 (match_int_operand): Update accordingly. Don't report an error
138 for !lax_match-only cases.
139 (match_insn): Replace more_alts with lax_match and use it to
140 initialize the mips_arg_info field. Add a complete_p parameter.
141 Handle implicit VU0 suffixes here.
142 (match_invalid_for_isa, match_insns, match_mips16_insns): New
143 functions.
144 (mips_ip, mips16_ip): Use them.
145
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1462013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
147
148 * config/tc-mips.c (match_expression): Report uses of registers here.
149 Add a "must be an immediate expression" error. Handle elided offsets
150 here rather than...
151 (match_int_operand): ...here.
152
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1532013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
154
155 * config/tc-mips.c (mips_arg_info): Remove soft_match.
156 (match_out_of_range, match_not_constant): New functions.
157 (match_const_int): Remove fallback parameter and check for soft_match.
158 Use match_not_constant.
159 (match_mapped_int_operand, match_addiusp_operand)
160 (match_perf_reg_operand, match_save_restore_list_operand)
161 (match_mdmx_imm_reg_operand): Update accordingly. Use
162 match_out_of_range and set_insn_error* instead of as_bad.
163 (match_int_operand): Likewise. Use match_not_constant in the
164 !allows_nonconst case.
165 (match_float_constant): Report invalid float constants.
166 (match_insn, match_mips16_insn): Remove soft_match code. Rely on
167 match_float_constant to check for invalid constants. Fail the
168 match if match_const_int or match_float_constant return false.
169 (mips_ip): Update accordingly.
170 (mips16_ip): Likewise. Undo null termination of instruction name
171 once lookup is complete.
172
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1732013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
174
175 * config/tc-mips.c (mips_insn_error_format): New enum.
176 (mips_insn_error): New struct.
177 (insn_error): Change to a mips_insn_error.
178 (clear_insn_error, set_insn_error_format, set_insn_error)
179 (set_insn_error_i, set_insn_error_ss, report_insn_error): New
180 functions.
181 (mips_parse_argument_token, md_assemble, match_insn)
182 (match_mips16_insn): Use them instead of manipulating insn_error
183 directly.
184 (mips_ip, mips16_ip): Likewise. Simplify control flow.
185
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1862013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
187
188 * config/tc-mips.c (normalize_constant_expr): Move further up file.
189 (normalize_address_expr): Likewise.
190 (match_insn, match_mips16_insn): New functions, split out from...
191 (mips_ip, mips16_ip): ...here.
192
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1932013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
194
195 * config/tc-mips.c (operand_reg_mask, match_operand): Handle
196 OP_OPTIONAL_REG.
197 (mips_ip, mips16_ip): Use mips_optional_operand_p to check
198 for optional operands.
199
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2002013-08-16 Alan Modra <amodra@gmail.com>
201
202 * config/tc-ppc.c (ppc_elf_cons): Allow @l and other reloc
203 modifiers generally.
204
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2052013-08-16 Alan Modra <amodra@gmail.com>
206
207 * config/tc-ppc.c (ppc_elf_lcomm): Use subsection 1.
208
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2092013-08-14 David Edelsohn <dje.gcc@gmail.com>
210
211 * config/tc-ppc.c (ppc_comm): Accept optional fourth .lcomm
212 argument as alignment.
213
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2142013-08-09 Nick Clifton <nickc@redhat.com>
215
216 * config/tc-rl78.c (elf_flags): New variable.
217 (enum options): Add OPTION_G10.
218 (md_longopts): Add mg10.
219 (md_parse_option): Parse -mg10.
220 (rl78_elf_final_processing): New function.
221 * config/tc-rl78.c (tc_final_processing): Define.
222 * doc/c-rl78.texi: Document -mg10 option.
223
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2242013-08-06 Jürgen Urban <JuergenUrban@gmx.de>
225
226 * config/tc-mips.c (match_vu0_suffix_operand): Allow single-channel
227 suffixes to be elided too.
228 (mips_lookup_insn): Don't reject INSN2_VU0_CHANNEL_SUFFIX here.
229 (mips_ip): Assume .xyzw if no VU0 suffix is specified. Allow +N
230 to be omitted too.
231
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2322013-08-05 John Tytgat <john@bass-software.com>
233
234 * po/POTFILES.in: Regenerate.
235
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2362013-08-05 Eric Botcazou <ebotcazou@adacore.com>
237 Konrad Eisele <konrad@gaisler.com>
238
239 * config/tc-sparc.c (sparc_arch_types): Add leon.
240 (sparc_arch): Move sparc4 around and add leon.
241 (sparc_target_format): Document -Aleon.
242 * doc/c-sparc.texi: Likewise.
243
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2442013-08-05 Richard Sandiford <rdsandiford@googlemail.com>
245
246 * config/tc-mips.c (mips_lookup_insn): Make length and opend signed.
247
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2482013-08-04 Jürgen Urban <JuergenUrban@gmx.de>
249 Richard Sandiford <rdsandiford@googlemail.com>
250
251 * config/tc-mips.c (MAX_OPERANDS): Bump to 6.
252 (RWARN): Bump to 0x8000000.
253 (RTYPE_VI, RTYPE_VF, RTYPE_R5900_I, RTYPE_R5900_Q, RTYPE_R5900_R)
254 (RTYPE_R5900_ACC): New register types.
255 (RTYPE_MASK): Include them.
256 (R5900_I_NAMES, R5900_Q_NAMES, R5900_R_NAMES, R5900_ACC_NAMES): New
257 macros.
258 (reg_names): Include them.
259 (mips_parse_register_1): New function, split out from...
260 (mips_parse_register): ...here. Add a channels_ptr parameter.
261 Look for VU0 channel suffixes when nonnull.
262 (reg_lookup): Update the call to mips_parse_register.
263 (mips_parse_vu0_channels): New function.
264 (OT_CHANNELS, OT_DOUBLE_CHAR): New mips_operand_token_types.
265 (mips_operand_token): Add a "channels" field to the union.
266 Extend the comment above "ch" to OT_DOUBLE_CHAR.
267 (mips_parse_base_start): Match -- and ++. Handle channel suffixes.
268 (mips_parse_argument_token): Handle channel suffixes here too.
269 (validate_mips_insn): Handle INSN2_VU0_CHANNEL_SUFFIX.
270 Ignore OP_VU0_MATCH_SUFFIX when calculating the used bits.
271 Handle '#' formats.
272 (md_begin): Register $vfN and $vfI registers.
273 (operand_reg_mask): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX.
274 (convert_reg_type): Handle OP_REG_VI, OP_REG_VF, OP_REG_R5900_I,
275 OP_REG_R5900_Q, OP_REG_R5900_R and OP_REG_R5900_ACC.
276 (match_vu0_suffix_operand): New function.
277 (match_operand): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX.
278 (macro): Use "+7" rather than "E" for LDQ2 and STQ2.
279 (mips_lookup_insn): New function.
280 (mips_ip): Use it. Allow "+K" operands to be elided at the end
281 of an instruction. Handle '#' sequences.
282
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2832013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
284
285 * config/tc-mips.c (macro, mips16_macro): Create an array of operand
286 values and use it instead of sreg, treg, xreg, etc.
287
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2882013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
289
290 * config/tc-mips.c (match_int_operand): Use mips_int_operand_min
291 and mips_int_operand_max.
292 (mips16_immed_operand, mips16_immed_operands, MIPS16_NUM_IMMED):
293 Delete.
294 (mips16_immed_operand, mips16_immed_in_range_p): New functions.
295 (mips16_immed, mips16_extended_frag): Use them. Use mips_int_operand
296 instead of mips16_immed_operand.
297
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2982013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
299
300 * config/tc-mips.c (mips16_macro): Don't use move_register.
301 (mips16_ip): Allow macros to use 'p'.
302
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3032013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
304
305 * config/tc-mips.c (MAX_OPERANDS): New macro.
306 (mips_operand_array): New structure.
307 (mips_operands, mips16_operands, micromips_operands): New arrays.
308 (micromips_to_32_reg_b_map, micromips_to_32_reg_c_map)
309 (micromips_to_32_reg_e_map, micromips_to_32_reg_f_map)
310 (micromips_to_32_reg_g_map, micromips_to_32_reg_l_map)
311 (micromips_to_32_reg_q_map): Delete.
312 (insn_operands, insn_opno, insn_extract_operand): New functions.
313 (validate_mips_insn): Take a mips_operand_array as argument and
314 use it to build up a list of operands. Extend to handle INSN_MACRO
315 and MIPS16.
316 (validate_mips16_insn): New function.
317 (validate_micromips_insn): Take a mips_operand_array as argument.
318 Handle INSN_MACRO.
319 (md_begin): Initialize mips_operands, mips16_operands and
320 micromips_operands. Call validate_mips_insn and
321 validate_micromips_insn for macro instructions too.
322 Call validate_mips16_insn for MIPS16 instructions.
323 (insn_read_mask, insn_write_mask, operand_reg_mask, insn_reg_mask):
324 New functions.
325 (gpr_read_mask, gpr_write_mask, fpr_read_mask, fpr_write_mask): Use
326 them. Handle INSN_UDI.
327 (get_append_method): Use gpr_read_mask.
328
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3292013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
330
331 * config/tc-mips.c (compact_branch_p, uncond_branch_p): Use the same
332 flags for MIPS16 and non-MIPS16 instructions.
333 (gpr_mod_mask): Move the INSN2_MOD_SP case outside the micromips block.
334 (gpr_read_mask): Use INSN2_READ_GPR_31 for MIPS16 instructions too.
335 (gpr_write_mask): Remove MIPS16_INSN_WRITE_SP handling.
336 (can_swap_branch_p, get_append_method): Use the same flags for MIPS16
337 and non-MIPS16 instructions. Fix formatting.
338
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3392013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
340
341 * config/tc-mips.c (reg_needs_delay): Move later in file.
342 Use gpr_write_mask.
343 (insns_between): Use gpr_read_mask instead of EXTRACT_OPERAND.
344
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3452013-07-26 Sergey Guriev <sergey.s.guriev@intel.com>
346 Alexander Ivchenko <alexander.ivchenko@intel.com>
347 Maxim Kuznetsov <maxim.kuznetsov@intel.com>
348 Sergey Lega <sergey.s.lega@intel.com>
349 Anna Tikhonova <anna.tikhonova@intel.com>
350 Ilya Tocar <ilya.tocar@intel.com>
351 Andrey Turetskiy <andrey.turetskiy@intel.com>
352 Ilya Verbin <ilya.verbin@intel.com>
353 Kirill Yukhin <kirill.yukhin@intel.com>
354 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
355
356 * config/tc-i386-intel.c (O_zmmword_ptr): New.
357 (i386_types): Add zmmword.
358 (i386_intel_simplify_register): Allow regzmm.
359 (i386_intel_simplify): Handle zmmwords.
360 (i386_intel_operand): Handle RC/SAE, vector operations and
361 zmmwords.
362 * config/tc-i386.c (ZMMWORD_MNEM_SUFFIX): New.
363 (struct RC_Operation): New.
364 (struct Mask_Operation): New.
365 (struct Broadcast_Operation): New.
366 (vex_prefix): Size of bytes increased to 4 to support EVEX
367 encoding.
368 (enum i386_error): Add new error codes: unsupported_broadcast,
369 broadcast_not_on_src_operand, broadcast_needed,
370 unsupported_masking, mask_not_on_destination, no_default_mask,
371 unsupported_rc_sae, rc_sae_operand_not_last_imm,
372 invalid_register_operand, try_vector_disp8.
373 (struct _i386_insn): Add new fields vrex, need_vrex, mask,
374 rounding, broadcast, memshift.
375 (struct RC_name): New.
376 (RC_NamesTable): New.
377 (evexlig): New.
378 (evexwig): New.
379 (extra_symbol_chars): Add '{'.
380 (cpu_arch): Add AVX512F, AVX512CD, AVX512ER and AVX512PF.
381 (i386_operand_type): Add regzmm, regmask and vec_disp8.
382 (match_mem_size): Handle zmmwords.
383 (operand_type_match): Handle zmm-registers.
384 (mode_from_disp_size): Handle vec_disp8.
385 (fits_in_vec_disp8): New.
386 (md_begin): Handle {} properly.
387 (type_names): Add "rZMM", "Mask reg" and "Vector d8".
388 (build_vex_prefix): Handle vrex.
389 (build_evex_prefix): New.
390 (process_immext): Adjust to properly handle EVEX.
391 (md_assemble): Add EVEX encoding support.
392 (swap_2_operands): Correctly handle operands with masking,
393 broadcasting or RC/SAE.
394 (check_VecOperands): Support EVEX features.
395 (VEX_check_operands): Properly handle 16 upper [xyz]mm registers.
396 (match_template): Support regzmm and handle new error codes.
397 (process_suffix): Handle zmmwords and zmm-registers.
398 (check_byte_reg): Extend to zmm-registers.
399 (process_operands): Extend to zmm-registers.
400 (build_modrm_byte): Handle EVEX.
401 (output_insn): Adjust to properly handle EVEX case.
402 (disp_size): Handle vec_disp8.
403 (output_disp): Support compressed disp8*N evex feature.
404 (output_imm): Handle RC/SAE immediates properly.
405 (check_VecOperations): New.
406 (i386_immediate): Handle EVEX features.
407 (i386_index_check): Handle zmmwords and zmm-registers.
408 (RC_SAE_immediate): New.
409 (i386_att_operand): Handle EVEX features.
410 (parse_real_register): Add a check for ZMM/Mask registers.
411 (OPTION_MEVEXLIG): New.
412 (OPTION_MEVEXWIG): New.
413 (md_longopts): Add mevexlig and mevexwig.
414 (md_parse_option): Handle mevexlig and mevexwig options.
415 (md_show_usage): Add description for mevexlig and mevexwig.
416 * doc/c-i386.texi: Document avx512f/.avx512f, avx512cd/.avx512cd,
417 avx512er/.avx512er, avx512pf/.avx512pf, mevexlig and mevexwig.
418
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4192013-07-25 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
420
421 * config/tc-i386.c (cpu_arch): Add .sha.
422 * doc/c-i386.texi: Document sha/.sha.
423
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4242013-07-24 Anna Tikhonova <anna.tikhonova@intel.com>
425 Kirill Yukhin <kirill.yukhin@intel.com>
426 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
427
428 * config/tc-i386.c (BND_PREFIX): New.
429 (struct _i386_insn): Add new field bnd_prefix.
430 (add_bnd_prefix): New.
431 (cpu_arch): Add MPX.
432 (i386_operand_type): Add regbnd.
433 (md_assemble): Handle BND prefixes.
434 (parse_insn): Likewise.
435 (output_branch): Likewise.
436 (output_jump): Likewise.
437 (build_modrm_byte): Handle regbnd.
438 (OPTION_MADD_BND_PREFIX): New.
439 (md_longopts): Add entry for 'madd-bnd-prefix'.
440 (md_parse_option): Handle madd-bnd-prefix option.
441 (md_show_usage): Add description for madd-bnd-prefix
442 option.
443 * doc/c-i386.texi: Document mpx/.mpx and -madd-bnd-prefix.
444
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4452013-07-24 Tristan Gingold <gingold@adacore.com>
446
447 * config/tc-ppc.c (md_apply_fix): Adjust BFD_RELOC_PPC_B16 on
448 xcoff targets.
449
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4502013-07-24 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
451
452 * config/tc-s390.c (s390_machine): Don't force the .machine
453 argument to lower case.
454
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4552013-07-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
456
457 * config/tc-arm.c (s_arm_arch_extension): Improve error message
458 for invalid extension.
459
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4602013-07-19 Yufeng Zhang <yufeng.zhang@arm.com>
461
462 * config/tc-aarch64.c (enum aarch64_abi_type): New enumeration tag.
463 (AARCH64_ABI_LP64, AARCH64_ABI_ILP32): New enumerators.
464 (aarch64_abi): New variable.
465 (ilp32_p): Change to be a macro.
466 (aarch64_opts): Remove the support for option -milp32 and -mlp64.
467 (struct aarch64_option_abi_value_table): New struct.
468 (aarch64_abis): New table.
469 (aarch64_parse_abi): New function.
470 (aarch64_long_opts): Add entry for -mabi=.
471 * doc/as.texinfo (Target AArch64 options): Document -mabi.
472 * doc/c-aarch64.texi: Likewise.
473
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NC
4742013-07-18 Jim Thomas <thomas@cfht.hawaii.edu>
475
476 * config/tc-i386-intel.c (i386_intel_operand): Fixed signed vs
477 unsigned comparison.
478
f0c00282
NC
4792013-07-18 Sandeep Kumar Singh <Sandeep.Singh2@kpitcummins.com>
480
cbe02d4f 481 * config/rx-defs.h: Add macros for RX100, RX200, RX600, and
f0c00282 482 RX610.
cbe02d4f 483 * config/rx-parse.y: (rx_check_float_support): Add function to
f0c00282
NC
484 check floating point operation support for target RX100 and
485 RX200.
cbe02d4f
AM
486 * config/tc-rx.c: Add CPU options RX100, RX200, RX600, and RX610.
487 * doc/c-rx.texi: Add -mcpu option to recognize macros for RX100,
488 RX200, RX600, and RX610
f0c00282 489
8c997c27
NC
4902013-07-18 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
491
492 * config/tc-avr.c (md_show_usage): Add avrxmega2 to help text
493
8be59acb
NC
4942013-07-18 Vishnu K.S <vishnu.k_s@atmel.com>
495
496 * config/tc-avr.c: Make ata6289's ISA to AVR_ISA_AVR4.
497 * doc/c-avr.texi: Likewise.
498
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RS
4992013-07-15 Richard Sandiford <rdsandiford@googlemail.com>
500
501 * config/tc-mips.c (match_save_restore_list_operand): Avoid -Wformat
502 error with older GCCs.
503 (mips16_macro_build): Dereference args.
504
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RS
5052013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
506
507 * config/tc-mips.c (mips_prefer_vec_regno, mips_parse_register):
508 New functions, split out from...
509 (reg_lookup): ...here. Remove itbl support.
510 (reglist_lookup): Delete.
511 (mips_operand_token_type): New enum.
512 (mips_operand_token): New structure.
513 (mips_operand_tokens): New variable.
514 (mips_add_token, mips_parse_base_start, mips_parse_argument_token)
515 (mips_parse_arguments): New functions.
516 (md_begin): Initialize mips_operand_tokens.
517 (mips_arg_info): Add a token field. Remove optional_reg field.
518 (match_char, match_expression): New functions.
519 (match_const_int): Use match_expression. Remove "s" argument
520 and return a boolean result. Remove O_register handling.
521 (match_regno, match_reg, match_reg_range): New functions.
522 (match_int_operand, match_mapped_int_operand, match_msb_operand)
523 (match_reg_operand, match_reg_pair_operand, match_perf_reg_operand)
524 (match_addiusp_operand, match_clo_clz_dest_operand)
525 (match_lwm_swm_list_operand, match_entry_exit_operand)
526 (match_save_restore_list_operand, match_mdmx_imm_reg_operand)
527 (match_tied_reg_operand): Remove "s" argument and return a boolean
528 result. Match tokens rather than text. Update calls to
529 match_const_int. Rely on match_regno to call check_regno.
530 (match_pcrel_operand, match_pc_operand): Replace "s" argument with
531 "arg" argument. Return a boolean result.
532 (parse_float_constant): Replace with...
533 (match_float_constant): ...this new function.
534 (match_operand): Remove "s" argument and return a boolean result.
535 Update calls to subfunctions.
536 (mips_ip, mips16_ip): Call mips_parse_arguments. Use match routines
537 rather than string-parsing routines. Update handling of optional
538 registers for token scheme.
539
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5402013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
541
542 * config/tc-mips.c (parse_float_constant): Split out from...
543 (mips_ip): ...here.
544
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RS
5452013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
546
547 * config/tc-mips.c (INSERT_BITS, INSERT_OPERAND, MIPS16_INSERT_OPERAND):
548 Delete.
549
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RS
5502013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
551
552 * config/tc-mips.c (mips32_to_16_reg_map): Delete.
553 (match_entry_exit_operand): New function.
554 (match_save_restore_list_operand): Likewise.
555 (match_operand): Use them.
556 (check_absolute_expr): Delete.
557 (mips16_ip): Rewrite main parsing loop to use mips_operands.
558
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5592013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
560
561 * config/tc-mips.c: Enable functions commented out in previous patch.
562 (SKIP_SPACE_TABS): Move further up file.
563 (mips32_to_micromips_reg_b_map, mips32_to_micromips_reg_c_map)
564 (mips32_to_micromips_reg_d_map, mips32_to_micromips_reg_e_map)
565 (ips32_to_micromips_reg_f_map, mips32_to_micromips_reg_g_map)
566 (mips32_to_micromips_reg_l_map, mips32_to_micromips_reg_m_map)
567 (mips32_to_micromips_reg_q_map, mips32_to_micromips_reg_n_map)
568 (micromips_imm_b_map, micromips_imm_c_map): Delete.
569 (mips_lookup_reg_pair): Delete.
570 (macro): Use report_bad_range and report_bad_field.
571 (mips_immed, expr_const_in_range): Delete.
572 (mips_ip): Rewrite main parsing loop to use new functions.
573
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RS
5742013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
575
576 * config/tc-mips.c (mips_oddfpreg_ok): Move further up file.
577 Change return type to bfd_boolean.
578 (report_bad_range, report_bad_field): New functions.
579 (mips_arg_info): New structure.
580 (match_const_int, convert_reg_type, check_regno, match_int_operand)
581 (match_mapped_int_operand, match_msb_operand, match_reg_operand)
582 (match_reg_pair_operand, match_pcrel_operand, match_perf_reg_operand)
583 (match_addiusp_operand, match_clo_clz_dest_operand)
584 (match_lwm_swm_list_operand, match_mdmx_imm_reg_operand)
585 (match_pc_operand, match_tied_reg_operand, match_operand)
586 (check_completed_insn): New functions, commented out for now.
587
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RS
5882013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
589
590 * config/tc-mips.c (insn_insert_operand): New function.
591 (macro_build, mips16_macro_build): Put null character check
592 in the for loop and convert continues to breaks. Use operand
593 structures to handle constant operands.
594
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RS
5952013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
596
597 * config/tc-mips.c (validate_mips_insn): Move further up file.
598 Add insn_bits and decode_operand arguments. Use the mips_operand
599 fields to work out which bits an operand occupies. Detect double
600 definitions.
601 (validate_micromips_insn): Move further up file. Call into
602 validate_mips_insn.
603
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RS
6042013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
605
606 * config/tc-mips.c (mips16_macro_build): Remove 'Y' case.
607
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RS
6082013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
609
610 * config/tc-mips.c (macro_build): Take an int for "C", "k", "\\"
611 and "~".
612 (macro): Update accordingly.
613
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RS
6142013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
615
616 * config/tc-mips.c (imm_expr, imm2_expr, offset_expr): Tweak commentary.
617 (imm_reloc): Delete.
618 (md_assemble): Remove imm_reloc handling.
619 (mips_ip): Update commentary. Use offset_expr and offset_reloc
620 rather than imm_expr and imm_reloc for 'i', 'j' and 'u'.
621 Use a temporary array rather than imm_reloc when parsing
622 constant expressions. Remove imm_reloc initialization.
623 (mips16_ip): Update commentary. Use offset_expr and offset_reloc
624 for the relaxable field. Use a relax_char variable to track the
625 type of this field. Remove imm_reloc initialization.
626
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RS
6272013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
628
629 * config/tc-mips.c (mips16_ip): Handle "I".
630
ba92f887
MR
6312013-07-12 Maciej W. Rozycki <macro@codesourcery.com>
632
633 * config/tc-mips.c (mips_flag_nan2008): New variable.
634 (options): Add OPTION_NAN enum value.
635 (md_longopts): Handle it.
636 (md_parse_option): Likewise.
637 (s_nan): New function.
638 (mips_elf_final_processing): Handle EF_MIPS_NAN2008.
639 (md_show_usage): Add -mnan.
640
641 * doc/as.texinfo (Overview): Add -mnan.
642 * doc/c-mips.texi (MIPS Opts): Document -mnan.
643 (MIPS NaN Encodings): New node. Document .nan directive.
644 (MIPS-Dependent): List the new node.
645
c1094734
TG
6462013-07-09 Tristan Gingold <gingold@adacore.com>
647
648 * configure.com: Define HAVE_SYS_TYPES_H and HAVE_UNISTD_H
649
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RS
6502013-07-08 Richard Sandiford <rdsandiford@googlemail.com>
651
652 * config/tc-mips.c (mips_ip): Unconditionally parse an expression
653 for 'A' and assume that the constant has been elided if the result
654 is an O_register.
655
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RS
6562013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
657
658 * config/tc-mips.c (gprel16_reloc_p): New function.
659 (macro_read_relocs): Assume BFD_RELOC_LO16 if all relocs are
660 BFD_RELOC_UNUSED.
661 (offset_high_part, small_offset_p): New functions.
662 (nacro): Use them. Remove *_OB and *_DOB cases. For single-
663 register load and store macros, handle the 16-bit offset case first.
664 If a 16-bit offset is not suitable for the instruction we're
665 generating, load it into the temporary register using
666 ADDRESS_ADDI_INSN. Make the M_LI_DD code fall through into the
667 M_L_DAB code once the address has been constructed. For double load
668 and store macros, again handle the 16-bit offset case first.
669 If the second register cannot be accessed from the same high
670 part as the first, load it into AT using ADDRESS_ADDI_INSN.
671 Fix the handling of LD in cases where the first register is the
672 same as the base. Also handle the case where the offset is
673 not 16 bits and the second register cannot be accessed from the
674 same high part as the first. For unaligned loads and stores,
675 fuse the offbits == 12 and old "ab" handling. Apply this handling
676 whenever the second offset needs a different high part from the first.
677 Construct the offset using ADDRESS_ADDI_INSN where possible,
678 for offbits == 16 as well as offbits == 12. Use offset_reloc
679 when constructing the individual loads and stores.
680 (mips_ip): Set up imm_expr, imm2_expr, offset_expr, imm_reloc
681 and offset_reloc before matching against a particular opcode.
682 Handle elided 'A' constants. Allow 'A' constants to use
683 relocation operators.
684
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RS
6852013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
686
687 * config/tc-mips.c (validate_mips_insn): Remove "[" and "]" handling.
688 (mips_ip): Likewise. Do not set is_mdmx for INSN_5400 instructions.
689 Check constraints on the VR5400 RZU.OB, SLL.OB and SRL.OB instructions.
690
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RS
6912013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
692
693 * config/tc-mips.c (mips_ip): Preserve the real bit number for "+p".
694 Require the msb to be <= 31 for "+s". Check that the size is <= 31
695 for both "+s" and "+S".
696
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RS
6972013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
698
699 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn):
700 (mips_ip, mips16_ip): Handle "+i".
701
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RS
7022013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
703
704 * config/tc-mips.c (mips32_to_micromips_reg_h_map): Delete.
705 (micromips_to_32_reg_h_map): Rename to...
706 (micromips_to_32_reg_h_map1): ...this.
707 (micromips_to_32_reg_i_map): Rename to...
708 (micromips_to_32_reg_h_map2): ...this.
709 (mips_lookup_reg_pair): New function.
710 (gpr_write_mask, macro): Adjust after above renaming.
711 (validate_micromips_insn): Remove "mi" handling.
712 (mips_ip): Likewise. Parse both registers in a pair for "mh".
713
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RS
7142013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
715
716 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn)
717 (mips_ip): Remove "+D" and "+T" handling.
718
fb798c50
AK
7192013-07-05 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
720
721 * config/tc-s390.c (md_gather_operands, md_apply_fix): Support new
722 relocs.
723
2c0a3565
MS
7242013-07-03 Marcus Shawcroft <marcus.shawcroft@arm.com>
725
4aa2c5e2
MS
726 * config/tc-aarch64.c (reloc_table): Merge got_prel19 into got.
727
7282013-07-02 Marcus Shawcroft <marcus.shawcroft@arm.com>
729
2c0a3565
MS
730 * config/tc-aarch64.c (md_apply_fix): Reorder case values.
731 (aarch64_force_relocation): Likewise.
732
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AM
7332013-07-02 Alan Modra <amodra@gmail.com>
734
735 * config/tc-ppc.c (ppc_elf_adjust_symtab): Don't make .TOC. weak.
736
81566a9b
MR
7372013-06-26 Maciej W. Rozycki <macro@codesourcery.com>
738
739 * doc/as.texinfo (Overview): Remove @samp from MIPS ISA names.
740 * doc/c-mips.texi (MIPS Options): Remove @sc from MIPS ISA names.
741 Replace @sc{mips16} with literal `MIPS16'.
742 (MIPS ISA): Replace @sc{mips3} with literal `MIPS III'.
743
a6bb11b2
YZ
7442013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
745
746 * config/tc-aarch64.c (reloc_table): Replace
747 BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with
748 BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to
749 BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and
750 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC.
751 (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC,
752 BFD_RELOC_AARCH64_LD32_GOT_LO12_NC,
753 BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC,
754 BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC,
755 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and
756 BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC.
757 (aarch64_force_relocation): Likewise.
758
cec5225b
YZ
7592013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
760
761 * config/tc-aarch64.c (ilp32_p): New static variable.
762 (elf64_aarch64_target_format): Return the target according to the
763 value of 'ilp32_p'.
764 (md_begin): Determine 'mach' according to the value of 'ilp32_p'.
765 (aarch64_opts): Add support for options '-milp32' and '-mlp64'.
766 (aarch64_dwarf2_addr_size): New function.
767 * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration.
768 (DWARF2_ADDR_SIZE): New define.
769
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7702013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
771
772 * doc/c-mips.texi: Use ISA instead of @sc{isa}.
773
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RS
7742013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
775
776 * config/tc-mips.c (validate_mips_insn): Use STYPE rather than SHAMT.
777
833794fc
MR
7782013-06-25 Maciej W. Rozycki <macro@codesourcery.com>
779
780 * config/tc-mips.c (mips_set_options): Add insn32 member.
781 (mips_opts): Initialize it.
782 (NOP_INSN, NOP_INSN_SIZE): Handle insn32 mode.
783 (options): Add OPTION_INSN32 and OPTION_NO_INSN32 enum values.
784 (md_longopts): Add "minsn32" and "mno-insn32" options.
785 (is_size_valid): Handle insn32 mode.
786 (md_assemble): Pass instruction string down to macro.
787 (brk_fmt): Add second dimension and insn32 mode initializers.
788 (mfhl_fmt): Likewise.
789 (BRK_FMT, MFHL_FMT): Handle insn32 mode.
790 (macro_build) <'c'>: Handle microMIPS 32-bit BREAK encoding.
791 (macro_build_jalr, move_register): Handle insn32 mode.
792 (macro_build_branch_rs): Likewise.
793 (macro): Handle insn32 mode.
794 <M_JRADDIUSP>, <M_JRC>, <M_MOVEP>: New cases.
795 (mips_ip): Handle insn32 mode.
796 (md_parse_option): Handle OPTION_INSN32 and OPTION_NO_INSN32.
797 (s_mipsset): Handle "insn32" and "noinsn32" pseudo-ops.
798 (mips_handle_align): Handle insn32 mode.
799 (md_show_usage): Add -minsn32 and -mno-insn32.
800
801 * doc/as.texinfo (Target MIPS options): Add -minsn32 and
802 -mno-insn32 options.
803 (-minsn32, -mno-insn32): New options.
804 * doc/c-mips.texi (MIPS Opts): Add -minsn32 and -mno-insn32
805 options.
806 (MIPS assembly options): New node. Document .set insn32 and
807 .set noinsn32.
808 (MIPS-Dependent): List the new node.
809
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NC
8102013-06-25 Nick Clifton <nickc@redhat.com>
811
812 * config/tc-msp430.c (msp430_srcoperand): Do not allow the use of
813 the PC in indirect addressing on 430xv2 parts.
814 (msp430_operands): Add version test to hardware bug encoding
815 restrictions.
816
477330fc
RM
8172013-06-24 Roland McGrath <mcgrathr@google.com>
818
d996d970
RM
819 * config/tc-arm.c (parse_reg_list): Use skip_past_char for '}',
820 so it skips whitespace before it.
821 (s_arm_unwind_save_mmxwr, s_arm_unwind_save_mmxwcg): Likewise.
822
477330fc
RM
823 * config/tc-arm.c (arm_symbol_chars): Include '{' and '}'.
824 (arm_reg_parse_multi): Skip whitespace first.
825 (parse_reg_list): Likewise.
826 (parse_vfp_reg_list): Likewise.
827 (s_arm_unwind_save_mmxwcg): Likewise.
828
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NC
8292013-06-24 Nick Clifton <nickc@redhat.com>
830
831 PR gas/15623
832 * config/tc-arm.c (do_t_smc): Mark as ending an IT block.
833
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RS
8342013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
835
836 * config/tc-mips.c (mips_ip): Fix swapped bit numbers in comments.
837
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RS
8382013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
839
840 * config/tc-mips.c: Assert that offsetT and valueT are at least
841 8 bytes in size.
842 (GPR_SMIN, GPR_SMAX): New macros.
843 (macro, mips_ip): Remove code for 4-byte valueT and offsetT.
844
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RS
8452013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
846
847 * config/tc-mips.c: Remove OBJ_ELF, OBJ_MAYBE_ELF and IS_ELF
848 conditions. Remove any code deselected by them.
849 (s_mips_frame, s_mips_mask): Handle ECOFF_DEBUGGING case first.
850
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RS
8512013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
852
853 * NEWS: Note removal of ECOFF support.
854 * doc/as.texinfo (--emulation): Update for the removal of MIPS ECOFF.
855 * Makefile.am (TARG_ENV_HFILES): Remove config/te-lnews.h.
856 (MULTI_CFILES): Remove config/e-mipsecoff.c.
857 * Makefile.in: Regenerate.
858 * configure.in: Remove MIPS ECOFF references.
859 (mips-sony-bsd*, mips-*-bsd*, mips-*-lnews*-ecoff, mips-*-*-ecoff):
860 Delete cases.
861 (mips-*-irix5*-*, mips*-*-linux*-*, mips*-*-freebsd*)
862 (mips*-*-kfreebsd*-gnu, mips-*-*-elf): Fold into...
863 (mips-*-*): ...this single case.
864 (mipsbecoff, mipslecoff, mipsecoff): Remove emulations. Expect
865 MIPS emulations to be e-mipself*.
866 * configure: Regenerate.
867 * configure.tgt (mips-sony-bsd*, mips-*-ultrix*, mips-*-osf*)
868 (mips-*-ecoff*, mips-*-pe*, mips-*-irix*, ips-*-lnews*, mips-*-riscos*)
869 (mips-*-sysv*): Remove coff and ecoff cases.
870 * as.c (mipsbecoff, mipslecoff, mipsecoff): Remove.
871 * ecoff.c: Remove reference to MIPS ECOFF.
872 * config/e-mipsecoff.c, config/te-lnews.h: Delete files.
873 * config/tc-mips.c (ECOFF_LITTLE_FORMAT): Delete.
874 (RDATA_SECTION_NAME, mips_target_form): Remove COFF and ECOFF cases.
875 (mips_hi_fixup): Tweak comment.
876 (append_insn): Require a howto.
877 (mips_after_parse_args): Remove OBJ_MAYBE_ECOFF code.
878
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RS
8792013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
880
881 * doc/as.texinfo: Use MIPS rather than @sc{mips} throughout.
882 Use "CPU" instead of "cpu".
883 * doc/c-mips.texi: Likewise.
884 (MIPS Opts): Rename to MIPS Options.
885 (MIPS option stack): Rename to MIPS Option Stack.
886 (MIPS ASE instruction generation overrides): Rename to
887 MIPS ASE Instruction Generation Overrides (for now).
888 (MIPS floating-point): Rename to MIPS Floating-Point.
889
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RS
8902013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
891
892 * doc/c-mips.texi (MIPS Macros): New section.
893 (MIPS Object): Replace with...
894 (MIPS Small Data): ...this new section.
895
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RS
8962013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
897
898 * doc/c-mips.texi (MIPS symbol sizes): Move section further up file.
899 Capitalize name. Use @kindex instead of @cindex for .set entries.
900
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RS
9012013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
902
903 * doc/c-mips.texi (MIPS Stabs): Remove section.
904
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RS
9052013-06-20 Richard Sandiford <rdsandiford@googlemail.com>
906
907 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS, ISA_SUPPORTS_DSP_ASE)
908 (ISA_SUPPORTS_DSP64_ASE, ISA_SUPPORTS_DSPR2_ASE, ISA_SUPPORTS_EVA_ASE)
909 (ISA_SUPPORTS_MT_ASE, ISA_SUPPORTS_MCU_ASE, ISA_SUPPORTS_VIRT_ASE)
910 (ISA_SUPPORTS_VIRT64_ASE): Delete.
911 (mips_ase): New structure.
912 (mips_ases): New table.
913 (FP64_ASES): New macro.
914 (mips_ase_groups): New array.
915 (mips_isa_rev, mips_ase_mask, mips_check_isa_supports_ase)
916 (mips_check_isa_supports_ases, mips_set_ase, mips_lookup_ase): New
917 functions.
918 (is_opcode_valid): Use mips_ases to get the 64-bit ASE flags.
919 (md_parse_option): Use mips_ases and mips_set_ase instead of
920 separate case statements for each ASE option.
921 (mips_after_parse_args): Use FP64_ASES. Use
922 mips_check_isa_supports_ases to check the ASEs against
923 other options.
924 (s_mipsset): Use mips_ases and mips_set_ase instead of
925 separate if statements for each ASE option. Use
926 mips_check_isa_supports_ases, even when a non-ASE option
927 is specified.
928
63a4bc21
KT
9292013-06-19 Greta Yorsh <Greta.Yorsh@arm.com>
930
931 * config/tc-arm.c (arm_cpus): Add support for Cortex-A12.
932
c31f3936
RS
9332013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
934
935 * config/tc-mips.c (md_shortopts, options, md_longopts)
936 (md_longopts_size): Move earlier in file.
937
846ef2d0
RS
9382013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
939
940 * config/tc-mips.c (mips_set_options): Replace separate "ase_*" fields
941 with a single "ase" bitmask.
942 (mips_opts): Update accordingly.
943 (file_ase, file_ase_explicit): New variables.
944 (file_ase_mips3d, file_ase_mdmx, file_ase_smartmips, file_ase_dsp)
945 (file_ase_dspr2, file_ase_eva, file_ase_mt, file_ase_virt): Delete.
946 (ISA_HAS_ROR): Adjust for mips_set_options change.
947 (is_opcode_valid): Take the base ase mask directly from mips_opts.
948 (mips_ip): Adjust for mips_set_options change.
949 (md_parse_option): Likewise. Update file_ase_explicit.
950 (mips_after_parse_args): Adjust for mips_set_options change.
951 Use bitmask operations to select the default ASEs. Set file_ase
952 rather than individual per-ASE variables.
953 (s_mipsset): Adjust for mips_set_options change.
954 (mips_elf_final_processing): Test file_ase rather than
955 file_ase_mdmx. Remove commented-out code.
956
d16afab6
RS
9572013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
958
959 * config/tc-mips.c (mips_cpu_info): Add an "ase" field.
960 (MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, MIPS_CPU_ASE_MT)
961 (MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX, MIPS_CPU_ASE_DSPR2)
962 (MIPS_CPU_ASE_MCU, MIPS_CPU_ASE_VIRT, MIPS_CPU_ASE_EVA): Delete.
963 (mips_after_parse_args): Use the new "ase" field to choose
964 the default ASEs.
965 (mips_cpu_info_table): Move ASEs from the "flags" field to the
966 "ase" field.
967
e83a675f
RE
9682013-06-18 Richard Earnshaw <rearnsha@arm.com>
969
970 * config/tc-arm.c (symbol_preemptible): New function.
971 (relax_branch): Use it.
972
7f3c4072
CM
9732013-06-17 Catherine Moore <clm@codesourcery.com>
974 Maciej W. Rozycki <macro@codesourcery.com>
975 Chao-Ying Fu <fu@mips.com>
976
977 * config/tc-mips.c (mips_set_options): Add ase_eva.
978 (mips_set_options mips_opts): Add ase_eva.
979 (file_ase_eva): Declare.
980 (ISA_SUPPORTS_EVA_ASE): Define.
981 (IS_SEXT_9BIT_NUM): Define.
982 (MIPS_CPU_ASE_EVA): Define.
983 (is_opcode_valid): Add support for ase_eva.
984 (macro_build): Likewise.
985 (macro): Likewise.
986 (validate_mips_insn): Likewise.
987 (validate_micromips_insn): Likewise.
988 (mips_ip): Likewise.
989 (options): Add OPTION_EVA and OPTION_NO_EVA.
990 (md_longopts): Add -meva and -mno-eva.
991 (md_parse_option): Process new options.
992 (mips_after_parse_args): Check for valid EVA combinations.
993 (s_mipsset): Likewise.
994
e410add4
RS
9952013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
996
997 * dwarf2dbg.h (dwarf2_move_insn): Declare.
998 * dwarf2dbg.c (line_subseg): Add pmove_tail.
999 (get_line_subseg): Add create_p argument. Initialize pmove_tail.
1000 (dwarf2_gen_line_info_1): Update call accordingly.
1001 (dwarf2_move_insn): New function.
1002 * config/tc-mips.c (append_insn): Use dwarf2_move_insn.
1003
6a50d470
RS
10042013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
1005
1006 Revert:
1007
1008 2011-09-05 Richard Sandiford <rdsandiford@googlemail.com>
1009
1010 PR gas/13024
1011 * dwarf2dbg.c (pending_lines, pending_lines_tail): New variables.
1012 (dwarf2_gen_line_info_1): Delete.
1013 (dwarf2_push_line, dwarf2_flush_pending_lines): New functions.
1014 (dwarf2_gen_line_info, dwarf2_emit_label): Use them.
1015 (dwarf2_consume_line_info): Call dwarf2_flush_pending_lines.
1016 (dwarf2_directive_loc): Push previous .locs instead of generating
1017 them immediately.
1018
f122319e
CF
10192013-06-13 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1020
1021 * config/tc-mips.c (ISA_SUPPORTS_VIRT_ASE): Support micromips.
1022 (ISA_SUPPORTS_VIRT64_ASE): Support 64-bit micromips.
1023
909c7f9c
NC
10242013-06-13 Nick Clifton <nickc@redhat.com>
1025
1026 PR gas/15602
1027 * config/tc-m68k.h (TC_CHECK_ADJUSTED_BROKEN_DOT_WORD): Define.
1028 * config/tc-m68k.c (tc_m68k_check_adjusted_broken_word): New
1029 function. Generates an error if the adjusted offset is out of a
1030 16-bit range.
1031
5d5755a7
SL
10322013-06-12 Sandra Loosemore <sandra@codesourcery.com>
1033
1034 * config/tc-nios2.c (md_apply_fix): Mask constant
1035 BFD_RELOC_NIOS2_HIADJ16 value to 16 bits.
1036
3bf0dbfb
MR
10372013-06-10 Maciej W. Rozycki <macro@codesourcery.com>
1038
1039 * config/tc-mips.c (append_insn): Don't do branch relaxation for
1040 MIPS-3D instructions either.
1041 (md_convert_frag): Update the COPx branch mask accordingly.
1042
1043 * config/tc-mips.c (md_show_usage): Document --[no-]relax-branch
1044 option.
1045 * doc/as.texinfo (Overview): Add --relax-branch and
1046 --no-relax-branch.
1047 * doc/c-mips.texi (MIPS Opts): Document --relax-branch and
1048 --no-relax-branch.
1049
9daf7bab
SL
10502013-06-09 Sandra Loosemore <sandra@codesourcery.com>
1051
1052 * config/tc-nios2.c (nios2_parse_args): Allow trap argument to
1053 omitted.
1054
d301a56b
RS
10552013-06-08 Catherine Moore <clm@codesourcery.com>
1056
1057 * config/tc-mips.c (is_opcode_valid): Build ASE mask.
1058 (is_opcode_valid_16): Pass ase value to opcode_is_member.
1059 (append_insn): Change INSN_xxxx to ASE_xxxx.
1060
7bab7634
DC
10612013-06-01 George Thomas <george.thomas@atmel.com>
1062
cbe02d4f 1063 * gas/config/tc-avr.c: Change ISA for devices with USB support to
7bab7634
DC
1064 AVR_ISA_XMEGAU
1065
f60cf82f
L
10662013-05-31 H.J. Lu <hongjiu.lu@intel.com>
1067
1068 * config/tc-i386.c (md_begin): Don't align text/data/bss sections
1069 for ELF.
1070
a3f278e2
CM
10712013-05-31 Paul Brook <paul@codesourcery.com>
1072
a3f278e2
CM
1073 * config/tc-mips.c (s_ehword): New.
1074
067ec077
CM
10752013-05-30 Paul Brook <paul@codesourcery.com>
1076
1077 * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH.
1078
d6101ac2
MR
10792013-05-29 Maciej W. Rozycki <macro@codesourcery.com>
1080
1081 * write.c (resolve_reloc_expr_symbols): On REL targets don't
1082 convert relocs who have no relocatable field either. Rephrase
1083 the conditional so that the PC-relative check is only applied
1084 for REL targets.
1085
f19ccbda
MR
10862013-05-28 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1087
1088 * config/tc-mips.c (macro) <ld>: Don't use $zero for address
1089 calculation.
1090
418009c2
YZ
10912013-05-28 Yufeng Zhang <yufeng.zhang@arm.com>
1092
1093 * config/tc-aarch64.c (reloc_table): Update to use
477330fc 1094 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of
418009c2
YZ
1095 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE.
1096 (md_apply_fix): Likewise.
1097 (aarch64_force_relocation): Likewise.
1098
0a8897c7
KT
10992013-05-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1100
1101 * config/tc-arm.c (it_fsm_post_encode): Improve
1102 warning messages about deprecated IT block formats.
1103
89d2a2a3
MS
11042013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com>
1105
1106 * config/tc-aarch64.c (md_apply_fix): Move value range checking
1107 inside fx_done condition.
1108
c77c0862
RS
11092013-05-22 Jürgen Urban <JuergenUrban@gmx.de>
1110
1111 * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB.
1112
c0637f3a
PB
11132013-05-20 Peter Bergner <bergner@vnet.ibm.com>
1114
1115 * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error
1116 and clean up warning when using PRINT_OPCODE_TABLE.
1117
5656a981
AM
11182013-05-20 Alan Modra <amodra@gmail.com>
1119
1120 * config/tc-ppc.c (md_apply_fix): Hoist code common to insn
1121 and data fixups performing shift/high adjust/sign extension on
1122 fieldval. Sink fx_pcrel handling and checks. Use fixP->fx_size
1123 when writing data fixups rather than recalculating size.
1124
997b26e8
JBG
11252013-05-16 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1126
1127 * doc/c-msp430.texi: Fix typo.
1128
9f6e76f4
TG
11292013-05-16 Tristan Gingold <gingold@adacore.com>
1130
1131 * config/tc-ppc.c (ppc_is_toc_sym): Symbols of class XMC_TC
1132 are also TOC symbols.
1133
638d3803
NC
11342013-05-16 Nick Clifton <nickc@redhat.com>
1135
1136 * config/tc-msp430.c: Make -mmcu recognise more part numbers.
1137 Add -mcpu command to specify core type.
997b26e8 1138 * doc/c-msp430.texi: Update documentation.
638d3803 1139
b015e599
AP
11402013-05-09 Andrew Pinski <apinski@cavium.com>
1141
1142 * config/tc-mips.c (struct mips_set_options): New ase_virt field.
1143 (mips_opts): Update for the new field.
1144 (file_ase_virt): New variable.
1145 (ISA_SUPPORTS_VIRT_ASE): New macro.
1146 (ISA_SUPPORTS_VIRT64_ASE): New macro.
1147 (MIPS_CPU_ASE_VIRT): New define.
1148 (is_opcode_valid): Handle ase_virt.
1149 (macro_build): Handle "+J".
1150 (validate_mips_insn): Likewise.
1151 (mips_ip): Likewise.
1152 (enum options): Add OPTION_VIRT and OPTION_NO_VIRT.
1153 (md_longopts): Add mvirt and mnovirt
1154 (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT.
1155 (mips_after_parse_args): Handle ase_virt field.
1156 (s_mipsset): Handle "virt" and "novirt".
1157 (mips_elf_final_processing): Add a comment about virt ASE might need
1158 a new flag.
1159 (md_show_usage): Print out the usage of -mvirt and mno-virt options.
1160 * doc/c-mips.texi: Document -mvirt and -mno-virt.
1161 Document ".set virt" and ".set novirt".
1162
da8094d7
AM
11632013-05-09 Alan Modra <amodra@gmail.com>
1164
1165 * config/tc-ppc.c (md_apply_fix): Sign extend fieldval under
1166 control of operand flag bits.
1167
c5f8c205
AM
11682013-05-07 Alan Modra <amodra@gmail.com>
1169
1170 * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro.
1171 (PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise.
1172 (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise.
1173 (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise.
1174 (md_apply_fix): Set fx_no_overflow for assorted relocations.
1175 Shift and sign-extend fieldval for use by some VLE reloc
1176 operand->insert functions.
1177
b47468a6
CM
11782013-05-06 Paul Brook <paul@codesourcery.com>
1179 Catherine Moore <clm@codesourcery.com>
1180
c5f8c205
AM
1181 * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL.
1182 (limited_pcrel_reloc_p): Likewise.
b47468a6
CM
1183 (md_apply_fix): Likewise.
1184 (tc_gen_reloc): Likewise.
1185
2de39019
CM
11862013-05-06 Richard Sandiford <rdsandiford@googlemail.com>
1187
1188 * config/tc-mips.c (limited_pcrel_reloc_p): New function.
1189 (mips_fix_adjustable): Adjust pc-relative check to use
1190 limited_pc_reloc_p.
1191
754e2bb9
RS
11922013-05-02 Richard Sandiford <rdsandiford@googlemail.com>
1193
1194 * config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries.
1195 (s_mips_stab): Do not restrict to stabn only.
1196
13761a11
NC
11972013-05-02 Nick Clifton <nickc@redhat.com>
1198
1199 * config/tc-msp430.c: Add support for the MSP430X architecture.
1200 Add code to insert a NOP instruction after any instruction that
1201 might change the interrupt state.
1202 Add support for the LARGE memory model.
1203 Add code to initialise the .MSP430.attributes section.
1204 * config/tc-msp430.h: Add support for the MSP430X architecture.
1205 * doc/c-msp430.texi: Document the new -mL and -mN command line
1206 options.
1207 * NEWS: Mention support for the MSP430X architecture.
1208
df26367c
MR
12092013-05-01 Maciej W. Rozycki <macro@codesourcery.com>
1210
1211 * configure.tgt: Replace alpha*-*-linuxecoff* pattern with
1212 alpha*-*-linux*ecoff*.
1213
f02d8318
CF
12142013-04-30 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1215
1216 * config/tc-mips.c (mips_ip): Add sizelo.
1217 For "+C", "+G", and "+H", set sizelo and compare against it.
1218
b40bf0a2
NC
12192013-04-29 Nick Clifton <nickc@redhat.com>
1220
1221 * as.c (Options): Add -gdwarf-sections.
1222 (parse_args): Likewise.
1223 * as.h (flag_dwarf_sections): Declare.
1224 * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes.
1225 (process_entries): When -gdwarf-sections is enabled generate
1226 fragmentary .debug_line sections.
1227 (out_debug_line): Set the section for the .debug_line section end
1228 symbol.
1229 * doc/as.texinfo: Document -gdwarf-sections.
1230 * NEWS: Mention -gdwarf-sections.
1231
8eeccb77 12322013-04-26 Christian Groessler <chris@groessler.org>
00a3147e
CG
1233
1234 * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdline
1235 according to the target parameter. Don't call s_segm since s_segm
1236 calls bfd_set_arch_mach using stdoutput, but stdoutput isn't
1237 initialized yet.
1238 (md_begin): Call s_segm according to target parameter from command
1239 line.
1240
49926cd0
AM
12412013-04-25 Alan Modra <amodra@gmail.com>
1242
1243 * configure.in: Allow little-endian linux.
1244 * configure: Regenerate.
1245
e3031850
SL
12462013-04-24 Sandra Loosemore <sandra@codesourcery.com>
1247
1248 * config/tc-nios2.c (nios2_control_register_arg_p): Rename
1249 "fstatus" control register to "eccinj".
1250
cb948fc0
KT
12512013-04-19 Kai Tietz <ktietz@redhat.com>
1252
1253 * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin.
1254
4455e9ad
JB
12552013-04-15 Julian Brown <julian@codesourcery.com>
1256
1257 * expr.c (add_to_result, subtract_from_result): Make global.
1258 * expr.h (add_to_result, subtract_from_result): Add prototypes.
1259 * config/tc-sh.c (sh_optimize_expr): Use add_to_result,
1260 subtract_from_result to handle extra bit of precision for .sleb128
1261 directive operands.
1262
956a6ba3
JB
12632013-04-10 Julian Brown <julian@codesourcery.com>
1264
1265 * read.c (convert_to_bignum): Add sign parameter. Use it
1266 instead of X_unsigned to determine sign of resulting bignum.
1267 (emit_expr): Pass extra argument to convert_to_bignum.
1268 (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass
1269 X_extrabit to convert_to_bignum.
1270 (parse_bitfield_cons): Set X_extrabit.
1271 * expr.c (make_expr_symbol, expr_build_uconstant, operand):
1272 Initialise X_extrabit field as appropriate.
1273 (add_to_result): New.
1274 (subtract_from_result): New.
1275 (expr): Use above.
1276 * expr.h (expressionS): Add X_extrabit field.
1277
eb9f3f00
JB
12782013-04-10 Jan Beulich <jbeulich@suse.com>
1279
1280 * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base
1281 register being PC when is_t or writeback, and use distinct
1282 diagnostic for the latter case.
1283
ccb84d65
JB
12842013-04-10 Jan Beulich <jbeulich@suse.com>
1285
1286 * gas/config/tc-arm.c (parse_operands): Re-write
1287 po_barrier_or_imm().
1288 (do_barrier): Remove bogus constraint().
1289 (do_t_barrier): Remove.
1290
4d13caa0
NC
12912013-04-09 Joerg Wunsch <joerg.wunsch@atmel.com>
1292
1293 * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2,
1294 ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2,
1295 ATmega2564RFR2
1296 * gas/doc/c-avr.texi (-mmcu documentation): Likewise.
1297
16d02dc9
JB
12982013-04-09 Jan Beulich <jbeulich@suse.com>
1299
1300 * gas/config/tc-arm.c (do_vmrs): Accept all control registers.
1301 Use local variable Rt in more places.
1302 (do_vmsr): Accept all control registers.
1303
05ac0ffb
JB
13042013-04-09 Jan Beulich <jbeulich@suse.com>
1305
1306 * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
1307 if there was none specified for moves between scalar and core
1308 register.
1309
2d51fb74
JB
13102013-04-09 Jan Beulich <jbeulich@suse.com>
1311
1312 * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the
1313 NEON_ALL_LANES case.
1314
94dcf8bf
JB
13152013-04-08 Jan Beulich <jbeulich@suse.com>
1316
1317 * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for
1318 PC-relative VSTR.
1319
1472d06f
JB
13202013-04-08 Jan Beulich <jbeulich@suse.com>
1321
1322 * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq
1323 entry to sp_fiq.
1324
0c76cae8
AM
13252013-04-03 Alan Modra <amodra@gmail.com>
1326
1327 * doc/as.texinfo: Add support to generate man options for h8300.
1328 * doc/c-h8300.texi: Likewise.
1329
92eb40d9
RR
13302013-03-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
1331
1332 * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and
1333 Cortex-A57.
1334
51dcdd4d
NC
13352013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com>
1336
1337 PR binutils/15068
1338 * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array.
1339
c5d685bf
NC
13402013-03-26 Nick Clifton <nickc@redhat.com>
1341
9b978282
NC
1342 PR gas/15295
1343 * listing.c (rebuffer_line): Rewrite to avoid seeking back to the
1344 start of the file each time.
1345
c5d685bf
NC
1346 PR gas/15178
1347 * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for
1348 FreeBSD targets.
1349
9699c833
TG
13502013-03-26 Douglas B Rupp <rupp@gnat.com>
1351
1352 * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment
1353 after fixup.
1354
4755303e
WN
13552013-03-21 Will Newton <will.newton@linaro.org>
1356
1357 * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all
1358 pc-relative str instructions in Thumb mode.
1359
81f5558e
NC
13602013-03-21 Michael Schewe <michael.schewe@gmx.net>
1361
1362 * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
1363 @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
1364 R_H8_DISP32A16.
1365 * config/tc-h8300.h: Remove duplicated defines.
1366
71863e73
NC
13672013-03-21 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
1368
1369 PR gas/15282
1370 * tc-avr.c (mcu_has_3_byte_pc): New function.
1371 (tc_cfi_frame_initial_instructions): Call it to find return
1372 address size.
1373
795b8e6b
NC
13742013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com>
1375
1376 PR gas/15095
1377 * config/tc-tic6x.c (tic6x_try_encode): Handle
1378 tic6x_coding_dreg_(msb|lsb) field coding types and use it to
1379 encode register pair numbers when required.
1380
ba86b375
WN
13812013-03-15 Will Newton <will.newton@linaro.org>
1382
1383 * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register
1384 in vstr in Thumb mode for pre-ARMv7 cores.
1385
9e6f3811
AS
13862013-03-14 Andreas Schwab <schwab@suse.de>
1387
1388 * doc/c-arc.texi (ARC Directives): Revert last change and use
1389 @itemize instead of @table.
1390 * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
1391
b10bf8c5
NC
13922013-03-14 Nick Clifton <nickc@redhat.com>
1393
1394 PR gas/15273
1395 * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a
1396 NULL message, instead just check ARM_CPU_IS_ANY directly.
1397
ba724cfc
NC
13982013-03-14 Nick Clifton <nickc@redhat.com>
1399
1400 PR gas/15212
9e6f3811 1401 * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet
ba724cfc
NC
1402 for table format.
1403 * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
1404 to the @item directives.
1405 (ARM-Neon-Alignment): Move to correct place in the document.
1406 * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
1407 formatting.
1408 * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
1409 @smallexample.
1410
531a94fd
SL
14112013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
1412
1413 * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'
1414 case. Add default BAD_CASE to switch.
1415
dad60f8e
SL
14162013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
1417
1418 * config/tc-nios2.c (nios2_assemble_args_ds): New function.
1419 (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
1420
dd5181d5
KT
14212013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1422
1423 * config/tc-arm.c (crc_ext_armv8): New feature set.
1424 (UNPRED_REG): New macro.
1425 (do_crc32_1): New function.
1426 (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
1427 do_crc32ch, do_crc32cw): Likewise.
1428 (TUEc): New macro.
1429 (insns): Add entries for crc32 mnemonics.
1430 (arm_extensions): Add entry for crc.
1431
8e723a10
CLT
14322013-03-08 Chung-Lin Tang <cltang@codesourcery.com>
1433
1434 * write.h (struct fix): Add fx_dot_frag field.
1435 (dot_frag): Declare.
1436 * write.c (dot_frag): New variable.
1437 (fix_new_internal): Set fx_dot_frag field with dot_frag.
1438 (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
1439 * expr.c (expr): Save value of frag_now in dot_frag when setting
1440 dot_value.
1441 * read.c (emit_expr): Likewise. Delete comments.
1442
be05d201
L
14432013-03-07 H.J. Lu <hongjiu.lu@intel.com>
1444
1445 * config/tc-i386.c (flag_code_names): Removed.
1446 (i386_index_check): Rewrote.
1447
62b0d0d5
YZ
14482013-03-05 Yufeng Zhang <yufeng.zhang@arm.com>
1449
1450 * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
1451 add comment.
1452 (aarch64_double_precision_fmovable): New function.
1453 (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
1454 function; handle hexadecimal representation of IEEE754 encoding.
1455 (parse_operands): Update the call to parse_aarch64_imm_float.
1456
165de32a
L
14572013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1458
1459 * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
1460 (check_hle): Updated.
1461 (md_assemble): Likewise.
1462 (parse_insn): Likewise.
1463
d5de92cf
L
14642013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1465
1466 * config/tc-i386.c (_i386_insn): Add rep_prefix.
9e6f3811 1467 (md_assemble): Check if REP prefix is OK.
d5de92cf
L
1468 (parse_insn): Remove expecting_string_instruction. Set
1469 i.rep_prefix.
1470
e60bb1dd
YZ
14712013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1472
1473 * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
1474
aeebdd9b
YZ
14752013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1476
1477 * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
1478 for system registers.
1479
4107ae22
DD
14802013-02-27 DJ Delorie <dj@redhat.com>
1481
1482 * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
1483 (rl78_op): Handle %code().
1484 (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
1485 (tc_gen_reloc): Likwise; convert to a computed reloc.
1486 (md_apply_fix): Likewise.
1487
151fa98f
NC
14882013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
1489
1490 * config/rl78-parse.y: Fix encoding of DIVWU insn.
1491
70a8bc5b 14922013-02-25 Terry Guo <terry.guo@arm.com>
1493
1494 * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
1495 * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
1496 list of accepted CPUs.
1497
5c111e37
L
14982013-02-19 H.J. Lu <hongjiu.lu@intel.com>
1499
1500 PR gas/15159
1501 * config/tc-i386.c (cpu_arch): Add ".smap".
1502
1503 * doc/c-i386.texi: Document smap.
1504
8a75745d
MR
15052013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1506
1507 * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
1508 mips_assembling_insn appropriately.
1509 (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
1510
79850f26
MR
15112013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1512
cf29fc61 1513 * config/tc-mips.c (append_insn): Correct indentation, remove
79850f26
MR
1514 extraneous braces.
1515
4c261dff
NC
15162013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1517
5c111e37 1518 * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
4c261dff 1519
ea33f281
NC
15202013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
1521
1522 * configure.tgt: Add nios2-*-rtems*.
1523
a1ccaec9
YZ
15242013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
1525
1526 * config/tc-aarch64.c (md_begin): Change to check if 'name' is
1527 NULL.
1528
0aa27725
RS
15292013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
1530
1531 * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
1532 (macro): Use it. Assert that trunc.w.s is not used for r5900.
1533
da4339ed
NC
15342013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com>
1535
1536 * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
1537 core.
1538
36591ba1 15392013-02-06 Sandra Loosemore <sandra@codesourcery.com>
5c111e37 1540 Andrew Jenner <andrew@codesourcery.com>
36591ba1
SL
1541
1542 Based on patches from Altera Corporation.
1543
1544 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
1545 (TARGET_CPU_HFILES): Add config/tc-nios2.h.
1546 * Makefile.in: Regenerated.
1547 * configure.tgt: Add case for nios2*-linux*.
1548 * config/obj-elf.c: Conditionally include elf/nios2.h.
1549 * config/tc-nios2.c: New file.
1550 * config/tc-nios2.h: New file.
1551 * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
1552 * doc/Makefile.in: Regenerated.
1553 * doc/all.texi: Set NIOSII.
1554 * doc/as.texinfo (Overview): Add Nios II options.
1555 (Machine Dependencies): Include c-nios2.texi.
1556 * doc/c-nios2.texi: New file.
1557 * NEWS: Note Altera Nios II support.
1558
94d4433a
AM
15592013-02-06 Alan Modra <amodra@gmail.com>
1560
1561 PR gas/14255
1562 * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
1563 Don't skip fixups with fx_subsy non-NULL.
1564 * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
1565 with fx_subsy non-NULL.
1566
ace9af6f
L
15672013-02-04 H.J. Lu <hongjiu.lu@intel.com>
1568
1569 * doc/c-metag.texi: Add "@c man" markers.
1570
89d67ed9
AM
15712013-02-04 Alan Modra <amodra@gmail.com>
1572
1573 * write.c (fixup_segment): Return void. Delete seg_reloc_count
1574 related code.
1575 (TC_ADJUST_RELOC_COUNT): Delete.
1576 * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
1577
89072bd6
AM
15782013-02-04 Alan Modra <amodra@gmail.com>
1579
1580 * po/POTFILES.in: Regenerate.
1581
f9b2d544
NC
15822013-01-30 Markos Chandras <markos.chandras@imgtec.com>
1583
1584 * config/tc-metag.c: Make SWAP instruction less permissive with
1585 its operands.
1586
392ca752
DD
15872013-01-29 DJ Delorie <dj@redhat.com>
1588
1589 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
1590 relocs in .word/.etc statements.
1591
427d0db6
RM
15922013-01-29 Roland McGrath <mcgrathr@google.com>
1593
1594 * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
1595 immediate value for 8-bit offset" error so it shows line info.
1596
4faf939a
JM
15972013-01-24 Joseph Myers <joseph@codesourcery.com>
1598
1599 * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
1600 for 64-bit output.
1601
78c8d46c
NC
16022013-01-24 Nick Clifton <nickc@redhat.com>
1603
1604 * config/tc-v850.c: Add support for e3v5 architecture.
1605 * doc/c-v850.texi: Mention new support.
1606
fb5b7503
NC
16072013-01-23 Nick Clifton <nickc@redhat.com>
1608
1609 PR gas/15039
1610 * config/tc-avr.c: Include dwarf2dbg.h.
1611
8ce3d284
L
16122013-01-18 H.J. Lu <hongjiu.lu@intel.com>
1613
1614 * config/tc-i386.c (reloc): Support size relocation only for ELF.
1615 (tc_i386_fix_adjustable): Likewise.
1616 (lex_got): Likewise.
1617 (tc_gen_reloc): Likewise.
1618
f5555712
YZ
16192013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
1620
1621 * config/tc-aarch64.c (output_operand_error_record): Change to output
1622 the out-of-range error message as value-expected message if there is
1623 only one single value in the expected range.
1624 (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
1625 LSL #0 as a programmer-friendly feature.
1626
8fd4256d
L
16272013-01-16 H.J. Lu <hongjiu.lu@intel.com>
1628
1629 * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
1630 (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
1631 BFD_RELOC_64_SIZE relocations.
1632 (lex_got): Support "symbol@SIZE" and don't create GOT symbol
1633 for it.
1634 (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
1635 relocations against local symbols.
1636
a5840dce
AM
16372013-01-16 Alan Modra <amodra@gmail.com>
1638
1639 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
1640 finding some sort of toc syntax error, and break to avoid
1641 compiler uninit warning.
1642
af89796a
L
16432013-01-15 H.J. Lu <hongjiu.lu@intel.com>
1644
1645 PR gas/15019
1646 * config/tc-i386.c (lex_got): Increment length by 1 if the
1647 relocation token is removed.
1648
dd42f060
NC
16492013-01-15 Nick Clifton <nickc@redhat.com>
1650
1651 * config/tc-v850.c (md_assemble): Allow signed values for
1652 V850E_IMMEDIATE.
1653
464e3686
SK
16542013-01-11 Sean Keys <skeys@ipdatasys.com>
1655
1656 * config/tc-xgate.c (md_begin): Fix mistake made when going from
af89796a 1657 git to cvs.
464e3686 1658
5817ffd1
PB
16592013-01-10 Peter Bergner <bergner@vnet.ibm.com>
1660
1661 * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
1662 * doc/c-ppc.texi (PowerPC-Opts): Likewise.
1663 * config/tc-ppc.c (md_show_usage): Likewise.
1664 (ppc_handle_align): Handle power8's group ending nop.
1665
f4b1f6a9
SK
16662013-01-10 Sean Keys <skeys@ipdatasys.com>
1667
1668 * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
af89796a 1669 that the assember exits after the opcodes have been printed.
f4b1f6a9 1670
34bca508
L
16712013-01-10 H.J. Lu <hongjiu.lu@intel.com>
1672
1673 * app.c: Remove trailing white spaces.
1674 * as.c: Likewise.
1675 * as.h: Likewise.
1676 * cond.c: Likewise.
1677 * dw2gencfi.c: Likewise.
1678 * dwarf2dbg.h: Likewise.
1679 * ecoff.c: Likewise.
1680 * input-file.c: Likewise.
1681 * itbl-lex.h: Likewise.
1682 * output-file.c: Likewise.
1683 * read.c: Likewise.
1684 * sb.c: Likewise.
1685 * subsegs.c: Likewise.
1686 * symbols.c: Likewise.
1687 * write.c: Likewise.
1688 * config/tc-i386.c: Likewise.
1689 * doc/Makefile.am: Likewise.
1690 * doc/Makefile.in: Likewise.
1691 * doc/c-aarch64.texi: Likewise.
1692 * doc/c-alpha.texi: Likewise.
1693 * doc/c-arc.texi: Likewise.
1694 * doc/c-arm.texi: Likewise.
1695 * doc/c-avr.texi: Likewise.
1696 * doc/c-bfin.texi: Likewise.
1697 * doc/c-cr16.texi: Likewise.
1698 * doc/c-d10v.texi: Likewise.
1699 * doc/c-d30v.texi: Likewise.
1700 * doc/c-h8300.texi: Likewise.
1701 * doc/c-hppa.texi: Likewise.
1702 * doc/c-i370.texi: Likewise.
1703 * doc/c-i386.texi: Likewise.
1704 * doc/c-i860.texi: Likewise.
1705 * doc/c-m32c.texi: Likewise.
1706 * doc/c-m32r.texi: Likewise.
1707 * doc/c-m68hc11.texi: Likewise.
1708 * doc/c-m68k.texi: Likewise.
1709 * doc/c-microblaze.texi: Likewise.
1710 * doc/c-mips.texi: Likewise.
1711 * doc/c-msp430.texi: Likewise.
1712 * doc/c-mt.texi: Likewise.
1713 * doc/c-s390.texi: Likewise.
1714 * doc/c-score.texi: Likewise.
1715 * doc/c-sh.texi: Likewise.
1716 * doc/c-sh64.texi: Likewise.
1717 * doc/c-tic54x.texi: Likewise.
1718 * doc/c-tic6x.texi: Likewise.
1719 * doc/c-v850.texi: Likewise.
1720 * doc/c-xc16x.texi: Likewise.
1721 * doc/c-xgate.texi: Likewise.
1722 * doc/c-xtensa.texi: Likewise.
1723 * doc/c-z80.texi: Likewise.
1724 * doc/internals.texi: Likewise.
1725
4c665b71
RM
17262013-01-10 Roland McGrath <mcgrathr@google.com>
1727
1728 * hash.c (hash_new_sized): Make it global.
1729 * hash.h: Declare it.
1730 * macro.c (define_macro): Use hash_new_sized instead of hash_new,
1731 pass a small size.
1732
a3c62988
NC
17332013-01-10 Will Newton <will.newton@imgtec.com>
1734
1735 * Makefile.am: Add Meta.
1736 * Makefile.in: Regenerate.
1737 * config/tc-metag.c: New file.
1738 * config/tc-metag.h: New file.
1739 * configure.tgt: Add Meta.
1740 * doc/Makefile.am: Add Meta.
1741 * doc/Makefile.in: Regenerate.
1742 * doc/all.texi: Add Meta.
1743 * doc/as.texiinfo: Document Meta options.
1744 * doc/c-metag.texi: New file.
1745
b37df7c4
SE
17462013-01-09 Steve Ellcey <sellcey@mips.com>
1747
1748 * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
1749 calls.
1750 * config/tc-mips.c (internalError): Remove, replace with abort.
1751
a3251895
YZ
17522013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
1753
1754 * config/tc-aarch64.c (parse_operands): Change to compare the result
1755 of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
1756
8ab8155f
NC
17572013-01-07 Nick Clifton <nickc@redhat.com>
1758
1759 PR gas/14887
1760 * config/tc-arm.c (skip_past_char): Skip whitespace before the
1761 anticipated character.
1762 * config/tc-arm.c (parse_address_main): Delete skip of whitespace
1763 here as it is no longer needed.
1764
a4ac1c42
AS
17652013-01-06 Andreas Schwab <schwab@linux-m68k.org>
1766
1767 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
1768 * doc/c-score.texi (SCORE-Opts): Likewise.
1769 * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
1770
e407c74b
NC
17712013-01-04 Juergen Urban <JuergenUrban@gmx.de>
1772
1773 * config/tc-mips.c: Add support for MIPS r5900.
1774 Add M_LQ_AB and M_SQ_AB to support large values for instructions
1775 lq and sq.
1776 (can_swap_branch_p, get_append_method): Detect some conditional
1777 short loops to fix a bug on the r5900 by NOP in the branch delay
1778 slot.
1779 (M_MUL): Support 3 operands in multu on r5900.
1780 (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
1781 (s_mipsset): Force 32 bit floating point on r5900.
1782 (mips_ip): Check parameter range of instructions mfps and mtps on
1783 r5900.
1784 * configure.in: Detect CPU type when target string contains r5900
1785 (e.g. mips64r5900el-linux-gnu).
1786
62658407
L
17872013-01-02 H.J. Lu <hongjiu.lu@intel.com>
1788
1789 * as.c (parse_args): Update copyright year to 2013.
1790
95830fd1
YZ
17912013-01-02 Yufeng Zhang <yufeng.zhang@arm.com>
1792
1793 * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
1794 and "cortex57".
1795
517bb291 17962013-01-02 Nick Clifton <nickc@redhat.com>
d709e4e6 1797
517bb291
NC
1798 PR gas/14987
1799 * config/tc-arm.c (parse_address_main): Skip whitespace before a
1800 closing bracket.
d709e4e6 1801
517bb291 1802For older changes see ChangeLog-2012
08d56133 1803\f
517bb291 1804Copyright (C) 2013 Free Software Foundation, Inc.
752937aa
NC
1805
1806Copying and distribution of this file, with or without modification,
1807are permitted in any medium without royalty provided the copyright
1808notice and this notice are preserved.
1809
08d56133
NC
1810Local Variables:
1811mode: change-log
1812left-margin: 8
1813fill-column: 74
1814version-control: never
1815End: